sio.c revision 132561
1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 4. Neither the name of the University nor the names of its contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 30 * from: i386/isa sio.c,v 1.234 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: head/sys/dev/sio/sio.c 132561 2004-07-22 23:16:12Z imp $"); 35 36#include "opt_comconsole.h" 37#include "opt_compat.h" 38#include "opt_gdb.h" 39#include "opt_kdb.h" 40#include "opt_sio.h" 41 42/* 43 * Serial driver, based on 386BSD-0.1 com driver. 44 * Mostly rewritten to use pseudo-DMA. 45 * Works for National Semiconductor NS8250-NS16550AF UARTs. 46 * COM driver, based on HP dca driver. 47 * 48 * Changes for PC-Card integration: 49 * - Added PC-Card driver table and handlers 50 */ 51#include <sys/param.h> 52#include <sys/systm.h> 53#include <sys/bus.h> 54#include <sys/conf.h> 55#include <sys/fcntl.h> 56#include <sys/interrupt.h> 57#include <sys/kdb.h> 58#include <sys/kernel.h> 59#include <sys/limits.h> 60#include <sys/lock.h> 61#include <sys/malloc.h> 62#include <sys/module.h> 63#include <sys/mutex.h> 64#include <sys/proc.h> 65#include <sys/reboot.h> 66#include <sys/serial.h> 67#include <sys/sysctl.h> 68#include <sys/syslog.h> 69#include <sys/tty.h> 70#include <machine/bus_pio.h> 71#include <machine/bus.h> 72#include <sys/rman.h> 73#include <sys/timepps.h> 74#include <sys/uio.h> 75#include <sys/cons.h> 76 77#include <isa/isavar.h> 78 79#include <machine/resource.h> 80 81#include <dev/sio/sioreg.h> 82#include <dev/sio/siovar.h> 83 84#ifdef COM_ESP 85#include <dev/ic/esp.h> 86#endif 87#include <dev/ic/ns16550.h> 88 89#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 90 91#define CALLOUT_MASK 0x80 92#define CONTROL_MASK 0x60 93#define CONTROL_INIT_STATE 0x20 94#define CONTROL_LOCK_STATE 0x40 95#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 96#define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 97 | ((mynor) & 0x1f)) 98#define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 99 | ((unit) & 0x1f)) 100 101#ifdef COM_MULTIPORT 102/* checks in flags for multiport and which is multiport "master chip" 103 * for a given card 104 */ 105#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 106#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 107#define COM_NOTAST4(flags) ((flags) & 0x04) 108#else 109#define COM_ISMULTIPORT(flags) (0) 110#endif /* COM_MULTIPORT */ 111 112#define COM_C_IIR_TXRDYBUG 0x80000 113#define COM_CONSOLE(flags) ((flags) & 0x10) 114#define COM_DEBUGGER(flags) ((flags) & 0x80) 115#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 116#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 117#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 118#define COM_LLCONSOLE(flags) ((flags) & 0x40) 119#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 120#define COM_NOFIFO(flags) ((flags) & 0x02) 121#define COM_NOPROBE(flags) ((flags) & 0x40000) 122#define COM_NOSCR(flags) ((flags) & 0x100000) 123#define COM_PPSCTS(flags) ((flags) & 0x10000) 124#define COM_ST16650A(flags) ((flags) & 0x20000) 125#define COM_TI16754(flags) ((flags) & 0x200000) 126 127#define sio_getreg(com, off) \ 128 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 129#define sio_setreg(com, off, value) \ 130 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 131 132/* 133 * com state bits. 134 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 135 * than the other bits so that they can be tested as a group without masking 136 * off the low bits. 137 * 138 * The following com and tty flags correspond closely: 139 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 140 * comstop()) 141 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 142 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 143 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 144 * TS_FLUSH is not used. 145 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 146 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 147 */ 148#define CS_BUSY 0x80 /* output in progress */ 149#define CS_TTGO 0x40 /* output not stopped by XOFF */ 150#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 151#define CS_CHECKMSR 1 /* check of MSR scheduled */ 152#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 153#define CS_ODONE 4 /* output completed */ 154#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 155#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 156 157static char const * const error_desc[] = { 158#define CE_OVERRUN 0 159 "silo overflow", 160#define CE_INTERRUPT_BUF_OVERFLOW 1 161 "interrupt-level buffer overflow", 162#define CE_TTY_BUF_OVERFLOW 2 163 "tty-level buffer overflow", 164}; 165 166#define CE_NTYPES 3 167#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 168 169/* types. XXX - should be elsewhere */ 170typedef u_int Port_t; /* hardware port */ 171typedef u_char bool_t; /* boolean */ 172 173/* queue of linear buffers */ 174struct lbq { 175 u_char *l_head; /* next char to process */ 176 u_char *l_tail; /* one past the last char to process */ 177 struct lbq *l_next; /* next in queue */ 178 bool_t l_queued; /* nonzero if queued */ 179}; 180 181/* com device structure */ 182struct com_s { 183 u_char state; /* miscellaneous flag bits */ 184 bool_t active_out; /* nonzero if the callout device is open */ 185 u_char cfcr_image; /* copy of value written to CFCR */ 186#ifdef COM_ESP 187 bool_t esp; /* is this unit a hayes esp board? */ 188#endif 189 u_char extra_state; /* more flag bits, separate for order trick */ 190 u_char fifo_image; /* copy of value written to FIFO */ 191 bool_t hasfifo; /* nonzero for 16550 UARTs */ 192 bool_t loses_outints; /* nonzero if device loses output interrupts */ 193 u_char mcr_image; /* copy of value written to MCR */ 194#ifdef COM_MULTIPORT 195 bool_t multiport; /* is this unit part of a multiport device? */ 196#endif /* COM_MULTIPORT */ 197 bool_t no_irq; /* nonzero if irq is not attached */ 198 bool_t gone; /* hardware disappeared */ 199 bool_t poll; /* nonzero if polling is required */ 200 bool_t poll_output; /* nonzero if polling for output is required */ 201 bool_t st16650a; /* nonzero if Startech 16650A compatible */ 202 int unit; /* unit number */ 203 u_int flags; /* copy of device flags */ 204 u_int tx_fifo_size; 205 u_int wopeners; /* # processes waiting for DCD in open() */ 206 207 /* 208 * The high level of the driver never reads status registers directly 209 * because there would be too many side effects to handle conveniently. 210 * Instead, it reads copies of the registers stored here by the 211 * interrupt handler. 212 */ 213 u_char last_modem_status; /* last MSR read by intr handler */ 214 u_char prev_modem_status; /* last MSR handled by high level */ 215 216 u_char *ibuf; /* start of input buffer */ 217 u_char *ibufend; /* end of input buffer */ 218 u_char *ibufold; /* old input buffer, to be freed */ 219 u_char *ihighwater; /* threshold in input buffer */ 220 u_char *iptr; /* next free spot in input buffer */ 221 int ibufsize; /* size of ibuf (not include error bytes) */ 222 int ierroff; /* offset of error bytes in ibuf */ 223 224 struct lbq obufq; /* head of queue of output buffers */ 225 struct lbq obufs[2]; /* output buffers */ 226 227 bus_space_tag_t bst; 228 bus_space_handle_t bsh; 229 230 Port_t data_port; /* i/o ports */ 231#ifdef COM_ESP 232 Port_t esp_port; 233#endif 234 Port_t int_ctl_port; 235 Port_t int_id_port; 236 Port_t modem_ctl_port; 237 Port_t line_status_port; 238 Port_t modem_status_port; 239 240 struct tty *tp; /* cross reference */ 241 242 /* Initial state. */ 243 struct termios it_in; /* should be in struct tty */ 244 struct termios it_out; 245 246 /* Lock state. */ 247 struct termios lt_in; /* should be in struct tty */ 248 struct termios lt_out; 249 250 bool_t do_timestamp; 251 struct timeval timestamp; 252 struct pps_state pps; 253 int pps_bit; 254#ifdef ALT_BREAK_TO_DEBUGGER 255 int alt_brk_state; 256#endif 257 258 u_long bytes_in; /* statistics */ 259 u_long bytes_out; 260 u_int delta_error_counts[CE_NTYPES]; 261 u_long error_counts[CE_NTYPES]; 262 263 u_long rclk; 264 265 struct resource *irqres; 266 struct resource *ioportres; 267 int ioportrid; 268 void *cookie; 269 struct cdev *devs[6]; 270 271 /* 272 * Data area for output buffers. Someday we should build the output 273 * buffer queue without copying data. 274 */ 275 u_char obuf1[256]; 276 u_char obuf2[256]; 277}; 278 279#ifdef COM_ESP 280static int espattach(struct com_s *com, Port_t esp_port); 281#endif 282 283static void combreak(struct tty *tp, int sig); 284static timeout_t siobusycheck; 285static u_int siodivisor(u_long rclk, speed_t speed); 286static void comhardclose(struct com_s *com); 287static void sioinput(struct com_s *com); 288static void siointr1(struct com_s *com); 289static void siointr(void *arg); 290static int commodem(struct tty *tp, int sigon, int sigoff); 291static int comparam(struct tty *tp, struct termios *t); 292static void siopoll(void *); 293static void siosettimeout(void); 294static int siosetwater(struct com_s *com, speed_t speed); 295static void comstart(struct tty *tp); 296static void comstop(struct tty *tp, int rw); 297static timeout_t comwakeup; 298 299char sio_driver_name[] = "sio"; 300static struct mtx sio_lock; 301static int sio_inited; 302 303/* table and macro for fast conversion from a unit number to its com struct */ 304devclass_t sio_devclass; 305#define com_addr(unit) ((struct com_s *) \ 306 devclass_get_softc(sio_devclass, unit)) /* XXX */ 307 308static d_open_t sioopen; 309static d_close_t sioclose; 310static d_read_t sioread; 311static d_write_t siowrite; 312static d_ioctl_t sioioctl; 313 314static struct cdevsw sio_cdevsw = { 315 .d_version = D_VERSION, 316 .d_open = sioopen, 317 .d_close = sioclose, 318 .d_read = sioread, 319 .d_write = siowrite, 320 .d_ioctl = sioioctl, 321 .d_name = sio_driver_name, 322 .d_flags = D_TTY | D_NEEDGIANT, 323}; 324 325static d_open_t siocopen; 326static d_close_t siocclose; 327static d_read_t siocrdwr; 328static d_ioctl_t siocioctl; 329 330static struct cdevsw sioc_cdevsw = { 331 .d_version = D_VERSION, 332 .d_open = siocopen, 333 .d_close = siocclose, 334 .d_read = siocrdwr, 335 .d_write = siocrdwr, 336 .d_ioctl = siocioctl, 337 .d_name = sio_driver_name, 338 .d_flags = D_TTY | D_NEEDGIANT, 339}; 340 341int comconsole = -1; 342static volatile speed_t comdefaultrate = CONSPEED; 343static u_long comdefaultrclk = DEFAULT_RCLK; 344SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 345static speed_t gdbdefaultrate = GDBSPEED; 346SYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, 347 &gdbdefaultrate, GDBSPEED, ""); 348static u_int com_events; /* input chars + weighted output completions */ 349static Port_t siocniobase; 350static int siocnunit = -1; 351static void *sio_slow_ih; 352static void *sio_fast_ih; 353static int sio_timeout; 354static int sio_timeouts_until_log; 355static struct callout_handle sio_timeout_handle 356 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 357static int sio_numunits; 358 359#ifdef GDB 360static Port_t siogdbiobase = 0; 361#endif 362 363#ifdef COM_ESP 364/* XXX configure this properly. */ 365/* XXX quite broken for new-bus. */ 366static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 367static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 368#endif 369 370/* 371 * handle sysctl read/write requests for console speed 372 * 373 * In addition to setting comdefaultrate for I/O through /dev/console, 374 * also set the initial and lock values for the /dev/ttyXX device 375 * if there is one associated with the console. Finally, if the /dev/tty 376 * device has already been open, change the speed on the open running port 377 * itself. 378 */ 379 380static int 381sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 382{ 383 int error, s; 384 speed_t newspeed; 385 struct com_s *com; 386 struct tty *tp; 387 388 newspeed = comdefaultrate; 389 390 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 391 if (error || !req->newptr) 392 return (error); 393 394 comdefaultrate = newspeed; 395 396 if (comconsole < 0) /* serial console not selected? */ 397 return (0); 398 399 com = com_addr(comconsole); 400 if (com == NULL) 401 return (ENXIO); 402 403 /* 404 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 405 * (note, the lock rates really are boolean -- if non-zero, disallow 406 * speed changes) 407 */ 408 com->it_in.c_ispeed = com->it_in.c_ospeed = 409 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 410 com->it_out.c_ispeed = com->it_out.c_ospeed = 411 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 412 413 /* 414 * if we're open, change the running rate too 415 */ 416 tp = com->tp; 417 if (tp && (tp->t_state & TS_ISOPEN)) { 418 tp->t_termios.c_ispeed = 419 tp->t_termios.c_ospeed = comdefaultrate; 420 s = spltty(); 421 error = comparam(tp, &tp->t_termios); 422 splx(s); 423 } 424 return error; 425} 426 427SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 428 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 429/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */ 430 431#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 432#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 433 434/* 435 * Unload the driver and clear the table. 436 * XXX this is mostly wrong. 437 * XXX TODO: 438 * This is usually called when the card is ejected, but 439 * can be caused by a kldunload of a controller driver. 440 * The idea is to reset the driver's view of the device 441 * and ensure that any driver entry points such as 442 * read and write do not hang. 443 */ 444int 445siodetach(dev) 446 device_t dev; 447{ 448 struct com_s *com; 449 int i; 450 451 com = (struct com_s *) device_get_softc(dev); 452 if (com == NULL) { 453 device_printf(dev, "NULL com in siounload\n"); 454 return (0); 455 } 456 com->gone = TRUE; 457 if (com->tp) 458 ttygone(com->tp); 459 for (i = 0 ; i < 6; i++) 460 destroy_dev(com->devs[i]); 461 if (com->irqres) { 462 bus_teardown_intr(dev, com->irqres, com->cookie); 463 bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 464 } 465 if (com->ioportres) 466 bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid, 467 com->ioportres); 468 if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 469 device_printf(dev, "still open, forcing close\n"); 470 ttyld_close(com->tp, 0); 471 tty_close(com->tp); 472 } else { 473 if (com->ibuf != NULL) 474 free(com->ibuf, M_DEVBUF); 475 device_set_softc(dev, NULL); 476 free(com, M_DEVBUF); 477 } 478 return (0); 479} 480 481int 482sioprobe(dev, xrid, rclk, noprobe) 483 device_t dev; 484 int xrid; 485 u_long rclk; 486 int noprobe; 487{ 488#if 0 489 static bool_t already_init; 490 device_t xdev; 491#endif 492 struct com_s *com; 493 u_int divisor; 494 bool_t failures[10]; 495 int fn; 496 device_t idev; 497 Port_t iobase; 498 intrmask_t irqmap[4]; 499 intrmask_t irqs; 500 u_char mcr_image; 501 int result; 502 u_long xirq; 503 u_int flags = device_get_flags(dev); 504 int rid; 505 struct resource *port; 506 507 rid = xrid; 508 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 509 0, ~0, IO_COMSIZE, RF_ACTIVE); 510 if (!port) 511 return (ENXIO); 512 513 com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 514 if (com == NULL) { 515 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 516 return (ENOMEM); 517 } 518 device_set_softc(dev, com); 519 com->bst = rman_get_bustag(port); 520 com->bsh = rman_get_bushandle(port); 521 if (rclk == 0) 522 rclk = DEFAULT_RCLK; 523 com->rclk = rclk; 524 525 while (sio_inited != 2) 526 if (atomic_cmpset_int(&sio_inited, 0, 1)) { 527 mtx_init(&sio_lock, sio_driver_name, NULL, 528 (comconsole != -1) ? 529 MTX_SPIN | MTX_QUIET : MTX_SPIN); 530 atomic_store_rel_int(&sio_inited, 2); 531 } 532 533#if 0 534 /* 535 * XXX this is broken - when we are first called, there are no 536 * previously configured IO ports. We could hard code 537 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 538 * This code has been doing nothing since the conversion since 539 * "count" is zero the first time around. 540 */ 541 if (!already_init) { 542 /* 543 * Turn off MCR_IENABLE for all likely serial ports. An unused 544 * port with its MCR_IENABLE gate open will inhibit interrupts 545 * from any used port that shares the interrupt vector. 546 * XXX the gate enable is elsewhere for some multiports. 547 */ 548 device_t *devs; 549 int count, i, xioport; 550 551 devclass_get_devices(sio_devclass, &devs, &count); 552 for (i = 0; i < count; i++) { 553 xdev = devs[i]; 554 if (device_is_enabled(xdev) && 555 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 556 NULL) == 0) 557 outb(xioport + com_mcr, 0); 558 } 559 free(devs, M_TEMP); 560 already_init = TRUE; 561 } 562#endif 563 564 if (COM_LLCONSOLE(flags)) { 565 printf("sio%d: reserved for low-level i/o\n", 566 device_get_unit(dev)); 567 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 568 device_set_softc(dev, NULL); 569 free(com, M_DEVBUF); 570 return (ENXIO); 571 } 572 573 /* 574 * If the device is on a multiport card and has an AST/4 575 * compatible interrupt control register, initialize this 576 * register and prepare to leave MCR_IENABLE clear in the mcr. 577 * Otherwise, prepare to set MCR_IENABLE in the mcr. 578 * Point idev to the device struct giving the correct id_irq. 579 * This is the struct for the master device if there is one. 580 */ 581 idev = dev; 582 mcr_image = MCR_IENABLE; 583#ifdef COM_MULTIPORT 584 if (COM_ISMULTIPORT(flags)) { 585 Port_t xiobase; 586 u_long io; 587 588 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 589 if (idev == NULL) { 590 printf("sio%d: master device %d not configured\n", 591 device_get_unit(dev), COM_MPMASTER(flags)); 592 idev = dev; 593 } 594 if (!COM_NOTAST4(flags)) { 595 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 596 NULL) == 0) { 597 xiobase = io; 598 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 599 NULL, NULL) == 0) 600 outb(xiobase + com_scr, 0x80); 601 else 602 outb(xiobase + com_scr, 0); 603 } 604 mcr_image = 0; 605 } 606 } 607#endif /* COM_MULTIPORT */ 608 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 609 mcr_image = 0; 610 611 bzero(failures, sizeof failures); 612 iobase = rman_get_start(port); 613 614 /* 615 * We don't want to get actual interrupts, just masked ones. 616 * Interrupts from this line should already be masked in the ICU, 617 * but mask them in the processor as well in case there are some 618 * (misconfigured) shared interrupts. 619 */ 620 mtx_lock_spin(&sio_lock); 621/* EXTRA DELAY? */ 622 623 /* 624 * For the TI16754 chips, set prescaler to 1 (4 is often the 625 * default after-reset value) as otherwise it's impossible to 626 * get highest baudrates. 627 */ 628 if (COM_TI16754(flags)) { 629 u_char cfcr, efr; 630 631 cfcr = sio_getreg(com, com_cfcr); 632 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 633 efr = sio_getreg(com, com_efr); 634 /* Unlock extended features to turn off prescaler. */ 635 sio_setreg(com, com_efr, efr | EFR_EFE); 636 /* Disable EFR. */ 637 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 638 /* Turn off prescaler. */ 639 sio_setreg(com, com_mcr, 640 sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 641 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 642 sio_setreg(com, com_efr, efr); 643 sio_setreg(com, com_cfcr, cfcr); 644 } 645 646 /* 647 * Initialize the speed and the word size and wait long enough to 648 * drain the maximum of 16 bytes of junk in device output queues. 649 * The speed is undefined after a master reset and must be set 650 * before relying on anything related to output. There may be 651 * junk after a (very fast) soft reboot and (apparently) after 652 * master reset. 653 * XXX what about the UART bug avoided by waiting in comparam()? 654 * We don't want to to wait long enough to drain at 2 bps. 655 */ 656 if (iobase == siocniobase) 657 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 658 else { 659 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 660 divisor = siodivisor(rclk, SIO_TEST_SPEED); 661 sio_setreg(com, com_dlbl, divisor & 0xff); 662 sio_setreg(com, com_dlbh, divisor >> 8); 663 sio_setreg(com, com_cfcr, CFCR_8BITS); 664 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 665 } 666 667 /* 668 * Enable the interrupt gate and disable device interupts. This 669 * should leave the device driving the interrupt line low and 670 * guarantee an edge trigger if an interrupt can be generated. 671 */ 672/* EXTRA DELAY? */ 673 sio_setreg(com, com_mcr, mcr_image); 674 sio_setreg(com, com_ier, 0); 675 DELAY(1000); /* XXX */ 676 irqmap[0] = isa_irq_pending(); 677 678 /* 679 * Attempt to set loopback mode so that we can send a null byte 680 * without annoying any external device. 681 */ 682/* EXTRA DELAY? */ 683 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 684 685 /* 686 * Attempt to generate an output interrupt. On 8250's, setting 687 * IER_ETXRDY generates an interrupt independent of the current 688 * setting and independent of whether the THR is empty. On 16450's, 689 * setting IER_ETXRDY generates an interrupt independent of the 690 * current setting. On 16550A's, setting IER_ETXRDY only 691 * generates an interrupt when IER_ETXRDY is not already set. 692 */ 693 sio_setreg(com, com_ier, IER_ETXRDY); 694 695 /* 696 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 697 * an interrupt. They'd better generate one for actually doing 698 * output. Loopback may be broken on the same incompatibles but 699 * it's unlikely to do more than allow the null byte out. 700 */ 701 sio_setreg(com, com_data, 0); 702 if (iobase == siocniobase) 703 DELAY((1 + 2) * 1000000 / (comdefaultrate / 10)); 704 else 705 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 706 707 /* 708 * Turn off loopback mode so that the interrupt gate works again 709 * (MCR_IENABLE was hidden). This should leave the device driving 710 * an interrupt line high. It doesn't matter if the interrupt 711 * line oscillates while we are not looking at it, since interrupts 712 * are disabled. 713 */ 714/* EXTRA DELAY? */ 715 sio_setreg(com, com_mcr, mcr_image); 716 717 /* 718 * It seems my Xircom CBEM56G Cardbus modem wants to be reset 719 * to 8 bits *again*, or else probe test 0 will fail. 720 * gwk@sgi.com, 4/19/2001 721 */ 722 sio_setreg(com, com_cfcr, CFCR_8BITS); 723 724 /* 725 * Some PCMCIA cards (Palido 321s, DC-1S, ...) have the "TXRDY bug", 726 * so we probe for a buggy IIR_TXRDY implementation even in the 727 * noprobe case. We don't probe for it in the !noprobe case because 728 * noprobe is always set for PCMCIA cards and the problem is not 729 * known to affect any other cards. 730 */ 731 if (noprobe) { 732 /* Read IIR a few times. */ 733 for (fn = 0; fn < 2; fn ++) { 734 DELAY(10000); 735 failures[6] = sio_getreg(com, com_iir); 736 } 737 738 /* IIR_TXRDY should be clear. Is it? */ 739 result = 0; 740 if (failures[6] & IIR_TXRDY) { 741 /* 742 * No. We seem to have the bug. Does our fix for 743 * it work? 744 */ 745 sio_setreg(com, com_ier, 0); 746 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 747 /* Yes. We discovered the TXRDY bug! */ 748 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 749 } else { 750 /* No. Just fail. XXX */ 751 result = ENXIO; 752 sio_setreg(com, com_mcr, 0); 753 } 754 } else { 755 /* Yes. No bug. */ 756 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 757 } 758 sio_setreg(com, com_ier, 0); 759 sio_setreg(com, com_cfcr, CFCR_8BITS); 760 mtx_unlock_spin(&sio_lock); 761 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 762 if (iobase == siocniobase) 763 result = 0; 764 if (result != 0) { 765 device_set_softc(dev, NULL); 766 free(com, M_DEVBUF); 767 } 768 return (result); 769 } 770 771 /* 772 * Check that 773 * o the CFCR, IER and MCR in UART hold the values written to them 774 * (the values happen to be all distinct - this is good for 775 * avoiding false positive tests from bus echoes). 776 * o an output interrupt is generated and its vector is correct. 777 * o the interrupt goes away when the IIR in the UART is read. 778 */ 779/* EXTRA DELAY? */ 780 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 781 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 782 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 783 DELAY(10000); /* Some internal modems need this time */ 784 irqmap[1] = isa_irq_pending(); 785 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 786 DELAY(1000); /* XXX */ 787 irqmap[2] = isa_irq_pending(); 788 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 789 790 /* 791 * Turn off all device interrupts and check that they go off properly. 792 * Leave MCR_IENABLE alone. For ports without a master port, it gates 793 * the OUT2 output of the UART to 794 * the ICU input. Closing the gate would give a floating ICU input 795 * (unless there is another device driving it) and spurious interrupts. 796 * (On the system that this was first tested on, the input floats high 797 * and gives a (masked) interrupt as soon as the gate is closed.) 798 */ 799 sio_setreg(com, com_ier, 0); 800 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 801 failures[7] = sio_getreg(com, com_ier); 802 DELAY(1000); /* XXX */ 803 irqmap[3] = isa_irq_pending(); 804 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 805 806 mtx_unlock_spin(&sio_lock); 807 808 irqs = irqmap[1] & ~irqmap[0]; 809 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 810 ((1 << xirq) & irqs) == 0) { 811 printf( 812 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 813 device_get_unit(dev), xirq, irqs); 814 printf( 815 "sio%d: port may not be enabled\n", 816 device_get_unit(dev)); 817 } 818 if (bootverbose) 819 printf("sio%d: irq maps: %#x %#x %#x %#x\n", 820 device_get_unit(dev), 821 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 822 823 result = 0; 824 for (fn = 0; fn < sizeof failures; ++fn) 825 if (failures[fn]) { 826 sio_setreg(com, com_mcr, 0); 827 result = ENXIO; 828 if (bootverbose) { 829 printf("sio%d: probe failed test(s):", 830 device_get_unit(dev)); 831 for (fn = 0; fn < sizeof failures; ++fn) 832 if (failures[fn]) 833 printf(" %d", fn); 834 printf("\n"); 835 } 836 break; 837 } 838 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 839 if (iobase == siocniobase) 840 result = 0; 841 if (result != 0) { 842 device_set_softc(dev, NULL); 843 free(com, M_DEVBUF); 844 } 845 return (result); 846} 847 848#ifdef COM_ESP 849static int 850espattach(com, esp_port) 851 struct com_s *com; 852 Port_t esp_port; 853{ 854 u_char dips; 855 u_char val; 856 857 /* 858 * Check the ESP-specific I/O port to see if we're an ESP 859 * card. If not, return failure immediately. 860 */ 861 if ((inb(esp_port) & 0xf3) == 0) { 862 printf(" port 0x%x is not an ESP board?\n", esp_port); 863 return (0); 864 } 865 866 /* 867 * We've got something that claims to be a Hayes ESP card. 868 * Let's hope so. 869 */ 870 871 /* Get the dip-switch configuration */ 872 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 873 dips = inb(esp_port + ESP_STATUS1); 874 875 /* 876 * Bits 0,1 of dips say which COM port we are. 877 */ 878 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 879 printf(" : ESP"); 880 else { 881 printf(" esp_port has com %d\n", dips & 0x03); 882 return (0); 883 } 884 885 /* 886 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 887 */ 888 outb(esp_port + ESP_CMD1, ESP_GETTEST); 889 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 890 val = inb(esp_port + ESP_STATUS2); 891 if ((val & 0x70) < 0x20) { 892 printf("-old (%o)", val & 0x70); 893 return (0); 894 } 895 896 /* 897 * Check for ability to emulate 16550: bit 7 == 1 898 */ 899 if ((dips & 0x80) == 0) { 900 printf(" slave"); 901 return (0); 902 } 903 904 /* 905 * Okay, we seem to be a Hayes ESP card. Whee. 906 */ 907 com->esp = TRUE; 908 com->esp_port = esp_port; 909 return (1); 910} 911#endif /* COM_ESP */ 912 913int 914sioattach(dev, xrid, rclk) 915 device_t dev; 916 int xrid; 917 u_long rclk; 918{ 919 struct com_s *com; 920#ifdef COM_ESP 921 Port_t *espp; 922#endif 923 Port_t iobase; 924 int minorbase; 925 int unit; 926 u_int flags; 927 int rid; 928 struct resource *port; 929 int ret; 930 931 rid = xrid; 932 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 933 0, ~0, IO_COMSIZE, RF_ACTIVE); 934 if (!port) 935 return (ENXIO); 936 937 iobase = rman_get_start(port); 938 unit = device_get_unit(dev); 939 com = device_get_softc(dev); 940 flags = device_get_flags(dev); 941 942 if (unit >= sio_numunits) 943 sio_numunits = unit + 1; 944 /* 945 * sioprobe() has initialized the device registers as follows: 946 * o cfcr = CFCR_8BITS. 947 * It is most important that CFCR_DLAB is off, so that the 948 * data port is not hidden when we enable interrupts. 949 * o ier = 0. 950 * Interrupts are only enabled when the line is open. 951 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 952 * interrupt control register or the config specifies no irq. 953 * Keeping MCR_DTR and MCR_RTS off might stop the external 954 * device from sending before we are ready. 955 */ 956 bzero(com, sizeof *com); 957 com->unit = unit; 958 com->ioportres = port; 959 com->ioportrid = rid; 960 com->bst = rman_get_bustag(port); 961 com->bsh = rman_get_bushandle(port); 962 com->cfcr_image = CFCR_8BITS; 963 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 964 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 965 com->tx_fifo_size = 1; 966 com->obufs[0].l_head = com->obuf1; 967 com->obufs[1].l_head = com->obuf2; 968 969 com->data_port = iobase + com_data; 970 com->int_ctl_port = iobase + com_ier; 971 com->int_id_port = iobase + com_iir; 972 com->modem_ctl_port = iobase + com_mcr; 973 com->mcr_image = inb(com->modem_ctl_port); 974 com->line_status_port = iobase + com_lsr; 975 com->modem_status_port = iobase + com_msr; 976 977 if (rclk == 0) 978 rclk = DEFAULT_RCLK; 979 com->rclk = rclk; 980 981 /* 982 * We don't use all the flags from <sys/ttydefaults.h> since they 983 * are only relevant for logins. It's important to have echo off 984 * initially so that the line doesn't start blathering before the 985 * echo flag can be turned off. 986 */ 987 com->it_in.c_iflag = 0; 988 com->it_in.c_oflag = 0; 989 com->it_in.c_cflag = TTYDEF_CFLAG; 990 com->it_in.c_lflag = 0; 991 if (unit == comconsole) { 992 com->it_in.c_iflag = TTYDEF_IFLAG; 993 com->it_in.c_oflag = TTYDEF_OFLAG; 994 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 995 com->it_in.c_lflag = TTYDEF_LFLAG; 996 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 997 com->lt_out.c_ispeed = com->lt_out.c_ospeed = 998 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 999 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 1000 } else 1001 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 1002 if (siosetwater(com, com->it_in.c_ispeed) != 0) { 1003 mtx_unlock_spin(&sio_lock); 1004 /* 1005 * Leave i/o resources allocated if this is a `cn'-level 1006 * console, so that other devices can't snarf them. 1007 */ 1008 if (iobase != siocniobase) 1009 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1010 return (ENOMEM); 1011 } 1012 mtx_unlock_spin(&sio_lock); 1013 termioschars(&com->it_in); 1014 com->it_out = com->it_in; 1015 1016 /* attempt to determine UART type */ 1017 printf("sio%d: type", unit); 1018 1019 1020 if (!COM_ISMULTIPORT(flags) && 1021 !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) { 1022 u_char scr; 1023 u_char scr1; 1024 u_char scr2; 1025 1026 scr = sio_getreg(com, com_scr); 1027 sio_setreg(com, com_scr, 0xa5); 1028 scr1 = sio_getreg(com, com_scr); 1029 sio_setreg(com, com_scr, 0x5a); 1030 scr2 = sio_getreg(com, com_scr); 1031 sio_setreg(com, com_scr, scr); 1032 if (scr1 != 0xa5 || scr2 != 0x5a) { 1033 printf(" 8250 or not responding"); 1034 goto determined_type; 1035 } 1036 } 1037 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1038 DELAY(100); 1039 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1040 case FIFO_RX_LOW: 1041 printf(" 16450"); 1042 break; 1043 case FIFO_RX_MEDL: 1044 printf(" 16450?"); 1045 break; 1046 case FIFO_RX_MEDH: 1047 printf(" 16550?"); 1048 break; 1049 case FIFO_RX_HIGH: 1050 if (COM_NOFIFO(flags)) { 1051 printf(" 16550A fifo disabled"); 1052 break; 1053 } 1054 com->hasfifo = TRUE; 1055 if (COM_ST16650A(flags)) { 1056 printf(" ST16650A"); 1057 com->st16650a = TRUE; 1058 com->tx_fifo_size = 32; 1059 break; 1060 } 1061 if (COM_TI16754(flags)) { 1062 printf(" TI16754"); 1063 com->tx_fifo_size = 64; 1064 break; 1065 } 1066 printf(" 16550A"); 1067#ifdef COM_ESP 1068 for (espp = likely_esp_ports; *espp != 0; espp++) 1069 if (espattach(com, *espp)) { 1070 com->tx_fifo_size = 1024; 1071 break; 1072 } 1073 if (com->esp) 1074 break; 1075#endif 1076 com->tx_fifo_size = COM_FIFOSIZE(flags); 1077 if (com->tx_fifo_size == 0) 1078 com->tx_fifo_size = 16; 1079 else 1080 printf(" lookalike with %u bytes FIFO", 1081 com->tx_fifo_size); 1082 break; 1083 } 1084#ifdef COM_ESP 1085 if (com->esp) { 1086 /* 1087 * Set 16550 compatibility mode. 1088 * We don't use the ESP_MODE_SCALE bit to increase the 1089 * fifo trigger levels because we can't handle large 1090 * bursts of input. 1091 * XXX flow control should be set in comparam(), not here. 1092 */ 1093 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1094 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1095 1096 /* Set RTS/CTS flow control. */ 1097 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1098 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1099 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1100 1101 /* Set flow-control levels. */ 1102 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1103 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1104 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1105 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1106 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1107 } 1108#endif /* COM_ESP */ 1109 sio_setreg(com, com_fifo, 0); 1110determined_type: ; 1111 1112#ifdef COM_MULTIPORT 1113 if (COM_ISMULTIPORT(flags)) { 1114 device_t masterdev; 1115 1116 com->multiport = TRUE; 1117 printf(" (multiport"); 1118 if (unit == COM_MPMASTER(flags)) 1119 printf(" master"); 1120 printf(")"); 1121 masterdev = devclass_get_device(sio_devclass, 1122 COM_MPMASTER(flags)); 1123 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1124 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1125 } 1126#endif /* COM_MULTIPORT */ 1127 if (unit == comconsole) 1128 printf(", console"); 1129 if (COM_IIR_TXRDYBUG(flags)) 1130 printf(" with a buggy IIR_TXRDY implementation"); 1131 printf("\n"); 1132 1133 if (sio_fast_ih == NULL) { 1134 swi_add(&tty_ithd, "sio", siopoll, NULL, SWI_TTY, 0, 1135 &sio_fast_ih); 1136 swi_add(&clk_ithd, "sio", siopoll, NULL, SWI_CLOCK, 0, 1137 &sio_slow_ih); 1138 } 1139 minorbase = UNIT_TO_MINOR(unit); 1140 com->devs[0] = make_dev(&sio_cdevsw, minorbase, 1141 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1142 com->devs[1] = make_dev(&sioc_cdevsw, minorbase | CONTROL_INIT_STATE, 1143 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1144 com->devs[2] = make_dev(&sioc_cdevsw, minorbase | CONTROL_LOCK_STATE, 1145 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1146 com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 1147 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1148 com->devs[4] = make_dev(&sioc_cdevsw, 1149 minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 1150 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1151 com->devs[5] = make_dev(&sioc_cdevsw, 1152 minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 1153 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1154 for (rid = 0; rid < 6; rid++) 1155 com->devs[rid]->si_drv1 = com; 1156 com->flags = flags; 1157 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1158 1159 if (COM_PPSCTS(flags)) 1160 com->pps_bit = MSR_CTS; 1161 else 1162 com->pps_bit = MSR_DCD; 1163 pps_init(&com->pps); 1164 1165 rid = 0; 1166 com->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); 1167 if (com->irqres) { 1168 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1169 INTR_TYPE_TTY | INTR_FAST, 1170 siointr, com, &com->cookie); 1171 if (ret) { 1172 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1173 com->irqres, INTR_TYPE_TTY, 1174 siointr, com, &com->cookie); 1175 if (ret == 0) 1176 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 1177 } 1178 if (ret) 1179 device_printf(dev, "could not activate interrupt\n"); 1180#if defined(KDB) && (defined(BREAK_TO_DEBUGGER) || \ 1181 defined(ALT_BREAK_TO_DEBUGGER)) 1182 /* 1183 * Enable interrupts for early break-to-debugger support 1184 * on the console. 1185 */ 1186 if (ret == 0 && unit == comconsole) 1187 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 1188 IER_EMSC); 1189#endif 1190 } 1191 1192 return (0); 1193} 1194 1195static int 1196siocopen(dev, flag, mode, td) 1197 struct cdev *dev; 1198 int flag; 1199 int mode; 1200 struct thread *td; 1201{ 1202 struct com_s *com; 1203 1204 com = dev->si_drv1; 1205 if (com == NULL) 1206 return (ENXIO); 1207 if (com->gone) 1208 return (ENXIO); 1209 return (0); 1210} 1211 1212static int 1213sioopen(dev, flag, mode, td) 1214 struct cdev *dev; 1215 int flag; 1216 int mode; 1217 struct thread *td; 1218{ 1219 struct com_s *com; 1220 int error; 1221 int mynor; 1222 int s; 1223 struct tty *tp; 1224 int unit; 1225 1226 mynor = minor(dev); 1227 unit = MINOR_TO_UNIT(mynor); 1228 com = dev->si_drv1; 1229 if (com == NULL) 1230 return (ENXIO); 1231 if (com->gone) 1232 return (ENXIO); 1233 tp = dev->si_tty = com->tp = ttymalloc(com->tp); 1234 s = spltty(); 1235 /* 1236 * We jump to this label after all non-interrupted sleeps to pick 1237 * up any changes of the device state. 1238 */ 1239open_top: 1240 error = ttydtrwaitsleep(tp); 1241 if (error != 0) 1242 goto out; 1243 if (tp->t_state & TS_ISOPEN) { 1244 /* 1245 * The device is open, so everything has been initialized. 1246 * Handle conflicts. 1247 */ 1248 if (mynor & CALLOUT_MASK) { 1249 if (!com->active_out) { 1250 error = EBUSY; 1251 goto out; 1252 } 1253 } else { 1254 if (com->active_out) { 1255 if (flag & O_NONBLOCK) { 1256 error = EBUSY; 1257 goto out; 1258 } 1259 error = tsleep(&com->active_out, 1260 TTIPRI | PCATCH, "siobi", 0); 1261 if (com_addr(unit) == NULL) 1262 return (ENXIO); 1263 if (error != 0 || com->gone) 1264 goto out; 1265 goto open_top; 1266 } 1267 } 1268 if (tp->t_state & TS_XCLUDE && 1269 suser(td)) { 1270 error = EBUSY; 1271 goto out; 1272 } 1273 } else { 1274 /* 1275 * The device isn't open, so there are no conflicts. 1276 * Initialize it. Initialization is done twice in many 1277 * cases: to preempt sleeping callin opens if we are 1278 * callout, and to complete a callin open after DCD rises. 1279 */ 1280 tp->t_oproc = comstart; 1281 tp->t_param = comparam; 1282 tp->t_stop = comstop; 1283 tp->t_modem = commodem; 1284 tp->t_break = combreak; 1285 tp->t_dev = dev; 1286 tp->t_termios = mynor & CALLOUT_MASK 1287 ? com->it_out : com->it_in; 1288 (void)commodem(tp, SER_DTR | SER_RTS, 0); 1289 com->poll = com->no_irq; 1290 com->poll_output = com->loses_outints; 1291 ++com->wopeners; 1292 error = comparam(tp, &tp->t_termios); 1293 --com->wopeners; 1294 if (error != 0) 1295 goto out; 1296 /* 1297 * XXX we should goto open_top if comparam() slept. 1298 */ 1299 if (com->hasfifo) { 1300 int i; 1301 /* 1302 * (Re)enable and drain fifos. 1303 * 1304 * Certain SMC chips cause problems if the fifos 1305 * are enabled while input is ready. Turn off the 1306 * fifo if necessary to clear the input. We test 1307 * the input ready bit after enabling the fifos 1308 * since we've already enabled them in comparam() 1309 * and to handle races between enabling and fresh 1310 * input. 1311 */ 1312 for (i = 0; i < 500; i++) { 1313 sio_setreg(com, com_fifo, 1314 FIFO_RCV_RST | FIFO_XMT_RST 1315 | com->fifo_image); 1316 /* 1317 * XXX the delays are for superstitious 1318 * historical reasons. It must be less than 1319 * the character time at the maximum 1320 * supported speed (87 usec at 115200 bps 1321 * 8N1). Otherwise we might loop endlessly 1322 * if data is streaming in. We used to use 1323 * delays of 100. That usually worked 1324 * because DELAY(100) used to usually delay 1325 * for about 85 usec instead of 100. 1326 */ 1327 DELAY(50); 1328 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1329 break; 1330 sio_setreg(com, com_fifo, 0); 1331 DELAY(50); 1332 (void) inb(com->data_port); 1333 } 1334 if (i == 500) { 1335 error = EIO; 1336 goto out; 1337 } 1338 } 1339 1340 mtx_lock_spin(&sio_lock); 1341 (void) inb(com->line_status_port); 1342 (void) inb(com->data_port); 1343 com->prev_modem_status = com->last_modem_status 1344 = inb(com->modem_status_port); 1345 outb(com->int_ctl_port, 1346 IER_ERXRDY | IER_ERLS | IER_EMSC 1347 | (COM_IIR_TXRDYBUG(com->flags) ? 0 : IER_ETXRDY)); 1348 mtx_unlock_spin(&sio_lock); 1349 /* 1350 * Handle initial DCD. Callout devices get a fake initial 1351 * DCD (trapdoor DCD). If we are callout, then any sleeping 1352 * callin opens get woken up and resume sleeping on "siobi" 1353 * instead of "siodcd". 1354 */ 1355 /* 1356 * XXX `mynor & CALLOUT_MASK' should be 1357 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1358 * TRAPDOOR_CARRIER is the default initial state for callout 1359 * devices and SOFT_CARRIER is like CLOCAL except it hides 1360 * the true carrier. 1361 */ 1362 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1363 ttyld_modem(tp, 1); 1364 } 1365 /* 1366 * Wait for DCD if necessary. 1367 */ 1368 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1369 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 1370 ++com->wopeners; 1371 error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 1372 if (com_addr(unit) == NULL) 1373 return (ENXIO); 1374 --com->wopeners; 1375 if (error != 0 || com->gone) 1376 goto out; 1377 goto open_top; 1378 } 1379 error = ttyld_open(tp, dev); 1380 ttyldoptim(tp); 1381 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1382 com->active_out = TRUE; 1383 siosettimeout(); 1384out: 1385 splx(s); 1386 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1387 comhardclose(com); 1388 return (error); 1389} 1390 1391static int 1392siocclose(dev, flag, mode, td) 1393 struct cdev *dev; 1394 int flag; 1395 int mode; 1396 struct thread *td; 1397{ 1398 1399 return (0); 1400} 1401 1402static int 1403sioclose(dev, flag, mode, td) 1404 struct cdev *dev; 1405 int flag; 1406 int mode; 1407 struct thread *td; 1408{ 1409 struct com_s *com; 1410 int mynor; 1411 int s; 1412 struct tty *tp; 1413 1414 mynor = minor(dev); 1415 com = dev->si_drv1; 1416 if (com == NULL) 1417 return (ENODEV); 1418 tp = com->tp; 1419 s = spltty(); 1420 ttyld_close(tp, flag); 1421 ttyldoptim(tp); 1422 comhardclose(com); 1423 tty_close(tp); 1424 siosettimeout(); 1425 splx(s); 1426 if (com->gone) { 1427 printf("sio%d: gone\n", com->unit); 1428 s = spltty(); 1429 if (com->ibuf != NULL) 1430 free(com->ibuf, M_DEVBUF); 1431 bzero(tp, sizeof *tp); 1432 splx(s); 1433 } 1434 return (0); 1435} 1436 1437static void 1438comhardclose(com) 1439 struct com_s *com; 1440{ 1441 int s; 1442 struct tty *tp; 1443 1444 s = spltty(); 1445 com->poll = FALSE; 1446 com->poll_output = FALSE; 1447 com->do_timestamp = FALSE; 1448 com->pps.ppsparam.mode = 0; 1449 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1450 tp = com->tp; 1451 1452#if defined(KDB) && (defined(BREAK_TO_DEBUGGER) || \ 1453 defined(ALT_BREAK_TO_DEBUGGER)) 1454 /* 1455 * Leave interrupts enabled and don't clear DTR if this is the 1456 * console. This allows us to detect break-to-debugger events 1457 * while the console device is closed. 1458 */ 1459 if (com->unit != comconsole) 1460#endif 1461 { 1462 sio_setreg(com, com_ier, 0); 1463 if (tp->t_cflag & HUPCL 1464 /* 1465 * XXX we will miss any carrier drop between here and the 1466 * next open. Perhaps we should watch DCD even when the 1467 * port is closed; it is not sufficient to check it at 1468 * the next open because it might go up and down while 1469 * we're not watching. 1470 */ 1471 || (!com->active_out 1472 && !(com->prev_modem_status & MSR_DCD) 1473 && !(com->it_in.c_cflag & CLOCAL)) 1474 || !(tp->t_state & TS_ISOPEN)) { 1475 (void)commodem(tp, 0, SER_DTR); 1476 ttydtrwaitstart(tp); 1477 } 1478 } 1479 if (com->hasfifo) { 1480 /* 1481 * Disable fifos so that they are off after controlled 1482 * reboots. Some BIOSes fail to detect 16550s when the 1483 * fifos are enabled. 1484 */ 1485 sio_setreg(com, com_fifo, 0); 1486 } 1487 com->active_out = FALSE; 1488 wakeup(&com->active_out); 1489 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1490 splx(s); 1491} 1492 1493static int 1494siocrdwr(dev, uio, flag) 1495 struct cdev *dev; 1496 struct uio *uio; 1497 int flag; 1498{ 1499 1500 return (ENODEV); 1501} 1502 1503static int 1504sioread(dev, uio, flag) 1505 struct cdev *dev; 1506 struct uio *uio; 1507 int flag; 1508{ 1509 struct com_s *com; 1510 1511 com = dev->si_drv1; 1512 if (com == NULL || com->gone) 1513 return (ENODEV); 1514 return (ttyld_read(com->tp, uio, flag)); 1515} 1516 1517static int 1518siowrite(dev, uio, flag) 1519 struct cdev *dev; 1520 struct uio *uio; 1521 int flag; 1522{ 1523 int mynor; 1524 struct com_s *com; 1525 int unit; 1526 1527 mynor = minor(dev); 1528 1529 unit = MINOR_TO_UNIT(mynor); 1530 com = com_addr(unit); 1531 if (com == NULL || com->gone) 1532 return (ENODEV); 1533 /* 1534 * (XXX) We disallow virtual consoles if the physical console is 1535 * a serial port. This is in case there is a display attached that 1536 * is not the console. In that situation we don't need/want the X 1537 * server taking over the console. 1538 */ 1539 if (constty != NULL && unit == comconsole) 1540 constty = NULL; 1541 return (ttyld_write(com->tp, uio, flag)); 1542} 1543 1544static void 1545siobusycheck(chan) 1546 void *chan; 1547{ 1548 struct com_s *com; 1549 int s; 1550 1551 com = (struct com_s *)chan; 1552 1553 /* 1554 * Clear TS_BUSY if low-level output is complete. 1555 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1556 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1557 * called again. Reading the line status port outside of siointr1() 1558 * is safe because CS_BUSY is clear so there are no output interrupts 1559 * to lose. 1560 */ 1561 s = spltty(); 1562 if (com->state & CS_BUSY) 1563 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1564 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1565 == (LSR_TSRE | LSR_TXRDY)) { 1566 com->tp->t_state &= ~TS_BUSY; 1567 ttwwakeup(com->tp); 1568 com->extra_state &= ~CSE_BUSYCHECK; 1569 } else 1570 timeout(siobusycheck, com, hz / 100); 1571 splx(s); 1572} 1573 1574static u_int 1575siodivisor(rclk, speed) 1576 u_long rclk; 1577 speed_t speed; 1578{ 1579 long actual_speed; 1580 u_int divisor; 1581 int error; 1582 1583 if (speed == 0) 1584 return (0); 1585#if UINT_MAX > (ULONG_MAX - 1) / 8 1586 if (speed > (ULONG_MAX - 1) / 8) 1587 return (0); 1588#endif 1589 divisor = (rclk / (8UL * speed) + 1) / 2; 1590 if (divisor == 0 || divisor >= 65536) 1591 return (0); 1592 actual_speed = rclk / (16UL * divisor); 1593 1594 /* 10 times error in percent: */ 1595 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 1596 1597 /* 3.0% maximum error tolerance: */ 1598 if (error < -30 || error > 30) 1599 return (0); 1600 1601 return (divisor); 1602} 1603 1604/* 1605 * Call this function with the sio_lock mutex held. It will return with the 1606 * lock still held. 1607 */ 1608static void 1609sioinput(com) 1610 struct com_s *com; 1611{ 1612 u_char *buf; 1613 int incc; 1614 u_char line_status; 1615 int recv_data; 1616 struct tty *tp; 1617 1618 buf = com->ibuf; 1619 tp = com->tp; 1620 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1621 com_events -= (com->iptr - com->ibuf); 1622 com->iptr = com->ibuf; 1623 return; 1624 } 1625 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1626 /* 1627 * Avoid the grotesquely inefficient lineswitch routine 1628 * (ttyinput) in "raw" mode. It usually takes about 450 1629 * instructions (that's without canonical processing or echo!). 1630 * slinput is reasonably fast (usually 40 instructions plus 1631 * call overhead). 1632 */ 1633 do { 1634 /* 1635 * This may look odd, but it is using save-and-enable 1636 * semantics instead of the save-and-disable semantics 1637 * that are used everywhere else. 1638 */ 1639 mtx_unlock_spin(&sio_lock); 1640 incc = com->iptr - buf; 1641 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1642 && (com->state & CS_RTS_IFLOW 1643 || tp->t_iflag & IXOFF) 1644 && !(tp->t_state & TS_TBLOCK)) 1645 ttyblock(tp); 1646 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1647 += b_to_q((char *)buf, incc, &tp->t_rawq); 1648 buf += incc; 1649 tk_nin += incc; 1650 tk_rawcc += incc; 1651 tp->t_rawcc += incc; 1652 ttwakeup(tp); 1653 if (tp->t_state & TS_TTSTOP 1654 && (tp->t_iflag & IXANY 1655 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1656 tp->t_state &= ~TS_TTSTOP; 1657 tp->t_lflag &= ~FLUSHO; 1658 comstart(tp); 1659 } 1660 mtx_lock_spin(&sio_lock); 1661 } while (buf < com->iptr); 1662 } else { 1663 do { 1664 /* 1665 * This may look odd, but it is using save-and-enable 1666 * semantics instead of the save-and-disable semantics 1667 * that are used everywhere else. 1668 */ 1669 mtx_unlock_spin(&sio_lock); 1670 line_status = buf[com->ierroff]; 1671 recv_data = *buf++; 1672 if (line_status 1673 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1674 if (line_status & LSR_BI) 1675 recv_data |= TTY_BI; 1676 if (line_status & LSR_FE) 1677 recv_data |= TTY_FE; 1678 if (line_status & LSR_OE) 1679 recv_data |= TTY_OE; 1680 if (line_status & LSR_PE) 1681 recv_data |= TTY_PE; 1682 } 1683 ttyld_rint(tp, recv_data); 1684 mtx_lock_spin(&sio_lock); 1685 } while (buf < com->iptr); 1686 } 1687 com_events -= (com->iptr - com->ibuf); 1688 com->iptr = com->ibuf; 1689 1690 /* 1691 * There is now room for another low-level buffer full of input, 1692 * so enable RTS if it is now disabled and there is room in the 1693 * high-level buffer. 1694 */ 1695 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1696 !(tp->t_state & TS_TBLOCK)) 1697 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1698} 1699 1700static void 1701siointr(arg) 1702 void *arg; 1703{ 1704 struct com_s *com; 1705 1706#ifndef COM_MULTIPORT 1707 com = (struct com_s *)arg; 1708 1709 mtx_lock_spin(&sio_lock); 1710 siointr1(com); 1711 mtx_unlock_spin(&sio_lock); 1712#else /* COM_MULTIPORT */ 1713 bool_t possibly_more_intrs; 1714 int unit; 1715 1716 /* 1717 * Loop until there is no activity on any port. This is necessary 1718 * to get an interrupt edge more than to avoid another interrupt. 1719 * If the IRQ signal is just an OR of the IRQ signals from several 1720 * devices, then the edge from one may be lost because another is 1721 * on. 1722 */ 1723 mtx_lock_spin(&sio_lock); 1724 do { 1725 possibly_more_intrs = FALSE; 1726 for (unit = 0; unit < sio_numunits; ++unit) { 1727 com = com_addr(unit); 1728 /* 1729 * XXX COM_LOCK(); 1730 * would it work here, or be counter-productive? 1731 */ 1732 if (com != NULL 1733 && !com->gone 1734 && (inb(com->int_id_port) & IIR_IMASK) 1735 != IIR_NOPEND) { 1736 siointr1(com); 1737 possibly_more_intrs = TRUE; 1738 } 1739 /* XXX COM_UNLOCK(); */ 1740 } 1741 } while (possibly_more_intrs); 1742 mtx_unlock_spin(&sio_lock); 1743#endif /* COM_MULTIPORT */ 1744} 1745 1746static struct timespec siots[8]; 1747static int siotso; 1748static int volatile siotsunit = -1; 1749 1750static int 1751sysctl_siots(SYSCTL_HANDLER_ARGS) 1752{ 1753 char buf[128]; 1754 long long delta; 1755 size_t len; 1756 int error, i, tso; 1757 1758 for (i = 1, tso = siotso; i < tso; i++) { 1759 delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) * 1760 1000000000 + 1761 (siots[i].tv_nsec - siots[i - 1].tv_nsec); 1762 len = sprintf(buf, "%lld\n", delta); 1763 if (delta >= 110000) 1764 len += sprintf(buf + len - 1, ": *** %ld.%09ld\n", 1765 (long)siots[i].tv_sec, siots[i].tv_nsec) - 1; 1766 if (i == tso - 1) 1767 buf[len - 1] = '\0'; 1768 error = SYSCTL_OUT(req, buf, len); 1769 if (error != 0) 1770 return (error); 1771 uio_yield(); 1772 } 1773 return (0); 1774} 1775 1776SYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD, 1777 0, 0, sysctl_siots, "A", "sio timestamps"); 1778 1779static void 1780siointr1(com) 1781 struct com_s *com; 1782{ 1783 u_char int_ctl; 1784 u_char int_ctl_new; 1785 u_char line_status; 1786 u_char modem_status; 1787 u_char *ioptr; 1788 u_char recv_data; 1789 1790 if (COM_IIR_TXRDYBUG(com->flags)) { 1791 int_ctl = inb(com->int_ctl_port); 1792 int_ctl_new = int_ctl; 1793 } else { 1794 int_ctl = 0; 1795 int_ctl_new = 0; 1796 } 1797 1798 while (!com->gone) { 1799 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1800 modem_status = inb(com->modem_status_port); 1801 if ((modem_status ^ com->last_modem_status) & 1802 com->pps_bit) { 1803 pps_capture(&com->pps); 1804 pps_event(&com->pps, 1805 (modem_status & com->pps_bit) ? 1806 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1807 } 1808 } 1809 line_status = inb(com->line_status_port); 1810 1811 /* input event? (check first to help avoid overruns) */ 1812 while (line_status & LSR_RCV_MASK) { 1813 /* break/unnattached error bits or real input? */ 1814 if (!(line_status & LSR_RXRDY)) 1815 recv_data = 0; 1816 else 1817 recv_data = inb(com->data_port); 1818#ifdef KDB 1819#ifdef ALT_BREAK_TO_DEBUGGER 1820 if (com->unit == comconsole && 1821 kdb_alt_break(recv_data, &com->alt_brk_state) != 0) 1822 kdb_enter("Break sequence on console"); 1823#endif /* ALT_BREAK_TO_DEBUGGER */ 1824#endif /* KDB */ 1825 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 1826 /* 1827 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 1828 * Otherwise, push the work to a higher level 1829 * (to handle PARMRK) if we're bypassing. 1830 * Otherwise, convert BI/FE and PE+INPCK to 0. 1831 * 1832 * This makes bypassing work right in the 1833 * usual "raw" case (IGNBRK set, and IGNPAR 1834 * and INPCK clear). 1835 * 1836 * Note: BI together with FE/PE means just BI. 1837 */ 1838 if (line_status & LSR_BI) { 1839#if defined(KDB) && defined(BREAK_TO_DEBUGGER) 1840 if (com->unit == comconsole) { 1841 kdb_enter("Line break on console"); 1842 goto cont; 1843 } 1844#endif 1845 if (com->tp == NULL 1846 || com->tp->t_iflag & IGNBRK) 1847 goto cont; 1848 } else { 1849 if (com->tp == NULL 1850 || com->tp->t_iflag & IGNPAR) 1851 goto cont; 1852 } 1853 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 1854 && (line_status & (LSR_BI | LSR_FE) 1855 || com->tp->t_iflag & INPCK)) 1856 recv_data = 0; 1857 } 1858 ++com->bytes_in; 1859 if (com->tp != NULL && 1860 com->tp->t_hotchar != 0 && recv_data == com->tp->t_hotchar) 1861 swi_sched(sio_fast_ih, 0); 1862 ioptr = com->iptr; 1863 if (ioptr >= com->ibufend) 1864 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 1865 else { 1866 if (com->do_timestamp) 1867 microtime(&com->timestamp); 1868 ++com_events; 1869 swi_sched(sio_slow_ih, SWI_DELAY); 1870#if 0 /* for testing input latency vs efficiency */ 1871if (com->iptr - com->ibuf == 8) 1872 swi_sched(sio_fast_ih, 0); 1873#endif 1874 ioptr[0] = recv_data; 1875 ioptr[com->ierroff] = line_status; 1876 com->iptr = ++ioptr; 1877 if (ioptr == com->ihighwater 1878 && com->state & CS_RTS_IFLOW) 1879 outb(com->modem_ctl_port, 1880 com->mcr_image &= ~MCR_RTS); 1881 if (line_status & LSR_OE) 1882 CE_RECORD(com, CE_OVERRUN); 1883 } 1884cont: 1885 if (line_status & LSR_TXRDY 1886 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) 1887 goto txrdy; 1888 1889 /* 1890 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 1891 * jump from the top of the loop to here 1892 */ 1893 line_status = inb(com->line_status_port) & 0x7F; 1894 } 1895 1896 /* modem status change? (always check before doing output) */ 1897 modem_status = inb(com->modem_status_port); 1898 if (modem_status != com->last_modem_status) { 1899 /* 1900 * Schedule high level to handle DCD changes. Note 1901 * that we don't use the delta bits anywhere. Some 1902 * UARTs mess them up, and it's easy to remember the 1903 * previous bits and calculate the delta. 1904 */ 1905 com->last_modem_status = modem_status; 1906 if (!(com->state & CS_CHECKMSR)) { 1907 com_events += LOTS_OF_EVENTS; 1908 com->state |= CS_CHECKMSR; 1909 swi_sched(sio_fast_ih, 0); 1910 } 1911 1912 /* handle CTS change immediately for crisp flow ctl */ 1913 if (com->state & CS_CTS_OFLOW) { 1914 if (modem_status & MSR_CTS) 1915 com->state |= CS_ODEVREADY; 1916 else 1917 com->state &= ~CS_ODEVREADY; 1918 } 1919 } 1920 1921txrdy: 1922 /* output queued and everything ready? */ 1923 if (line_status & LSR_TXRDY 1924 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 1925 ioptr = com->obufq.l_head; 1926 if (com->tx_fifo_size > 1 && com->unit != siotsunit) { 1927 u_int ocount; 1928 1929 ocount = com->obufq.l_tail - ioptr; 1930 if (ocount > com->tx_fifo_size) 1931 ocount = com->tx_fifo_size; 1932 com->bytes_out += ocount; 1933 do 1934 outb(com->data_port, *ioptr++); 1935 while (--ocount != 0); 1936 } else { 1937 outb(com->data_port, *ioptr++); 1938 ++com->bytes_out; 1939 if (com->unit == siotsunit 1940 && siotso < sizeof siots / sizeof siots[0]) 1941 nanouptime(&siots[siotso++]); 1942 } 1943 com->obufq.l_head = ioptr; 1944 if (COM_IIR_TXRDYBUG(com->flags)) 1945 int_ctl_new = int_ctl | IER_ETXRDY; 1946 if (ioptr >= com->obufq.l_tail) { 1947 struct lbq *qp; 1948 1949 qp = com->obufq.l_next; 1950 qp->l_queued = FALSE; 1951 qp = qp->l_next; 1952 if (qp != NULL) { 1953 com->obufq.l_head = qp->l_head; 1954 com->obufq.l_tail = qp->l_tail; 1955 com->obufq.l_next = qp; 1956 } else { 1957 /* output just completed */ 1958 if (COM_IIR_TXRDYBUG(com->flags)) 1959 int_ctl_new = int_ctl 1960 & ~IER_ETXRDY; 1961 com->state &= ~CS_BUSY; 1962 } 1963 if (!(com->state & CS_ODONE)) { 1964 com_events += LOTS_OF_EVENTS; 1965 com->state |= CS_ODONE; 1966 /* handle at high level ASAP */ 1967 swi_sched(sio_fast_ih, 0); 1968 } 1969 } 1970 if (COM_IIR_TXRDYBUG(com->flags) 1971 && int_ctl != int_ctl_new) 1972 outb(com->int_ctl_port, int_ctl_new); 1973 } 1974 1975 /* finished? */ 1976#ifndef COM_MULTIPORT 1977 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 1978#endif /* COM_MULTIPORT */ 1979 return; 1980 } 1981} 1982 1983static int 1984siocioctl(dev, cmd, data, flag, td) 1985 struct cdev *dev; 1986 u_long cmd; 1987 caddr_t data; 1988 int flag; 1989 struct thread *td; 1990{ 1991 struct com_s *com; 1992 int error; 1993 int mynor; 1994 struct termios *ct; 1995 1996 mynor = minor(dev); 1997 com = com_addr(MINOR_TO_UNIT(mynor)); 1998 if (com == NULL || com->gone) 1999 return (ENODEV); 2000 2001 switch (mynor & CONTROL_MASK) { 2002 case CONTROL_INIT_STATE: 2003 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 2004 break; 2005 case CONTROL_LOCK_STATE: 2006 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 2007 break; 2008 default: 2009 return (ENODEV); /* /dev/nodev */ 2010 } 2011 switch (cmd) { 2012 case TIOCSETA: 2013 error = suser(td); 2014 if (error != 0) 2015 return (error); 2016 *ct = *(struct termios *)data; 2017 return (0); 2018 case TIOCGETA: 2019 *(struct termios *)data = *ct; 2020 return (0); 2021 case TIOCGETD: 2022 *(int *)data = TTYDISC; 2023 return (0); 2024 case TIOCGWINSZ: 2025 bzero(data, sizeof(struct winsize)); 2026 return (0); 2027 default: 2028 return (ENOTTY); 2029 } 2030} 2031 2032static int 2033sioioctl(dev, cmd, data, flag, td) 2034 struct cdev *dev; 2035 u_long cmd; 2036 caddr_t data; 2037 int flag; 2038 struct thread *td; 2039{ 2040 struct com_s *com; 2041 int error; 2042 int mynor; 2043 int s; 2044 struct tty *tp; 2045#ifndef BURN_BRIDGES 2046#if defined(COMPAT_43) 2047 u_long oldcmd; 2048 struct termios term; 2049#endif 2050#endif 2051 2052 mynor = minor(dev); 2053 com = dev->si_drv1; 2054 if (com == NULL || com->gone) 2055 return (ENODEV); 2056 tp = com->tp; 2057#ifndef BURN_BRIDGES 2058#if defined(COMPAT_43) 2059 term = tp->t_termios; 2060 oldcmd = cmd; 2061 error = ttsetcompat(tp, &cmd, data, &term); 2062 if (error != 0) 2063 return (error); 2064 if (cmd != oldcmd) 2065 data = (caddr_t)&term; 2066#endif 2067#endif 2068 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 2069 int cc; 2070 struct termios *dt = (struct termios *)data; 2071 struct termios *lt = mynor & CALLOUT_MASK 2072 ? &com->lt_out : &com->lt_in; 2073 2074 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2075 | (dt->c_iflag & ~lt->c_iflag); 2076 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2077 | (dt->c_oflag & ~lt->c_oflag); 2078 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2079 | (dt->c_cflag & ~lt->c_cflag); 2080 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2081 | (dt->c_lflag & ~lt->c_lflag); 2082 for (cc = 0; cc < NCCS; ++cc) 2083 if (lt->c_cc[cc] != 0) 2084 dt->c_cc[cc] = tp->t_cc[cc]; 2085 if (lt->c_ispeed != 0) 2086 dt->c_ispeed = tp->t_ispeed; 2087 if (lt->c_ospeed != 0) 2088 dt->c_ospeed = tp->t_ospeed; 2089 } 2090 error = ttyioctl(dev, cmd, data, flag, td); 2091 ttyldoptim(tp); 2092 if (error != ENOTTY) 2093 return (error); 2094 s = spltty(); 2095 switch (cmd) { 2096 case TIOCTIMESTAMP: 2097 com->do_timestamp = TRUE; 2098 *(struct timeval *)data = com->timestamp; 2099 break; 2100 default: 2101 splx(s); 2102 error = pps_ioctl(cmd, data, &com->pps); 2103 if (error == ENODEV) 2104 error = ENOTTY; 2105 return (error); 2106 } 2107 splx(s); 2108 return (0); 2109} 2110 2111/* software interrupt handler for SWI_TTY */ 2112static void 2113siopoll(void *dummy) 2114{ 2115 int unit; 2116 2117 if (com_events == 0) 2118 return; 2119repeat: 2120 for (unit = 0; unit < sio_numunits; ++unit) { 2121 struct com_s *com; 2122 int incc; 2123 struct tty *tp; 2124 2125 com = com_addr(unit); 2126 if (com == NULL) 2127 continue; 2128 tp = com->tp; 2129 if (tp == NULL || com->gone) { 2130 /* 2131 * Discard any events related to never-opened or 2132 * going-away devices. 2133 */ 2134 mtx_lock_spin(&sio_lock); 2135 incc = com->iptr - com->ibuf; 2136 com->iptr = com->ibuf; 2137 if (com->state & CS_CHECKMSR) { 2138 incc += LOTS_OF_EVENTS; 2139 com->state &= ~CS_CHECKMSR; 2140 } 2141 com_events -= incc; 2142 mtx_unlock_spin(&sio_lock); 2143 continue; 2144 } 2145 if (com->iptr != com->ibuf) { 2146 mtx_lock_spin(&sio_lock); 2147 sioinput(com); 2148 mtx_unlock_spin(&sio_lock); 2149 } 2150 if (com->state & CS_CHECKMSR) { 2151 u_char delta_modem_status; 2152 2153 mtx_lock_spin(&sio_lock); 2154 delta_modem_status = com->last_modem_status 2155 ^ com->prev_modem_status; 2156 com->prev_modem_status = com->last_modem_status; 2157 com_events -= LOTS_OF_EVENTS; 2158 com->state &= ~CS_CHECKMSR; 2159 mtx_unlock_spin(&sio_lock); 2160 if (delta_modem_status & MSR_DCD) 2161 ttyld_modem(tp, 2162 com->prev_modem_status & MSR_DCD); 2163 } 2164 if (com->state & CS_ODONE) { 2165 mtx_lock_spin(&sio_lock); 2166 com_events -= LOTS_OF_EVENTS; 2167 com->state &= ~CS_ODONE; 2168 mtx_unlock_spin(&sio_lock); 2169 if (!(com->state & CS_BUSY) 2170 && !(com->extra_state & CSE_BUSYCHECK)) { 2171 timeout(siobusycheck, com, hz / 100); 2172 com->extra_state |= CSE_BUSYCHECK; 2173 } 2174 ttyld_start(tp); 2175 } 2176 if (com_events == 0) 2177 break; 2178 } 2179 if (com_events >= LOTS_OF_EVENTS) 2180 goto repeat; 2181} 2182 2183static void 2184combreak(tp, sig) 2185 struct tty *tp; 2186 int sig; 2187{ 2188 struct com_s *com; 2189 2190 com = tp->t_dev->si_drv1; 2191 2192 if (sig) 2193 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2194 else 2195 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2196} 2197 2198static int 2199comparam(tp, t) 2200 struct tty *tp; 2201 struct termios *t; 2202{ 2203 u_int cfcr; 2204 int cflag; 2205 struct com_s *com; 2206 u_int divisor; 2207 u_char dlbh; 2208 u_char dlbl; 2209 u_char efr_flowbits; 2210 int s; 2211 int unit; 2212 2213 unit = DEV_TO_UNIT(tp->t_dev); 2214 com = com_addr(unit); 2215 if (com == NULL) 2216 return (ENODEV); 2217 2218 /* check requested parameters */ 2219 if (t->c_ispeed != (t->c_ospeed != 0 ? t->c_ospeed : tp->t_ospeed)) 2220 return (EINVAL); 2221 divisor = siodivisor(com->rclk, t->c_ispeed); 2222 if (divisor == 0) 2223 return (EINVAL); 2224 2225 /* parameters are OK, convert them to the com struct and the device */ 2226 s = spltty(); 2227 if (t->c_ospeed == 0) 2228 (void)commodem(tp, 0, SER_DTR); /* hang up line */ 2229 else 2230 (void)commodem(tp, SER_DTR, 0); 2231 cflag = t->c_cflag; 2232 switch (cflag & CSIZE) { 2233 case CS5: 2234 cfcr = CFCR_5BITS; 2235 break; 2236 case CS6: 2237 cfcr = CFCR_6BITS; 2238 break; 2239 case CS7: 2240 cfcr = CFCR_7BITS; 2241 break; 2242 default: 2243 cfcr = CFCR_8BITS; 2244 break; 2245 } 2246 if (cflag & PARENB) { 2247 cfcr |= CFCR_PENAB; 2248 if (!(cflag & PARODD)) 2249 cfcr |= CFCR_PEVEN; 2250 } 2251 if (cflag & CSTOPB) 2252 cfcr |= CFCR_STOPB; 2253 2254 if (com->hasfifo) { 2255 /* 2256 * Use a fifo trigger level low enough so that the input 2257 * latency from the fifo is less than about 16 msec and 2258 * the total latency is less than about 30 msec. These 2259 * latencies are reasonable for humans. Serial comms 2260 * protocols shouldn't expect anything better since modem 2261 * latencies are larger. 2262 * 2263 * The fifo trigger level cannot be set at RX_HIGH for high 2264 * speed connections without further work on reducing 2265 * interrupt disablement times in other parts of the system, 2266 * without producing silo overflow errors. 2267 */ 2268 com->fifo_image = com->unit == siotsunit ? 0 2269 : t->c_ispeed <= 4800 2270 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 2271#ifdef COM_ESP 2272 /* 2273 * The Hayes ESP card needs the fifo DMA mode bit set 2274 * in compatibility mode. If not, it will interrupt 2275 * for each character received. 2276 */ 2277 if (com->esp) 2278 com->fifo_image |= FIFO_DMA_MODE; 2279#endif 2280 sio_setreg(com, com_fifo, com->fifo_image); 2281 } 2282 2283 /* 2284 * This returns with interrupts disabled so that we can complete 2285 * the speed change atomically. Keeping interrupts disabled is 2286 * especially important while com_data is hidden. 2287 */ 2288 (void) siosetwater(com, t->c_ispeed); 2289 2290 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2291 /* 2292 * Only set the divisor registers if they would change, since on 2293 * some 16550 incompatibles (UMC8669F), setting them while input 2294 * is arriving loses sync until data stops arriving. 2295 */ 2296 dlbl = divisor & 0xFF; 2297 if (sio_getreg(com, com_dlbl) != dlbl) 2298 sio_setreg(com, com_dlbl, dlbl); 2299 dlbh = divisor >> 8; 2300 if (sio_getreg(com, com_dlbh) != dlbh) 2301 sio_setreg(com, com_dlbh, dlbh); 2302 2303 efr_flowbits = 0; 2304 2305 if (cflag & CRTS_IFLOW) { 2306 com->state |= CS_RTS_IFLOW; 2307 efr_flowbits |= EFR_AUTORTS; 2308 /* 2309 * If CS_RTS_IFLOW just changed from off to on, the change 2310 * needs to be propagated to MCR_RTS. This isn't urgent, 2311 * so do it later by calling comstart() instead of repeating 2312 * a lot of code from comstart() here. 2313 */ 2314 } else if (com->state & CS_RTS_IFLOW) { 2315 com->state &= ~CS_RTS_IFLOW; 2316 /* 2317 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2318 * on here, since comstart() won't do it later. 2319 */ 2320 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2321 } 2322 2323 /* 2324 * Set up state to handle output flow control. 2325 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2326 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2327 */ 2328 com->state |= CS_ODEVREADY; 2329 com->state &= ~CS_CTS_OFLOW; 2330 if (cflag & CCTS_OFLOW) { 2331 com->state |= CS_CTS_OFLOW; 2332 efr_flowbits |= EFR_AUTOCTS; 2333 if (!(com->last_modem_status & MSR_CTS)) 2334 com->state &= ~CS_ODEVREADY; 2335 } 2336 2337 if (com->st16650a) { 2338 sio_setreg(com, com_lcr, LCR_EFR_ENABLE); 2339 sio_setreg(com, com_efr, 2340 (sio_getreg(com, com_efr) 2341 & ~(EFR_AUTOCTS | EFR_AUTORTS)) | efr_flowbits); 2342 } 2343 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2344 2345 /* XXX shouldn't call functions while intrs are disabled. */ 2346 ttyldoptim(tp); 2347 2348 mtx_unlock_spin(&sio_lock); 2349 splx(s); 2350 comstart(tp); 2351 if (com->ibufold != NULL) { 2352 free(com->ibufold, M_DEVBUF); 2353 com->ibufold = NULL; 2354 } 2355 return (0); 2356} 2357 2358/* 2359 * This function must be called with the sio_lock mutex released and will 2360 * return with it obtained. 2361 */ 2362static int 2363siosetwater(com, speed) 2364 struct com_s *com; 2365 speed_t speed; 2366{ 2367 int cp4ticks; 2368 u_char *ibuf; 2369 int ibufsize; 2370 struct tty *tp; 2371 2372 /* 2373 * Make the buffer size large enough to handle a softtty interrupt 2374 * latency of about 2 ticks without loss of throughput or data 2375 * (about 3 ticks if input flow control is not used or not honoured, 2376 * but a bit less for CS5-CS7 modes). 2377 */ 2378 cp4ticks = speed / 10 / hz * 4; 2379 for (ibufsize = 128; ibufsize < cp4ticks;) 2380 ibufsize <<= 1; 2381 if (ibufsize == com->ibufsize) { 2382 mtx_lock_spin(&sio_lock); 2383 return (0); 2384 } 2385 2386 /* 2387 * Allocate input buffer. The extra factor of 2 in the size is 2388 * to allow for an error byte for each input byte. 2389 */ 2390 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 2391 if (ibuf == NULL) { 2392 mtx_lock_spin(&sio_lock); 2393 return (ENOMEM); 2394 } 2395 2396 /* Initialize non-critical variables. */ 2397 com->ibufold = com->ibuf; 2398 com->ibufsize = ibufsize; 2399 tp = com->tp; 2400 if (tp != NULL) { 2401 tp->t_ififosize = 2 * ibufsize; 2402 tp->t_ispeedwat = (speed_t)-1; 2403 tp->t_ospeedwat = (speed_t)-1; 2404 } 2405 2406 /* 2407 * Read current input buffer, if any. Continue with interrupts 2408 * disabled. 2409 */ 2410 mtx_lock_spin(&sio_lock); 2411 if (com->iptr != com->ibuf) 2412 sioinput(com); 2413 2414 /*- 2415 * Initialize critical variables, including input buffer watermarks. 2416 * The external device is asked to stop sending when the buffer 2417 * exactly reaches high water, or when the high level requests it. 2418 * The high level is notified immediately (rather than at a later 2419 * clock tick) when this watermark is reached. 2420 * The buffer size is chosen so the watermark should almost never 2421 * be reached. 2422 * The low watermark is invisibly 0 since the buffer is always 2423 * emptied all at once. 2424 */ 2425 com->iptr = com->ibuf = ibuf; 2426 com->ibufend = ibuf + ibufsize; 2427 com->ierroff = ibufsize; 2428 com->ihighwater = ibuf + 3 * ibufsize / 4; 2429 return (0); 2430} 2431 2432static void 2433comstart(tp) 2434 struct tty *tp; 2435{ 2436 struct com_s *com; 2437 int s; 2438 int unit; 2439 2440 unit = DEV_TO_UNIT(tp->t_dev); 2441 com = com_addr(unit); 2442 if (com == NULL) 2443 return; 2444 s = spltty(); 2445 mtx_lock_spin(&sio_lock); 2446 if (tp->t_state & TS_TTSTOP) 2447 com->state &= ~CS_TTGO; 2448 else 2449 com->state |= CS_TTGO; 2450 if (tp->t_state & TS_TBLOCK) { 2451 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2452 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2453 } else { 2454 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2455 && com->state & CS_RTS_IFLOW) 2456 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2457 } 2458 mtx_unlock_spin(&sio_lock); 2459 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2460 ttwwakeup(tp); 2461 splx(s); 2462 return; 2463 } 2464 if (tp->t_outq.c_cc != 0) { 2465 struct lbq *qp; 2466 struct lbq *next; 2467 2468 if (!com->obufs[0].l_queued) { 2469 com->obufs[0].l_tail 2470 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2471 sizeof com->obuf1); 2472 com->obufs[0].l_next = NULL; 2473 com->obufs[0].l_queued = TRUE; 2474 mtx_lock_spin(&sio_lock); 2475 if (com->state & CS_BUSY) { 2476 qp = com->obufq.l_next; 2477 while ((next = qp->l_next) != NULL) 2478 qp = next; 2479 qp->l_next = &com->obufs[0]; 2480 } else { 2481 com->obufq.l_head = com->obufs[0].l_head; 2482 com->obufq.l_tail = com->obufs[0].l_tail; 2483 com->obufq.l_next = &com->obufs[0]; 2484 com->state |= CS_BUSY; 2485 } 2486 mtx_unlock_spin(&sio_lock); 2487 } 2488 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2489 com->obufs[1].l_tail 2490 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2491 sizeof com->obuf2); 2492 com->obufs[1].l_next = NULL; 2493 com->obufs[1].l_queued = TRUE; 2494 mtx_lock_spin(&sio_lock); 2495 if (com->state & CS_BUSY) { 2496 qp = com->obufq.l_next; 2497 while ((next = qp->l_next) != NULL) 2498 qp = next; 2499 qp->l_next = &com->obufs[1]; 2500 } else { 2501 com->obufq.l_head = com->obufs[1].l_head; 2502 com->obufq.l_tail = com->obufs[1].l_tail; 2503 com->obufq.l_next = &com->obufs[1]; 2504 com->state |= CS_BUSY; 2505 } 2506 mtx_unlock_spin(&sio_lock); 2507 } 2508 tp->t_state |= TS_BUSY; 2509 } 2510 mtx_lock_spin(&sio_lock); 2511 if (com->state >= (CS_BUSY | CS_TTGO)) 2512 siointr1(com); /* fake interrupt to start output */ 2513 mtx_unlock_spin(&sio_lock); 2514 ttwwakeup(tp); 2515 splx(s); 2516} 2517 2518static void 2519comstop(tp, rw) 2520 struct tty *tp; 2521 int rw; 2522{ 2523 struct com_s *com; 2524 2525 com = com_addr(DEV_TO_UNIT(tp->t_dev)); 2526 if (com == NULL || com->gone) 2527 return; 2528 mtx_lock_spin(&sio_lock); 2529 if (rw & FWRITE) { 2530 if (com->hasfifo) 2531#ifdef COM_ESP 2532 /* XXX avoid h/w bug. */ 2533 if (!com->esp) 2534#endif 2535 sio_setreg(com, com_fifo, 2536 FIFO_XMT_RST | com->fifo_image); 2537 com->obufs[0].l_queued = FALSE; 2538 com->obufs[1].l_queued = FALSE; 2539 if (com->state & CS_ODONE) 2540 com_events -= LOTS_OF_EVENTS; 2541 com->state &= ~(CS_ODONE | CS_BUSY); 2542 com->tp->t_state &= ~TS_BUSY; 2543 } 2544 if (rw & FREAD) { 2545 if (com->hasfifo) 2546#ifdef COM_ESP 2547 /* XXX avoid h/w bug. */ 2548 if (!com->esp) 2549#endif 2550 sio_setreg(com, com_fifo, 2551 FIFO_RCV_RST | com->fifo_image); 2552 com_events -= (com->iptr - com->ibuf); 2553 com->iptr = com->ibuf; 2554 } 2555 mtx_unlock_spin(&sio_lock); 2556 comstart(tp); 2557} 2558 2559static int 2560commodem(tp, sigon, sigoff) 2561 struct tty *tp; 2562 int sigon, sigoff; 2563{ 2564 struct com_s *com; 2565 int bitand, bitor, msr; 2566 2567 com = tp->t_dev->si_drv1; 2568 if (com->gone) 2569 return(0); 2570 if (sigon != 0 || sigoff != 0) { 2571 bitand = bitor = 0; 2572 if (sigoff & SER_DTR) 2573 bitand |= MCR_DTR; 2574 if (sigoff & SER_RTS) 2575 bitand |= MCR_RTS; 2576 if (sigon & SER_DTR) 2577 bitor |= MCR_DTR; 2578 if (sigon & SER_RTS) 2579 bitor |= MCR_RTS; 2580 bitand = ~bitand; 2581 mtx_lock_spin(&sio_lock); 2582 com->mcr_image &= bitand; 2583 com->mcr_image |= bitor; 2584 outb(com->modem_ctl_port, com->mcr_image); 2585 mtx_unlock_spin(&sio_lock); 2586 return (0); 2587 } else { 2588 bitor = 0; 2589 if (com->mcr_image & MCR_DTR) 2590 bitor |= SER_DTR; 2591 if (com->mcr_image & MCR_RTS) 2592 bitor |= SER_RTS; 2593 msr = com->prev_modem_status; 2594 if (msr & MSR_CTS) 2595 bitor |= SER_CTS; 2596 if (msr & MSR_DCD) 2597 bitor |= SER_DCD; 2598 if (msr & MSR_DSR) 2599 bitor |= SER_DSR; 2600 if (msr & MSR_DSR) 2601 bitor |= SER_DSR; 2602 if (msr & (MSR_RI | MSR_TERI)) 2603 bitor |= SER_RI; 2604 return (bitor); 2605 } 2606} 2607 2608static void 2609siosettimeout() 2610{ 2611 struct com_s *com; 2612 bool_t someopen; 2613 int unit; 2614 2615 /* 2616 * Set our timeout period to 1 second if no polled devices are open. 2617 * Otherwise set it to max(1/200, 1/hz). 2618 * Enable timeouts iff some device is open. 2619 */ 2620 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2621 sio_timeout = hz; 2622 someopen = FALSE; 2623 for (unit = 0; unit < sio_numunits; ++unit) { 2624 com = com_addr(unit); 2625 if (com != NULL && com->tp != NULL 2626 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2627 someopen = TRUE; 2628 if (com->poll || com->poll_output) { 2629 sio_timeout = hz > 200 ? hz / 200 : 1; 2630 break; 2631 } 2632 } 2633 } 2634 if (someopen) { 2635 sio_timeouts_until_log = hz / sio_timeout; 2636 sio_timeout_handle = timeout(comwakeup, (void *)NULL, 2637 sio_timeout); 2638 } else { 2639 /* Flush error messages, if any. */ 2640 sio_timeouts_until_log = 1; 2641 comwakeup((void *)NULL); 2642 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2643 } 2644} 2645 2646static void 2647comwakeup(chan) 2648 void *chan; 2649{ 2650 struct com_s *com; 2651 int unit; 2652 2653 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 2654 2655 /* 2656 * Recover from lost output interrupts. 2657 * Poll any lines that don't use interrupts. 2658 */ 2659 for (unit = 0; unit < sio_numunits; ++unit) { 2660 com = com_addr(unit); 2661 if (com != NULL && !com->gone 2662 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2663 mtx_lock_spin(&sio_lock); 2664 siointr1(com); 2665 mtx_unlock_spin(&sio_lock); 2666 } 2667 } 2668 2669 /* 2670 * Check for and log errors, but not too often. 2671 */ 2672 if (--sio_timeouts_until_log > 0) 2673 return; 2674 sio_timeouts_until_log = hz / sio_timeout; 2675 for (unit = 0; unit < sio_numunits; ++unit) { 2676 int errnum; 2677 2678 com = com_addr(unit); 2679 if (com == NULL) 2680 continue; 2681 if (com->gone) 2682 continue; 2683 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2684 u_int delta; 2685 u_long total; 2686 2687 mtx_lock_spin(&sio_lock); 2688 delta = com->delta_error_counts[errnum]; 2689 com->delta_error_counts[errnum] = 0; 2690 mtx_unlock_spin(&sio_lock); 2691 if (delta == 0) 2692 continue; 2693 total = com->error_counts[errnum] += delta; 2694 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2695 unit, delta, error_desc[errnum], 2696 delta == 1 ? "" : "s", total); 2697 } 2698 } 2699} 2700 2701/* 2702 * Following are all routines needed for SIO to act as console 2703 */ 2704struct siocnstate { 2705 u_char dlbl; 2706 u_char dlbh; 2707 u_char ier; 2708 u_char cfcr; 2709 u_char mcr; 2710}; 2711 2712/* 2713 * This is a function in order to not replicate "ttyd%d" more 2714 * places than absolutely necessary. 2715 */ 2716static void 2717siocnset(struct consdev *cd, int unit) 2718{ 2719 2720 cd->cn_unit = unit; 2721 sprintf(cd->cn_name, "ttyd%d", unit); 2722} 2723 2724static speed_t siocngetspeed(Port_t, u_long rclk); 2725static void siocnclose(struct siocnstate *sp, Port_t iobase); 2726static void siocnopen(struct siocnstate *sp, Port_t iobase, int speed); 2727static void siocntxwait(Port_t iobase); 2728 2729static cn_probe_t siocnprobe; 2730static cn_init_t siocninit; 2731static cn_term_t siocnterm; 2732static cn_checkc_t siocncheckc; 2733static cn_getc_t siocngetc; 2734static cn_putc_t siocnputc; 2735 2736CONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 2737 siocnputc, NULL); 2738 2739static void 2740siocntxwait(iobase) 2741 Port_t iobase; 2742{ 2743 int timo; 2744 2745 /* 2746 * Wait for any pending transmission to finish. Required to avoid 2747 * the UART lockup bug when the speed is changed, and for normal 2748 * transmits. 2749 */ 2750 timo = 100000; 2751 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 2752 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 2753 ; 2754} 2755 2756/* 2757 * Read the serial port specified and try to figure out what speed 2758 * it's currently running at. We're assuming the serial port has 2759 * been initialized and is basicly idle. This routine is only intended 2760 * to be run at system startup. 2761 * 2762 * If the value read from the serial port doesn't make sense, return 0. 2763 */ 2764 2765static speed_t 2766siocngetspeed(iobase, rclk) 2767 Port_t iobase; 2768 u_long rclk; 2769{ 2770 u_int divisor; 2771 u_char dlbh; 2772 u_char dlbl; 2773 u_char cfcr; 2774 2775 cfcr = inb(iobase + com_cfcr); 2776 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2777 2778 dlbl = inb(iobase + com_dlbl); 2779 dlbh = inb(iobase + com_dlbh); 2780 2781 outb(iobase + com_cfcr, cfcr); 2782 2783 divisor = dlbh << 8 | dlbl; 2784 2785 /* XXX there should be more sanity checking. */ 2786 if (divisor == 0) 2787 return (CONSPEED); 2788 return (rclk / (16UL * divisor)); 2789} 2790 2791static void 2792siocnopen(sp, iobase, speed) 2793 struct siocnstate *sp; 2794 Port_t iobase; 2795 int speed; 2796{ 2797 u_int divisor; 2798 u_char dlbh; 2799 u_char dlbl; 2800 2801 /* 2802 * Save all the device control registers except the fifo register 2803 * and set our default ones (cs8 -parenb speed=comdefaultrate). 2804 * We can't save the fifo register since it is read-only. 2805 */ 2806 sp->ier = inb(iobase + com_ier); 2807 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 2808 siocntxwait(iobase); 2809 sp->cfcr = inb(iobase + com_cfcr); 2810 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2811 sp->dlbl = inb(iobase + com_dlbl); 2812 sp->dlbh = inb(iobase + com_dlbh); 2813 /* 2814 * Only set the divisor registers if they would change, since on 2815 * some 16550 incompatibles (Startech), setting them clears the 2816 * data input register. This also reduces the effects of the 2817 * UMC8669F bug. 2818 */ 2819 divisor = siodivisor(comdefaultrclk, speed); 2820 dlbl = divisor & 0xFF; 2821 if (sp->dlbl != dlbl) 2822 outb(iobase + com_dlbl, dlbl); 2823 dlbh = divisor >> 8; 2824 if (sp->dlbh != dlbh) 2825 outb(iobase + com_dlbh, dlbh); 2826 outb(iobase + com_cfcr, CFCR_8BITS); 2827 sp->mcr = inb(iobase + com_mcr); 2828 /* 2829 * We don't want interrupts, but must be careful not to "disable" 2830 * them by clearing the MCR_IENABLE bit, since that might cause 2831 * an interrupt by floating the IRQ line. 2832 */ 2833 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 2834} 2835 2836static void 2837siocnclose(sp, iobase) 2838 struct siocnstate *sp; 2839 Port_t iobase; 2840{ 2841 /* 2842 * Restore the device control registers. 2843 */ 2844 siocntxwait(iobase); 2845 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2846 if (sp->dlbl != inb(iobase + com_dlbl)) 2847 outb(iobase + com_dlbl, sp->dlbl); 2848 if (sp->dlbh != inb(iobase + com_dlbh)) 2849 outb(iobase + com_dlbh, sp->dlbh); 2850 outb(iobase + com_cfcr, sp->cfcr); 2851 /* 2852 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 2853 */ 2854 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 2855 outb(iobase + com_ier, sp->ier); 2856} 2857 2858static void 2859siocnprobe(cp) 2860 struct consdev *cp; 2861{ 2862 speed_t boot_speed; 2863 u_char cfcr; 2864 u_int divisor; 2865 int s, unit; 2866 struct siocnstate sp; 2867 2868 /* 2869 * Find our first enabled console, if any. If it is a high-level 2870 * console device, then initialize it and return successfully. 2871 * If it is a low-level console device, then initialize it and 2872 * return unsuccessfully. It must be initialized in both cases 2873 * for early use by console drivers and debuggers. Initializing 2874 * the hardware is not necessary in all cases, since the i/o 2875 * routines initialize it on the fly, but it is necessary if 2876 * input might arrive while the hardware is switched back to an 2877 * uninitialized state. We can't handle multiple console devices 2878 * yet because our low-level routines don't take a device arg. 2879 * We trust the user to set the console flags properly so that we 2880 * don't need to probe. 2881 */ 2882 cp->cn_pri = CN_DEAD; 2883 2884 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 2885 int flags; 2886 2887 if (resource_disabled("sio", unit)) 2888 continue; 2889 if (resource_int_value("sio", unit, "flags", &flags)) 2890 continue; 2891 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 2892 int port; 2893 Port_t iobase; 2894 2895 if (resource_int_value("sio", unit, "port", &port)) 2896 continue; 2897 iobase = port; 2898 s = spltty(); 2899 if (boothowto & RB_SERIAL) { 2900 boot_speed = 2901 siocngetspeed(iobase, comdefaultrclk); 2902 if (boot_speed) 2903 comdefaultrate = boot_speed; 2904 } 2905 2906 /* 2907 * Initialize the divisor latch. We can't rely on 2908 * siocnopen() to do this the first time, since it 2909 * avoids writing to the latch if the latch appears 2910 * to have the correct value. Also, if we didn't 2911 * just read the speed from the hardware, then we 2912 * need to set the speed in hardware so that 2913 * switching it later is null. 2914 */ 2915 cfcr = inb(iobase + com_cfcr); 2916 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2917 divisor = siodivisor(comdefaultrclk, comdefaultrate); 2918 outb(iobase + com_dlbl, divisor & 0xff); 2919 outb(iobase + com_dlbh, divisor >> 8); 2920 outb(iobase + com_cfcr, cfcr); 2921 2922 siocnopen(&sp, iobase, comdefaultrate); 2923 2924 splx(s); 2925 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 2926 siocnset(cp, unit); 2927 cp->cn_pri = COM_FORCECONSOLE(flags) 2928 || boothowto & RB_SERIAL 2929 ? CN_REMOTE : CN_NORMAL; 2930 siocniobase = iobase; 2931 siocnunit = unit; 2932 } 2933#ifdef GDB 2934 if (COM_DEBUGGER(flags)) 2935 siogdbiobase = iobase; 2936#endif 2937 } 2938 } 2939} 2940 2941static void 2942siocninit(cp) 2943 struct consdev *cp; 2944{ 2945 comconsole = cp->cn_unit; 2946} 2947 2948static void 2949siocnterm(cp) 2950 struct consdev *cp; 2951{ 2952 comconsole = -1; 2953} 2954 2955static int 2956siocncheckc(struct consdev *cd) 2957{ 2958 int c; 2959 Port_t iobase; 2960 int s; 2961 struct siocnstate sp; 2962 speed_t speed; 2963 2964 if (cd != NULL && cd->cn_unit == siocnunit) { 2965 iobase = siocniobase; 2966 speed = comdefaultrate; 2967 } else { 2968#ifdef GDB 2969 iobase = siogdbiobase; 2970 speed = gdbdefaultrate; 2971#else 2972 return (-1); 2973#endif 2974 } 2975 s = spltty(); 2976 siocnopen(&sp, iobase, speed); 2977 if (inb(iobase + com_lsr) & LSR_RXRDY) 2978 c = inb(iobase + com_data); 2979 else 2980 c = -1; 2981 siocnclose(&sp, iobase); 2982 splx(s); 2983 return (c); 2984} 2985 2986static int 2987siocngetc(struct consdev *cd) 2988{ 2989 int c; 2990 Port_t iobase; 2991 int s; 2992 struct siocnstate sp; 2993 speed_t speed; 2994 2995 if (cd != NULL && cd->cn_unit == siocnunit) { 2996 iobase = siocniobase; 2997 speed = comdefaultrate; 2998 } else { 2999#ifdef GDB 3000 iobase = siogdbiobase; 3001 speed = gdbdefaultrate; 3002#else 3003 return (-1); 3004#endif 3005 } 3006 s = spltty(); 3007 siocnopen(&sp, iobase, speed); 3008 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3009 ; 3010 c = inb(iobase + com_data); 3011 siocnclose(&sp, iobase); 3012 splx(s); 3013 return (c); 3014} 3015 3016static void 3017siocnputc(struct consdev *cd, int c) 3018{ 3019 int need_unlock; 3020 int s; 3021 struct siocnstate sp; 3022 Port_t iobase; 3023 speed_t speed; 3024 3025 if (cd != NULL && cd->cn_unit == siocnunit) { 3026 iobase = siocniobase; 3027 speed = comdefaultrate; 3028 } else { 3029#ifdef GDB 3030 iobase = siogdbiobase; 3031 speed = gdbdefaultrate; 3032#else 3033 return; 3034#endif 3035 } 3036 s = spltty(); 3037 need_unlock = 0; 3038 if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 3039 mtx_lock_spin(&sio_lock); 3040 need_unlock = 1; 3041 } 3042 siocnopen(&sp, iobase, speed); 3043 siocntxwait(iobase); 3044 outb(iobase + com_data, c); 3045 siocnclose(&sp, iobase); 3046 if (need_unlock) 3047 mtx_unlock_spin(&sio_lock); 3048 splx(s); 3049} 3050 3051/* 3052 * Remote gdb(1) support. 3053 */ 3054 3055#if defined(GDB) 3056 3057#include <gdb/gdb.h> 3058 3059static gdb_probe_f siogdbprobe; 3060static gdb_init_f siogdbinit; 3061static gdb_term_f siogdbterm; 3062static gdb_getc_f siogdbgetc; 3063static gdb_checkc_f siogdbcheckc; 3064static gdb_putc_f siogdbputc; 3065 3066GDB_DBGPORT(sio, siogdbprobe, siogdbinit, siogdbterm, siogdbcheckc, 3067 siogdbgetc, siogdbputc); 3068 3069static int 3070siogdbprobe(void) 3071{ 3072 return ((siogdbiobase != 0) ? 0 : -1); 3073} 3074 3075static void 3076siogdbinit(void) 3077{ 3078} 3079 3080static void 3081siogdbterm(void) 3082{ 3083} 3084 3085static void 3086siogdbputc(int c) 3087{ 3088 siocnputc(NULL, c); 3089} 3090 3091static int 3092siogdbcheckc(void) 3093{ 3094 return (siocncheckc(NULL)); 3095} 3096 3097static int 3098siogdbgetc(void) 3099{ 3100 return (siocngetc(NULL)); 3101} 3102 3103#endif 3104