sio.c revision 131939
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 4. Neither the name of the University nor the names of its contributors
14 *    may be used to endorse or promote products derived from this software
15 *    without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 *	from: @(#)com.c	7.5 (Berkeley) 5/16/91
30 *	from: i386/isa sio.c,v 1.234
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/sio/sio.c 131939 2004-07-10 22:29:41Z marcel $");
35
36#include "opt_comconsole.h"
37#include "opt_compat.h"
38#include "opt_gdb.h"
39#include "opt_kdb.h"
40#include "opt_sio.h"
41
42/*
43 * Serial driver, based on 386BSD-0.1 com driver.
44 * Mostly rewritten to use pseudo-DMA.
45 * Works for National Semiconductor NS8250-NS16550AF UARTs.
46 * COM driver, based on HP dca driver.
47 *
48 * Changes for PC-Card integration:
49 *	- Added PC-Card driver table and handlers
50 */
51#include <sys/param.h>
52#include <sys/systm.h>
53#include <sys/bus.h>
54#include <sys/conf.h>
55#include <sys/fcntl.h>
56#include <sys/interrupt.h>
57#include <sys/kdb.h>
58#include <sys/kernel.h>
59#include <sys/limits.h>
60#include <sys/lock.h>
61#include <sys/malloc.h>
62#include <sys/module.h>
63#include <sys/mutex.h>
64#include <sys/proc.h>
65#include <sys/reboot.h>
66#include <sys/serial.h>
67#include <sys/sysctl.h>
68#include <sys/syslog.h>
69#include <sys/tty.h>
70#include <machine/bus_pio.h>
71#include <machine/bus.h>
72#include <sys/rman.h>
73#include <sys/timepps.h>
74#include <sys/uio.h>
75#include <sys/cons.h>
76
77#include <isa/isavar.h>
78
79#include <machine/resource.h>
80
81#include <dev/sio/sioreg.h>
82#include <dev/sio/siovar.h>
83
84#ifdef COM_ESP
85#include <dev/ic/esp.h>
86#endif
87#include <dev/ic/ns16550.h>
88
89#define	LOTS_OF_EVENTS	64	/* helps separate urgent events from input */
90
91#define	CALLOUT_MASK		0x80
92#define	CONTROL_MASK		0x60
93#define	CONTROL_INIT_STATE	0x20
94#define	CONTROL_LOCK_STATE	0x40
95#define	DEV_TO_UNIT(dev)	(MINOR_TO_UNIT(minor(dev)))
96#define	MINOR_TO_UNIT(mynor)	((((mynor) & ~0xffffU) >> (8 + 3)) \
97				 | ((mynor) & 0x1f))
98#define	UNIT_TO_MINOR(unit)	((((unit) & ~0x1fU) << (8 + 3)) \
99				 | ((unit) & 0x1f))
100
101#ifdef COM_MULTIPORT
102/* checks in flags for multiport and which is multiport "master chip"
103 * for a given card
104 */
105#define	COM_ISMULTIPORT(flags)	((flags) & 0x01)
106#define	COM_MPMASTER(flags)	(((flags) >> 8) & 0x0ff)
107#define	COM_NOTAST4(flags)	((flags) & 0x04)
108#else
109#define	COM_ISMULTIPORT(flags)	(0)
110#endif /* COM_MULTIPORT */
111
112#define	COM_C_IIR_TXRDYBUG	0x80000
113#define	COM_CONSOLE(flags)	((flags) & 0x10)
114#define	COM_DEBUGGER(flags)	((flags) & 0x80)
115#define	COM_FIFOSIZE(flags)	(((flags) & 0xff000000) >> 24)
116#define	COM_FORCECONSOLE(flags)	((flags) & 0x20)
117#define	COM_IIR_TXRDYBUG(flags)	((flags) & COM_C_IIR_TXRDYBUG)
118#define	COM_LLCONSOLE(flags)	((flags) & 0x40)
119#define	COM_LOSESOUTINTS(flags)	((flags) & 0x08)
120#define	COM_NOFIFO(flags)	((flags) & 0x02)
121#define	COM_NOPROBE(flags)	((flags) & 0x40000)
122#define	COM_NOSCR(flags)	((flags) & 0x100000)
123#define	COM_PPSCTS(flags)	((flags) & 0x10000)
124#define	COM_ST16650A(flags)	((flags) & 0x20000)
125#define	COM_TI16754(flags)	((flags) & 0x200000)
126
127#define	sio_getreg(com, off) \
128	(bus_space_read_1((com)->bst, (com)->bsh, (off)))
129#define	sio_setreg(com, off, value) \
130	(bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
131
132/*
133 * com state bits.
134 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
135 * than the other bits so that they can be tested as a group without masking
136 * off the low bits.
137 *
138 * The following com and tty flags correspond closely:
139 *	CS_BUSY		= TS_BUSY (maintained by comstart(), siopoll() and
140 *				   comstop())
141 *	CS_TTGO		= ~TS_TTSTOP (maintained by comparam() and comstart())
142 *	CS_CTS_OFLOW	= CCTS_OFLOW (maintained by comparam())
143 *	CS_RTS_IFLOW	= CRTS_IFLOW (maintained by comparam())
144 * TS_FLUSH is not used.
145 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
146 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
147 */
148#define	CS_BUSY		0x80	/* output in progress */
149#define	CS_TTGO		0x40	/* output not stopped by XOFF */
150#define	CS_ODEVREADY	0x20	/* external device h/w ready (CTS) */
151#define	CS_CHECKMSR	1	/* check of MSR scheduled */
152#define	CS_CTS_OFLOW	2	/* use CTS output flow control */
153#define	CS_DTR_OFF	0x10	/* DTR held off */
154#define	CS_ODONE	4	/* output completed */
155#define	CS_RTS_IFLOW	8	/* use RTS input flow control */
156#define	CSE_BUSYCHECK	1	/* siobusycheck() scheduled */
157
158static	char const * const	error_desc[] = {
159#define	CE_OVERRUN			0
160	"silo overflow",
161#define	CE_INTERRUPT_BUF_OVERFLOW	1
162	"interrupt-level buffer overflow",
163#define	CE_TTY_BUF_OVERFLOW		2
164	"tty-level buffer overflow",
165};
166
167#define	CE_NTYPES			3
168#define	CE_RECORD(com, errnum)		(++(com)->delta_error_counts[errnum])
169
170/* types.  XXX - should be elsewhere */
171typedef u_int	Port_t;		/* hardware port */
172typedef u_char	bool_t;		/* boolean */
173
174/* queue of linear buffers */
175struct lbq {
176	u_char	*l_head;	/* next char to process */
177	u_char	*l_tail;	/* one past the last char to process */
178	struct lbq *l_next;	/* next in queue */
179	bool_t	l_queued;	/* nonzero if queued */
180};
181
182/* com device structure */
183struct com_s {
184	u_char	state;		/* miscellaneous flag bits */
185	bool_t  active_out;	/* nonzero if the callout device is open */
186	u_char	cfcr_image;	/* copy of value written to CFCR */
187#ifdef COM_ESP
188	bool_t	esp;		/* is this unit a hayes esp board? */
189#endif
190	u_char	extra_state;	/* more flag bits, separate for order trick */
191	u_char	fifo_image;	/* copy of value written to FIFO */
192	bool_t	hasfifo;	/* nonzero for 16550 UARTs */
193	bool_t	loses_outints;	/* nonzero if device loses output interrupts */
194	u_char	mcr_image;	/* copy of value written to MCR */
195#ifdef COM_MULTIPORT
196	bool_t	multiport;	/* is this unit part of a multiport device? */
197#endif /* COM_MULTIPORT */
198	bool_t	no_irq;		/* nonzero if irq is not attached */
199	bool_t  gone;		/* hardware disappeared */
200	bool_t	poll;		/* nonzero if polling is required */
201	bool_t	poll_output;	/* nonzero if polling for output is required */
202	bool_t	st16650a;	/* nonzero if Startech 16650A compatible */
203	int	unit;		/* unit	number */
204	int	dtr_wait;	/* time to hold DTR down on close (* 1/hz) */
205	u_int	flags;		/* copy of device flags */
206	u_int	tx_fifo_size;
207	u_int	wopeners;	/* # processes waiting for DCD in open() */
208
209	/*
210	 * The high level of the driver never reads status registers directly
211	 * because there would be too many side effects to handle conveniently.
212	 * Instead, it reads copies of the registers stored here by the
213	 * interrupt handler.
214	 */
215	u_char	last_modem_status;	/* last MSR read by intr handler */
216	u_char	prev_modem_status;	/* last MSR handled by high level */
217
218	u_char	*ibuf;		/* start of input buffer */
219	u_char	*ibufend;	/* end of input buffer */
220	u_char	*ibufold;	/* old input buffer, to be freed */
221	u_char	*ihighwater;	/* threshold in input buffer */
222	u_char	*iptr;		/* next free spot in input buffer */
223	int	ibufsize;	/* size of ibuf (not include error bytes) */
224	int	ierroff;	/* offset of error bytes in ibuf */
225
226	struct lbq	obufq;	/* head of queue of output buffers */
227	struct lbq	obufs[2];	/* output buffers */
228
229	bus_space_tag_t		bst;
230	bus_space_handle_t	bsh;
231
232	Port_t	data_port;	/* i/o ports */
233#ifdef COM_ESP
234	Port_t	esp_port;
235#endif
236	Port_t	int_ctl_port;
237	Port_t	int_id_port;
238	Port_t	modem_ctl_port;
239	Port_t	line_status_port;
240	Port_t	modem_status_port;
241
242	struct tty	*tp;	/* cross reference */
243
244	/* Initial state. */
245	struct termios	it_in;	/* should be in struct tty */
246	struct termios	it_out;
247
248	/* Lock state. */
249	struct termios	lt_in;	/* should be in struct tty */
250	struct termios	lt_out;
251
252	bool_t	do_timestamp;
253	struct timeval	timestamp;
254	struct	pps_state pps;
255	int	pps_bit;
256#ifdef ALT_BREAK_TO_DEBUGGER
257	int	alt_brk_state;
258#endif
259
260	u_long	bytes_in;	/* statistics */
261	u_long	bytes_out;
262	u_int	delta_error_counts[CE_NTYPES];
263	u_long	error_counts[CE_NTYPES];
264
265	u_long	rclk;
266
267	struct resource *irqres;
268	struct resource *ioportres;
269	int	ioportrid;
270	void	*cookie;
271	struct cdev *devs[6];
272
273	/*
274	 * Data area for output buffers.  Someday we should build the output
275	 * buffer queue without copying data.
276	 */
277	u_char	obuf1[256];
278	u_char	obuf2[256];
279};
280
281#ifdef COM_ESP
282static	int	espattach(struct com_s *com, Port_t esp_port);
283#endif
284
285static	void	combreak(struct tty *tp, int sig);
286static	timeout_t siobusycheck;
287static	u_int	siodivisor(u_long rclk, speed_t speed);
288static	timeout_t siodtrwakeup;
289static	void	comhardclose(struct com_s *com);
290static	void	sioinput(struct com_s *com);
291static	void	siointr1(struct com_s *com);
292static	void	siointr(void *arg);
293static	int	commodem(struct tty *tp, int sigon, int sigoff);
294static	int	comparam(struct tty *tp, struct termios *t);
295static	void	siopoll(void *);
296static	void	siosettimeout(void);
297static	int	siosetwater(struct com_s *com, speed_t speed);
298static	void	comstart(struct tty *tp);
299static	void	comstop(struct tty *tp, int rw);
300static	timeout_t comwakeup;
301
302char		sio_driver_name[] = "sio";
303static struct	mtx sio_lock;
304static int	sio_inited;
305
306/* table and macro for fast conversion from a unit number to its com struct */
307devclass_t	sio_devclass;
308#define	com_addr(unit)	((struct com_s *) \
309			 devclass_get_softc(sio_devclass, unit)) /* XXX */
310
311static	d_open_t	sioopen;
312static	d_close_t	sioclose;
313static	d_read_t	sioread;
314static	d_write_t	siowrite;
315static	d_ioctl_t	sioioctl;
316
317static struct cdevsw sio_cdevsw = {
318	.d_version =	D_VERSION,
319	.d_open =	sioopen,
320	.d_close =	sioclose,
321	.d_read =	sioread,
322	.d_write =	siowrite,
323	.d_ioctl =	sioioctl,
324	.d_name =	sio_driver_name,
325	.d_flags =	D_TTY | D_NEEDGIANT,
326};
327
328static	d_open_t	siocopen;
329static	d_close_t	siocclose;
330static	d_read_t	siocrdwr;
331static	d_ioctl_t	siocioctl;
332
333static struct cdevsw sioc_cdevsw = {
334	.d_version =	D_VERSION,
335	.d_open =	siocopen,
336	.d_close =	siocclose,
337	.d_read =	siocrdwr,
338	.d_write =	siocrdwr,
339	.d_ioctl =	siocioctl,
340	.d_name =	sio_driver_name,
341	.d_flags =	D_TTY | D_NEEDGIANT,
342};
343
344int	comconsole = -1;
345static	volatile speed_t	comdefaultrate = CONSPEED;
346static	u_long			comdefaultrclk = DEFAULT_RCLK;
347SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, "");
348static	speed_t			gdbdefaultrate = GDBSPEED;
349SYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW,
350	    &gdbdefaultrate, GDBSPEED, "");
351static	u_int	com_events;	/* input chars + weighted output completions */
352static	Port_t	siocniobase;
353static	int	siocnunit = -1;
354static	void	*sio_slow_ih;
355static	void	*sio_fast_ih;
356static	int	sio_timeout;
357static	int	sio_timeouts_until_log;
358static	struct	callout_handle sio_timeout_handle
359    = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
360static	int	sio_numunits;
361
362#ifdef GDB
363static	Port_t	siogdbiobase = 0;
364#endif
365
366#ifdef COM_ESP
367/* XXX configure this properly. */
368/* XXX quite broken for new-bus. */
369static	Port_t	likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
370static	Port_t	likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
371#endif
372
373/*
374 * handle sysctl read/write requests for console speed
375 *
376 * In addition to setting comdefaultrate for I/O through /dev/console,
377 * also set the initial and lock values for the /dev/ttyXX device
378 * if there is one associated with the console.  Finally, if the /dev/tty
379 * device has already been open, change the speed on the open running port
380 * itself.
381 */
382
383static int
384sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS)
385{
386	int error, s;
387	speed_t newspeed;
388	struct com_s *com;
389	struct tty *tp;
390
391	newspeed = comdefaultrate;
392
393	error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
394	if (error || !req->newptr)
395		return (error);
396
397	comdefaultrate = newspeed;
398
399	if (comconsole < 0)		/* serial console not selected? */
400		return (0);
401
402	com = com_addr(comconsole);
403	if (com == NULL)
404		return (ENXIO);
405
406	/*
407	 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
408	 * (note, the lock rates really are boolean -- if non-zero, disallow
409	 *  speed changes)
410	 */
411	com->it_in.c_ispeed  = com->it_in.c_ospeed =
412	com->lt_in.c_ispeed  = com->lt_in.c_ospeed =
413	com->it_out.c_ispeed = com->it_out.c_ospeed =
414	com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate;
415
416	/*
417	 * if we're open, change the running rate too
418	 */
419	tp = com->tp;
420	if (tp && (tp->t_state & TS_ISOPEN)) {
421		tp->t_termios.c_ispeed =
422		tp->t_termios.c_ospeed = comdefaultrate;
423		s = spltty();
424		error = comparam(tp, &tp->t_termios);
425		splx(s);
426	}
427	return error;
428}
429
430SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
431	    0, 0, sysctl_machdep_comdefaultrate, "I", "");
432/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */
433
434#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit))
435#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit))
436
437/*
438 *	Unload the driver and clear the table.
439 *	XXX this is mostly wrong.
440 *	XXX TODO:
441 *	This is usually called when the card is ejected, but
442 *	can be caused by a kldunload of a controller driver.
443 *	The idea is to reset the driver's view of the device
444 *	and ensure that any driver entry points such as
445 *	read and write do not hang.
446 */
447int
448siodetach(dev)
449	device_t	dev;
450{
451	struct com_s	*com;
452	int i;
453
454	com = (struct com_s *) device_get_softc(dev);
455	if (com == NULL) {
456		device_printf(dev, "NULL com in siounload\n");
457		return (0);
458	}
459	com->gone = TRUE;
460	for (i = 0 ; i < 6; i++)
461		destroy_dev(com->devs[i]);
462	if (com->irqres) {
463		bus_teardown_intr(dev, com->irqres, com->cookie);
464		bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres);
465	}
466	if (com->ioportres)
467		bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid,
468				     com->ioportres);
469	if (com->tp && (com->tp->t_state & TS_ISOPEN)) {
470		device_printf(dev, "still open, forcing close\n");
471		ttyld_close(com->tp, 0);
472		ttyclose(com->tp);
473	} else {
474		if (com->ibuf != NULL)
475			free(com->ibuf, M_DEVBUF);
476		device_set_softc(dev, NULL);
477		free(com, M_DEVBUF);
478	}
479	return (0);
480}
481
482int
483sioprobe(dev, xrid, rclk, noprobe)
484	device_t	dev;
485	int		xrid;
486	u_long		rclk;
487	int		noprobe;
488{
489#if 0
490	static bool_t	already_init;
491	device_t	xdev;
492#endif
493	struct com_s	*com;
494	u_int		divisor;
495	bool_t		failures[10];
496	int		fn;
497	device_t	idev;
498	Port_t		iobase;
499	intrmask_t	irqmap[4];
500	intrmask_t	irqs;
501	u_char		mcr_image;
502	int		result;
503	u_long		xirq;
504	u_int		flags = device_get_flags(dev);
505	int		rid;
506	struct resource *port;
507
508	rid = xrid;
509	port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
510				  0, ~0, IO_COMSIZE, RF_ACTIVE);
511	if (!port)
512		return (ENXIO);
513
514	com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO);
515	if (com == NULL) {
516		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
517		return (ENOMEM);
518	}
519	device_set_softc(dev, com);
520	com->bst = rman_get_bustag(port);
521	com->bsh = rman_get_bushandle(port);
522	if (rclk == 0)
523		rclk = DEFAULT_RCLK;
524	com->rclk = rclk;
525
526	while (sio_inited != 2)
527		if (atomic_cmpset_int(&sio_inited, 0, 1)) {
528			mtx_init(&sio_lock, sio_driver_name, NULL,
529			    (comconsole != -1) ?
530			    MTX_SPIN | MTX_QUIET : MTX_SPIN);
531			atomic_store_rel_int(&sio_inited, 2);
532		}
533
534#if 0
535	/*
536	 * XXX this is broken - when we are first called, there are no
537	 * previously configured IO ports.  We could hard code
538	 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
539	 * This code has been doing nothing since the conversion since
540	 * "count" is zero the first time around.
541	 */
542	if (!already_init) {
543		/*
544		 * Turn off MCR_IENABLE for all likely serial ports.  An unused
545		 * port with its MCR_IENABLE gate open will inhibit interrupts
546		 * from any used port that shares the interrupt vector.
547		 * XXX the gate enable is elsewhere for some multiports.
548		 */
549		device_t *devs;
550		int count, i, xioport;
551
552		devclass_get_devices(sio_devclass, &devs, &count);
553		for (i = 0; i < count; i++) {
554			xdev = devs[i];
555			if (device_is_enabled(xdev) &&
556			    bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
557					     NULL) == 0)
558				outb(xioport + com_mcr, 0);
559		}
560		free(devs, M_TEMP);
561		already_init = TRUE;
562	}
563#endif
564
565	if (COM_LLCONSOLE(flags)) {
566		printf("sio%d: reserved for low-level i/o\n",
567		       device_get_unit(dev));
568		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
569		device_set_softc(dev, NULL);
570		free(com, M_DEVBUF);
571		return (ENXIO);
572	}
573
574	/*
575	 * If the device is on a multiport card and has an AST/4
576	 * compatible interrupt control register, initialize this
577	 * register and prepare to leave MCR_IENABLE clear in the mcr.
578	 * Otherwise, prepare to set MCR_IENABLE in the mcr.
579	 * Point idev to the device struct giving the correct id_irq.
580	 * This is the struct for the master device if there is one.
581	 */
582	idev = dev;
583	mcr_image = MCR_IENABLE;
584#ifdef COM_MULTIPORT
585	if (COM_ISMULTIPORT(flags)) {
586		Port_t xiobase;
587		u_long io;
588
589		idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
590		if (idev == NULL) {
591			printf("sio%d: master device %d not configured\n",
592			       device_get_unit(dev), COM_MPMASTER(flags));
593			idev = dev;
594		}
595		if (!COM_NOTAST4(flags)) {
596			if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
597					     NULL) == 0) {
598				xiobase = io;
599				if (bus_get_resource(idev, SYS_RES_IRQ, 0,
600				    NULL, NULL) == 0)
601					outb(xiobase + com_scr, 0x80);
602				else
603					outb(xiobase + com_scr, 0);
604			}
605			mcr_image = 0;
606		}
607	}
608#endif /* COM_MULTIPORT */
609	if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
610		mcr_image = 0;
611
612	bzero(failures, sizeof failures);
613	iobase = rman_get_start(port);
614
615	/*
616	 * We don't want to get actual interrupts, just masked ones.
617	 * Interrupts from this line should already be masked in the ICU,
618	 * but mask them in the processor as well in case there are some
619	 * (misconfigured) shared interrupts.
620	 */
621	mtx_lock_spin(&sio_lock);
622/* EXTRA DELAY? */
623
624	/*
625	 * For the TI16754 chips, set prescaler to 1 (4 is often the
626	 * default after-reset value) as otherwise it's impossible to
627	 * get highest baudrates.
628	 */
629	if (COM_TI16754(flags)) {
630		u_char cfcr, efr;
631
632		cfcr = sio_getreg(com, com_cfcr);
633		sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
634		efr = sio_getreg(com, com_efr);
635		/* Unlock extended features to turn off prescaler. */
636		sio_setreg(com, com_efr, efr | EFR_EFE);
637		/* Disable EFR. */
638		sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0);
639		/* Turn off prescaler. */
640		sio_setreg(com, com_mcr,
641			   sio_getreg(com, com_mcr) & ~MCR_PRESCALE);
642		sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
643		sio_setreg(com, com_efr, efr);
644		sio_setreg(com, com_cfcr, cfcr);
645	}
646
647	/*
648	 * Initialize the speed and the word size and wait long enough to
649	 * drain the maximum of 16 bytes of junk in device output queues.
650	 * The speed is undefined after a master reset and must be set
651	 * before relying on anything related to output.  There may be
652	 * junk after a (very fast) soft reboot and (apparently) after
653	 * master reset.
654	 * XXX what about the UART bug avoided by waiting in comparam()?
655	 * We don't want to to wait long enough to drain at 2 bps.
656	 */
657	if (iobase == siocniobase)
658		DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
659	else {
660		sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
661		divisor = siodivisor(rclk, SIO_TEST_SPEED);
662		sio_setreg(com, com_dlbl, divisor & 0xff);
663		sio_setreg(com, com_dlbh, divisor >> 8);
664		sio_setreg(com, com_cfcr, CFCR_8BITS);
665		DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
666	}
667
668	/*
669	 * Enable the interrupt gate and disable device interupts.  This
670	 * should leave the device driving the interrupt line low and
671	 * guarantee an edge trigger if an interrupt can be generated.
672	 */
673/* EXTRA DELAY? */
674	sio_setreg(com, com_mcr, mcr_image);
675	sio_setreg(com, com_ier, 0);
676	DELAY(1000);		/* XXX */
677	irqmap[0] = isa_irq_pending();
678
679	/*
680	 * Attempt to set loopback mode so that we can send a null byte
681	 * without annoying any external device.
682	 */
683/* EXTRA DELAY? */
684	sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
685
686	/*
687	 * Attempt to generate an output interrupt.  On 8250's, setting
688	 * IER_ETXRDY generates an interrupt independent of the current
689	 * setting and independent of whether the THR is empty.  On 16450's,
690	 * setting IER_ETXRDY generates an interrupt independent of the
691	 * current setting.  On 16550A's, setting IER_ETXRDY only
692	 * generates an interrupt when IER_ETXRDY is not already set.
693	 */
694	sio_setreg(com, com_ier, IER_ETXRDY);
695
696	/*
697	 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
698	 * an interrupt.  They'd better generate one for actually doing
699	 * output.  Loopback may be broken on the same incompatibles but
700	 * it's unlikely to do more than allow the null byte out.
701	 */
702	sio_setreg(com, com_data, 0);
703	if (iobase == siocniobase)
704		DELAY((1 + 2) * 1000000 / (comdefaultrate / 10));
705	else
706		DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
707
708	/*
709	 * Turn off loopback mode so that the interrupt gate works again
710	 * (MCR_IENABLE was hidden).  This should leave the device driving
711	 * an interrupt line high.  It doesn't matter if the interrupt
712	 * line oscillates while we are not looking at it, since interrupts
713	 * are disabled.
714	 */
715/* EXTRA DELAY? */
716	sio_setreg(com, com_mcr, mcr_image);
717
718	/*
719	 * It seems my Xircom CBEM56G Cardbus modem wants to be reset
720	 * to 8 bits *again*, or else probe test 0 will fail.
721	 * gwk@sgi.com, 4/19/2001
722	 */
723	sio_setreg(com, com_cfcr, CFCR_8BITS);
724
725	/*
726	 * Some PCMCIA cards (Palido 321s, DC-1S, ...) have the "TXRDY bug",
727	 * so we probe for a buggy IIR_TXRDY implementation even in the
728	 * noprobe case.  We don't probe for it in the !noprobe case because
729	 * noprobe is always set for PCMCIA cards and the problem is not
730	 * known to affect any other cards.
731	 */
732	if (noprobe) {
733		/* Read IIR a few times. */
734		for (fn = 0; fn < 2; fn ++) {
735			DELAY(10000);
736			failures[6] = sio_getreg(com, com_iir);
737		}
738
739		/* IIR_TXRDY should be clear.  Is it? */
740		result = 0;
741		if (failures[6] & IIR_TXRDY) {
742			/*
743			 * No.  We seem to have the bug.  Does our fix for
744			 * it work?
745			 */
746			sio_setreg(com, com_ier, 0);
747			if (sio_getreg(com, com_iir) & IIR_NOPEND) {
748				/* Yes.  We discovered the TXRDY bug! */
749				SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
750			} else {
751				/* No.  Just fail.  XXX */
752				result = ENXIO;
753				sio_setreg(com, com_mcr, 0);
754			}
755		} else {
756			/* Yes.  No bug. */
757			CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
758		}
759		sio_setreg(com, com_ier, 0);
760		sio_setreg(com, com_cfcr, CFCR_8BITS);
761		mtx_unlock_spin(&sio_lock);
762		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
763		if (iobase == siocniobase)
764			result = 0;
765		if (result != 0) {
766			device_set_softc(dev, NULL);
767			free(com, M_DEVBUF);
768		}
769		return (result);
770	}
771
772	/*
773	 * Check that
774	 *	o the CFCR, IER and MCR in UART hold the values written to them
775	 *	  (the values happen to be all distinct - this is good for
776	 *	  avoiding false positive tests from bus echoes).
777	 *	o an output interrupt is generated and its vector is correct.
778	 *	o the interrupt goes away when the IIR in the UART is read.
779	 */
780/* EXTRA DELAY? */
781	failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
782	failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
783	failures[2] = sio_getreg(com, com_mcr) - mcr_image;
784	DELAY(10000);		/* Some internal modems need this time */
785	irqmap[1] = isa_irq_pending();
786	failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
787	DELAY(1000);		/* XXX */
788	irqmap[2] = isa_irq_pending();
789	failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
790
791	/*
792	 * Turn off all device interrupts and check that they go off properly.
793	 * Leave MCR_IENABLE alone.  For ports without a master port, it gates
794	 * the OUT2 output of the UART to
795	 * the ICU input.  Closing the gate would give a floating ICU input
796	 * (unless there is another device driving it) and spurious interrupts.
797	 * (On the system that this was first tested on, the input floats high
798	 * and gives a (masked) interrupt as soon as the gate is closed.)
799	 */
800	sio_setreg(com, com_ier, 0);
801	sio_setreg(com, com_cfcr, CFCR_8BITS);	/* dummy to avoid bus echo */
802	failures[7] = sio_getreg(com, com_ier);
803	DELAY(1000);		/* XXX */
804	irqmap[3] = isa_irq_pending();
805	failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
806
807	mtx_unlock_spin(&sio_lock);
808
809	irqs = irqmap[1] & ~irqmap[0];
810	if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
811	    ((1 << xirq) & irqs) == 0) {
812		printf(
813		"sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
814		    device_get_unit(dev), xirq, irqs);
815		printf(
816		"sio%d: port may not be enabled\n",
817		    device_get_unit(dev));
818	}
819	if (bootverbose)
820		printf("sio%d: irq maps: %#x %#x %#x %#x\n",
821		    device_get_unit(dev),
822		    irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
823
824	result = 0;
825	for (fn = 0; fn < sizeof failures; ++fn)
826		if (failures[fn]) {
827			sio_setreg(com, com_mcr, 0);
828			result = ENXIO;
829			if (bootverbose) {
830				printf("sio%d: probe failed test(s):",
831				    device_get_unit(dev));
832				for (fn = 0; fn < sizeof failures; ++fn)
833					if (failures[fn])
834						printf(" %d", fn);
835				printf("\n");
836			}
837			break;
838		}
839	bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
840	if (iobase == siocniobase)
841		result = 0;
842	if (result != 0) {
843		device_set_softc(dev, NULL);
844		free(com, M_DEVBUF);
845	}
846	return (result);
847}
848
849#ifdef COM_ESP
850static int
851espattach(com, esp_port)
852	struct com_s		*com;
853	Port_t			esp_port;
854{
855	u_char	dips;
856	u_char	val;
857
858	/*
859	 * Check the ESP-specific I/O port to see if we're an ESP
860	 * card.  If not, return failure immediately.
861	 */
862	if ((inb(esp_port) & 0xf3) == 0) {
863		printf(" port 0x%x is not an ESP board?\n", esp_port);
864		return (0);
865	}
866
867	/*
868	 * We've got something that claims to be a Hayes ESP card.
869	 * Let's hope so.
870	 */
871
872	/* Get the dip-switch configuration */
873	outb(esp_port + ESP_CMD1, ESP_GETDIPS);
874	dips = inb(esp_port + ESP_STATUS1);
875
876	/*
877	 * Bits 0,1 of dips say which COM port we are.
878	 */
879	if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
880		printf(" : ESP");
881	else {
882		printf(" esp_port has com %d\n", dips & 0x03);
883		return (0);
884	}
885
886	/*
887	 * Check for ESP version 2.0 or later:  bits 4,5,6 = 010.
888	 */
889	outb(esp_port + ESP_CMD1, ESP_GETTEST);
890	val = inb(esp_port + ESP_STATUS1);	/* clear reg 1 */
891	val = inb(esp_port + ESP_STATUS2);
892	if ((val & 0x70) < 0x20) {
893		printf("-old (%o)", val & 0x70);
894		return (0);
895	}
896
897	/*
898	 * Check for ability to emulate 16550:  bit 7 == 1
899	 */
900	if ((dips & 0x80) == 0) {
901		printf(" slave");
902		return (0);
903	}
904
905	/*
906	 * Okay, we seem to be a Hayes ESP card.  Whee.
907	 */
908	com->esp = TRUE;
909	com->esp_port = esp_port;
910	return (1);
911}
912#endif /* COM_ESP */
913
914int
915sioattach(dev, xrid, rclk)
916	device_t	dev;
917	int		xrid;
918	u_long		rclk;
919{
920	struct com_s	*com;
921#ifdef COM_ESP
922	Port_t		*espp;
923#endif
924	Port_t		iobase;
925	int		minorbase;
926	int		unit;
927	u_int		flags;
928	int		rid;
929	struct resource *port;
930	int		ret;
931
932	rid = xrid;
933	port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
934				  0, ~0, IO_COMSIZE, RF_ACTIVE);
935	if (!port)
936		return (ENXIO);
937
938	iobase = rman_get_start(port);
939	unit = device_get_unit(dev);
940	com = device_get_softc(dev);
941	flags = device_get_flags(dev);
942
943	if (unit >= sio_numunits)
944		sio_numunits = unit + 1;
945	/*
946	 * sioprobe() has initialized the device registers as follows:
947	 *	o cfcr = CFCR_8BITS.
948	 *	  It is most important that CFCR_DLAB is off, so that the
949	 *	  data port is not hidden when we enable interrupts.
950	 *	o ier = 0.
951	 *	  Interrupts are only enabled when the line is open.
952	 *	o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
953	 *	  interrupt control register or the config specifies no irq.
954	 *	  Keeping MCR_DTR and MCR_RTS off might stop the external
955	 *	  device from sending before we are ready.
956	 */
957	bzero(com, sizeof *com);
958	com->unit = unit;
959	com->ioportres = port;
960	com->ioportrid = rid;
961	com->bst = rman_get_bustag(port);
962	com->bsh = rman_get_bushandle(port);
963	com->cfcr_image = CFCR_8BITS;
964	com->dtr_wait = 3 * hz;
965	com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
966	com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
967	com->tx_fifo_size = 1;
968	com->obufs[0].l_head = com->obuf1;
969	com->obufs[1].l_head = com->obuf2;
970
971	com->data_port = iobase + com_data;
972	com->int_ctl_port = iobase + com_ier;
973	com->int_id_port = iobase + com_iir;
974	com->modem_ctl_port = iobase + com_mcr;
975	com->mcr_image = inb(com->modem_ctl_port);
976	com->line_status_port = iobase + com_lsr;
977	com->modem_status_port = iobase + com_msr;
978
979	if (rclk == 0)
980		rclk = DEFAULT_RCLK;
981	com->rclk = rclk;
982
983	/*
984	 * We don't use all the flags from <sys/ttydefaults.h> since they
985	 * are only relevant for logins.  It's important to have echo off
986	 * initially so that the line doesn't start blathering before the
987	 * echo flag can be turned off.
988	 */
989	com->it_in.c_iflag = 0;
990	com->it_in.c_oflag = 0;
991	com->it_in.c_cflag = TTYDEF_CFLAG;
992	com->it_in.c_lflag = 0;
993	if (unit == comconsole) {
994		com->it_in.c_iflag = TTYDEF_IFLAG;
995		com->it_in.c_oflag = TTYDEF_OFLAG;
996		com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
997		com->it_in.c_lflag = TTYDEF_LFLAG;
998		com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
999		com->lt_out.c_ispeed = com->lt_out.c_ospeed =
1000		com->lt_in.c_ispeed = com->lt_in.c_ospeed =
1001		com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
1002	} else
1003		com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED;
1004	if (siosetwater(com, com->it_in.c_ispeed) != 0) {
1005		mtx_unlock_spin(&sio_lock);
1006		/*
1007		 * Leave i/o resources allocated if this is a `cn'-level
1008		 * console, so that other devices can't snarf them.
1009		 */
1010		if (iobase != siocniobase)
1011			bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1012		return (ENOMEM);
1013	}
1014	mtx_unlock_spin(&sio_lock);
1015	termioschars(&com->it_in);
1016	com->it_out = com->it_in;
1017
1018	/* attempt to determine UART type */
1019	printf("sio%d: type", unit);
1020
1021
1022	if (!COM_ISMULTIPORT(flags) &&
1023	    !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) {
1024		u_char	scr;
1025		u_char	scr1;
1026		u_char	scr2;
1027
1028		scr = sio_getreg(com, com_scr);
1029		sio_setreg(com, com_scr, 0xa5);
1030		scr1 = sio_getreg(com, com_scr);
1031		sio_setreg(com, com_scr, 0x5a);
1032		scr2 = sio_getreg(com, com_scr);
1033		sio_setreg(com, com_scr, scr);
1034		if (scr1 != 0xa5 || scr2 != 0x5a) {
1035			printf(" 8250 or not responding");
1036			goto determined_type;
1037		}
1038	}
1039	sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
1040	DELAY(100);
1041	switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
1042	case FIFO_RX_LOW:
1043		printf(" 16450");
1044		break;
1045	case FIFO_RX_MEDL:
1046		printf(" 16450?");
1047		break;
1048	case FIFO_RX_MEDH:
1049		printf(" 16550?");
1050		break;
1051	case FIFO_RX_HIGH:
1052		if (COM_NOFIFO(flags)) {
1053			printf(" 16550A fifo disabled");
1054			break;
1055		}
1056		com->hasfifo = TRUE;
1057		if (COM_ST16650A(flags)) {
1058			printf(" ST16650A");
1059			com->st16650a = TRUE;
1060			com->tx_fifo_size = 32;
1061			break;
1062		}
1063		if (COM_TI16754(flags)) {
1064			printf(" TI16754");
1065			com->tx_fifo_size = 64;
1066			break;
1067		}
1068		printf(" 16550A");
1069#ifdef COM_ESP
1070		for (espp = likely_esp_ports; *espp != 0; espp++)
1071			if (espattach(com, *espp)) {
1072				com->tx_fifo_size = 1024;
1073				break;
1074			}
1075		if (com->esp)
1076			break;
1077#endif
1078		com->tx_fifo_size = COM_FIFOSIZE(flags);
1079		if (com->tx_fifo_size == 0)
1080			com->tx_fifo_size = 16;
1081		else
1082			printf(" lookalike with %u bytes FIFO",
1083			       com->tx_fifo_size);
1084		break;
1085	}
1086#ifdef COM_ESP
1087	if (com->esp) {
1088		/*
1089		 * Set 16550 compatibility mode.
1090		 * We don't use the ESP_MODE_SCALE bit to increase the
1091		 * fifo trigger levels because we can't handle large
1092		 * bursts of input.
1093		 * XXX flow control should be set in comparam(), not here.
1094		 */
1095		outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1096		outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1097
1098		/* Set RTS/CTS flow control. */
1099		outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1100		outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1101		outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1102
1103		/* Set flow-control levels. */
1104		outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1105		outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1106		outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1107		outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1108		outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1109	}
1110#endif /* COM_ESP */
1111	sio_setreg(com, com_fifo, 0);
1112determined_type: ;
1113
1114#ifdef COM_MULTIPORT
1115	if (COM_ISMULTIPORT(flags)) {
1116		device_t masterdev;
1117
1118		com->multiport = TRUE;
1119		printf(" (multiport");
1120		if (unit == COM_MPMASTER(flags))
1121			printf(" master");
1122		printf(")");
1123		masterdev = devclass_get_device(sio_devclass,
1124		    COM_MPMASTER(flags));
1125		com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1126		    SYS_RES_IRQ, 0, NULL, NULL) != 0);
1127	 }
1128#endif /* COM_MULTIPORT */
1129	if (unit == comconsole)
1130		printf(", console");
1131	if (COM_IIR_TXRDYBUG(flags))
1132		printf(" with a buggy IIR_TXRDY implementation");
1133	printf("\n");
1134
1135	if (sio_fast_ih == NULL) {
1136		swi_add(&tty_ithd, "sio", siopoll, NULL, SWI_TTY, 0,
1137		    &sio_fast_ih);
1138		swi_add(&clk_ithd, "sio", siopoll, NULL, SWI_CLOCK, 0,
1139		    &sio_slow_ih);
1140	}
1141	minorbase = UNIT_TO_MINOR(unit);
1142	com->devs[0] = make_dev(&sio_cdevsw, minorbase,
1143	    UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit);
1144	com->devs[1] = make_dev(&sioc_cdevsw, minorbase | CONTROL_INIT_STATE,
1145	    UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit);
1146	com->devs[2] = make_dev(&sioc_cdevsw, minorbase | CONTROL_LOCK_STATE,
1147	    UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit);
1148	com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK,
1149	    UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit);
1150	com->devs[4] = make_dev(&sioc_cdevsw,
1151	    minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
1152	    UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit);
1153	com->devs[5] = make_dev(&sioc_cdevsw,
1154	    minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
1155	    UID_UUCP, GID_DIALER, 0660, "cuala%r", unit);
1156	for (rid = 0; rid < 6; rid++)
1157		com->devs[rid]->si_drv1 = com;
1158	com->flags = flags;
1159	com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1160
1161	if (COM_PPSCTS(flags))
1162		com->pps_bit = MSR_CTS;
1163	else
1164		com->pps_bit = MSR_DCD;
1165	pps_init(&com->pps);
1166
1167	rid = 0;
1168	com->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
1169	if (com->irqres) {
1170		ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres,
1171				     INTR_TYPE_TTY | INTR_FAST,
1172				     siointr, com, &com->cookie);
1173		if (ret) {
1174			ret = BUS_SETUP_INTR(device_get_parent(dev), dev,
1175					     com->irqres, INTR_TYPE_TTY,
1176					     siointr, com, &com->cookie);
1177			if (ret == 0)
1178				device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n");
1179		}
1180		if (ret)
1181			device_printf(dev, "could not activate interrupt\n");
1182#if defined(KDB) && (defined(BREAK_TO_DEBUGGER) || \
1183    defined(ALT_BREAK_TO_DEBUGGER))
1184		/*
1185		 * Enable interrupts for early break-to-debugger support
1186		 * on the console.
1187		 */
1188		if (ret == 0 && unit == comconsole)
1189			outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS |
1190			    IER_EMSC);
1191#endif
1192	}
1193
1194	return (0);
1195}
1196
1197static int
1198siocopen(dev, flag, mode, td)
1199	struct cdev *dev;
1200	int		flag;
1201	int		mode;
1202	struct thread	*td;
1203{
1204	struct com_s	*com;
1205
1206	com = dev->si_drv1;
1207	if (com == NULL)
1208		return (ENXIO);
1209	if (com->gone)
1210		return (ENXIO);
1211	return (0);
1212}
1213
1214static int
1215sioopen(dev, flag, mode, td)
1216	struct cdev *dev;
1217	int		flag;
1218	int		mode;
1219	struct thread	*td;
1220{
1221	struct com_s	*com;
1222	int		error;
1223	int		mynor;
1224	int		s;
1225	struct tty	*tp;
1226	int		unit;
1227
1228	mynor = minor(dev);
1229	unit = MINOR_TO_UNIT(mynor);
1230	com = dev->si_drv1;
1231	if (com == NULL)
1232		return (ENXIO);
1233	if (com->gone)
1234		return (ENXIO);
1235	tp = dev->si_tty = com->tp = ttymalloc(com->tp);
1236	s = spltty();
1237	/*
1238	 * We jump to this label after all non-interrupted sleeps to pick
1239	 * up any changes of the device state.
1240	 */
1241open_top:
1242	while (com->state & CS_DTR_OFF) {
1243		error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0);
1244		if (com_addr(unit) == NULL)
1245			return (ENXIO);
1246		if (error != 0 || com->gone)
1247			goto out;
1248	}
1249	if (tp->t_state & TS_ISOPEN) {
1250		/*
1251		 * The device is open, so everything has been initialized.
1252		 * Handle conflicts.
1253		 */
1254		if (mynor & CALLOUT_MASK) {
1255			if (!com->active_out) {
1256				error = EBUSY;
1257				goto out;
1258			}
1259		} else {
1260			if (com->active_out) {
1261				if (flag & O_NONBLOCK) {
1262					error = EBUSY;
1263					goto out;
1264				}
1265				error =	tsleep(&com->active_out,
1266					       TTIPRI | PCATCH, "siobi", 0);
1267				if (com_addr(unit) == NULL)
1268					return (ENXIO);
1269				if (error != 0 || com->gone)
1270					goto out;
1271				goto open_top;
1272			}
1273		}
1274		if (tp->t_state & TS_XCLUDE &&
1275		    suser(td)) {
1276			error = EBUSY;
1277			goto out;
1278		}
1279	} else {
1280		/*
1281		 * The device isn't open, so there are no conflicts.
1282		 * Initialize it.  Initialization is done twice in many
1283		 * cases: to preempt sleeping callin opens if we are
1284		 * callout, and to complete a callin open after DCD rises.
1285		 */
1286		tp->t_oproc = comstart;
1287		tp->t_param = comparam;
1288		tp->t_stop = comstop;
1289		tp->t_modem = commodem;
1290		tp->t_break = combreak;
1291		tp->t_dev = dev;
1292		tp->t_termios = mynor & CALLOUT_MASK
1293				? com->it_out : com->it_in;
1294		(void)commodem(tp, SER_DTR | SER_RTS, 0);
1295		com->poll = com->no_irq;
1296		com->poll_output = com->loses_outints;
1297		++com->wopeners;
1298		error = comparam(tp, &tp->t_termios);
1299		--com->wopeners;
1300		if (error != 0)
1301			goto out;
1302		/*
1303		 * XXX we should goto open_top if comparam() slept.
1304		 */
1305		if (com->hasfifo) {
1306			int i;
1307			/*
1308			 * (Re)enable and drain fifos.
1309			 *
1310			 * Certain SMC chips cause problems if the fifos
1311			 * are enabled while input is ready.  Turn off the
1312			 * fifo if necessary to clear the input.  We test
1313			 * the input ready bit after enabling the fifos
1314			 * since we've already enabled them in comparam()
1315			 * and to handle races between enabling and fresh
1316			 * input.
1317			 */
1318			for (i = 0; i < 500; i++) {
1319				sio_setreg(com, com_fifo,
1320					   FIFO_RCV_RST | FIFO_XMT_RST
1321					   | com->fifo_image);
1322				/*
1323				 * XXX the delays are for superstitious
1324				 * historical reasons.  It must be less than
1325				 * the character time at the maximum
1326				 * supported speed (87 usec at 115200 bps
1327				 * 8N1).  Otherwise we might loop endlessly
1328				 * if data is streaming in.  We used to use
1329				 * delays of 100.  That usually worked
1330				 * because DELAY(100) used to usually delay
1331				 * for about 85 usec instead of 100.
1332				 */
1333				DELAY(50);
1334				if (!(inb(com->line_status_port) & LSR_RXRDY))
1335					break;
1336				sio_setreg(com, com_fifo, 0);
1337				DELAY(50);
1338				(void) inb(com->data_port);
1339			}
1340			if (i == 500) {
1341				error = EIO;
1342				goto out;
1343			}
1344		}
1345
1346		mtx_lock_spin(&sio_lock);
1347		(void) inb(com->line_status_port);
1348		(void) inb(com->data_port);
1349		com->prev_modem_status = com->last_modem_status
1350		    = inb(com->modem_status_port);
1351		outb(com->int_ctl_port,
1352		     IER_ERXRDY | IER_ERLS | IER_EMSC
1353		     | (COM_IIR_TXRDYBUG(com->flags) ? 0 : IER_ETXRDY));
1354		mtx_unlock_spin(&sio_lock);
1355		/*
1356		 * Handle initial DCD.  Callout devices get a fake initial
1357		 * DCD (trapdoor DCD).  If we are callout, then any sleeping
1358		 * callin opens get woken up and resume sleeping on "siobi"
1359		 * instead of "siodcd".
1360		 */
1361		/*
1362		 * XXX `mynor & CALLOUT_MASK' should be
1363		 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1364		 * TRAPDOOR_CARRIER is the default initial state for callout
1365		 * devices and SOFT_CARRIER is like CLOCAL except it hides
1366		 * the true carrier.
1367		 */
1368		if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
1369			ttyld_modem(tp, 1);
1370	}
1371	/*
1372	 * Wait for DCD if necessary.
1373	 */
1374	if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
1375	    && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) {
1376		++com->wopeners;
1377		error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0);
1378		if (com_addr(unit) == NULL)
1379			return (ENXIO);
1380		--com->wopeners;
1381		if (error != 0 || com->gone)
1382			goto out;
1383		goto open_top;
1384	}
1385	error =	ttyld_open(tp, dev);
1386	ttyldoptim(tp);
1387	if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
1388		com->active_out = TRUE;
1389	siosettimeout();
1390out:
1391	splx(s);
1392	if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
1393		comhardclose(com);
1394	return (error);
1395}
1396
1397static int
1398siocclose(dev, flag, mode, td)
1399	struct cdev *dev;
1400	int		flag;
1401	int		mode;
1402	struct thread	*td;
1403{
1404
1405	return (0);
1406}
1407
1408static int
1409sioclose(dev, flag, mode, td)
1410	struct cdev *dev;
1411	int		flag;
1412	int		mode;
1413	struct thread	*td;
1414{
1415	struct com_s	*com;
1416	int		mynor;
1417	int		s;
1418	struct tty	*tp;
1419
1420	mynor = minor(dev);
1421	com = dev->si_drv1;
1422	if (com == NULL)
1423		return (ENODEV);
1424	tp = com->tp;
1425	s = spltty();
1426	ttyld_close(tp, flag);
1427	ttyldoptim(tp);
1428	comhardclose(com);
1429	ttyclose(tp);
1430	siosettimeout();
1431	splx(s);
1432	if (com->gone) {
1433		printf("sio%d: gone\n", com->unit);
1434		s = spltty();
1435		if (com->ibuf != NULL)
1436			free(com->ibuf, M_DEVBUF);
1437		bzero(tp, sizeof *tp);
1438		splx(s);
1439	}
1440	return (0);
1441}
1442
1443static void
1444comhardclose(com)
1445	struct com_s	*com;
1446{
1447	int		s;
1448	struct tty	*tp;
1449
1450	s = spltty();
1451	com->poll = FALSE;
1452	com->poll_output = FALSE;
1453	com->do_timestamp = FALSE;
1454	com->pps.ppsparam.mode = 0;
1455	sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1456	tp = com->tp;
1457
1458#if defined(KDB) && (defined(BREAK_TO_DEBUGGER) || \
1459    defined(ALT_BREAK_TO_DEBUGGER))
1460	/*
1461	 * Leave interrupts enabled and don't clear DTR if this is the
1462	 * console. This allows us to detect break-to-debugger events
1463	 * while the console device is closed.
1464	 */
1465	if (com->unit != comconsole)
1466#endif
1467	{
1468		sio_setreg(com, com_ier, 0);
1469		if (tp->t_cflag & HUPCL
1470		    /*
1471		     * XXX we will miss any carrier drop between here and the
1472		     * next open.  Perhaps we should watch DCD even when the
1473		     * port is closed; it is not sufficient to check it at
1474		     * the next open because it might go up and down while
1475		     * we're not watching.
1476		     */
1477		    || (!com->active_out
1478		        && !(com->prev_modem_status & MSR_DCD)
1479		        && !(com->it_in.c_cflag & CLOCAL))
1480		    || !(tp->t_state & TS_ISOPEN)) {
1481			(void)commodem(tp, 0, SER_DTR);
1482			if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
1483				timeout(siodtrwakeup, com, com->dtr_wait);
1484				com->state |= CS_DTR_OFF;
1485			}
1486		}
1487	}
1488	if (com->hasfifo) {
1489		/*
1490		 * Disable fifos so that they are off after controlled
1491		 * reboots.  Some BIOSes fail to detect 16550s when the
1492		 * fifos are enabled.
1493		 */
1494		sio_setreg(com, com_fifo, 0);
1495	}
1496	com->active_out = FALSE;
1497	wakeup(&com->active_out);
1498	wakeup(TSA_CARR_ON(tp));	/* restart any wopeners */
1499	splx(s);
1500}
1501
1502static int
1503siocrdwr(dev, uio, flag)
1504	struct cdev *dev;
1505	struct uio	*uio;
1506	int		flag;
1507{
1508
1509	return (ENODEV);
1510}
1511
1512static int
1513sioread(dev, uio, flag)
1514	struct cdev *dev;
1515	struct uio	*uio;
1516	int		flag;
1517{
1518	struct com_s	*com;
1519
1520	com = dev->si_drv1;
1521	if (com == NULL || com->gone)
1522		return (ENODEV);
1523	return (ttyld_read(com->tp, uio, flag));
1524}
1525
1526static int
1527siowrite(dev, uio, flag)
1528	struct cdev *dev;
1529	struct uio	*uio;
1530	int		flag;
1531{
1532	int		mynor;
1533	struct com_s	*com;
1534	int		unit;
1535
1536	mynor = minor(dev);
1537
1538	unit = MINOR_TO_UNIT(mynor);
1539	com = com_addr(unit);
1540	if (com == NULL || com->gone)
1541		return (ENODEV);
1542	/*
1543	 * (XXX) We disallow virtual consoles if the physical console is
1544	 * a serial port.  This is in case there is a display attached that
1545	 * is not the console.  In that situation we don't need/want the X
1546	 * server taking over the console.
1547	 */
1548	if (constty != NULL && unit == comconsole)
1549		constty = NULL;
1550	return (ttyld_write(com->tp, uio, flag));
1551}
1552
1553static void
1554siobusycheck(chan)
1555	void	*chan;
1556{
1557	struct com_s	*com;
1558	int		s;
1559
1560	com = (struct com_s *)chan;
1561
1562	/*
1563	 * Clear TS_BUSY if low-level output is complete.
1564	 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1565	 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1566	 * called again.  Reading the line status port outside of siointr1()
1567	 * is safe because CS_BUSY is clear so there are no output interrupts
1568	 * to lose.
1569	 */
1570	s = spltty();
1571	if (com->state & CS_BUSY)
1572		com->extra_state &= ~CSE_BUSYCHECK;	/* False alarm. */
1573	else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1574	    == (LSR_TSRE | LSR_TXRDY)) {
1575		com->tp->t_state &= ~TS_BUSY;
1576		ttwwakeup(com->tp);
1577		com->extra_state &= ~CSE_BUSYCHECK;
1578	} else
1579		timeout(siobusycheck, com, hz / 100);
1580	splx(s);
1581}
1582
1583static u_int
1584siodivisor(rclk, speed)
1585	u_long	rclk;
1586	speed_t	speed;
1587{
1588	long	actual_speed;
1589	u_int	divisor;
1590	int	error;
1591
1592	if (speed == 0)
1593		return (0);
1594#if UINT_MAX > (ULONG_MAX - 1) / 8
1595	if (speed > (ULONG_MAX - 1) / 8)
1596		return (0);
1597#endif
1598	divisor = (rclk / (8UL * speed) + 1) / 2;
1599	if (divisor == 0 || divisor >= 65536)
1600		return (0);
1601	actual_speed = rclk / (16UL * divisor);
1602
1603	/* 10 times error in percent: */
1604	error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2;
1605
1606	/* 3.0% maximum error tolerance: */
1607	if (error < -30 || error > 30)
1608		return (0);
1609
1610	return (divisor);
1611}
1612
1613static void
1614siodtrwakeup(chan)
1615	void	*chan;
1616{
1617	struct com_s	*com;
1618
1619	com = (struct com_s *)chan;
1620	com->state &= ~CS_DTR_OFF;
1621	wakeup(&com->dtr_wait);
1622}
1623
1624/*
1625 * Call this function with the sio_lock mutex held.  It will return with the
1626 * lock still held.
1627 */
1628static void
1629sioinput(com)
1630	struct com_s	*com;
1631{
1632	u_char		*buf;
1633	int		incc;
1634	u_char		line_status;
1635	int		recv_data;
1636	struct tty	*tp;
1637
1638	buf = com->ibuf;
1639	tp = com->tp;
1640	if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1641		com_events -= (com->iptr - com->ibuf);
1642		com->iptr = com->ibuf;
1643		return;
1644	}
1645	if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1646		/*
1647		 * Avoid the grotesquely inefficient lineswitch routine
1648		 * (ttyinput) in "raw" mode.  It usually takes about 450
1649		 * instructions (that's without canonical processing or echo!).
1650		 * slinput is reasonably fast (usually 40 instructions plus
1651		 * call overhead).
1652		 */
1653		do {
1654			/*
1655			 * This may look odd, but it is using save-and-enable
1656			 * semantics instead of the save-and-disable semantics
1657			 * that are used everywhere else.
1658			 */
1659			mtx_unlock_spin(&sio_lock);
1660			incc = com->iptr - buf;
1661			if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1662			    && (com->state & CS_RTS_IFLOW
1663				|| tp->t_iflag & IXOFF)
1664			    && !(tp->t_state & TS_TBLOCK))
1665				ttyblock(tp);
1666			com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1667				+= b_to_q((char *)buf, incc, &tp->t_rawq);
1668			buf += incc;
1669			tk_nin += incc;
1670			tk_rawcc += incc;
1671			tp->t_rawcc += incc;
1672			ttwakeup(tp);
1673			if (tp->t_state & TS_TTSTOP
1674			    && (tp->t_iflag & IXANY
1675				|| tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1676				tp->t_state &= ~TS_TTSTOP;
1677				tp->t_lflag &= ~FLUSHO;
1678				comstart(tp);
1679			}
1680			mtx_lock_spin(&sio_lock);
1681		} while (buf < com->iptr);
1682	} else {
1683		do {
1684			/*
1685			 * This may look odd, but it is using save-and-enable
1686			 * semantics instead of the save-and-disable semantics
1687			 * that are used everywhere else.
1688			 */
1689			mtx_unlock_spin(&sio_lock);
1690			line_status = buf[com->ierroff];
1691			recv_data = *buf++;
1692			if (line_status
1693			    & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1694				if (line_status & LSR_BI)
1695					recv_data |= TTY_BI;
1696				if (line_status & LSR_FE)
1697					recv_data |= TTY_FE;
1698				if (line_status & LSR_OE)
1699					recv_data |= TTY_OE;
1700				if (line_status & LSR_PE)
1701					recv_data |= TTY_PE;
1702			}
1703			ttyld_rint(tp, recv_data);
1704			mtx_lock_spin(&sio_lock);
1705		} while (buf < com->iptr);
1706	}
1707	com_events -= (com->iptr - com->ibuf);
1708	com->iptr = com->ibuf;
1709
1710	/*
1711	 * There is now room for another low-level buffer full of input,
1712	 * so enable RTS if it is now disabled and there is room in the
1713	 * high-level buffer.
1714	 */
1715	if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1716	    !(tp->t_state & TS_TBLOCK))
1717		outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1718}
1719
1720static void
1721siointr(arg)
1722	void		*arg;
1723{
1724	struct com_s	*com;
1725
1726#ifndef COM_MULTIPORT
1727	com = (struct com_s *)arg;
1728
1729	mtx_lock_spin(&sio_lock);
1730	siointr1(com);
1731	mtx_unlock_spin(&sio_lock);
1732#else /* COM_MULTIPORT */
1733	bool_t		possibly_more_intrs;
1734	int		unit;
1735
1736	/*
1737	 * Loop until there is no activity on any port.  This is necessary
1738	 * to get an interrupt edge more than to avoid another interrupt.
1739	 * If the IRQ signal is just an OR of the IRQ signals from several
1740	 * devices, then the edge from one may be lost because another is
1741	 * on.
1742	 */
1743	mtx_lock_spin(&sio_lock);
1744	do {
1745		possibly_more_intrs = FALSE;
1746		for (unit = 0; unit < sio_numunits; ++unit) {
1747			com = com_addr(unit);
1748			/*
1749			 * XXX COM_LOCK();
1750			 * would it work here, or be counter-productive?
1751			 */
1752			if (com != NULL
1753			    && !com->gone
1754			    && (inb(com->int_id_port) & IIR_IMASK)
1755			       != IIR_NOPEND) {
1756				siointr1(com);
1757				possibly_more_intrs = TRUE;
1758			}
1759			/* XXX COM_UNLOCK(); */
1760		}
1761	} while (possibly_more_intrs);
1762	mtx_unlock_spin(&sio_lock);
1763#endif /* COM_MULTIPORT */
1764}
1765
1766static struct timespec siots[8];
1767static int siotso;
1768static int volatile siotsunit = -1;
1769
1770static int
1771sysctl_siots(SYSCTL_HANDLER_ARGS)
1772{
1773	char buf[128];
1774	long long delta;
1775	size_t len;
1776	int error, i, tso;
1777
1778	for (i = 1, tso = siotso; i < tso; i++) {
1779		delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) *
1780		    1000000000 +
1781		    (siots[i].tv_nsec - siots[i - 1].tv_nsec);
1782		len = sprintf(buf, "%lld\n", delta);
1783		if (delta >= 110000)
1784			len += sprintf(buf + len - 1, ": *** %ld.%09ld\n",
1785			    (long)siots[i].tv_sec, siots[i].tv_nsec) - 1;
1786		if (i == tso - 1)
1787			buf[len - 1] = '\0';
1788		error = SYSCTL_OUT(req, buf, len);
1789		if (error != 0)
1790			return (error);
1791		uio_yield();
1792	}
1793	return (0);
1794}
1795
1796SYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD,
1797    0, 0, sysctl_siots, "A", "sio timestamps");
1798
1799static void
1800siointr1(com)
1801	struct com_s	*com;
1802{
1803	u_char	int_ctl;
1804	u_char	int_ctl_new;
1805	u_char	line_status;
1806	u_char	modem_status;
1807	u_char	*ioptr;
1808	u_char	recv_data;
1809
1810	if (COM_IIR_TXRDYBUG(com->flags)) {
1811		int_ctl = inb(com->int_ctl_port);
1812		int_ctl_new = int_ctl;
1813	} else {
1814		int_ctl = 0;
1815		int_ctl_new = 0;
1816	}
1817
1818	while (!com->gone) {
1819		if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1820			modem_status = inb(com->modem_status_port);
1821		        if ((modem_status ^ com->last_modem_status) &
1822			    com->pps_bit) {
1823				pps_capture(&com->pps);
1824				pps_event(&com->pps,
1825				    (modem_status & com->pps_bit) ?
1826				    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1827			}
1828		}
1829		line_status = inb(com->line_status_port);
1830
1831		/* input event? (check first to help avoid overruns) */
1832		while (line_status & LSR_RCV_MASK) {
1833			/* break/unnattached error bits or real input? */
1834			if (!(line_status & LSR_RXRDY))
1835				recv_data = 0;
1836			else
1837				recv_data = inb(com->data_port);
1838#ifdef KDB
1839#ifdef ALT_BREAK_TO_DEBUGGER
1840			if (com->unit == comconsole &&
1841			    kdb_alt_break(recv_data, &com->alt_brk_state) != 0)
1842				kdb_enter("Break sequence on console");
1843#endif /* ALT_BREAK_TO_DEBUGGER */
1844#endif /* KDB */
1845			if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1846				/*
1847				 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1848				 * Otherwise, push the work to a higher level
1849				 * (to handle PARMRK) if we're bypassing.
1850				 * Otherwise, convert BI/FE and PE+INPCK to 0.
1851				 *
1852				 * This makes bypassing work right in the
1853				 * usual "raw" case (IGNBRK set, and IGNPAR
1854				 * and INPCK clear).
1855				 *
1856				 * Note: BI together with FE/PE means just BI.
1857				 */
1858				if (line_status & LSR_BI) {
1859#if defined(KDB) && defined(BREAK_TO_DEBUGGER)
1860					if (com->unit == comconsole) {
1861						kdb_enter("Line break on console");
1862						goto cont;
1863					}
1864#endif
1865					if (com->tp == NULL
1866					    || com->tp->t_iflag & IGNBRK)
1867						goto cont;
1868				} else {
1869					if (com->tp == NULL
1870					    || com->tp->t_iflag & IGNPAR)
1871						goto cont;
1872				}
1873				if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1874				    && (line_status & (LSR_BI | LSR_FE)
1875					|| com->tp->t_iflag & INPCK))
1876					recv_data = 0;
1877			}
1878			++com->bytes_in;
1879			if (com->tp != NULL &&
1880			    com->tp->t_hotchar != 0 && recv_data == com->tp->t_hotchar)
1881				swi_sched(sio_fast_ih, 0);
1882			ioptr = com->iptr;
1883			if (ioptr >= com->ibufend)
1884				CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1885			else {
1886				if (com->do_timestamp)
1887					microtime(&com->timestamp);
1888				++com_events;
1889				swi_sched(sio_slow_ih, SWI_DELAY);
1890#if 0 /* for testing input latency vs efficiency */
1891if (com->iptr - com->ibuf == 8)
1892	swi_sched(sio_fast_ih, 0);
1893#endif
1894				ioptr[0] = recv_data;
1895				ioptr[com->ierroff] = line_status;
1896				com->iptr = ++ioptr;
1897				if (ioptr == com->ihighwater
1898				    && com->state & CS_RTS_IFLOW)
1899					outb(com->modem_ctl_port,
1900					     com->mcr_image &= ~MCR_RTS);
1901				if (line_status & LSR_OE)
1902					CE_RECORD(com, CE_OVERRUN);
1903			}
1904cont:
1905			if (line_status & LSR_TXRDY
1906			    && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY))
1907				goto txrdy;
1908
1909			/*
1910			 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1911			 * jump from the top of the loop to here
1912			 */
1913			line_status = inb(com->line_status_port) & 0x7F;
1914		}
1915
1916		/* modem status change? (always check before doing output) */
1917		modem_status = inb(com->modem_status_port);
1918		if (modem_status != com->last_modem_status) {
1919			/*
1920			 * Schedule high level to handle DCD changes.  Note
1921			 * that we don't use the delta bits anywhere.  Some
1922			 * UARTs mess them up, and it's easy to remember the
1923			 * previous bits and calculate the delta.
1924			 */
1925			com->last_modem_status = modem_status;
1926			if (!(com->state & CS_CHECKMSR)) {
1927				com_events += LOTS_OF_EVENTS;
1928				com->state |= CS_CHECKMSR;
1929				swi_sched(sio_fast_ih, 0);
1930			}
1931
1932			/* handle CTS change immediately for crisp flow ctl */
1933			if (com->state & CS_CTS_OFLOW) {
1934				if (modem_status & MSR_CTS)
1935					com->state |= CS_ODEVREADY;
1936				else
1937					com->state &= ~CS_ODEVREADY;
1938			}
1939		}
1940
1941txrdy:
1942		/* output queued and everything ready? */
1943		if (line_status & LSR_TXRDY
1944		    && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1945			ioptr = com->obufq.l_head;
1946			if (com->tx_fifo_size > 1 && com->unit != siotsunit) {
1947				u_int	ocount;
1948
1949				ocount = com->obufq.l_tail - ioptr;
1950				if (ocount > com->tx_fifo_size)
1951					ocount = com->tx_fifo_size;
1952				com->bytes_out += ocount;
1953				do
1954					outb(com->data_port, *ioptr++);
1955				while (--ocount != 0);
1956			} else {
1957				outb(com->data_port, *ioptr++);
1958				++com->bytes_out;
1959				if (com->unit == siotsunit
1960				    && siotso < sizeof siots / sizeof siots[0])
1961					nanouptime(&siots[siotso++]);
1962			}
1963			com->obufq.l_head = ioptr;
1964			if (COM_IIR_TXRDYBUG(com->flags))
1965				int_ctl_new = int_ctl | IER_ETXRDY;
1966			if (ioptr >= com->obufq.l_tail) {
1967				struct lbq	*qp;
1968
1969				qp = com->obufq.l_next;
1970				qp->l_queued = FALSE;
1971				qp = qp->l_next;
1972				if (qp != NULL) {
1973					com->obufq.l_head = qp->l_head;
1974					com->obufq.l_tail = qp->l_tail;
1975					com->obufq.l_next = qp;
1976				} else {
1977					/* output just completed */
1978					if (COM_IIR_TXRDYBUG(com->flags))
1979						int_ctl_new = int_ctl
1980							      & ~IER_ETXRDY;
1981					com->state &= ~CS_BUSY;
1982				}
1983				if (!(com->state & CS_ODONE)) {
1984					com_events += LOTS_OF_EVENTS;
1985					com->state |= CS_ODONE;
1986					/* handle at high level ASAP */
1987					swi_sched(sio_fast_ih, 0);
1988				}
1989			}
1990			if (COM_IIR_TXRDYBUG(com->flags)
1991			    && int_ctl != int_ctl_new)
1992				outb(com->int_ctl_port, int_ctl_new);
1993		}
1994
1995		/* finished? */
1996#ifndef COM_MULTIPORT
1997		if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
1998#endif /* COM_MULTIPORT */
1999			return;
2000	}
2001}
2002
2003static int
2004siocioctl(dev, cmd, data, flag, td)
2005	struct cdev *dev;
2006	u_long		cmd;
2007	caddr_t		data;
2008	int		flag;
2009	struct thread	*td;
2010{
2011	struct com_s	*com;
2012	int		error;
2013	int		mynor;
2014	struct termios	*ct;
2015
2016	mynor = minor(dev);
2017	com = com_addr(MINOR_TO_UNIT(mynor));
2018	if (com == NULL || com->gone)
2019		return (ENODEV);
2020
2021	switch (mynor & CONTROL_MASK) {
2022	case CONTROL_INIT_STATE:
2023		ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
2024		break;
2025	case CONTROL_LOCK_STATE:
2026		ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
2027		break;
2028	default:
2029		return (ENODEV);	/* /dev/nodev */
2030	}
2031	switch (cmd) {
2032	case TIOCSETA:
2033		error = suser(td);
2034		if (error != 0)
2035			return (error);
2036		*ct = *(struct termios *)data;
2037		return (0);
2038	case TIOCGETA:
2039		*(struct termios *)data = *ct;
2040		return (0);
2041	case TIOCGETD:
2042		*(int *)data = TTYDISC;
2043		return (0);
2044	case TIOCGWINSZ:
2045		bzero(data, sizeof(struct winsize));
2046		return (0);
2047	default:
2048		return (ENOTTY);
2049	}
2050}
2051
2052static int
2053sioioctl(dev, cmd, data, flag, td)
2054	struct cdev *dev;
2055	u_long		cmd;
2056	caddr_t		data;
2057	int		flag;
2058	struct thread	*td;
2059{
2060	struct com_s	*com;
2061	int		error;
2062	int		mynor;
2063	int		s;
2064	struct tty	*tp;
2065#ifndef BURN_BRIDGES
2066#if defined(COMPAT_43)
2067	u_long		oldcmd;
2068	struct termios	term;
2069#endif
2070#endif
2071
2072	mynor = minor(dev);
2073	com = dev->si_drv1;
2074	if (com == NULL || com->gone)
2075		return (ENODEV);
2076	tp = com->tp;
2077#ifndef BURN_BRIDGES
2078#if defined(COMPAT_43)
2079	term = tp->t_termios;
2080	oldcmd = cmd;
2081	error = ttsetcompat(tp, &cmd, data, &term);
2082	if (error != 0)
2083		return (error);
2084	if (cmd != oldcmd)
2085		data = (caddr_t)&term;
2086#endif
2087#endif
2088	if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
2089		int	cc;
2090		struct termios *dt = (struct termios *)data;
2091		struct termios *lt = mynor & CALLOUT_MASK
2092				     ? &com->lt_out : &com->lt_in;
2093
2094		dt->c_iflag = (tp->t_iflag & lt->c_iflag)
2095			      | (dt->c_iflag & ~lt->c_iflag);
2096		dt->c_oflag = (tp->t_oflag & lt->c_oflag)
2097			      | (dt->c_oflag & ~lt->c_oflag);
2098		dt->c_cflag = (tp->t_cflag & lt->c_cflag)
2099			      | (dt->c_cflag & ~lt->c_cflag);
2100		dt->c_lflag = (tp->t_lflag & lt->c_lflag)
2101			      | (dt->c_lflag & ~lt->c_lflag);
2102		for (cc = 0; cc < NCCS; ++cc)
2103			if (lt->c_cc[cc] != 0)
2104				dt->c_cc[cc] = tp->t_cc[cc];
2105		if (lt->c_ispeed != 0)
2106			dt->c_ispeed = tp->t_ispeed;
2107		if (lt->c_ospeed != 0)
2108			dt->c_ospeed = tp->t_ospeed;
2109	}
2110	error = ttyioctl(dev, cmd, data, flag, td);
2111	ttyldoptim(tp);
2112	if (error != ENOTTY)
2113		return (error);
2114	s = spltty();
2115	switch (cmd) {
2116	case TIOCMSDTRWAIT:
2117		/* must be root since the wait applies to following logins */
2118		error = suser(td);
2119		if (error != 0) {
2120			splx(s);
2121			return (error);
2122		}
2123		com->dtr_wait = *(int *)data * hz / 100;
2124		break;
2125	case TIOCMGDTRWAIT:
2126		*(int *)data = com->dtr_wait * 100 / hz;
2127		break;
2128	case TIOCTIMESTAMP:
2129		com->do_timestamp = TRUE;
2130		*(struct timeval *)data = com->timestamp;
2131		break;
2132	default:
2133		splx(s);
2134		error = pps_ioctl(cmd, data, &com->pps);
2135		if (error == ENODEV)
2136			error = ENOTTY;
2137		return (error);
2138	}
2139	splx(s);
2140	return (0);
2141}
2142
2143/* software interrupt handler for SWI_TTY */
2144static void
2145siopoll(void *dummy)
2146{
2147	int		unit;
2148
2149	if (com_events == 0)
2150		return;
2151repeat:
2152	for (unit = 0; unit < sio_numunits; ++unit) {
2153		struct com_s	*com;
2154		int		incc;
2155		struct tty	*tp;
2156
2157		com = com_addr(unit);
2158		if (com == NULL)
2159			continue;
2160		tp = com->tp;
2161		if (tp == NULL || com->gone) {
2162			/*
2163			 * Discard any events related to never-opened or
2164			 * going-away devices.
2165			 */
2166			mtx_lock_spin(&sio_lock);
2167			incc = com->iptr - com->ibuf;
2168			com->iptr = com->ibuf;
2169			if (com->state & CS_CHECKMSR) {
2170				incc += LOTS_OF_EVENTS;
2171				com->state &= ~CS_CHECKMSR;
2172			}
2173			com_events -= incc;
2174			mtx_unlock_spin(&sio_lock);
2175			continue;
2176		}
2177		if (com->iptr != com->ibuf) {
2178			mtx_lock_spin(&sio_lock);
2179			sioinput(com);
2180			mtx_unlock_spin(&sio_lock);
2181		}
2182		if (com->state & CS_CHECKMSR) {
2183			u_char	delta_modem_status;
2184
2185			mtx_lock_spin(&sio_lock);
2186			delta_modem_status = com->last_modem_status
2187					     ^ com->prev_modem_status;
2188			com->prev_modem_status = com->last_modem_status;
2189			com_events -= LOTS_OF_EVENTS;
2190			com->state &= ~CS_CHECKMSR;
2191			mtx_unlock_spin(&sio_lock);
2192			if (delta_modem_status & MSR_DCD)
2193				ttyld_modem(tp,
2194				    com->prev_modem_status & MSR_DCD);
2195		}
2196		if (com->state & CS_ODONE) {
2197			mtx_lock_spin(&sio_lock);
2198			com_events -= LOTS_OF_EVENTS;
2199			com->state &= ~CS_ODONE;
2200			mtx_unlock_spin(&sio_lock);
2201			if (!(com->state & CS_BUSY)
2202			    && !(com->extra_state & CSE_BUSYCHECK)) {
2203				timeout(siobusycheck, com, hz / 100);
2204				com->extra_state |= CSE_BUSYCHECK;
2205			}
2206			ttyld_start(tp);
2207		}
2208		if (com_events == 0)
2209			break;
2210	}
2211	if (com_events >= LOTS_OF_EVENTS)
2212		goto repeat;
2213}
2214
2215static void
2216combreak(tp, sig)
2217	struct tty 	*tp;
2218	int		sig;
2219{
2220	struct com_s	*com;
2221
2222	com = tp->t_dev->si_drv1;
2223
2224	if (sig)
2225		sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
2226	else
2227		sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
2228}
2229
2230static int
2231comparam(tp, t)
2232	struct tty	*tp;
2233	struct termios	*t;
2234{
2235	u_int		cfcr;
2236	int		cflag;
2237	struct com_s	*com;
2238	u_int		divisor;
2239	u_char		dlbh;
2240	u_char		dlbl;
2241	u_char		efr_flowbits;
2242	int		s;
2243	int		unit;
2244
2245	unit = DEV_TO_UNIT(tp->t_dev);
2246	com = com_addr(unit);
2247	if (com == NULL)
2248		return (ENODEV);
2249
2250	/* check requested parameters */
2251	if (t->c_ispeed != (t->c_ospeed != 0 ? t->c_ospeed : tp->t_ospeed))
2252		return (EINVAL);
2253	divisor = siodivisor(com->rclk, t->c_ispeed);
2254	if (divisor == 0)
2255		return (EINVAL);
2256
2257	/* parameters are OK, convert them to the com struct and the device */
2258	s = spltty();
2259	if (t->c_ospeed == 0)
2260		(void)commodem(tp, 0, SER_DTR);	/* hang up line */
2261	else
2262		(void)commodem(tp, SER_DTR, 0);
2263	cflag = t->c_cflag;
2264	switch (cflag & CSIZE) {
2265	case CS5:
2266		cfcr = CFCR_5BITS;
2267		break;
2268	case CS6:
2269		cfcr = CFCR_6BITS;
2270		break;
2271	case CS7:
2272		cfcr = CFCR_7BITS;
2273		break;
2274	default:
2275		cfcr = CFCR_8BITS;
2276		break;
2277	}
2278	if (cflag & PARENB) {
2279		cfcr |= CFCR_PENAB;
2280		if (!(cflag & PARODD))
2281			cfcr |= CFCR_PEVEN;
2282	}
2283	if (cflag & CSTOPB)
2284		cfcr |= CFCR_STOPB;
2285
2286	if (com->hasfifo) {
2287		/*
2288		 * Use a fifo trigger level low enough so that the input
2289		 * latency from the fifo is less than about 16 msec and
2290		 * the total latency is less than about 30 msec.  These
2291		 * latencies are reasonable for humans.  Serial comms
2292		 * protocols shouldn't expect anything better since modem
2293		 * latencies are larger.
2294		 *
2295		 * The fifo trigger level cannot be set at RX_HIGH for high
2296		 * speed connections without further work on reducing
2297		 * interrupt disablement times in other parts of the system,
2298		 * without producing silo overflow errors.
2299		 */
2300		com->fifo_image = com->unit == siotsunit ? 0
2301				  : t->c_ispeed <= 4800
2302				  ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH;
2303#ifdef COM_ESP
2304		/*
2305		 * The Hayes ESP card needs the fifo DMA mode bit set
2306		 * in compatibility mode.  If not, it will interrupt
2307		 * for each character received.
2308		 */
2309		if (com->esp)
2310			com->fifo_image |= FIFO_DMA_MODE;
2311#endif
2312		sio_setreg(com, com_fifo, com->fifo_image);
2313	}
2314
2315	/*
2316	 * This returns with interrupts disabled so that we can complete
2317	 * the speed change atomically.  Keeping interrupts disabled is
2318	 * especially important while com_data is hidden.
2319	 */
2320	(void) siosetwater(com, t->c_ispeed);
2321
2322	sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
2323	/*
2324	 * Only set the divisor registers if they would change, since on
2325	 * some 16550 incompatibles (UMC8669F), setting them while input
2326	 * is arriving loses sync until data stops arriving.
2327	 */
2328	dlbl = divisor & 0xFF;
2329	if (sio_getreg(com, com_dlbl) != dlbl)
2330		sio_setreg(com, com_dlbl, dlbl);
2331	dlbh = divisor >> 8;
2332	if (sio_getreg(com, com_dlbh) != dlbh)
2333		sio_setreg(com, com_dlbh, dlbh);
2334
2335	efr_flowbits = 0;
2336
2337	if (cflag & CRTS_IFLOW) {
2338		com->state |= CS_RTS_IFLOW;
2339		efr_flowbits |= EFR_AUTORTS;
2340		/*
2341		 * If CS_RTS_IFLOW just changed from off to on, the change
2342		 * needs to be propagated to MCR_RTS.  This isn't urgent,
2343		 * so do it later by calling comstart() instead of repeating
2344		 * a lot of code from comstart() here.
2345		 */
2346	} else if (com->state & CS_RTS_IFLOW) {
2347		com->state &= ~CS_RTS_IFLOW;
2348		/*
2349		 * CS_RTS_IFLOW just changed from on to off.  Force MCR_RTS
2350		 * on here, since comstart() won't do it later.
2351		 */
2352		outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2353	}
2354
2355	/*
2356	 * Set up state to handle output flow control.
2357	 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2358	 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2359	 */
2360	com->state |= CS_ODEVREADY;
2361	com->state &= ~CS_CTS_OFLOW;
2362	if (cflag & CCTS_OFLOW) {
2363		com->state |= CS_CTS_OFLOW;
2364		efr_flowbits |= EFR_AUTOCTS;
2365		if (!(com->last_modem_status & MSR_CTS))
2366			com->state &= ~CS_ODEVREADY;
2367	}
2368
2369	if (com->st16650a) {
2370		sio_setreg(com, com_lcr, LCR_EFR_ENABLE);
2371		sio_setreg(com, com_efr,
2372			   (sio_getreg(com, com_efr)
2373			    & ~(EFR_AUTOCTS | EFR_AUTORTS)) | efr_flowbits);
2374	}
2375	sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
2376
2377	/* XXX shouldn't call functions while intrs are disabled. */
2378	ttyldoptim(tp);
2379
2380	mtx_unlock_spin(&sio_lock);
2381	splx(s);
2382	comstart(tp);
2383	if (com->ibufold != NULL) {
2384		free(com->ibufold, M_DEVBUF);
2385		com->ibufold = NULL;
2386	}
2387	return (0);
2388}
2389
2390/*
2391 * This function must be called with the sio_lock mutex released and will
2392 * return with it obtained.
2393 */
2394static int
2395siosetwater(com, speed)
2396	struct com_s	*com;
2397	speed_t		speed;
2398{
2399	int		cp4ticks;
2400	u_char		*ibuf;
2401	int		ibufsize;
2402	struct tty	*tp;
2403
2404	/*
2405	 * Make the buffer size large enough to handle a softtty interrupt
2406	 * latency of about 2 ticks without loss of throughput or data
2407	 * (about 3 ticks if input flow control is not used or not honoured,
2408	 * but a bit less for CS5-CS7 modes).
2409	 */
2410	cp4ticks = speed / 10 / hz * 4;
2411	for (ibufsize = 128; ibufsize < cp4ticks;)
2412		ibufsize <<= 1;
2413	if (ibufsize == com->ibufsize) {
2414		mtx_lock_spin(&sio_lock);
2415		return (0);
2416	}
2417
2418	/*
2419	 * Allocate input buffer.  The extra factor of 2 in the size is
2420	 * to allow for an error byte for each input byte.
2421	 */
2422	ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
2423	if (ibuf == NULL) {
2424		mtx_lock_spin(&sio_lock);
2425		return (ENOMEM);
2426	}
2427
2428	/* Initialize non-critical variables. */
2429	com->ibufold = com->ibuf;
2430	com->ibufsize = ibufsize;
2431	tp = com->tp;
2432	if (tp != NULL) {
2433		tp->t_ififosize = 2 * ibufsize;
2434		tp->t_ispeedwat = (speed_t)-1;
2435		tp->t_ospeedwat = (speed_t)-1;
2436	}
2437
2438	/*
2439	 * Read current input buffer, if any.  Continue with interrupts
2440	 * disabled.
2441	 */
2442	mtx_lock_spin(&sio_lock);
2443	if (com->iptr != com->ibuf)
2444		sioinput(com);
2445
2446	/*-
2447	 * Initialize critical variables, including input buffer watermarks.
2448	 * The external device is asked to stop sending when the buffer
2449	 * exactly reaches high water, or when the high level requests it.
2450	 * The high level is notified immediately (rather than at a later
2451	 * clock tick) when this watermark is reached.
2452	 * The buffer size is chosen so the watermark should almost never
2453	 * be reached.
2454	 * The low watermark is invisibly 0 since the buffer is always
2455	 * emptied all at once.
2456	 */
2457	com->iptr = com->ibuf = ibuf;
2458	com->ibufend = ibuf + ibufsize;
2459	com->ierroff = ibufsize;
2460	com->ihighwater = ibuf + 3 * ibufsize / 4;
2461	return (0);
2462}
2463
2464static void
2465comstart(tp)
2466	struct tty	*tp;
2467{
2468	struct com_s	*com;
2469	int		s;
2470	int		unit;
2471
2472	unit = DEV_TO_UNIT(tp->t_dev);
2473	com = com_addr(unit);
2474	if (com == NULL)
2475		return;
2476	s = spltty();
2477	mtx_lock_spin(&sio_lock);
2478	if (tp->t_state & TS_TTSTOP)
2479		com->state &= ~CS_TTGO;
2480	else
2481		com->state |= CS_TTGO;
2482	if (tp->t_state & TS_TBLOCK) {
2483		if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2484			outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2485	} else {
2486		if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2487		    && com->state & CS_RTS_IFLOW)
2488			outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2489	}
2490	mtx_unlock_spin(&sio_lock);
2491	if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2492		ttwwakeup(tp);
2493		splx(s);
2494		return;
2495	}
2496	if (tp->t_outq.c_cc != 0) {
2497		struct lbq	*qp;
2498		struct lbq	*next;
2499
2500		if (!com->obufs[0].l_queued) {
2501			com->obufs[0].l_tail
2502			    = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2503						  sizeof com->obuf1);
2504			com->obufs[0].l_next = NULL;
2505			com->obufs[0].l_queued = TRUE;
2506			mtx_lock_spin(&sio_lock);
2507			if (com->state & CS_BUSY) {
2508				qp = com->obufq.l_next;
2509				while ((next = qp->l_next) != NULL)
2510					qp = next;
2511				qp->l_next = &com->obufs[0];
2512			} else {
2513				com->obufq.l_head = com->obufs[0].l_head;
2514				com->obufq.l_tail = com->obufs[0].l_tail;
2515				com->obufq.l_next = &com->obufs[0];
2516				com->state |= CS_BUSY;
2517			}
2518			mtx_unlock_spin(&sio_lock);
2519		}
2520		if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2521			com->obufs[1].l_tail
2522			    = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2523						  sizeof com->obuf2);
2524			com->obufs[1].l_next = NULL;
2525			com->obufs[1].l_queued = TRUE;
2526			mtx_lock_spin(&sio_lock);
2527			if (com->state & CS_BUSY) {
2528				qp = com->obufq.l_next;
2529				while ((next = qp->l_next) != NULL)
2530					qp = next;
2531				qp->l_next = &com->obufs[1];
2532			} else {
2533				com->obufq.l_head = com->obufs[1].l_head;
2534				com->obufq.l_tail = com->obufs[1].l_tail;
2535				com->obufq.l_next = &com->obufs[1];
2536				com->state |= CS_BUSY;
2537			}
2538			mtx_unlock_spin(&sio_lock);
2539		}
2540		tp->t_state |= TS_BUSY;
2541	}
2542	mtx_lock_spin(&sio_lock);
2543	if (com->state >= (CS_BUSY | CS_TTGO))
2544		siointr1(com);	/* fake interrupt to start output */
2545	mtx_unlock_spin(&sio_lock);
2546	ttwwakeup(tp);
2547	splx(s);
2548}
2549
2550static void
2551comstop(tp, rw)
2552	struct tty	*tp;
2553	int		rw;
2554{
2555	struct com_s	*com;
2556
2557	com = com_addr(DEV_TO_UNIT(tp->t_dev));
2558	if (com == NULL || com->gone)
2559		return;
2560	mtx_lock_spin(&sio_lock);
2561	if (rw & FWRITE) {
2562		if (com->hasfifo)
2563#ifdef COM_ESP
2564		    /* XXX avoid h/w bug. */
2565		    if (!com->esp)
2566#endif
2567			sio_setreg(com, com_fifo,
2568				   FIFO_XMT_RST | com->fifo_image);
2569		com->obufs[0].l_queued = FALSE;
2570		com->obufs[1].l_queued = FALSE;
2571		if (com->state & CS_ODONE)
2572			com_events -= LOTS_OF_EVENTS;
2573		com->state &= ~(CS_ODONE | CS_BUSY);
2574		com->tp->t_state &= ~TS_BUSY;
2575	}
2576	if (rw & FREAD) {
2577		if (com->hasfifo)
2578#ifdef COM_ESP
2579		    /* XXX avoid h/w bug. */
2580		    if (!com->esp)
2581#endif
2582			sio_setreg(com, com_fifo,
2583				   FIFO_RCV_RST | com->fifo_image);
2584		com_events -= (com->iptr - com->ibuf);
2585		com->iptr = com->ibuf;
2586	}
2587	mtx_unlock_spin(&sio_lock);
2588	comstart(tp);
2589}
2590
2591static int
2592commodem(tp, sigon, sigoff)
2593	struct tty 	*tp;
2594	int		sigon, sigoff;
2595{
2596	struct com_s	*com;
2597	int	bitand, bitor, msr;
2598
2599	com = tp->t_dev->si_drv1;
2600	if (com->gone)
2601		return(0);
2602	if (sigon != 0 || sigoff != 0) {
2603		bitand = bitor = 0;
2604		if (sigoff & SER_DTR)
2605			bitand |= MCR_DTR;
2606		if (sigoff & SER_RTS)
2607			bitand |= MCR_RTS;
2608		if (sigon & SER_DTR)
2609			bitor |= MCR_DTR;
2610		if (sigon & SER_RTS)
2611			bitor |= MCR_RTS;
2612		bitand = ~bitand;
2613		mtx_lock_spin(&sio_lock);
2614		com->mcr_image &= bitand;
2615		com->mcr_image |= bitor;
2616		outb(com->modem_ctl_port, com->mcr_image);
2617		mtx_unlock_spin(&sio_lock);
2618		return (0);
2619	} else {
2620		bitor = 0;
2621		if (com->mcr_image & MCR_DTR)
2622			bitor |= SER_DTR;
2623		if (com->mcr_image & MCR_RTS)
2624			bitor |= SER_RTS;
2625		msr = com->prev_modem_status;
2626		if (msr & MSR_CTS)
2627			bitor |= SER_CTS;
2628		if (msr & MSR_DCD)
2629			bitor |= SER_DCD;
2630		if (msr & MSR_DSR)
2631			bitor |= SER_DSR;
2632		if (msr & MSR_DSR)
2633			bitor |= SER_DSR;
2634		if (msr & (MSR_RI | MSR_TERI))
2635			bitor |= SER_RI;
2636		return (bitor);
2637	}
2638}
2639
2640static void
2641siosettimeout()
2642{
2643	struct com_s	*com;
2644	bool_t		someopen;
2645	int		unit;
2646
2647	/*
2648	 * Set our timeout period to 1 second if no polled devices are open.
2649	 * Otherwise set it to max(1/200, 1/hz).
2650	 * Enable timeouts iff some device is open.
2651	 */
2652	untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2653	sio_timeout = hz;
2654	someopen = FALSE;
2655	for (unit = 0; unit < sio_numunits; ++unit) {
2656		com = com_addr(unit);
2657		if (com != NULL && com->tp != NULL
2658		    && com->tp->t_state & TS_ISOPEN && !com->gone) {
2659			someopen = TRUE;
2660			if (com->poll || com->poll_output) {
2661				sio_timeout = hz > 200 ? hz / 200 : 1;
2662				break;
2663			}
2664		}
2665	}
2666	if (someopen) {
2667		sio_timeouts_until_log = hz / sio_timeout;
2668		sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2669					     sio_timeout);
2670	} else {
2671		/* Flush error messages, if any. */
2672		sio_timeouts_until_log = 1;
2673		comwakeup((void *)NULL);
2674		untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2675	}
2676}
2677
2678static void
2679comwakeup(chan)
2680	void	*chan;
2681{
2682	struct com_s	*com;
2683	int		unit;
2684
2685	sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2686
2687	/*
2688	 * Recover from lost output interrupts.
2689	 * Poll any lines that don't use interrupts.
2690	 */
2691	for (unit = 0; unit < sio_numunits; ++unit) {
2692		com = com_addr(unit);
2693		if (com != NULL && !com->gone
2694		    && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2695			mtx_lock_spin(&sio_lock);
2696			siointr1(com);
2697			mtx_unlock_spin(&sio_lock);
2698		}
2699	}
2700
2701	/*
2702	 * Check for and log errors, but not too often.
2703	 */
2704	if (--sio_timeouts_until_log > 0)
2705		return;
2706	sio_timeouts_until_log = hz / sio_timeout;
2707	for (unit = 0; unit < sio_numunits; ++unit) {
2708		int	errnum;
2709
2710		com = com_addr(unit);
2711		if (com == NULL)
2712			continue;
2713		if (com->gone)
2714			continue;
2715		for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2716			u_int	delta;
2717			u_long	total;
2718
2719			mtx_lock_spin(&sio_lock);
2720			delta = com->delta_error_counts[errnum];
2721			com->delta_error_counts[errnum] = 0;
2722			mtx_unlock_spin(&sio_lock);
2723			if (delta == 0)
2724				continue;
2725			total = com->error_counts[errnum] += delta;
2726			log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2727			    unit, delta, error_desc[errnum],
2728			    delta == 1 ? "" : "s", total);
2729		}
2730	}
2731}
2732
2733/*
2734 * Following are all routines needed for SIO to act as console
2735 */
2736struct siocnstate {
2737	u_char	dlbl;
2738	u_char	dlbh;
2739	u_char	ier;
2740	u_char	cfcr;
2741	u_char	mcr;
2742};
2743
2744/*
2745 * This is a function in order to not replicate "ttyd%d" more
2746 * places than absolutely necessary.
2747 */
2748static void
2749siocnset(struct consdev *cd, int unit)
2750{
2751
2752	cd->cn_unit = unit;
2753	sprintf(cd->cn_name, "ttyd%d", unit);
2754}
2755
2756static speed_t siocngetspeed(Port_t, u_long rclk);
2757static void siocnclose(struct siocnstate *sp, Port_t iobase);
2758static void siocnopen(struct siocnstate *sp, Port_t iobase, int speed);
2759static void siocntxwait(Port_t iobase);
2760
2761static cn_probe_t siocnprobe;
2762static cn_init_t siocninit;
2763static cn_term_t siocnterm;
2764static cn_checkc_t siocncheckc;
2765static cn_getc_t siocngetc;
2766static cn_putc_t siocnputc;
2767
2768CONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc,
2769	    siocnputc, NULL);
2770
2771static void
2772siocntxwait(iobase)
2773	Port_t	iobase;
2774{
2775	int	timo;
2776
2777	/*
2778	 * Wait for any pending transmission to finish.  Required to avoid
2779	 * the UART lockup bug when the speed is changed, and for normal
2780	 * transmits.
2781	 */
2782	timo = 100000;
2783	while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2784	       != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2785		;
2786}
2787
2788/*
2789 * Read the serial port specified and try to figure out what speed
2790 * it's currently running at.  We're assuming the serial port has
2791 * been initialized and is basicly idle.  This routine is only intended
2792 * to be run at system startup.
2793 *
2794 * If the value read from the serial port doesn't make sense, return 0.
2795 */
2796
2797static speed_t
2798siocngetspeed(iobase, rclk)
2799	Port_t	iobase;
2800	u_long	rclk;
2801{
2802	u_int	divisor;
2803	u_char	dlbh;
2804	u_char	dlbl;
2805	u_char  cfcr;
2806
2807	cfcr = inb(iobase + com_cfcr);
2808	outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2809
2810	dlbl = inb(iobase + com_dlbl);
2811	dlbh = inb(iobase + com_dlbh);
2812
2813	outb(iobase + com_cfcr, cfcr);
2814
2815	divisor = dlbh << 8 | dlbl;
2816
2817	/* XXX there should be more sanity checking. */
2818	if (divisor == 0)
2819		return (CONSPEED);
2820	return (rclk / (16UL * divisor));
2821}
2822
2823static void
2824siocnopen(sp, iobase, speed)
2825	struct siocnstate	*sp;
2826	Port_t			iobase;
2827	int			speed;
2828{
2829	u_int	divisor;
2830	u_char	dlbh;
2831	u_char	dlbl;
2832
2833	/*
2834	 * Save all the device control registers except the fifo register
2835	 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2836	 * We can't save the fifo register since it is read-only.
2837	 */
2838	sp->ier = inb(iobase + com_ier);
2839	outb(iobase + com_ier, 0);	/* spltty() doesn't stop siointr() */
2840	siocntxwait(iobase);
2841	sp->cfcr = inb(iobase + com_cfcr);
2842	outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2843	sp->dlbl = inb(iobase + com_dlbl);
2844	sp->dlbh = inb(iobase + com_dlbh);
2845	/*
2846	 * Only set the divisor registers if they would change, since on
2847	 * some 16550 incompatibles (Startech), setting them clears the
2848	 * data input register.  This also reduces the effects of the
2849	 * UMC8669F bug.
2850	 */
2851	divisor = siodivisor(comdefaultrclk, speed);
2852	dlbl = divisor & 0xFF;
2853	if (sp->dlbl != dlbl)
2854		outb(iobase + com_dlbl, dlbl);
2855	dlbh = divisor >> 8;
2856	if (sp->dlbh != dlbh)
2857		outb(iobase + com_dlbh, dlbh);
2858	outb(iobase + com_cfcr, CFCR_8BITS);
2859	sp->mcr = inb(iobase + com_mcr);
2860	/*
2861	 * We don't want interrupts, but must be careful not to "disable"
2862	 * them by clearing the MCR_IENABLE bit, since that might cause
2863	 * an interrupt by floating the IRQ line.
2864	 */
2865	outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
2866}
2867
2868static void
2869siocnclose(sp, iobase)
2870	struct siocnstate	*sp;
2871	Port_t			iobase;
2872{
2873	/*
2874	 * Restore the device control registers.
2875	 */
2876	siocntxwait(iobase);
2877	outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2878	if (sp->dlbl != inb(iobase + com_dlbl))
2879		outb(iobase + com_dlbl, sp->dlbl);
2880	if (sp->dlbh != inb(iobase + com_dlbh))
2881		outb(iobase + com_dlbh, sp->dlbh);
2882	outb(iobase + com_cfcr, sp->cfcr);
2883	/*
2884	 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2885	 */
2886	outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
2887	outb(iobase + com_ier, sp->ier);
2888}
2889
2890static void
2891siocnprobe(cp)
2892	struct consdev	*cp;
2893{
2894	speed_t			boot_speed;
2895	u_char			cfcr;
2896	u_int			divisor;
2897	int			s, unit;
2898	struct siocnstate	sp;
2899
2900	/*
2901	 * Find our first enabled console, if any.  If it is a high-level
2902	 * console device, then initialize it and return successfully.
2903	 * If it is a low-level console device, then initialize it and
2904	 * return unsuccessfully.  It must be initialized in both cases
2905	 * for early use by console drivers and debuggers.  Initializing
2906	 * the hardware is not necessary in all cases, since the i/o
2907	 * routines initialize it on the fly, but it is necessary if
2908	 * input might arrive while the hardware is switched back to an
2909	 * uninitialized state.  We can't handle multiple console devices
2910	 * yet because our low-level routines don't take a device arg.
2911	 * We trust the user to set the console flags properly so that we
2912	 * don't need to probe.
2913	 */
2914	cp->cn_pri = CN_DEAD;
2915
2916	for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
2917		int flags;
2918
2919		if (resource_disabled("sio", unit))
2920			continue;
2921		if (resource_int_value("sio", unit, "flags", &flags))
2922			continue;
2923		if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
2924			int port;
2925			Port_t iobase;
2926
2927			if (resource_int_value("sio", unit, "port", &port))
2928				continue;
2929			iobase = port;
2930			s = spltty();
2931			if (boothowto & RB_SERIAL) {
2932				boot_speed =
2933				    siocngetspeed(iobase, comdefaultrclk);
2934				if (boot_speed)
2935					comdefaultrate = boot_speed;
2936			}
2937
2938			/*
2939			 * Initialize the divisor latch.  We can't rely on
2940			 * siocnopen() to do this the first time, since it
2941			 * avoids writing to the latch if the latch appears
2942			 * to have the correct value.  Also, if we didn't
2943			 * just read the speed from the hardware, then we
2944			 * need to set the speed in hardware so that
2945			 * switching it later is null.
2946			 */
2947			cfcr = inb(iobase + com_cfcr);
2948			outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2949			divisor = siodivisor(comdefaultrclk, comdefaultrate);
2950			outb(iobase + com_dlbl, divisor & 0xff);
2951			outb(iobase + com_dlbh, divisor >> 8);
2952			outb(iobase + com_cfcr, cfcr);
2953
2954			siocnopen(&sp, iobase, comdefaultrate);
2955
2956			splx(s);
2957			if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
2958				siocnset(cp, unit);
2959				cp->cn_pri = COM_FORCECONSOLE(flags)
2960					     || boothowto & RB_SERIAL
2961					     ? CN_REMOTE : CN_NORMAL;
2962				siocniobase = iobase;
2963				siocnunit = unit;
2964			}
2965#ifdef GDB
2966			if (COM_DEBUGGER(flags))
2967				siogdbiobase = iobase;
2968#endif
2969		}
2970	}
2971}
2972
2973static void
2974siocninit(cp)
2975	struct consdev	*cp;
2976{
2977	comconsole = cp->cn_unit;
2978}
2979
2980static void
2981siocnterm(cp)
2982	struct consdev	*cp;
2983{
2984	comconsole = -1;
2985}
2986
2987static int
2988siocncheckc(struct consdev *cd)
2989{
2990	int	c;
2991	Port_t	iobase;
2992	int	s;
2993	struct siocnstate	sp;
2994	speed_t	speed;
2995
2996	if (cd != NULL && cd->cn_unit == siocnunit) {
2997		iobase = siocniobase;
2998		speed = comdefaultrate;
2999	} else {
3000#ifdef GDB
3001		iobase = siogdbiobase;
3002		speed = gdbdefaultrate;
3003#else
3004		return (-1);
3005#endif
3006	}
3007	s = spltty();
3008	siocnopen(&sp, iobase, speed);
3009	if (inb(iobase + com_lsr) & LSR_RXRDY)
3010		c = inb(iobase + com_data);
3011	else
3012		c = -1;
3013	siocnclose(&sp, iobase);
3014	splx(s);
3015	return (c);
3016}
3017
3018static int
3019siocngetc(struct consdev *cd)
3020{
3021	int	c;
3022	Port_t	iobase;
3023	int	s;
3024	struct siocnstate	sp;
3025	speed_t	speed;
3026
3027	if (cd != NULL && cd->cn_unit == siocnunit) {
3028		iobase = siocniobase;
3029		speed = comdefaultrate;
3030	} else {
3031#ifdef GDB
3032		iobase = siogdbiobase;
3033		speed = gdbdefaultrate;
3034#else
3035		return (-1);
3036#endif
3037	}
3038	s = spltty();
3039	siocnopen(&sp, iobase, speed);
3040	while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3041		;
3042	c = inb(iobase + com_data);
3043	siocnclose(&sp, iobase);
3044	splx(s);
3045	return (c);
3046}
3047
3048static void
3049siocnputc(struct consdev *cd, int c)
3050{
3051	int	need_unlock;
3052	int	s;
3053	struct siocnstate	sp;
3054	Port_t	iobase;
3055	speed_t	speed;
3056
3057	if (cd != NULL && cd->cn_unit == siocnunit) {
3058		iobase = siocniobase;
3059		speed = comdefaultrate;
3060	} else {
3061#ifdef GDB
3062		iobase = siogdbiobase;
3063		speed = gdbdefaultrate;
3064#else
3065		return;
3066#endif
3067	}
3068	s = spltty();
3069	need_unlock = 0;
3070	if (sio_inited == 2 && !mtx_owned(&sio_lock)) {
3071		mtx_lock_spin(&sio_lock);
3072		need_unlock = 1;
3073	}
3074	siocnopen(&sp, iobase, speed);
3075	siocntxwait(iobase);
3076	outb(iobase + com_data, c);
3077	siocnclose(&sp, iobase);
3078	if (need_unlock)
3079		mtx_unlock_spin(&sio_lock);
3080	splx(s);
3081}
3082
3083/*
3084 * Remote gdb(1) support.
3085 */
3086
3087#if defined(GDB)
3088
3089#include <gdb/gdb.h>
3090
3091static gdb_probe_f siogdbprobe;
3092static gdb_init_f siogdbinit;
3093static gdb_term_f siogdbterm;
3094static gdb_getc_f siogdbgetc;
3095static gdb_checkc_f siogdbcheckc;
3096static gdb_putc_f siogdbputc;
3097
3098GDB_DBGPORT(sio, siogdbprobe, siogdbinit, siogdbterm, siogdbcheckc,
3099    siogdbgetc, siogdbputc);
3100
3101static int
3102siogdbprobe(void)
3103{
3104	return ((siogdbiobase != 0) ? 0 : -1);
3105}
3106
3107static void
3108siogdbinit(void)
3109{
3110}
3111
3112static void
3113siogdbterm(void)
3114{
3115}
3116
3117static void
3118siogdbputc(int c)
3119{
3120	siocnputc(NULL, c);
3121}
3122
3123static int
3124siogdbcheckc(void)
3125{
3126	return (siocncheckc(NULL));
3127}
3128
3129static int
3130siogdbgetc(void)
3131{
3132	return (siocngetc(NULL));
3133}
3134
3135#endif
3136