sio.c revision 130585
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 4. Neither the name of the University nor the names of its contributors
14 *    may be used to endorse or promote products derived from this software
15 *    without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 *	from: @(#)com.c	7.5 (Berkeley) 5/16/91
30 *	from: i386/isa sio.c,v 1.234
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/sio/sio.c 130585 2004-06-16 09:47:26Z phk $");
35
36#include "opt_comconsole.h"
37#include "opt_compat.h"
38#include "opt_ddb.h"
39#include "opt_sio.h"
40
41/*
42 * Serial driver, based on 386BSD-0.1 com driver.
43 * Mostly rewritten to use pseudo-DMA.
44 * Works for National Semiconductor NS8250-NS16550AF UARTs.
45 * COM driver, based on HP dca driver.
46 *
47 * Changes for PC-Card integration:
48 *	- Added PC-Card driver table and handlers
49 */
50#include <sys/param.h>
51#include <sys/systm.h>
52#include <sys/bus.h>
53#include <sys/conf.h>
54#include <sys/fcntl.h>
55#include <sys/interrupt.h>
56#include <sys/kernel.h>
57#include <sys/limits.h>
58#include <sys/lock.h>
59#include <sys/malloc.h>
60#include <sys/module.h>
61#include <sys/mutex.h>
62#include <sys/proc.h>
63#include <sys/reboot.h>
64#include <sys/sysctl.h>
65#include <sys/syslog.h>
66#include <sys/tty.h>
67#include <machine/bus_pio.h>
68#include <machine/bus.h>
69#include <sys/rman.h>
70#include <sys/timepps.h>
71#include <sys/uio.h>
72#include <sys/cons.h>
73#if DDB > 0
74#include <ddb/ddb.h>
75#endif
76
77#include <isa/isavar.h>
78
79#include <machine/resource.h>
80
81#include <dev/sio/sioreg.h>
82#include <dev/sio/siovar.h>
83
84#ifdef COM_ESP
85#include <dev/ic/esp.h>
86#endif
87#include <dev/ic/ns16550.h>
88
89#define	LOTS_OF_EVENTS	64	/* helps separate urgent events from input */
90
91#define	CALLOUT_MASK		0x80
92#define	CONTROL_MASK		0x60
93#define	CONTROL_INIT_STATE	0x20
94#define	CONTROL_LOCK_STATE	0x40
95#define	DEV_TO_UNIT(dev)	(MINOR_TO_UNIT(minor(dev)))
96#define	MINOR_TO_UNIT(mynor)	((((mynor) & ~0xffffU) >> (8 + 3)) \
97				 | ((mynor) & 0x1f))
98#define	UNIT_TO_MINOR(unit)	((((unit) & ~0x1fU) << (8 + 3)) \
99				 | ((unit) & 0x1f))
100
101#ifdef COM_MULTIPORT
102/* checks in flags for multiport and which is multiport "master chip"
103 * for a given card
104 */
105#define	COM_ISMULTIPORT(flags)	((flags) & 0x01)
106#define	COM_MPMASTER(flags)	(((flags) >> 8) & 0x0ff)
107#define	COM_NOTAST4(flags)	((flags) & 0x04)
108#else
109#define	COM_ISMULTIPORT(flags)	(0)
110#endif /* COM_MULTIPORT */
111
112#define	COM_C_IIR_TXRDYBUG	0x80000
113#define	COM_CONSOLE(flags)	((flags) & 0x10)
114#define	COM_DEBUGGER(flags)	((flags) & 0x80)
115#define	COM_FIFOSIZE(flags)	(((flags) & 0xff000000) >> 24)
116#define	COM_FORCECONSOLE(flags)	((flags) & 0x20)
117#define	COM_IIR_TXRDYBUG(flags)	((flags) & COM_C_IIR_TXRDYBUG)
118#define	COM_LLCONSOLE(flags)	((flags) & 0x40)
119#define	COM_LOSESOUTINTS(flags)	((flags) & 0x08)
120#define	COM_NOFIFO(flags)	((flags) & 0x02)
121#define	COM_NOPROBE(flags)	((flags) & 0x40000)
122#define	COM_NOSCR(flags)	((flags) & 0x100000)
123#define	COM_PPSCTS(flags)	((flags) & 0x10000)
124#define	COM_ST16650A(flags)	((flags) & 0x20000)
125#define	COM_TI16754(flags)	((flags) & 0x200000)
126
127#define	sio_getreg(com, off) \
128	(bus_space_read_1((com)->bst, (com)->bsh, (off)))
129#define	sio_setreg(com, off, value) \
130	(bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
131
132/*
133 * com state bits.
134 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
135 * than the other bits so that they can be tested as a group without masking
136 * off the low bits.
137 *
138 * The following com and tty flags correspond closely:
139 *	CS_BUSY		= TS_BUSY (maintained by comstart(), siopoll() and
140 *				   comstop())
141 *	CS_TTGO		= ~TS_TTSTOP (maintained by comparam() and comstart())
142 *	CS_CTS_OFLOW	= CCTS_OFLOW (maintained by comparam())
143 *	CS_RTS_IFLOW	= CRTS_IFLOW (maintained by comparam())
144 * TS_FLUSH is not used.
145 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
146 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
147 */
148#define	CS_BUSY		0x80	/* output in progress */
149#define	CS_TTGO		0x40	/* output not stopped by XOFF */
150#define	CS_ODEVREADY	0x20	/* external device h/w ready (CTS) */
151#define	CS_CHECKMSR	1	/* check of MSR scheduled */
152#define	CS_CTS_OFLOW	2	/* use CTS output flow control */
153#define	CS_DTR_OFF	0x10	/* DTR held off */
154#define	CS_ODONE	4	/* output completed */
155#define	CS_RTS_IFLOW	8	/* use RTS input flow control */
156#define	CSE_BUSYCHECK	1	/* siobusycheck() scheduled */
157
158static	char const * const	error_desc[] = {
159#define	CE_OVERRUN			0
160	"silo overflow",
161#define	CE_INTERRUPT_BUF_OVERFLOW	1
162	"interrupt-level buffer overflow",
163#define	CE_TTY_BUF_OVERFLOW		2
164	"tty-level buffer overflow",
165};
166
167#define	CE_NTYPES			3
168#define	CE_RECORD(com, errnum)		(++(com)->delta_error_counts[errnum])
169
170/* types.  XXX - should be elsewhere */
171typedef u_int	Port_t;		/* hardware port */
172typedef u_char	bool_t;		/* boolean */
173
174/* queue of linear buffers */
175struct lbq {
176	u_char	*l_head;	/* next char to process */
177	u_char	*l_tail;	/* one past the last char to process */
178	struct lbq *l_next;	/* next in queue */
179	bool_t	l_queued;	/* nonzero if queued */
180};
181
182/* com device structure */
183struct com_s {
184	u_char	state;		/* miscellaneous flag bits */
185	bool_t  active_out;	/* nonzero if the callout device is open */
186	u_char	cfcr_image;	/* copy of value written to CFCR */
187#ifdef COM_ESP
188	bool_t	esp;		/* is this unit a hayes esp board? */
189#endif
190	u_char	extra_state;	/* more flag bits, separate for order trick */
191	u_char	fifo_image;	/* copy of value written to FIFO */
192	bool_t	hasfifo;	/* nonzero for 16550 UARTs */
193	bool_t	loses_outints;	/* nonzero if device loses output interrupts */
194	u_char	mcr_image;	/* copy of value written to MCR */
195#ifdef COM_MULTIPORT
196	bool_t	multiport;	/* is this unit part of a multiport device? */
197#endif /* COM_MULTIPORT */
198	bool_t	no_irq;		/* nonzero if irq is not attached */
199	bool_t  gone;		/* hardware disappeared */
200	bool_t	poll;		/* nonzero if polling is required */
201	bool_t	poll_output;	/* nonzero if polling for output is required */
202	bool_t	st16650a;	/* nonzero if Startech 16650A compatible */
203	int	unit;		/* unit	number */
204	int	dtr_wait;	/* time to hold DTR down on close (* 1/hz) */
205	u_int	flags;		/* copy of device flags */
206	u_int	tx_fifo_size;
207	u_int	wopeners;	/* # processes waiting for DCD in open() */
208
209	/*
210	 * The high level of the driver never reads status registers directly
211	 * because there would be too many side effects to handle conveniently.
212	 * Instead, it reads copies of the registers stored here by the
213	 * interrupt handler.
214	 */
215	u_char	last_modem_status;	/* last MSR read by intr handler */
216	u_char	prev_modem_status;	/* last MSR handled by high level */
217
218	u_char	hotchar;	/* ldisc-specific char to be handled ASAP */
219	u_char	*ibuf;		/* start of input buffer */
220	u_char	*ibufend;	/* end of input buffer */
221	u_char	*ibufold;	/* old input buffer, to be freed */
222	u_char	*ihighwater;	/* threshold in input buffer */
223	u_char	*iptr;		/* next free spot in input buffer */
224	int	ibufsize;	/* size of ibuf (not include error bytes) */
225	int	ierroff;	/* offset of error bytes in ibuf */
226
227	struct lbq	obufq;	/* head of queue of output buffers */
228	struct lbq	obufs[2];	/* output buffers */
229
230	bus_space_tag_t		bst;
231	bus_space_handle_t	bsh;
232
233	Port_t	data_port;	/* i/o ports */
234#ifdef COM_ESP
235	Port_t	esp_port;
236#endif
237	Port_t	int_ctl_port;
238	Port_t	int_id_port;
239	Port_t	modem_ctl_port;
240	Port_t	line_status_port;
241	Port_t	modem_status_port;
242
243	struct tty	*tp;	/* cross reference */
244
245	/* Initial state. */
246	struct termios	it_in;	/* should be in struct tty */
247	struct termios	it_out;
248
249	/* Lock state. */
250	struct termios	lt_in;	/* should be in struct tty */
251	struct termios	lt_out;
252
253	bool_t	do_timestamp;
254	bool_t	do_dcd_timestamp;
255	struct timeval	timestamp;
256	struct timeval	dcd_timestamp;
257	struct	pps_state pps;
258	int	pps_bit;
259#ifdef ALT_BREAK_TO_DEBUGGER
260	int	alt_brk_state;
261#endif
262
263	u_long	bytes_in;	/* statistics */
264	u_long	bytes_out;
265	u_int	delta_error_counts[CE_NTYPES];
266	u_long	error_counts[CE_NTYPES];
267
268	u_long	rclk;
269
270	struct resource *irqres;
271	struct resource *ioportres;
272	int	ioportrid;
273	void	*cookie;
274	struct cdev *devs[6];
275
276	/*
277	 * Data area for output buffers.  Someday we should build the output
278	 * buffer queue without copying data.
279	 */
280	u_char	obuf1[256];
281	u_char	obuf2[256];
282};
283
284#ifdef COM_ESP
285static	int	espattach(struct com_s *com, Port_t esp_port);
286#endif
287
288static	timeout_t siobusycheck;
289static	u_int	siodivisor(u_long rclk, speed_t speed);
290static	timeout_t siodtrwakeup;
291static	void	comhardclose(struct com_s *com);
292static	void	sioinput(struct com_s *com);
293static	void	siointr1(struct com_s *com);
294static	void	siointr(void *arg);
295static	int	commctl(struct com_s *com, int bits, int how);
296static	int	comparam(struct tty *tp, struct termios *t);
297static	void	siopoll(void *);
298static	void	siosettimeout(void);
299static	int	siosetwater(struct com_s *com, speed_t speed);
300static	void	comstart(struct tty *tp);
301static	void	comstop(struct tty *tp, int rw);
302static	timeout_t comwakeup;
303
304char		sio_driver_name[] = "sio";
305static struct	mtx sio_lock;
306static int	sio_inited;
307
308/* table and macro for fast conversion from a unit number to its com struct */
309devclass_t	sio_devclass;
310#define	com_addr(unit)	((struct com_s *) \
311			 devclass_get_softc(sio_devclass, unit)) /* XXX */
312
313static	d_open_t	sioopen;
314static	d_close_t	sioclose;
315static	d_read_t	sioread;
316static	d_write_t	siowrite;
317static	d_ioctl_t	sioioctl;
318
319static struct cdevsw sio_cdevsw = {
320	.d_version =	D_VERSION,
321	.d_open =	sioopen,
322	.d_close =	sioclose,
323	.d_read =	sioread,
324	.d_write =	siowrite,
325	.d_ioctl =	sioioctl,
326	.d_name =	sio_driver_name,
327	.d_flags =	D_TTY | D_NEEDGIANT,
328};
329
330int	comconsole = -1;
331static	volatile speed_t	comdefaultrate = CONSPEED;
332static	u_long			comdefaultrclk = DEFAULT_RCLK;
333SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, "");
334static	speed_t			gdbdefaultrate = GDBSPEED;
335SYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW,
336	    &gdbdefaultrate, GDBSPEED, "");
337static	u_int	com_events;	/* input chars + weighted output completions */
338static	Port_t	siocniobase;
339static	int	siocnunit = -1;
340static	Port_t	siogdbiobase;
341static	int	siogdbunit = -1;
342static	void	*sio_slow_ih;
343static	void	*sio_fast_ih;
344static	int	sio_timeout;
345static	int	sio_timeouts_until_log;
346static	struct	callout_handle sio_timeout_handle
347    = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
348static	int	sio_numunits;
349
350#ifdef COM_ESP
351/* XXX configure this properly. */
352/* XXX quite broken for new-bus. */
353static	Port_t	likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
354static	Port_t	likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
355#endif
356
357/*
358 * handle sysctl read/write requests for console speed
359 *
360 * In addition to setting comdefaultrate for I/O through /dev/console,
361 * also set the initial and lock values for the /dev/ttyXX device
362 * if there is one associated with the console.  Finally, if the /dev/tty
363 * device has already been open, change the speed on the open running port
364 * itself.
365 */
366
367static int
368sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS)
369{
370	int error, s;
371	speed_t newspeed;
372	struct com_s *com;
373	struct tty *tp;
374
375	newspeed = comdefaultrate;
376
377	error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
378	if (error || !req->newptr)
379		return (error);
380
381	comdefaultrate = newspeed;
382
383	if (comconsole < 0)		/* serial console not selected? */
384		return (0);
385
386	com = com_addr(comconsole);
387	if (com == NULL)
388		return (ENXIO);
389
390	/*
391	 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
392	 * (note, the lock rates really are boolean -- if non-zero, disallow
393	 *  speed changes)
394	 */
395	com->it_in.c_ispeed  = com->it_in.c_ospeed =
396	com->lt_in.c_ispeed  = com->lt_in.c_ospeed =
397	com->it_out.c_ispeed = com->it_out.c_ospeed =
398	com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate;
399
400	/*
401	 * if we're open, change the running rate too
402	 */
403	tp = com->tp;
404	if (tp && (tp->t_state & TS_ISOPEN)) {
405		tp->t_termios.c_ispeed =
406		tp->t_termios.c_ospeed = comdefaultrate;
407		s = spltty();
408		error = comparam(tp, &tp->t_termios);
409		splx(s);
410	}
411	return error;
412}
413
414SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
415	    0, 0, sysctl_machdep_comdefaultrate, "I", "");
416/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */
417
418#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit))
419#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit))
420
421/*
422 *	Unload the driver and clear the table.
423 *	XXX this is mostly wrong.
424 *	XXX TODO:
425 *	This is usually called when the card is ejected, but
426 *	can be caused by a kldunload of a controller driver.
427 *	The idea is to reset the driver's view of the device
428 *	and ensure that any driver entry points such as
429 *	read and write do not hang.
430 */
431int
432siodetach(dev)
433	device_t	dev;
434{
435	struct com_s	*com;
436	int i;
437
438	com = (struct com_s *) device_get_softc(dev);
439	if (com == NULL) {
440		device_printf(dev, "NULL com in siounload\n");
441		return (0);
442	}
443	com->gone = TRUE;
444	for (i = 0 ; i < 6; i++)
445		destroy_dev(com->devs[i]);
446	if (com->irqres) {
447		bus_teardown_intr(dev, com->irqres, com->cookie);
448		bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres);
449	}
450	if (com->ioportres)
451		bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid,
452				     com->ioportres);
453	if (com->tp && (com->tp->t_state & TS_ISOPEN)) {
454		device_printf(dev, "still open, forcing close\n");
455		ttyld_close(com->tp, 0);
456		ttyclose(com->tp);
457	} else {
458		if (com->ibuf != NULL)
459			free(com->ibuf, M_DEVBUF);
460		device_set_softc(dev, NULL);
461		free(com, M_DEVBUF);
462	}
463	return (0);
464}
465
466int
467sioprobe(dev, xrid, rclk, noprobe)
468	device_t	dev;
469	int		xrid;
470	u_long		rclk;
471	int		noprobe;
472{
473#if 0
474	static bool_t	already_init;
475	device_t	xdev;
476#endif
477	struct com_s	*com;
478	u_int		divisor;
479	bool_t		failures[10];
480	int		fn;
481	device_t	idev;
482	Port_t		iobase;
483	intrmask_t	irqmap[4];
484	intrmask_t	irqs;
485	u_char		mcr_image;
486	int		result;
487	u_long		xirq;
488	u_int		flags = device_get_flags(dev);
489	int		rid;
490	struct resource *port;
491
492	rid = xrid;
493	port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
494				  0, ~0, IO_COMSIZE, RF_ACTIVE);
495	if (!port)
496		return (ENXIO);
497
498	com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO);
499	if (com == NULL) {
500		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
501		return (ENOMEM);
502	}
503	device_set_softc(dev, com);
504	com->bst = rman_get_bustag(port);
505	com->bsh = rman_get_bushandle(port);
506	if (rclk == 0)
507		rclk = DEFAULT_RCLK;
508	com->rclk = rclk;
509
510	while (sio_inited != 2)
511		if (atomic_cmpset_int(&sio_inited, 0, 1)) {
512			mtx_init(&sio_lock, sio_driver_name, NULL,
513			    (comconsole != -1) ?
514			    MTX_SPIN | MTX_QUIET : MTX_SPIN);
515			atomic_store_rel_int(&sio_inited, 2);
516		}
517
518#if 0
519	/*
520	 * XXX this is broken - when we are first called, there are no
521	 * previously configured IO ports.  We could hard code
522	 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
523	 * This code has been doing nothing since the conversion since
524	 * "count" is zero the first time around.
525	 */
526	if (!already_init) {
527		/*
528		 * Turn off MCR_IENABLE for all likely serial ports.  An unused
529		 * port with its MCR_IENABLE gate open will inhibit interrupts
530		 * from any used port that shares the interrupt vector.
531		 * XXX the gate enable is elsewhere for some multiports.
532		 */
533		device_t *devs;
534		int count, i, xioport;
535
536		devclass_get_devices(sio_devclass, &devs, &count);
537		for (i = 0; i < count; i++) {
538			xdev = devs[i];
539			if (device_is_enabled(xdev) &&
540			    bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
541					     NULL) == 0)
542				outb(xioport + com_mcr, 0);
543		}
544		free(devs, M_TEMP);
545		already_init = TRUE;
546	}
547#endif
548
549	if (COM_LLCONSOLE(flags)) {
550		printf("sio%d: reserved for low-level i/o\n",
551		       device_get_unit(dev));
552		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
553		device_set_softc(dev, NULL);
554		free(com, M_DEVBUF);
555		return (ENXIO);
556	}
557
558	/*
559	 * If the device is on a multiport card and has an AST/4
560	 * compatible interrupt control register, initialize this
561	 * register and prepare to leave MCR_IENABLE clear in the mcr.
562	 * Otherwise, prepare to set MCR_IENABLE in the mcr.
563	 * Point idev to the device struct giving the correct id_irq.
564	 * This is the struct for the master device if there is one.
565	 */
566	idev = dev;
567	mcr_image = MCR_IENABLE;
568#ifdef COM_MULTIPORT
569	if (COM_ISMULTIPORT(flags)) {
570		Port_t xiobase;
571		u_long io;
572
573		idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
574		if (idev == NULL) {
575			printf("sio%d: master device %d not configured\n",
576			       device_get_unit(dev), COM_MPMASTER(flags));
577			idev = dev;
578		}
579		if (!COM_NOTAST4(flags)) {
580			if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
581					     NULL) == 0) {
582				xiobase = io;
583				if (bus_get_resource(idev, SYS_RES_IRQ, 0,
584				    NULL, NULL) == 0)
585					outb(xiobase + com_scr, 0x80);
586				else
587					outb(xiobase + com_scr, 0);
588			}
589			mcr_image = 0;
590		}
591	}
592#endif /* COM_MULTIPORT */
593	if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
594		mcr_image = 0;
595
596	bzero(failures, sizeof failures);
597	iobase = rman_get_start(port);
598
599	/*
600	 * We don't want to get actual interrupts, just masked ones.
601	 * Interrupts from this line should already be masked in the ICU,
602	 * but mask them in the processor as well in case there are some
603	 * (misconfigured) shared interrupts.
604	 */
605	mtx_lock_spin(&sio_lock);
606/* EXTRA DELAY? */
607
608	/*
609	 * For the TI16754 chips, set prescaler to 1 (4 is often the
610	 * default after-reset value) as otherwise it's impossible to
611	 * get highest baudrates.
612	 */
613	if (COM_TI16754(flags)) {
614		u_char cfcr, efr;
615
616		cfcr = sio_getreg(com, com_cfcr);
617		sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
618		efr = sio_getreg(com, com_efr);
619		/* Unlock extended features to turn off prescaler. */
620		sio_setreg(com, com_efr, efr | EFR_EFE);
621		/* Disable EFR. */
622		sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0);
623		/* Turn off prescaler. */
624		sio_setreg(com, com_mcr,
625			   sio_getreg(com, com_mcr) & ~MCR_PRESCALE);
626		sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
627		sio_setreg(com, com_efr, efr);
628		sio_setreg(com, com_cfcr, cfcr);
629	}
630
631	/*
632	 * Initialize the speed and the word size and wait long enough to
633	 * drain the maximum of 16 bytes of junk in device output queues.
634	 * The speed is undefined after a master reset and must be set
635	 * before relying on anything related to output.  There may be
636	 * junk after a (very fast) soft reboot and (apparently) after
637	 * master reset.
638	 * XXX what about the UART bug avoided by waiting in comparam()?
639	 * We don't want to to wait long enough to drain at 2 bps.
640	 */
641	if (iobase == siocniobase)
642		DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
643	else {
644		sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
645		divisor = siodivisor(rclk, SIO_TEST_SPEED);
646		sio_setreg(com, com_dlbl, divisor & 0xff);
647		sio_setreg(com, com_dlbh, divisor >> 8);
648		sio_setreg(com, com_cfcr, CFCR_8BITS);
649		DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
650	}
651
652	/*
653	 * Enable the interrupt gate and disable device interupts.  This
654	 * should leave the device driving the interrupt line low and
655	 * guarantee an edge trigger if an interrupt can be generated.
656	 */
657/* EXTRA DELAY? */
658	sio_setreg(com, com_mcr, mcr_image);
659	sio_setreg(com, com_ier, 0);
660	DELAY(1000);		/* XXX */
661	irqmap[0] = isa_irq_pending();
662
663	/*
664	 * Attempt to set loopback mode so that we can send a null byte
665	 * without annoying any external device.
666	 */
667/* EXTRA DELAY? */
668	sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
669
670	/*
671	 * Attempt to generate an output interrupt.  On 8250's, setting
672	 * IER_ETXRDY generates an interrupt independent of the current
673	 * setting and independent of whether the THR is empty.  On 16450's,
674	 * setting IER_ETXRDY generates an interrupt independent of the
675	 * current setting.  On 16550A's, setting IER_ETXRDY only
676	 * generates an interrupt when IER_ETXRDY is not already set.
677	 */
678	sio_setreg(com, com_ier, IER_ETXRDY);
679
680	/*
681	 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
682	 * an interrupt.  They'd better generate one for actually doing
683	 * output.  Loopback may be broken on the same incompatibles but
684	 * it's unlikely to do more than allow the null byte out.
685	 */
686	sio_setreg(com, com_data, 0);
687	if (iobase == siocniobase)
688		DELAY((1 + 2) * 1000000 / (comdefaultrate / 10));
689	else
690		DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
691
692	/*
693	 * Turn off loopback mode so that the interrupt gate works again
694	 * (MCR_IENABLE was hidden).  This should leave the device driving
695	 * an interrupt line high.  It doesn't matter if the interrupt
696	 * line oscillates while we are not looking at it, since interrupts
697	 * are disabled.
698	 */
699/* EXTRA DELAY? */
700	sio_setreg(com, com_mcr, mcr_image);
701
702	/*
703	 * It seems my Xircom CBEM56G Cardbus modem wants to be reset
704	 * to 8 bits *again*, or else probe test 0 will fail.
705	 * gwk@sgi.com, 4/19/2001
706	 */
707	sio_setreg(com, com_cfcr, CFCR_8BITS);
708
709	/*
710	 * Some PCMCIA cards (Palido 321s, DC-1S, ...) have the "TXRDY bug",
711	 * so we probe for a buggy IIR_TXRDY implementation even in the
712	 * noprobe case.  We don't probe for it in the !noprobe case because
713	 * noprobe is always set for PCMCIA cards and the problem is not
714	 * known to affect any other cards.
715	 */
716	if (noprobe) {
717		/* Read IIR a few times. */
718		for (fn = 0; fn < 2; fn ++) {
719			DELAY(10000);
720			failures[6] = sio_getreg(com, com_iir);
721		}
722
723		/* IIR_TXRDY should be clear.  Is it? */
724		result = 0;
725		if (failures[6] & IIR_TXRDY) {
726			/*
727			 * No.  We seem to have the bug.  Does our fix for
728			 * it work?
729			 */
730			sio_setreg(com, com_ier, 0);
731			if (sio_getreg(com, com_iir) & IIR_NOPEND) {
732				/* Yes.  We discovered the TXRDY bug! */
733				SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
734			} else {
735				/* No.  Just fail.  XXX */
736				result = ENXIO;
737				sio_setreg(com, com_mcr, 0);
738			}
739		} else {
740			/* Yes.  No bug. */
741			CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
742		}
743		sio_setreg(com, com_ier, 0);
744		sio_setreg(com, com_cfcr, CFCR_8BITS);
745		mtx_unlock_spin(&sio_lock);
746		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
747		if (iobase == siocniobase)
748			result = 0;
749		if (result != 0) {
750			device_set_softc(dev, NULL);
751			free(com, M_DEVBUF);
752		}
753		return (result);
754	}
755
756	/*
757	 * Check that
758	 *	o the CFCR, IER and MCR in UART hold the values written to them
759	 *	  (the values happen to be all distinct - this is good for
760	 *	  avoiding false positive tests from bus echoes).
761	 *	o an output interrupt is generated and its vector is correct.
762	 *	o the interrupt goes away when the IIR in the UART is read.
763	 */
764/* EXTRA DELAY? */
765	failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
766	failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
767	failures[2] = sio_getreg(com, com_mcr) - mcr_image;
768	DELAY(10000);		/* Some internal modems need this time */
769	irqmap[1] = isa_irq_pending();
770	failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
771	DELAY(1000);		/* XXX */
772	irqmap[2] = isa_irq_pending();
773	failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
774
775	/*
776	 * Turn off all device interrupts and check that they go off properly.
777	 * Leave MCR_IENABLE alone.  For ports without a master port, it gates
778	 * the OUT2 output of the UART to
779	 * the ICU input.  Closing the gate would give a floating ICU input
780	 * (unless there is another device driving it) and spurious interrupts.
781	 * (On the system that this was first tested on, the input floats high
782	 * and gives a (masked) interrupt as soon as the gate is closed.)
783	 */
784	sio_setreg(com, com_ier, 0);
785	sio_setreg(com, com_cfcr, CFCR_8BITS);	/* dummy to avoid bus echo */
786	failures[7] = sio_getreg(com, com_ier);
787	DELAY(1000);		/* XXX */
788	irqmap[3] = isa_irq_pending();
789	failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
790
791	mtx_unlock_spin(&sio_lock);
792
793	irqs = irqmap[1] & ~irqmap[0];
794	if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
795	    ((1 << xirq) & irqs) == 0) {
796		printf(
797		"sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
798		    device_get_unit(dev), xirq, irqs);
799		printf(
800		"sio%d: port may not be enabled\n",
801		    device_get_unit(dev));
802	}
803	if (bootverbose)
804		printf("sio%d: irq maps: %#x %#x %#x %#x\n",
805		    device_get_unit(dev),
806		    irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
807
808	result = 0;
809	for (fn = 0; fn < sizeof failures; ++fn)
810		if (failures[fn]) {
811			sio_setreg(com, com_mcr, 0);
812			result = ENXIO;
813			if (bootverbose) {
814				printf("sio%d: probe failed test(s):",
815				    device_get_unit(dev));
816				for (fn = 0; fn < sizeof failures; ++fn)
817					if (failures[fn])
818						printf(" %d", fn);
819				printf("\n");
820			}
821			break;
822		}
823	bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
824	if (iobase == siocniobase)
825		result = 0;
826	if (result != 0) {
827		device_set_softc(dev, NULL);
828		free(com, M_DEVBUF);
829	}
830	return (result);
831}
832
833#ifdef COM_ESP
834static int
835espattach(com, esp_port)
836	struct com_s		*com;
837	Port_t			esp_port;
838{
839	u_char	dips;
840	u_char	val;
841
842	/*
843	 * Check the ESP-specific I/O port to see if we're an ESP
844	 * card.  If not, return failure immediately.
845	 */
846	if ((inb(esp_port) & 0xf3) == 0) {
847		printf(" port 0x%x is not an ESP board?\n", esp_port);
848		return (0);
849	}
850
851	/*
852	 * We've got something that claims to be a Hayes ESP card.
853	 * Let's hope so.
854	 */
855
856	/* Get the dip-switch configuration */
857	outb(esp_port + ESP_CMD1, ESP_GETDIPS);
858	dips = inb(esp_port + ESP_STATUS1);
859
860	/*
861	 * Bits 0,1 of dips say which COM port we are.
862	 */
863	if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
864		printf(" : ESP");
865	else {
866		printf(" esp_port has com %d\n", dips & 0x03);
867		return (0);
868	}
869
870	/*
871	 * Check for ESP version 2.0 or later:  bits 4,5,6 = 010.
872	 */
873	outb(esp_port + ESP_CMD1, ESP_GETTEST);
874	val = inb(esp_port + ESP_STATUS1);	/* clear reg 1 */
875	val = inb(esp_port + ESP_STATUS2);
876	if ((val & 0x70) < 0x20) {
877		printf("-old (%o)", val & 0x70);
878		return (0);
879	}
880
881	/*
882	 * Check for ability to emulate 16550:  bit 7 == 1
883	 */
884	if ((dips & 0x80) == 0) {
885		printf(" slave");
886		return (0);
887	}
888
889	/*
890	 * Okay, we seem to be a Hayes ESP card.  Whee.
891	 */
892	com->esp = TRUE;
893	com->esp_port = esp_port;
894	return (1);
895}
896#endif /* COM_ESP */
897
898int
899sioattach(dev, xrid, rclk)
900	device_t	dev;
901	int		xrid;
902	u_long		rclk;
903{
904	struct com_s	*com;
905#ifdef COM_ESP
906	Port_t		*espp;
907#endif
908	Port_t		iobase;
909	int		minorbase;
910	int		unit;
911	u_int		flags;
912	int		rid;
913	struct resource *port;
914	int		ret;
915
916	rid = xrid;
917	port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
918				  0, ~0, IO_COMSIZE, RF_ACTIVE);
919	if (!port)
920		return (ENXIO);
921
922	iobase = rman_get_start(port);
923	unit = device_get_unit(dev);
924	com = device_get_softc(dev);
925	flags = device_get_flags(dev);
926
927	if (unit >= sio_numunits)
928		sio_numunits = unit + 1;
929	/*
930	 * sioprobe() has initialized the device registers as follows:
931	 *	o cfcr = CFCR_8BITS.
932	 *	  It is most important that CFCR_DLAB is off, so that the
933	 *	  data port is not hidden when we enable interrupts.
934	 *	o ier = 0.
935	 *	  Interrupts are only enabled when the line is open.
936	 *	o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
937	 *	  interrupt control register or the config specifies no irq.
938	 *	  Keeping MCR_DTR and MCR_RTS off might stop the external
939	 *	  device from sending before we are ready.
940	 */
941	bzero(com, sizeof *com);
942	com->unit = unit;
943	com->ioportres = port;
944	com->ioportrid = rid;
945	com->bst = rman_get_bustag(port);
946	com->bsh = rman_get_bushandle(port);
947	com->cfcr_image = CFCR_8BITS;
948	com->dtr_wait = 3 * hz;
949	com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
950	com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
951	com->tx_fifo_size = 1;
952	com->obufs[0].l_head = com->obuf1;
953	com->obufs[1].l_head = com->obuf2;
954
955	com->data_port = iobase + com_data;
956	com->int_ctl_port = iobase + com_ier;
957	com->int_id_port = iobase + com_iir;
958	com->modem_ctl_port = iobase + com_mcr;
959	com->mcr_image = inb(com->modem_ctl_port);
960	com->line_status_port = iobase + com_lsr;
961	com->modem_status_port = iobase + com_msr;
962
963	if (rclk == 0)
964		rclk = DEFAULT_RCLK;
965	com->rclk = rclk;
966
967	/*
968	 * We don't use all the flags from <sys/ttydefaults.h> since they
969	 * are only relevant for logins.  It's important to have echo off
970	 * initially so that the line doesn't start blathering before the
971	 * echo flag can be turned off.
972	 */
973	com->it_in.c_iflag = 0;
974	com->it_in.c_oflag = 0;
975	com->it_in.c_cflag = TTYDEF_CFLAG;
976	com->it_in.c_lflag = 0;
977	if (unit == comconsole) {
978		com->it_in.c_iflag = TTYDEF_IFLAG;
979		com->it_in.c_oflag = TTYDEF_OFLAG;
980		com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
981		com->it_in.c_lflag = TTYDEF_LFLAG;
982		com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
983		com->lt_out.c_ispeed = com->lt_out.c_ospeed =
984		com->lt_in.c_ispeed = com->lt_in.c_ospeed =
985		com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
986	} else
987		com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED;
988	if (siosetwater(com, com->it_in.c_ispeed) != 0) {
989		mtx_unlock_spin(&sio_lock);
990		/*
991		 * Leave i/o resources allocated if this is a `cn'-level
992		 * console, so that other devices can't snarf them.
993		 */
994		if (iobase != siocniobase)
995			bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
996		return (ENOMEM);
997	}
998	mtx_unlock_spin(&sio_lock);
999	termioschars(&com->it_in);
1000	com->it_out = com->it_in;
1001
1002	/* attempt to determine UART type */
1003	printf("sio%d: type", unit);
1004
1005
1006	if (!COM_ISMULTIPORT(flags) &&
1007	    !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) {
1008		u_char	scr;
1009		u_char	scr1;
1010		u_char	scr2;
1011
1012		scr = sio_getreg(com, com_scr);
1013		sio_setreg(com, com_scr, 0xa5);
1014		scr1 = sio_getreg(com, com_scr);
1015		sio_setreg(com, com_scr, 0x5a);
1016		scr2 = sio_getreg(com, com_scr);
1017		sio_setreg(com, com_scr, scr);
1018		if (scr1 != 0xa5 || scr2 != 0x5a) {
1019			printf(" 8250 or not responding");
1020			goto determined_type;
1021		}
1022	}
1023	sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
1024	DELAY(100);
1025	switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
1026	case FIFO_RX_LOW:
1027		printf(" 16450");
1028		break;
1029	case FIFO_RX_MEDL:
1030		printf(" 16450?");
1031		break;
1032	case FIFO_RX_MEDH:
1033		printf(" 16550?");
1034		break;
1035	case FIFO_RX_HIGH:
1036		if (COM_NOFIFO(flags)) {
1037			printf(" 16550A fifo disabled");
1038			break;
1039		}
1040		com->hasfifo = TRUE;
1041		if (COM_ST16650A(flags)) {
1042			printf(" ST16650A");
1043			com->st16650a = TRUE;
1044			com->tx_fifo_size = 32;
1045			break;
1046		}
1047		if (COM_TI16754(flags)) {
1048			printf(" TI16754");
1049			com->tx_fifo_size = 64;
1050			break;
1051		}
1052		printf(" 16550A");
1053#ifdef COM_ESP
1054		for (espp = likely_esp_ports; *espp != 0; espp++)
1055			if (espattach(com, *espp)) {
1056				com->tx_fifo_size = 1024;
1057				break;
1058			}
1059		if (com->esp)
1060			break;
1061#endif
1062		com->tx_fifo_size = COM_FIFOSIZE(flags);
1063		if (com->tx_fifo_size == 0)
1064			com->tx_fifo_size = 16;
1065		else
1066			printf(" lookalike with %u bytes FIFO",
1067			       com->tx_fifo_size);
1068		break;
1069	}
1070#ifdef COM_ESP
1071	if (com->esp) {
1072		/*
1073		 * Set 16550 compatibility mode.
1074		 * We don't use the ESP_MODE_SCALE bit to increase the
1075		 * fifo trigger levels because we can't handle large
1076		 * bursts of input.
1077		 * XXX flow control should be set in comparam(), not here.
1078		 */
1079		outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1080		outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1081
1082		/* Set RTS/CTS flow control. */
1083		outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1084		outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1085		outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1086
1087		/* Set flow-control levels. */
1088		outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1089		outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1090		outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1091		outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1092		outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1093	}
1094#endif /* COM_ESP */
1095	sio_setreg(com, com_fifo, 0);
1096determined_type: ;
1097
1098#ifdef COM_MULTIPORT
1099	if (COM_ISMULTIPORT(flags)) {
1100		device_t masterdev;
1101
1102		com->multiport = TRUE;
1103		printf(" (multiport");
1104		if (unit == COM_MPMASTER(flags))
1105			printf(" master");
1106		printf(")");
1107		masterdev = devclass_get_device(sio_devclass,
1108		    COM_MPMASTER(flags));
1109		com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1110		    SYS_RES_IRQ, 0, NULL, NULL) != 0);
1111	 }
1112#endif /* COM_MULTIPORT */
1113	if (unit == comconsole)
1114		printf(", console");
1115	if (COM_IIR_TXRDYBUG(flags))
1116		printf(" with a buggy IIR_TXRDY implementation");
1117	printf("\n");
1118
1119	if (sio_fast_ih == NULL) {
1120		swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0,
1121		    &sio_fast_ih);
1122		swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0,
1123		    &sio_slow_ih);
1124	}
1125	minorbase = UNIT_TO_MINOR(unit);
1126	com->devs[0] = make_dev(&sio_cdevsw, minorbase,
1127	    UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit);
1128	com->devs[1] = make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE,
1129	    UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit);
1130	com->devs[2] = make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE,
1131	    UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit);
1132	com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK,
1133	    UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit);
1134	com->devs[4] = make_dev(&sio_cdevsw,
1135	    minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
1136	    UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit);
1137	com->devs[5] = make_dev(&sio_cdevsw,
1138	    minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
1139	    UID_UUCP, GID_DIALER, 0660, "cuala%r", unit);
1140	for (rid = 0; rid < 6; rid++)
1141		com->devs[rid]->si_drv1 = com;
1142	com->flags = flags;
1143	com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1144
1145	if (COM_PPSCTS(flags))
1146		com->pps_bit = MSR_CTS;
1147	else
1148		com->pps_bit = MSR_DCD;
1149	pps_init(&com->pps);
1150
1151	rid = 0;
1152	com->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
1153	if (com->irqres) {
1154		ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres,
1155				     INTR_TYPE_TTY | INTR_FAST,
1156				     siointr, com, &com->cookie);
1157		if (ret) {
1158			ret = BUS_SETUP_INTR(device_get_parent(dev), dev,
1159					     com->irqres, INTR_TYPE_TTY,
1160					     siointr, com, &com->cookie);
1161			if (ret == 0)
1162				device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n");
1163		}
1164		if (ret)
1165			device_printf(dev, "could not activate interrupt\n");
1166#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1167    defined(ALT_BREAK_TO_DEBUGGER))
1168		/*
1169		 * Enable interrupts for early break-to-debugger support
1170		 * on the console.
1171		 */
1172		if (ret == 0 && unit == comconsole)
1173			outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS |
1174			    IER_EMSC);
1175#endif
1176	}
1177
1178	return (0);
1179}
1180
1181static int
1182sioopen(dev, flag, mode, td)
1183	struct cdev *dev;
1184	int		flag;
1185	int		mode;
1186	struct thread	*td;
1187{
1188	struct com_s	*com;
1189	int		error;
1190	int		mynor;
1191	int		s;
1192	struct tty	*tp;
1193	int		unit;
1194
1195	mynor = minor(dev);
1196	unit = MINOR_TO_UNIT(mynor);
1197	com = com_addr(unit);
1198	if (com == NULL)
1199		return (ENXIO);
1200	if (com->gone)
1201		return (ENXIO);
1202	if (mynor & CONTROL_MASK)
1203		return (0);
1204	tp = dev->si_tty = com->tp = ttymalloc(com->tp);
1205	s = spltty();
1206	/*
1207	 * We jump to this label after all non-interrupted sleeps to pick
1208	 * up any changes of the device state.
1209	 */
1210open_top:
1211	while (com->state & CS_DTR_OFF) {
1212		error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0);
1213		if (com_addr(unit) == NULL)
1214			return (ENXIO);
1215		if (error != 0 || com->gone)
1216			goto out;
1217	}
1218	if (tp->t_state & TS_ISOPEN) {
1219		/*
1220		 * The device is open, so everything has been initialized.
1221		 * Handle conflicts.
1222		 */
1223		if (mynor & CALLOUT_MASK) {
1224			if (!com->active_out) {
1225				error = EBUSY;
1226				goto out;
1227			}
1228		} else {
1229			if (com->active_out) {
1230				if (flag & O_NONBLOCK) {
1231					error = EBUSY;
1232					goto out;
1233				}
1234				error =	tsleep(&com->active_out,
1235					       TTIPRI | PCATCH, "siobi", 0);
1236				if (com_addr(unit) == NULL)
1237					return (ENXIO);
1238				if (error != 0 || com->gone)
1239					goto out;
1240				goto open_top;
1241			}
1242		}
1243		if (tp->t_state & TS_XCLUDE &&
1244		    suser(td)) {
1245			error = EBUSY;
1246			goto out;
1247		}
1248	} else {
1249		/*
1250		 * The device isn't open, so there are no conflicts.
1251		 * Initialize it.  Initialization is done twice in many
1252		 * cases: to preempt sleeping callin opens if we are
1253		 * callout, and to complete a callin open after DCD rises.
1254		 */
1255		tp->t_oproc = comstart;
1256		tp->t_param = comparam;
1257		tp->t_stop = comstop;
1258		tp->t_dev = dev;
1259		tp->t_termios = mynor & CALLOUT_MASK
1260				? com->it_out : com->it_in;
1261		(void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET);
1262		com->poll = com->no_irq;
1263		com->poll_output = com->loses_outints;
1264		++com->wopeners;
1265		error = comparam(tp, &tp->t_termios);
1266		--com->wopeners;
1267		if (error != 0)
1268			goto out;
1269		/*
1270		 * XXX we should goto open_top if comparam() slept.
1271		 */
1272		if (com->hasfifo) {
1273			int i;
1274			/*
1275			 * (Re)enable and drain fifos.
1276			 *
1277			 * Certain SMC chips cause problems if the fifos
1278			 * are enabled while input is ready.  Turn off the
1279			 * fifo if necessary to clear the input.  We test
1280			 * the input ready bit after enabling the fifos
1281			 * since we've already enabled them in comparam()
1282			 * and to handle races between enabling and fresh
1283			 * input.
1284			 */
1285			for (i = 0; i < 500; i++) {
1286				sio_setreg(com, com_fifo,
1287					   FIFO_RCV_RST | FIFO_XMT_RST
1288					   | com->fifo_image);
1289				/*
1290				 * XXX the delays are for superstitious
1291				 * historical reasons.  It must be less than
1292				 * the character time at the maximum
1293				 * supported speed (87 usec at 115200 bps
1294				 * 8N1).  Otherwise we might loop endlessly
1295				 * if data is streaming in.  We used to use
1296				 * delays of 100.  That usually worked
1297				 * because DELAY(100) used to usually delay
1298				 * for about 85 usec instead of 100.
1299				 */
1300				DELAY(50);
1301				if (!(inb(com->line_status_port) & LSR_RXRDY))
1302					break;
1303				sio_setreg(com, com_fifo, 0);
1304				DELAY(50);
1305				(void) inb(com->data_port);
1306			}
1307			if (i == 500) {
1308				error = EIO;
1309				goto out;
1310			}
1311		}
1312
1313		mtx_lock_spin(&sio_lock);
1314		(void) inb(com->line_status_port);
1315		(void) inb(com->data_port);
1316		com->prev_modem_status = com->last_modem_status
1317		    = inb(com->modem_status_port);
1318		outb(com->int_ctl_port,
1319		     IER_ERXRDY | IER_ERLS | IER_EMSC
1320		     | (COM_IIR_TXRDYBUG(com->flags) ? 0 : IER_ETXRDY));
1321		mtx_unlock_spin(&sio_lock);
1322		/*
1323		 * Handle initial DCD.  Callout devices get a fake initial
1324		 * DCD (trapdoor DCD).  If we are callout, then any sleeping
1325		 * callin opens get woken up and resume sleeping on "siobi"
1326		 * instead of "siodcd".
1327		 */
1328		/*
1329		 * XXX `mynor & CALLOUT_MASK' should be
1330		 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1331		 * TRAPDOOR_CARRIER is the default initial state for callout
1332		 * devices and SOFT_CARRIER is like CLOCAL except it hides
1333		 * the true carrier.
1334		 */
1335		if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
1336			ttyld_modem(tp, 1);
1337	}
1338	/*
1339	 * Wait for DCD if necessary.
1340	 */
1341	if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
1342	    && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) {
1343		++com->wopeners;
1344		error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0);
1345		if (com_addr(unit) == NULL)
1346			return (ENXIO);
1347		--com->wopeners;
1348		if (error != 0 || com->gone)
1349			goto out;
1350		goto open_top;
1351	}
1352	error =	ttyld_open(tp, dev);
1353	com->hotchar = ttyldoptim(tp);
1354	if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
1355		com->active_out = TRUE;
1356	siosettimeout();
1357out:
1358	splx(s);
1359	if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
1360		comhardclose(com);
1361	return (error);
1362}
1363
1364static int
1365sioclose(dev, flag, mode, td)
1366	struct cdev *dev;
1367	int		flag;
1368	int		mode;
1369	struct thread	*td;
1370{
1371	struct com_s	*com;
1372	int		mynor;
1373	int		s;
1374	struct tty	*tp;
1375
1376	mynor = minor(dev);
1377	if (mynor & CONTROL_MASK)
1378		return (0);
1379	com = com_addr(MINOR_TO_UNIT(mynor));
1380	if (com == NULL)
1381		return (ENODEV);
1382	tp = com->tp;
1383	s = spltty();
1384	ttyld_close(tp, flag);
1385	com->hotchar = ttyldoptim(tp);
1386	comhardclose(com);
1387	ttyclose(tp);
1388	siosettimeout();
1389	splx(s);
1390	if (com->gone) {
1391		printf("sio%d: gone\n", com->unit);
1392		s = spltty();
1393		if (com->ibuf != NULL)
1394			free(com->ibuf, M_DEVBUF);
1395		bzero(tp, sizeof *tp);
1396		splx(s);
1397	}
1398	return (0);
1399}
1400
1401static void
1402comhardclose(com)
1403	struct com_s	*com;
1404{
1405	int		s;
1406	struct tty	*tp;
1407
1408	s = spltty();
1409	com->poll = FALSE;
1410	com->poll_output = FALSE;
1411	com->do_timestamp = FALSE;
1412	com->do_dcd_timestamp = FALSE;
1413	com->pps.ppsparam.mode = 0;
1414	sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1415	tp = com->tp;
1416
1417#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1418    defined(ALT_BREAK_TO_DEBUGGER))
1419	/*
1420	 * Leave interrupts enabled and don't clear DTR if this is the
1421	 * console. This allows us to detect break-to-debugger events
1422	 * while the console device is closed.
1423	 */
1424	if (com->unit != comconsole)
1425#endif
1426	{
1427		sio_setreg(com, com_ier, 0);
1428		if (tp->t_cflag & HUPCL
1429		    /*
1430		     * XXX we will miss any carrier drop between here and the
1431		     * next open.  Perhaps we should watch DCD even when the
1432		     * port is closed; it is not sufficient to check it at
1433		     * the next open because it might go up and down while
1434		     * we're not watching.
1435		     */
1436		    || (!com->active_out
1437		        && !(com->prev_modem_status & MSR_DCD)
1438		        && !(com->it_in.c_cflag & CLOCAL))
1439		    || !(tp->t_state & TS_ISOPEN)) {
1440			(void)commctl(com, TIOCM_DTR, DMBIC);
1441			if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
1442				timeout(siodtrwakeup, com, com->dtr_wait);
1443				com->state |= CS_DTR_OFF;
1444			}
1445		}
1446	}
1447	if (com->hasfifo) {
1448		/*
1449		 * Disable fifos so that they are off after controlled
1450		 * reboots.  Some BIOSes fail to detect 16550s when the
1451		 * fifos are enabled.
1452		 */
1453		sio_setreg(com, com_fifo, 0);
1454	}
1455	com->active_out = FALSE;
1456	wakeup(&com->active_out);
1457	wakeup(TSA_CARR_ON(tp));	/* restart any wopeners */
1458	splx(s);
1459}
1460
1461static int
1462sioread(dev, uio, flag)
1463	struct cdev *dev;
1464	struct uio	*uio;
1465	int		flag;
1466{
1467	int		mynor;
1468	struct com_s	*com;
1469
1470	mynor = minor(dev);
1471	if (mynor & CONTROL_MASK)
1472		return (ENODEV);
1473	com = com_addr(MINOR_TO_UNIT(mynor));
1474	if (com == NULL || com->gone)
1475		return (ENODEV);
1476	return (ttyld_read(com->tp, uio, flag));
1477}
1478
1479static int
1480siowrite(dev, uio, flag)
1481	struct cdev *dev;
1482	struct uio	*uio;
1483	int		flag;
1484{
1485	int		mynor;
1486	struct com_s	*com;
1487	int		unit;
1488
1489	mynor = minor(dev);
1490	if (mynor & CONTROL_MASK)
1491		return (ENODEV);
1492
1493	unit = MINOR_TO_UNIT(mynor);
1494	com = com_addr(unit);
1495	if (com == NULL || com->gone)
1496		return (ENODEV);
1497	/*
1498	 * (XXX) We disallow virtual consoles if the physical console is
1499	 * a serial port.  This is in case there is a display attached that
1500	 * is not the console.  In that situation we don't need/want the X
1501	 * server taking over the console.
1502	 */
1503	if (constty != NULL && unit == comconsole)
1504		constty = NULL;
1505	return (ttyld_write(com->tp, uio, flag));
1506}
1507
1508static void
1509siobusycheck(chan)
1510	void	*chan;
1511{
1512	struct com_s	*com;
1513	int		s;
1514
1515	com = (struct com_s *)chan;
1516
1517	/*
1518	 * Clear TS_BUSY if low-level output is complete.
1519	 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1520	 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1521	 * called again.  Reading the line status port outside of siointr1()
1522	 * is safe because CS_BUSY is clear so there are no output interrupts
1523	 * to lose.
1524	 */
1525	s = spltty();
1526	if (com->state & CS_BUSY)
1527		com->extra_state &= ~CSE_BUSYCHECK;	/* False alarm. */
1528	else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1529	    == (LSR_TSRE | LSR_TXRDY)) {
1530		com->tp->t_state &= ~TS_BUSY;
1531		ttwwakeup(com->tp);
1532		com->extra_state &= ~CSE_BUSYCHECK;
1533	} else
1534		timeout(siobusycheck, com, hz / 100);
1535	splx(s);
1536}
1537
1538static u_int
1539siodivisor(rclk, speed)
1540	u_long	rclk;
1541	speed_t	speed;
1542{
1543	long	actual_speed;
1544	u_int	divisor;
1545	int	error;
1546
1547	if (speed == 0)
1548		return (0);
1549#if UINT_MAX > (ULONG_MAX - 1) / 8
1550	if (speed > (ULONG_MAX - 1) / 8)
1551		return (0);
1552#endif
1553	divisor = (rclk / (8UL * speed) + 1) / 2;
1554	if (divisor == 0 || divisor >= 65536)
1555		return (0);
1556	actual_speed = rclk / (16UL * divisor);
1557
1558	/* 10 times error in percent: */
1559	error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2;
1560
1561	/* 3.0% maximum error tolerance: */
1562	if (error < -30 || error > 30)
1563		return (0);
1564
1565	return (divisor);
1566}
1567
1568static void
1569siodtrwakeup(chan)
1570	void	*chan;
1571{
1572	struct com_s	*com;
1573
1574	com = (struct com_s *)chan;
1575	com->state &= ~CS_DTR_OFF;
1576	wakeup(&com->dtr_wait);
1577}
1578
1579/*
1580 * Call this function with the sio_lock mutex held.  It will return with the
1581 * lock still held.
1582 */
1583static void
1584sioinput(com)
1585	struct com_s	*com;
1586{
1587	u_char		*buf;
1588	int		incc;
1589	u_char		line_status;
1590	int		recv_data;
1591	struct tty	*tp;
1592
1593	buf = com->ibuf;
1594	tp = com->tp;
1595	if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1596		com_events -= (com->iptr - com->ibuf);
1597		com->iptr = com->ibuf;
1598		return;
1599	}
1600	if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1601		/*
1602		 * Avoid the grotesquely inefficient lineswitch routine
1603		 * (ttyinput) in "raw" mode.  It usually takes about 450
1604		 * instructions (that's without canonical processing or echo!).
1605		 * slinput is reasonably fast (usually 40 instructions plus
1606		 * call overhead).
1607		 */
1608		do {
1609			/*
1610			 * This may look odd, but it is using save-and-enable
1611			 * semantics instead of the save-and-disable semantics
1612			 * that are used everywhere else.
1613			 */
1614			mtx_unlock_spin(&sio_lock);
1615			incc = com->iptr - buf;
1616			if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1617			    && (com->state & CS_RTS_IFLOW
1618				|| tp->t_iflag & IXOFF)
1619			    && !(tp->t_state & TS_TBLOCK))
1620				ttyblock(tp);
1621			com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1622				+= b_to_q((char *)buf, incc, &tp->t_rawq);
1623			buf += incc;
1624			tk_nin += incc;
1625			tk_rawcc += incc;
1626			tp->t_rawcc += incc;
1627			ttwakeup(tp);
1628			if (tp->t_state & TS_TTSTOP
1629			    && (tp->t_iflag & IXANY
1630				|| tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1631				tp->t_state &= ~TS_TTSTOP;
1632				tp->t_lflag &= ~FLUSHO;
1633				comstart(tp);
1634			}
1635			mtx_lock_spin(&sio_lock);
1636		} while (buf < com->iptr);
1637	} else {
1638		do {
1639			/*
1640			 * This may look odd, but it is using save-and-enable
1641			 * semantics instead of the save-and-disable semantics
1642			 * that are used everywhere else.
1643			 */
1644			mtx_unlock_spin(&sio_lock);
1645			line_status = buf[com->ierroff];
1646			recv_data = *buf++;
1647			if (line_status
1648			    & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1649				if (line_status & LSR_BI)
1650					recv_data |= TTY_BI;
1651				if (line_status & LSR_FE)
1652					recv_data |= TTY_FE;
1653				if (line_status & LSR_OE)
1654					recv_data |= TTY_OE;
1655				if (line_status & LSR_PE)
1656					recv_data |= TTY_PE;
1657			}
1658			ttyld_rint(tp, recv_data);
1659			mtx_lock_spin(&sio_lock);
1660		} while (buf < com->iptr);
1661	}
1662	com_events -= (com->iptr - com->ibuf);
1663	com->iptr = com->ibuf;
1664
1665	/*
1666	 * There is now room for another low-level buffer full of input,
1667	 * so enable RTS if it is now disabled and there is room in the
1668	 * high-level buffer.
1669	 */
1670	if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1671	    !(tp->t_state & TS_TBLOCK))
1672		outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1673}
1674
1675static void
1676siointr(arg)
1677	void		*arg;
1678{
1679	struct com_s	*com;
1680
1681#ifndef COM_MULTIPORT
1682	com = (struct com_s *)arg;
1683
1684	mtx_lock_spin(&sio_lock);
1685	siointr1(com);
1686	mtx_unlock_spin(&sio_lock);
1687#else /* COM_MULTIPORT */
1688	bool_t		possibly_more_intrs;
1689	int		unit;
1690
1691	/*
1692	 * Loop until there is no activity on any port.  This is necessary
1693	 * to get an interrupt edge more than to avoid another interrupt.
1694	 * If the IRQ signal is just an OR of the IRQ signals from several
1695	 * devices, then the edge from one may be lost because another is
1696	 * on.
1697	 */
1698	mtx_lock_spin(&sio_lock);
1699	do {
1700		possibly_more_intrs = FALSE;
1701		for (unit = 0; unit < sio_numunits; ++unit) {
1702			com = com_addr(unit);
1703			/*
1704			 * XXX COM_LOCK();
1705			 * would it work here, or be counter-productive?
1706			 */
1707			if (com != NULL
1708			    && !com->gone
1709			    && (inb(com->int_id_port) & IIR_IMASK)
1710			       != IIR_NOPEND) {
1711				siointr1(com);
1712				possibly_more_intrs = TRUE;
1713			}
1714			/* XXX COM_UNLOCK(); */
1715		}
1716	} while (possibly_more_intrs);
1717	mtx_unlock_spin(&sio_lock);
1718#endif /* COM_MULTIPORT */
1719}
1720
1721static struct timespec siots[8];
1722static int siotso;
1723static int volatile siotsunit = -1;
1724
1725static int
1726sysctl_siots(SYSCTL_HANDLER_ARGS)
1727{
1728	char buf[128];
1729	long long delta;
1730	size_t len;
1731	int error, i, tso;
1732
1733	for (i = 1, tso = siotso; i < tso; i++) {
1734		delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) *
1735		    1000000000 +
1736		    (siots[i].tv_nsec - siots[i - 1].tv_nsec);
1737		len = sprintf(buf, "%lld\n", delta);
1738		if (delta >= 110000)
1739			len += sprintf(buf + len - 1, ": *** %ld.%09ld\n",
1740			    (long)siots[i].tv_sec, siots[i].tv_nsec) - 1;
1741		if (i == tso - 1)
1742			buf[len - 1] = '\0';
1743		error = SYSCTL_OUT(req, buf, len);
1744		if (error != 0)
1745			return (error);
1746		uio_yield();
1747	}
1748	return (0);
1749}
1750
1751SYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD,
1752    0, 0, sysctl_siots, "A", "sio timestamps");
1753
1754static void
1755siointr1(com)
1756	struct com_s	*com;
1757{
1758	u_char	int_ctl;
1759	u_char	int_ctl_new;
1760	u_char	line_status;
1761	u_char	modem_status;
1762	u_char	*ioptr;
1763	u_char	recv_data;
1764
1765	if (COM_IIR_TXRDYBUG(com->flags)) {
1766		int_ctl = inb(com->int_ctl_port);
1767		int_ctl_new = int_ctl;
1768	} else {
1769		int_ctl = 0;
1770		int_ctl_new = 0;
1771	}
1772
1773	while (!com->gone) {
1774		if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1775			modem_status = inb(com->modem_status_port);
1776		        if ((modem_status ^ com->last_modem_status) &
1777			    com->pps_bit) {
1778				pps_capture(&com->pps);
1779				pps_event(&com->pps,
1780				    (modem_status & com->pps_bit) ?
1781				    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1782			}
1783		}
1784		line_status = inb(com->line_status_port);
1785
1786		/* input event? (check first to help avoid overruns) */
1787		while (line_status & LSR_RCV_MASK) {
1788			/* break/unnattached error bits or real input? */
1789			if (!(line_status & LSR_RXRDY))
1790				recv_data = 0;
1791			else
1792				recv_data = inb(com->data_port);
1793#ifdef DDB
1794#ifdef ALT_BREAK_TO_DEBUGGER
1795			if (com->unit == comconsole &&
1796			    db_alt_break(recv_data, &com->alt_brk_state) != 0)
1797				breakpoint();
1798#endif /* ALT_BREAK_TO_DEBUGGER */
1799#endif /* DDB */
1800			if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1801				/*
1802				 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1803				 * Otherwise, push the work to a higher level
1804				 * (to handle PARMRK) if we're bypassing.
1805				 * Otherwise, convert BI/FE and PE+INPCK to 0.
1806				 *
1807				 * This makes bypassing work right in the
1808				 * usual "raw" case (IGNBRK set, and IGNPAR
1809				 * and INPCK clear).
1810				 *
1811				 * Note: BI together with FE/PE means just BI.
1812				 */
1813				if (line_status & LSR_BI) {
1814#if defined(DDB) && defined(BREAK_TO_DEBUGGER)
1815					if (com->unit == comconsole) {
1816						breakpoint();
1817						goto cont;
1818					}
1819#endif
1820					if (com->tp == NULL
1821					    || com->tp->t_iflag & IGNBRK)
1822						goto cont;
1823				} else {
1824					if (com->tp == NULL
1825					    || com->tp->t_iflag & IGNPAR)
1826						goto cont;
1827				}
1828				if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1829				    && (line_status & (LSR_BI | LSR_FE)
1830					|| com->tp->t_iflag & INPCK))
1831					recv_data = 0;
1832			}
1833			++com->bytes_in;
1834			if (com->hotchar != 0 && recv_data == com->hotchar)
1835				swi_sched(sio_fast_ih, 0);
1836			ioptr = com->iptr;
1837			if (ioptr >= com->ibufend)
1838				CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1839			else {
1840				if (com->do_timestamp)
1841					microtime(&com->timestamp);
1842				++com_events;
1843				swi_sched(sio_slow_ih, SWI_DELAY);
1844#if 0 /* for testing input latency vs efficiency */
1845if (com->iptr - com->ibuf == 8)
1846	swi_sched(sio_fast_ih, 0);
1847#endif
1848				ioptr[0] = recv_data;
1849				ioptr[com->ierroff] = line_status;
1850				com->iptr = ++ioptr;
1851				if (ioptr == com->ihighwater
1852				    && com->state & CS_RTS_IFLOW)
1853					outb(com->modem_ctl_port,
1854					     com->mcr_image &= ~MCR_RTS);
1855				if (line_status & LSR_OE)
1856					CE_RECORD(com, CE_OVERRUN);
1857			}
1858cont:
1859			if (line_status & LSR_TXRDY
1860			    && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY))
1861				goto txrdy;
1862
1863			/*
1864			 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1865			 * jump from the top of the loop to here
1866			 */
1867			line_status = inb(com->line_status_port) & 0x7F;
1868		}
1869
1870		/* modem status change? (always check before doing output) */
1871		modem_status = inb(com->modem_status_port);
1872		if (modem_status != com->last_modem_status) {
1873			if (com->do_dcd_timestamp
1874			    && !(com->last_modem_status & MSR_DCD)
1875			    && modem_status & MSR_DCD)
1876				microtime(&com->dcd_timestamp);
1877
1878			/*
1879			 * Schedule high level to handle DCD changes.  Note
1880			 * that we don't use the delta bits anywhere.  Some
1881			 * UARTs mess them up, and it's easy to remember the
1882			 * previous bits and calculate the delta.
1883			 */
1884			com->last_modem_status = modem_status;
1885			if (!(com->state & CS_CHECKMSR)) {
1886				com_events += LOTS_OF_EVENTS;
1887				com->state |= CS_CHECKMSR;
1888				swi_sched(sio_fast_ih, 0);
1889			}
1890
1891			/* handle CTS change immediately for crisp flow ctl */
1892			if (com->state & CS_CTS_OFLOW) {
1893				if (modem_status & MSR_CTS)
1894					com->state |= CS_ODEVREADY;
1895				else
1896					com->state &= ~CS_ODEVREADY;
1897			}
1898		}
1899
1900txrdy:
1901		/* output queued and everything ready? */
1902		if (line_status & LSR_TXRDY
1903		    && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1904			ioptr = com->obufq.l_head;
1905			if (com->tx_fifo_size > 1 && com->unit != siotsunit) {
1906				u_int	ocount;
1907
1908				ocount = com->obufq.l_tail - ioptr;
1909				if (ocount > com->tx_fifo_size)
1910					ocount = com->tx_fifo_size;
1911				com->bytes_out += ocount;
1912				do
1913					outb(com->data_port, *ioptr++);
1914				while (--ocount != 0);
1915			} else {
1916				outb(com->data_port, *ioptr++);
1917				++com->bytes_out;
1918				if (com->unit == siotsunit
1919				    && siotso < sizeof siots / sizeof siots[0])
1920					nanouptime(&siots[siotso++]);
1921			}
1922			com->obufq.l_head = ioptr;
1923			if (COM_IIR_TXRDYBUG(com->flags))
1924				int_ctl_new = int_ctl | IER_ETXRDY;
1925			if (ioptr >= com->obufq.l_tail) {
1926				struct lbq	*qp;
1927
1928				qp = com->obufq.l_next;
1929				qp->l_queued = FALSE;
1930				qp = qp->l_next;
1931				if (qp != NULL) {
1932					com->obufq.l_head = qp->l_head;
1933					com->obufq.l_tail = qp->l_tail;
1934					com->obufq.l_next = qp;
1935				} else {
1936					/* output just completed */
1937					if (COM_IIR_TXRDYBUG(com->flags))
1938						int_ctl_new = int_ctl
1939							      & ~IER_ETXRDY;
1940					com->state &= ~CS_BUSY;
1941				}
1942				if (!(com->state & CS_ODONE)) {
1943					com_events += LOTS_OF_EVENTS;
1944					com->state |= CS_ODONE;
1945					/* handle at high level ASAP */
1946					swi_sched(sio_fast_ih, 0);
1947				}
1948			}
1949			if (COM_IIR_TXRDYBUG(com->flags)
1950			    && int_ctl != int_ctl_new)
1951				outb(com->int_ctl_port, int_ctl_new);
1952		}
1953
1954		/* finished? */
1955#ifndef COM_MULTIPORT
1956		if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
1957#endif /* COM_MULTIPORT */
1958			return;
1959	}
1960}
1961
1962static int
1963sioioctl(dev, cmd, data, flag, td)
1964	struct cdev *dev;
1965	u_long		cmd;
1966	caddr_t		data;
1967	int		flag;
1968	struct thread	*td;
1969{
1970	struct com_s	*com;
1971	int		error;
1972	int		mynor;
1973	int		s;
1974	struct tty	*tp;
1975#if defined(COMPAT_43)
1976	u_long		oldcmd;
1977	struct termios	term;
1978#endif
1979
1980	mynor = minor(dev);
1981	com = com_addr(MINOR_TO_UNIT(mynor));
1982	if (com == NULL || com->gone)
1983		return (ENODEV);
1984	if (mynor & CONTROL_MASK) {
1985		struct termios	*ct;
1986
1987		switch (mynor & CONTROL_MASK) {
1988		case CONTROL_INIT_STATE:
1989			ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
1990			break;
1991		case CONTROL_LOCK_STATE:
1992			ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
1993			break;
1994		default:
1995			return (ENODEV);	/* /dev/nodev */
1996		}
1997		switch (cmd) {
1998		case TIOCSETA:
1999			error = suser(td);
2000			if (error != 0)
2001				return (error);
2002			*ct = *(struct termios *)data;
2003			return (0);
2004		case TIOCGETA:
2005			*(struct termios *)data = *ct;
2006			return (0);
2007		case TIOCGETD:
2008			*(int *)data = TTYDISC;
2009			return (0);
2010		case TIOCGWINSZ:
2011			bzero(data, sizeof(struct winsize));
2012			return (0);
2013		default:
2014			return (ENOTTY);
2015		}
2016	}
2017	tp = com->tp;
2018#if defined(COMPAT_43)
2019	term = tp->t_termios;
2020	oldcmd = cmd;
2021	error = ttsetcompat(tp, &cmd, data, &term);
2022	if (error != 0)
2023		return (error);
2024	if (cmd != oldcmd)
2025		data = (caddr_t)&term;
2026#endif
2027	if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
2028		int	cc;
2029		struct termios *dt = (struct termios *)data;
2030		struct termios *lt = mynor & CALLOUT_MASK
2031				     ? &com->lt_out : &com->lt_in;
2032
2033		dt->c_iflag = (tp->t_iflag & lt->c_iflag)
2034			      | (dt->c_iflag & ~lt->c_iflag);
2035		dt->c_oflag = (tp->t_oflag & lt->c_oflag)
2036			      | (dt->c_oflag & ~lt->c_oflag);
2037		dt->c_cflag = (tp->t_cflag & lt->c_cflag)
2038			      | (dt->c_cflag & ~lt->c_cflag);
2039		dt->c_lflag = (tp->t_lflag & lt->c_lflag)
2040			      | (dt->c_lflag & ~lt->c_lflag);
2041		for (cc = 0; cc < NCCS; ++cc)
2042			if (lt->c_cc[cc] != 0)
2043				dt->c_cc[cc] = tp->t_cc[cc];
2044		if (lt->c_ispeed != 0)
2045			dt->c_ispeed = tp->t_ispeed;
2046		if (lt->c_ospeed != 0)
2047			dt->c_ospeed = tp->t_ospeed;
2048	}
2049	error = ttyioctl(dev, cmd, data, flag, td);
2050	com->hotchar = ttyldoptim(tp);
2051	if (error != ENOTTY)
2052		return (error);
2053	s = spltty();
2054	switch (cmd) {
2055	case TIOCSBRK:
2056		sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
2057		break;
2058	case TIOCCBRK:
2059		sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
2060		break;
2061	case TIOCSDTR:
2062		(void)commctl(com, TIOCM_DTR, DMBIS);
2063		break;
2064	case TIOCCDTR:
2065		(void)commctl(com, TIOCM_DTR, DMBIC);
2066		break;
2067	/*
2068	 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set.  The
2069	 * changes get undone on the next call to comparam().
2070	 */
2071	case TIOCMSET:
2072		(void)commctl(com, *(int *)data, DMSET);
2073		break;
2074	case TIOCMBIS:
2075		(void)commctl(com, *(int *)data, DMBIS);
2076		break;
2077	case TIOCMBIC:
2078		(void)commctl(com, *(int *)data, DMBIC);
2079		break;
2080	case TIOCMGET:
2081		*(int *)data = commctl(com, 0, DMGET);
2082		break;
2083	case TIOCMSDTRWAIT:
2084		/* must be root since the wait applies to following logins */
2085		error = suser(td);
2086		if (error != 0) {
2087			splx(s);
2088			return (error);
2089		}
2090		com->dtr_wait = *(int *)data * hz / 100;
2091		break;
2092	case TIOCMGDTRWAIT:
2093		*(int *)data = com->dtr_wait * 100 / hz;
2094		break;
2095	case TIOCTIMESTAMP:
2096		com->do_timestamp = TRUE;
2097		*(struct timeval *)data = com->timestamp;
2098		break;
2099	case TIOCDCDTIMESTAMP:
2100		com->do_dcd_timestamp = TRUE;
2101		*(struct timeval *)data = com->dcd_timestamp;
2102		break;
2103	default:
2104		splx(s);
2105		error = pps_ioctl(cmd, data, &com->pps);
2106		if (error == ENODEV)
2107			error = ENOTTY;
2108		return (error);
2109	}
2110	splx(s);
2111	return (0);
2112}
2113
2114/* software interrupt handler for SWI_TTY */
2115static void
2116siopoll(void *dummy)
2117{
2118	int		unit;
2119
2120	if (com_events == 0)
2121		return;
2122repeat:
2123	for (unit = 0; unit < sio_numunits; ++unit) {
2124		struct com_s	*com;
2125		int		incc;
2126		struct tty	*tp;
2127
2128		com = com_addr(unit);
2129		if (com == NULL)
2130			continue;
2131		tp = com->tp;
2132		if (tp == NULL || com->gone) {
2133			/*
2134			 * Discard any events related to never-opened or
2135			 * going-away devices.
2136			 */
2137			mtx_lock_spin(&sio_lock);
2138			incc = com->iptr - com->ibuf;
2139			com->iptr = com->ibuf;
2140			if (com->state & CS_CHECKMSR) {
2141				incc += LOTS_OF_EVENTS;
2142				com->state &= ~CS_CHECKMSR;
2143			}
2144			com_events -= incc;
2145			mtx_unlock_spin(&sio_lock);
2146			continue;
2147		}
2148		if (com->iptr != com->ibuf) {
2149			mtx_lock_spin(&sio_lock);
2150			sioinput(com);
2151			mtx_unlock_spin(&sio_lock);
2152		}
2153		if (com->state & CS_CHECKMSR) {
2154			u_char	delta_modem_status;
2155
2156			mtx_lock_spin(&sio_lock);
2157			delta_modem_status = com->last_modem_status
2158					     ^ com->prev_modem_status;
2159			com->prev_modem_status = com->last_modem_status;
2160			com_events -= LOTS_OF_EVENTS;
2161			com->state &= ~CS_CHECKMSR;
2162			mtx_unlock_spin(&sio_lock);
2163			if (delta_modem_status & MSR_DCD)
2164				ttyld_modem(tp,
2165				    com->prev_modem_status & MSR_DCD);
2166		}
2167		if (com->state & CS_ODONE) {
2168			mtx_lock_spin(&sio_lock);
2169			com_events -= LOTS_OF_EVENTS;
2170			com->state &= ~CS_ODONE;
2171			mtx_unlock_spin(&sio_lock);
2172			if (!(com->state & CS_BUSY)
2173			    && !(com->extra_state & CSE_BUSYCHECK)) {
2174				timeout(siobusycheck, com, hz / 100);
2175				com->extra_state |= CSE_BUSYCHECK;
2176			}
2177			ttyld_start(tp);
2178		}
2179		if (com_events == 0)
2180			break;
2181	}
2182	if (com_events >= LOTS_OF_EVENTS)
2183		goto repeat;
2184}
2185
2186static int
2187comparam(tp, t)
2188	struct tty	*tp;
2189	struct termios	*t;
2190{
2191	u_int		cfcr;
2192	int		cflag;
2193	struct com_s	*com;
2194	u_int		divisor;
2195	u_char		dlbh;
2196	u_char		dlbl;
2197	u_char		efr_flowbits;
2198	int		s;
2199	int		unit;
2200
2201	unit = DEV_TO_UNIT(tp->t_dev);
2202	com = com_addr(unit);
2203	if (com == NULL)
2204		return (ENODEV);
2205
2206	/* check requested parameters */
2207	if (t->c_ispeed != (t->c_ospeed != 0 ? t->c_ospeed : tp->t_ospeed))
2208		return (EINVAL);
2209	divisor = siodivisor(com->rclk, t->c_ispeed);
2210	if (divisor == 0)
2211		return (EINVAL);
2212
2213	/* parameters are OK, convert them to the com struct and the device */
2214	s = spltty();
2215	if (t->c_ospeed == 0)
2216		(void)commctl(com, TIOCM_DTR, DMBIC);	/* hang up line */
2217	else
2218		(void)commctl(com, TIOCM_DTR, DMBIS);
2219	cflag = t->c_cflag;
2220	switch (cflag & CSIZE) {
2221	case CS5:
2222		cfcr = CFCR_5BITS;
2223		break;
2224	case CS6:
2225		cfcr = CFCR_6BITS;
2226		break;
2227	case CS7:
2228		cfcr = CFCR_7BITS;
2229		break;
2230	default:
2231		cfcr = CFCR_8BITS;
2232		break;
2233	}
2234	if (cflag & PARENB) {
2235		cfcr |= CFCR_PENAB;
2236		if (!(cflag & PARODD))
2237			cfcr |= CFCR_PEVEN;
2238	}
2239	if (cflag & CSTOPB)
2240		cfcr |= CFCR_STOPB;
2241
2242	if (com->hasfifo) {
2243		/*
2244		 * Use a fifo trigger level low enough so that the input
2245		 * latency from the fifo is less than about 16 msec and
2246		 * the total latency is less than about 30 msec.  These
2247		 * latencies are reasonable for humans.  Serial comms
2248		 * protocols shouldn't expect anything better since modem
2249		 * latencies are larger.
2250		 *
2251		 * The fifo trigger level cannot be set at RX_HIGH for high
2252		 * speed connections without further work on reducing
2253		 * interrupt disablement times in other parts of the system,
2254		 * without producing silo overflow errors.
2255		 */
2256		com->fifo_image = com->unit == siotsunit ? 0
2257				  : t->c_ispeed <= 4800
2258				  ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH;
2259#ifdef COM_ESP
2260		/*
2261		 * The Hayes ESP card needs the fifo DMA mode bit set
2262		 * in compatibility mode.  If not, it will interrupt
2263		 * for each character received.
2264		 */
2265		if (com->esp)
2266			com->fifo_image |= FIFO_DMA_MODE;
2267#endif
2268		sio_setreg(com, com_fifo, com->fifo_image);
2269	}
2270
2271	/*
2272	 * This returns with interrupts disabled so that we can complete
2273	 * the speed change atomically.  Keeping interrupts disabled is
2274	 * especially important while com_data is hidden.
2275	 */
2276	(void) siosetwater(com, t->c_ispeed);
2277
2278	sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
2279	/*
2280	 * Only set the divisor registers if they would change, since on
2281	 * some 16550 incompatibles (UMC8669F), setting them while input
2282	 * is arriving loses sync until data stops arriving.
2283	 */
2284	dlbl = divisor & 0xFF;
2285	if (sio_getreg(com, com_dlbl) != dlbl)
2286		sio_setreg(com, com_dlbl, dlbl);
2287	dlbh = divisor >> 8;
2288	if (sio_getreg(com, com_dlbh) != dlbh)
2289		sio_setreg(com, com_dlbh, dlbh);
2290
2291	efr_flowbits = 0;
2292
2293	if (cflag & CRTS_IFLOW) {
2294		com->state |= CS_RTS_IFLOW;
2295		efr_flowbits |= EFR_AUTORTS;
2296		/*
2297		 * If CS_RTS_IFLOW just changed from off to on, the change
2298		 * needs to be propagated to MCR_RTS.  This isn't urgent,
2299		 * so do it later by calling comstart() instead of repeating
2300		 * a lot of code from comstart() here.
2301		 */
2302	} else if (com->state & CS_RTS_IFLOW) {
2303		com->state &= ~CS_RTS_IFLOW;
2304		/*
2305		 * CS_RTS_IFLOW just changed from on to off.  Force MCR_RTS
2306		 * on here, since comstart() won't do it later.
2307		 */
2308		outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2309	}
2310
2311	/*
2312	 * Set up state to handle output flow control.
2313	 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2314	 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2315	 */
2316	com->state |= CS_ODEVREADY;
2317	com->state &= ~CS_CTS_OFLOW;
2318	if (cflag & CCTS_OFLOW) {
2319		com->state |= CS_CTS_OFLOW;
2320		efr_flowbits |= EFR_AUTOCTS;
2321		if (!(com->last_modem_status & MSR_CTS))
2322			com->state &= ~CS_ODEVREADY;
2323	}
2324
2325	if (com->st16650a) {
2326		sio_setreg(com, com_lcr, LCR_EFR_ENABLE);
2327		sio_setreg(com, com_efr,
2328			   (sio_getreg(com, com_efr)
2329			    & ~(EFR_AUTOCTS | EFR_AUTORTS)) | efr_flowbits);
2330	}
2331	sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
2332
2333	/* XXX shouldn't call functions while intrs are disabled. */
2334	com->hotchar = ttyldoptim(tp);
2335
2336	mtx_unlock_spin(&sio_lock);
2337	splx(s);
2338	comstart(tp);
2339	if (com->ibufold != NULL) {
2340		free(com->ibufold, M_DEVBUF);
2341		com->ibufold = NULL;
2342	}
2343	return (0);
2344}
2345
2346/*
2347 * This function must be called with the sio_lock mutex released and will
2348 * return with it obtained.
2349 */
2350static int
2351siosetwater(com, speed)
2352	struct com_s	*com;
2353	speed_t		speed;
2354{
2355	int		cp4ticks;
2356	u_char		*ibuf;
2357	int		ibufsize;
2358	struct tty	*tp;
2359
2360	/*
2361	 * Make the buffer size large enough to handle a softtty interrupt
2362	 * latency of about 2 ticks without loss of throughput or data
2363	 * (about 3 ticks if input flow control is not used or not honoured,
2364	 * but a bit less for CS5-CS7 modes).
2365	 */
2366	cp4ticks = speed / 10 / hz * 4;
2367	for (ibufsize = 128; ibufsize < cp4ticks;)
2368		ibufsize <<= 1;
2369	if (ibufsize == com->ibufsize) {
2370		mtx_lock_spin(&sio_lock);
2371		return (0);
2372	}
2373
2374	/*
2375	 * Allocate input buffer.  The extra factor of 2 in the size is
2376	 * to allow for an error byte for each input byte.
2377	 */
2378	ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
2379	if (ibuf == NULL) {
2380		mtx_lock_spin(&sio_lock);
2381		return (ENOMEM);
2382	}
2383
2384	/* Initialize non-critical variables. */
2385	com->ibufold = com->ibuf;
2386	com->ibufsize = ibufsize;
2387	tp = com->tp;
2388	if (tp != NULL) {
2389		tp->t_ififosize = 2 * ibufsize;
2390		tp->t_ispeedwat = (speed_t)-1;
2391		tp->t_ospeedwat = (speed_t)-1;
2392	}
2393
2394	/*
2395	 * Read current input buffer, if any.  Continue with interrupts
2396	 * disabled.
2397	 */
2398	mtx_lock_spin(&sio_lock);
2399	if (com->iptr != com->ibuf)
2400		sioinput(com);
2401
2402	/*-
2403	 * Initialize critical variables, including input buffer watermarks.
2404	 * The external device is asked to stop sending when the buffer
2405	 * exactly reaches high water, or when the high level requests it.
2406	 * The high level is notified immediately (rather than at a later
2407	 * clock tick) when this watermark is reached.
2408	 * The buffer size is chosen so the watermark should almost never
2409	 * be reached.
2410	 * The low watermark is invisibly 0 since the buffer is always
2411	 * emptied all at once.
2412	 */
2413	com->iptr = com->ibuf = ibuf;
2414	com->ibufend = ibuf + ibufsize;
2415	com->ierroff = ibufsize;
2416	com->ihighwater = ibuf + 3 * ibufsize / 4;
2417	return (0);
2418}
2419
2420static void
2421comstart(tp)
2422	struct tty	*tp;
2423{
2424	struct com_s	*com;
2425	int		s;
2426	int		unit;
2427
2428	unit = DEV_TO_UNIT(tp->t_dev);
2429	com = com_addr(unit);
2430	if (com == NULL)
2431		return;
2432	s = spltty();
2433	mtx_lock_spin(&sio_lock);
2434	if (tp->t_state & TS_TTSTOP)
2435		com->state &= ~CS_TTGO;
2436	else
2437		com->state |= CS_TTGO;
2438	if (tp->t_state & TS_TBLOCK) {
2439		if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2440			outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2441	} else {
2442		if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2443		    && com->state & CS_RTS_IFLOW)
2444			outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2445	}
2446	mtx_unlock_spin(&sio_lock);
2447	if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2448		ttwwakeup(tp);
2449		splx(s);
2450		return;
2451	}
2452	if (tp->t_outq.c_cc != 0) {
2453		struct lbq	*qp;
2454		struct lbq	*next;
2455
2456		if (!com->obufs[0].l_queued) {
2457			com->obufs[0].l_tail
2458			    = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2459						  sizeof com->obuf1);
2460			com->obufs[0].l_next = NULL;
2461			com->obufs[0].l_queued = TRUE;
2462			mtx_lock_spin(&sio_lock);
2463			if (com->state & CS_BUSY) {
2464				qp = com->obufq.l_next;
2465				while ((next = qp->l_next) != NULL)
2466					qp = next;
2467				qp->l_next = &com->obufs[0];
2468			} else {
2469				com->obufq.l_head = com->obufs[0].l_head;
2470				com->obufq.l_tail = com->obufs[0].l_tail;
2471				com->obufq.l_next = &com->obufs[0];
2472				com->state |= CS_BUSY;
2473			}
2474			mtx_unlock_spin(&sio_lock);
2475		}
2476		if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2477			com->obufs[1].l_tail
2478			    = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2479						  sizeof com->obuf2);
2480			com->obufs[1].l_next = NULL;
2481			com->obufs[1].l_queued = TRUE;
2482			mtx_lock_spin(&sio_lock);
2483			if (com->state & CS_BUSY) {
2484				qp = com->obufq.l_next;
2485				while ((next = qp->l_next) != NULL)
2486					qp = next;
2487				qp->l_next = &com->obufs[1];
2488			} else {
2489				com->obufq.l_head = com->obufs[1].l_head;
2490				com->obufq.l_tail = com->obufs[1].l_tail;
2491				com->obufq.l_next = &com->obufs[1];
2492				com->state |= CS_BUSY;
2493			}
2494			mtx_unlock_spin(&sio_lock);
2495		}
2496		tp->t_state |= TS_BUSY;
2497	}
2498	mtx_lock_spin(&sio_lock);
2499	if (com->state >= (CS_BUSY | CS_TTGO))
2500		siointr1(com);	/* fake interrupt to start output */
2501	mtx_unlock_spin(&sio_lock);
2502	ttwwakeup(tp);
2503	splx(s);
2504}
2505
2506static void
2507comstop(tp, rw)
2508	struct tty	*tp;
2509	int		rw;
2510{
2511	struct com_s	*com;
2512
2513	com = com_addr(DEV_TO_UNIT(tp->t_dev));
2514	if (com == NULL || com->gone)
2515		return;
2516	mtx_lock_spin(&sio_lock);
2517	if (rw & FWRITE) {
2518		if (com->hasfifo)
2519#ifdef COM_ESP
2520		    /* XXX avoid h/w bug. */
2521		    if (!com->esp)
2522#endif
2523			sio_setreg(com, com_fifo,
2524				   FIFO_XMT_RST | com->fifo_image);
2525		com->obufs[0].l_queued = FALSE;
2526		com->obufs[1].l_queued = FALSE;
2527		if (com->state & CS_ODONE)
2528			com_events -= LOTS_OF_EVENTS;
2529		com->state &= ~(CS_ODONE | CS_BUSY);
2530		com->tp->t_state &= ~TS_BUSY;
2531	}
2532	if (rw & FREAD) {
2533		if (com->hasfifo)
2534#ifdef COM_ESP
2535		    /* XXX avoid h/w bug. */
2536		    if (!com->esp)
2537#endif
2538			sio_setreg(com, com_fifo,
2539				   FIFO_RCV_RST | com->fifo_image);
2540		com_events -= (com->iptr - com->ibuf);
2541		com->iptr = com->ibuf;
2542	}
2543	mtx_unlock_spin(&sio_lock);
2544	comstart(tp);
2545}
2546
2547static int
2548commctl(com, bits, how)
2549	struct com_s	*com;
2550	int		bits;
2551	int		how;
2552{
2553	int	mcr;
2554	int	msr;
2555
2556	if (how == DMGET) {
2557		bits = TIOCM_LE;	/* XXX - always enabled while open */
2558		mcr = com->mcr_image;
2559		if (mcr & MCR_DTR)
2560			bits |= TIOCM_DTR;
2561		if (mcr & MCR_RTS)
2562			bits |= TIOCM_RTS;
2563		msr = com->prev_modem_status;
2564		if (msr & MSR_CTS)
2565			bits |= TIOCM_CTS;
2566		if (msr & MSR_DCD)
2567			bits |= TIOCM_CD;
2568		if (msr & MSR_DSR)
2569			bits |= TIOCM_DSR;
2570		/*
2571		 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI
2572		 * more volatile by reading the modem status a lot.  Perhaps
2573		 * we should latch both bits until the status is read here.
2574		 */
2575		if (msr & (MSR_RI | MSR_TERI))
2576			bits |= TIOCM_RI;
2577		return (bits);
2578	}
2579	mcr = 0;
2580	if (bits & TIOCM_DTR)
2581		mcr |= MCR_DTR;
2582	if (bits & TIOCM_RTS)
2583		mcr |= MCR_RTS;
2584	if (com->gone)
2585		return(0);
2586	mtx_lock_spin(&sio_lock);
2587	switch (how) {
2588	case DMSET:
2589		outb(com->modem_ctl_port,
2590		     com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE));
2591		break;
2592	case DMBIS:
2593		outb(com->modem_ctl_port, com->mcr_image |= mcr);
2594		break;
2595	case DMBIC:
2596		outb(com->modem_ctl_port, com->mcr_image &= ~mcr);
2597		break;
2598	}
2599	mtx_unlock_spin(&sio_lock);
2600	return (0);
2601}
2602
2603static void
2604siosettimeout()
2605{
2606	struct com_s	*com;
2607	bool_t		someopen;
2608	int		unit;
2609
2610	/*
2611	 * Set our timeout period to 1 second if no polled devices are open.
2612	 * Otherwise set it to max(1/200, 1/hz).
2613	 * Enable timeouts iff some device is open.
2614	 */
2615	untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2616	sio_timeout = hz;
2617	someopen = FALSE;
2618	for (unit = 0; unit < sio_numunits; ++unit) {
2619		com = com_addr(unit);
2620		if (com != NULL && com->tp != NULL
2621		    && com->tp->t_state & TS_ISOPEN && !com->gone) {
2622			someopen = TRUE;
2623			if (com->poll || com->poll_output) {
2624				sio_timeout = hz > 200 ? hz / 200 : 1;
2625				break;
2626			}
2627		}
2628	}
2629	if (someopen) {
2630		sio_timeouts_until_log = hz / sio_timeout;
2631		sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2632					     sio_timeout);
2633	} else {
2634		/* Flush error messages, if any. */
2635		sio_timeouts_until_log = 1;
2636		comwakeup((void *)NULL);
2637		untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2638	}
2639}
2640
2641static void
2642comwakeup(chan)
2643	void	*chan;
2644{
2645	struct com_s	*com;
2646	int		unit;
2647
2648	sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2649
2650	/*
2651	 * Recover from lost output interrupts.
2652	 * Poll any lines that don't use interrupts.
2653	 */
2654	for (unit = 0; unit < sio_numunits; ++unit) {
2655		com = com_addr(unit);
2656		if (com != NULL && !com->gone
2657		    && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2658			mtx_lock_spin(&sio_lock);
2659			siointr1(com);
2660			mtx_unlock_spin(&sio_lock);
2661		}
2662	}
2663
2664	/*
2665	 * Check for and log errors, but not too often.
2666	 */
2667	if (--sio_timeouts_until_log > 0)
2668		return;
2669	sio_timeouts_until_log = hz / sio_timeout;
2670	for (unit = 0; unit < sio_numunits; ++unit) {
2671		int	errnum;
2672
2673		com = com_addr(unit);
2674		if (com == NULL)
2675			continue;
2676		if (com->gone)
2677			continue;
2678		for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2679			u_int	delta;
2680			u_long	total;
2681
2682			mtx_lock_spin(&sio_lock);
2683			delta = com->delta_error_counts[errnum];
2684			com->delta_error_counts[errnum] = 0;
2685			mtx_unlock_spin(&sio_lock);
2686			if (delta == 0)
2687				continue;
2688			total = com->error_counts[errnum] += delta;
2689			log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2690			    unit, delta, error_desc[errnum],
2691			    delta == 1 ? "" : "s", total);
2692		}
2693	}
2694}
2695
2696/*
2697 * Following are all routines needed for SIO to act as console
2698 */
2699struct siocnstate {
2700	u_char	dlbl;
2701	u_char	dlbh;
2702	u_char	ier;
2703	u_char	cfcr;
2704	u_char	mcr;
2705};
2706
2707/*
2708 * This is a function in order to not replicate "ttyd%d" more
2709 * places than absolutely necessary.
2710 */
2711static void
2712siocnset(struct consdev *cd, int unit)
2713{
2714
2715	cd->cn_unit = unit;
2716	sprintf(cd->cn_name, "ttyd%d", unit);
2717}
2718
2719#ifndef __alpha__
2720static speed_t siocngetspeed(Port_t, u_long rclk);
2721#endif
2722static void siocnclose(struct siocnstate *sp, Port_t iobase);
2723static void siocnopen(struct siocnstate *sp, Port_t iobase, int speed);
2724static void siocntxwait(Port_t iobase);
2725
2726#ifdef __alpha__
2727int siocnattach(int port, int speed);
2728int siogdbattach(int port, int speed);
2729int siogdbgetc(void);
2730void siogdbputc(int c);
2731#else
2732static cn_probe_t siocnprobe;
2733static cn_init_t siocninit;
2734static cn_term_t siocnterm;
2735#endif
2736static cn_checkc_t siocncheckc;
2737static cn_getc_t siocngetc;
2738static cn_putc_t siocnputc;
2739
2740#ifndef __alpha__
2741CONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc,
2742	    siocnputc, NULL);
2743#endif
2744
2745#if DDB > 0
2746static struct consdev gdbconsdev;
2747#endif
2748
2749static void
2750siocntxwait(iobase)
2751	Port_t	iobase;
2752{
2753	int	timo;
2754
2755	/*
2756	 * Wait for any pending transmission to finish.  Required to avoid
2757	 * the UART lockup bug when the speed is changed, and for normal
2758	 * transmits.
2759	 */
2760	timo = 100000;
2761	while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2762	       != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2763		;
2764}
2765
2766#ifndef __alpha__
2767
2768/*
2769 * Read the serial port specified and try to figure out what speed
2770 * it's currently running at.  We're assuming the serial port has
2771 * been initialized and is basicly idle.  This routine is only intended
2772 * to be run at system startup.
2773 *
2774 * If the value read from the serial port doesn't make sense, return 0.
2775 */
2776
2777static speed_t
2778siocngetspeed(iobase, rclk)
2779	Port_t	iobase;
2780	u_long	rclk;
2781{
2782	u_int	divisor;
2783	u_char	dlbh;
2784	u_char	dlbl;
2785	u_char  cfcr;
2786
2787	cfcr = inb(iobase + com_cfcr);
2788	outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2789
2790	dlbl = inb(iobase + com_dlbl);
2791	dlbh = inb(iobase + com_dlbh);
2792
2793	outb(iobase + com_cfcr, cfcr);
2794
2795	divisor = dlbh << 8 | dlbl;
2796
2797	/* XXX there should be more sanity checking. */
2798	if (divisor == 0)
2799		return (CONSPEED);
2800	return (rclk / (16UL * divisor));
2801}
2802
2803#endif
2804
2805static void
2806siocnopen(sp, iobase, speed)
2807	struct siocnstate	*sp;
2808	Port_t			iobase;
2809	int			speed;
2810{
2811	u_int	divisor;
2812	u_char	dlbh;
2813	u_char	dlbl;
2814
2815	/*
2816	 * Save all the device control registers except the fifo register
2817	 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2818	 * We can't save the fifo register since it is read-only.
2819	 */
2820	sp->ier = inb(iobase + com_ier);
2821	outb(iobase + com_ier, 0);	/* spltty() doesn't stop siointr() */
2822	siocntxwait(iobase);
2823	sp->cfcr = inb(iobase + com_cfcr);
2824	outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2825	sp->dlbl = inb(iobase + com_dlbl);
2826	sp->dlbh = inb(iobase + com_dlbh);
2827	/*
2828	 * Only set the divisor registers if they would change, since on
2829	 * some 16550 incompatibles (Startech), setting them clears the
2830	 * data input register.  This also reduces the effects of the
2831	 * UMC8669F bug.
2832	 */
2833	divisor = siodivisor(comdefaultrclk, speed);
2834	dlbl = divisor & 0xFF;
2835	if (sp->dlbl != dlbl)
2836		outb(iobase + com_dlbl, dlbl);
2837	dlbh = divisor >> 8;
2838	if (sp->dlbh != dlbh)
2839		outb(iobase + com_dlbh, dlbh);
2840	outb(iobase + com_cfcr, CFCR_8BITS);
2841	sp->mcr = inb(iobase + com_mcr);
2842	/*
2843	 * We don't want interrupts, but must be careful not to "disable"
2844	 * them by clearing the MCR_IENABLE bit, since that might cause
2845	 * an interrupt by floating the IRQ line.
2846	 */
2847	outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
2848}
2849
2850static void
2851siocnclose(sp, iobase)
2852	struct siocnstate	*sp;
2853	Port_t			iobase;
2854{
2855	/*
2856	 * Restore the device control registers.
2857	 */
2858	siocntxwait(iobase);
2859	outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2860	if (sp->dlbl != inb(iobase + com_dlbl))
2861		outb(iobase + com_dlbl, sp->dlbl);
2862	if (sp->dlbh != inb(iobase + com_dlbh))
2863		outb(iobase + com_dlbh, sp->dlbh);
2864	outb(iobase + com_cfcr, sp->cfcr);
2865	/*
2866	 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2867	 */
2868	outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
2869	outb(iobase + com_ier, sp->ier);
2870}
2871
2872#ifndef __alpha__
2873
2874static void
2875siocnprobe(cp)
2876	struct consdev	*cp;
2877{
2878	speed_t			boot_speed;
2879	u_char			cfcr;
2880	u_int			divisor;
2881	int			s, unit;
2882	struct siocnstate	sp;
2883
2884	/*
2885	 * Find our first enabled console, if any.  If it is a high-level
2886	 * console device, then initialize it and return successfully.
2887	 * If it is a low-level console device, then initialize it and
2888	 * return unsuccessfully.  It must be initialized in both cases
2889	 * for early use by console drivers and debuggers.  Initializing
2890	 * the hardware is not necessary in all cases, since the i/o
2891	 * routines initialize it on the fly, but it is necessary if
2892	 * input might arrive while the hardware is switched back to an
2893	 * uninitialized state.  We can't handle multiple console devices
2894	 * yet because our low-level routines don't take a device arg.
2895	 * We trust the user to set the console flags properly so that we
2896	 * don't need to probe.
2897	 */
2898	cp->cn_pri = CN_DEAD;
2899
2900	for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
2901		int flags;
2902
2903		if (resource_disabled("sio", unit))
2904			continue;
2905		if (resource_int_value("sio", unit, "flags", &flags))
2906			continue;
2907		if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
2908			int port;
2909			Port_t iobase;
2910
2911			if (resource_int_value("sio", unit, "port", &port))
2912				continue;
2913			iobase = port;
2914			s = spltty();
2915			if (boothowto & RB_SERIAL) {
2916				boot_speed =
2917				    siocngetspeed(iobase, comdefaultrclk);
2918				if (boot_speed)
2919					comdefaultrate = boot_speed;
2920			}
2921
2922			/*
2923			 * Initialize the divisor latch.  We can't rely on
2924			 * siocnopen() to do this the first time, since it
2925			 * avoids writing to the latch if the latch appears
2926			 * to have the correct value.  Also, if we didn't
2927			 * just read the speed from the hardware, then we
2928			 * need to set the speed in hardware so that
2929			 * switching it later is null.
2930			 */
2931			cfcr = inb(iobase + com_cfcr);
2932			outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2933			divisor = siodivisor(comdefaultrclk, comdefaultrate);
2934			outb(iobase + com_dlbl, divisor & 0xff);
2935			outb(iobase + com_dlbh, divisor >> 8);
2936			outb(iobase + com_cfcr, cfcr);
2937
2938			siocnopen(&sp, iobase, comdefaultrate);
2939
2940			splx(s);
2941			if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
2942				siocnset(cp, unit);
2943				cp->cn_pri = COM_FORCECONSOLE(flags)
2944					     || boothowto & RB_SERIAL
2945					     ? CN_REMOTE : CN_NORMAL;
2946				siocniobase = iobase;
2947				siocnunit = unit;
2948			}
2949			if (COM_DEBUGGER(flags)) {
2950				printf("sio%d: gdb debugging port\n", unit);
2951				siogdbiobase = iobase;
2952				siogdbunit = unit;
2953#if DDB > 0
2954				siocnset(&gdbconsdev, unit);
2955				gdb_arg = &gdbconsdev;
2956				gdb_getc = siocngetc;
2957				gdb_putc = siocnputc;
2958#endif
2959			}
2960		}
2961	}
2962#ifdef	__i386__
2963#if DDB > 0
2964	/*
2965	 * XXX Ugly Compatability.
2966	 * If no gdb port has been specified, set it to be the console
2967	 * as some configuration files don't specify the gdb port.
2968	 */
2969	if (gdb_arg == NULL && (boothowto & RB_GDB)) {
2970		printf("Warning: no GDB port specified. Defaulting to sio%d.\n",
2971			siocnunit);
2972		printf("Set flag 0x80 on desired GDB port in your\n");
2973		printf("configuration file (currently sio only).\n");
2974		siogdbiobase = siocniobase;
2975		siogdbunit = siocnunit;
2976		siocnset(&gdbconsdev, siocnunit);
2977		gdb_arg = &gdbconsdev;
2978		gdb_getc = siocngetc;
2979		gdb_putc = siocnputc;
2980	}
2981#endif
2982#endif
2983}
2984
2985static void
2986siocninit(cp)
2987	struct consdev	*cp;
2988{
2989	comconsole = cp->cn_unit;
2990}
2991
2992static void
2993siocnterm(cp)
2994	struct consdev	*cp;
2995{
2996	comconsole = -1;
2997}
2998
2999#endif
3000
3001#ifdef __alpha__
3002
3003CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL);
3004
3005int
3006siocnattach(port, speed)
3007	int port;
3008	int speed;
3009{
3010	int			s;
3011	u_char			cfcr;
3012	u_int			divisor;
3013	struct siocnstate	sp;
3014	int			unit = 0;	/* XXX random value! */
3015
3016	siocniobase = port;
3017	siocnunit = unit;
3018	comdefaultrate = speed;
3019	sio_consdev.cn_pri = CN_NORMAL;
3020	siocnset(&sio_consdev, unit);
3021
3022	s = spltty();
3023
3024	/*
3025	 * Initialize the divisor latch.  We can't rely on
3026	 * siocnopen() to do this the first time, since it
3027	 * avoids writing to the latch if the latch appears
3028	 * to have the correct value.  Also, if we didn't
3029	 * just read the speed from the hardware, then we
3030	 * need to set the speed in hardware so that
3031	 * switching it later is null.
3032	 */
3033	cfcr = inb(siocniobase + com_cfcr);
3034	outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr);
3035	divisor = siodivisor(comdefaultrclk, comdefaultrate);
3036	outb(siocniobase + com_dlbl, divisor & 0xff);
3037	outb(siocniobase + com_dlbh, divisor >> 8);
3038	outb(siocniobase + com_cfcr, cfcr);
3039
3040	siocnopen(&sp, siocniobase, comdefaultrate);
3041	splx(s);
3042
3043	cnadd(&sio_consdev);
3044	return (0);
3045}
3046
3047int
3048siogdbattach(port, speed)
3049	int port;
3050	int speed;
3051{
3052	int			s;
3053	u_char			cfcr;
3054	u_int			divisor;
3055	struct siocnstate	sp;
3056	int			unit = 1;	/* XXX random value! */
3057
3058	siogdbiobase = port;
3059	gdbdefaultrate = speed;
3060
3061	printf("sio%d: gdb debugging port\n", unit);
3062	siogdbunit = unit;
3063#if DDB > 0
3064	siocnset(&gdbconsdev, unit);
3065	gdb_arg = &gdbconsdev;
3066	gdb_getc = siocngetc;
3067	gdb_putc = siocnputc;
3068#endif
3069
3070	s = spltty();
3071
3072	/*
3073	 * Initialize the divisor latch.  We can't rely on
3074	 * siocnopen() to do this the first time, since it
3075	 * avoids writing to the latch if the latch appears
3076	 * to have the correct value.  Also, if we didn't
3077	 * just read the speed from the hardware, then we
3078	 * need to set the speed in hardware so that
3079	 * switching it later is null.
3080	 */
3081	cfcr = inb(siogdbiobase + com_cfcr);
3082	outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr);
3083	divisor = siodivisor(comdefaultrclk, gdbdefaultrate);
3084	outb(siogdbiobase + com_dlbl, divisor & 0xff);
3085	outb(siogdbiobase + com_dlbh, divisor >> 8);
3086	outb(siogdbiobase + com_cfcr, cfcr);
3087
3088	siocnopen(&sp, siogdbiobase, gdbdefaultrate);
3089	splx(s);
3090
3091	return (0);
3092}
3093
3094#endif
3095
3096static int
3097siocncheckc(struct consdev *cd)
3098{
3099	int	c;
3100	Port_t	iobase;
3101	int	s;
3102	struct siocnstate	sp;
3103	speed_t	speed;
3104
3105	if (cd->cn_unit == siocnunit) {
3106		iobase = siocniobase;
3107		speed = comdefaultrate;
3108	} else {
3109		iobase = siogdbiobase;
3110		speed = gdbdefaultrate;
3111	}
3112	s = spltty();
3113	siocnopen(&sp, iobase, speed);
3114	if (inb(iobase + com_lsr) & LSR_RXRDY)
3115		c = inb(iobase + com_data);
3116	else
3117		c = -1;
3118	siocnclose(&sp, iobase);
3119	splx(s);
3120	return (c);
3121}
3122
3123static int
3124siocngetc(struct consdev *cd)
3125{
3126	int	c;
3127	Port_t	iobase;
3128	int	s;
3129	struct siocnstate	sp;
3130	speed_t	speed;
3131
3132	if (cd->cn_unit == siocnunit) {
3133		iobase = siocniobase;
3134		speed = comdefaultrate;
3135	} else {
3136		iobase = siogdbiobase;
3137		speed = gdbdefaultrate;
3138	}
3139	s = spltty();
3140	siocnopen(&sp, iobase, speed);
3141	while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3142		;
3143	c = inb(iobase + com_data);
3144	siocnclose(&sp, iobase);
3145	splx(s);
3146	return (c);
3147}
3148
3149static void
3150siocnputc(struct consdev *cd, int c)
3151{
3152	int	need_unlock;
3153	int	s;
3154	struct siocnstate	sp;
3155	Port_t	iobase;
3156	speed_t	speed;
3157
3158	if (cd->cn_unit == siocnunit) {
3159		iobase = siocniobase;
3160		speed = comdefaultrate;
3161	} else {
3162		iobase = siogdbiobase;
3163		speed = gdbdefaultrate;
3164	}
3165	s = spltty();
3166	need_unlock = 0;
3167	if (sio_inited == 2 && !mtx_owned(&sio_lock)) {
3168		mtx_lock_spin(&sio_lock);
3169		need_unlock = 1;
3170	}
3171	siocnopen(&sp, iobase, speed);
3172	siocntxwait(iobase);
3173	outb(iobase + com_data, c);
3174	siocnclose(&sp, iobase);
3175	if (need_unlock)
3176		mtx_unlock_spin(&sio_lock);
3177	splx(s);
3178}
3179
3180#ifdef __alpha__
3181int
3182siogdbgetc()
3183{
3184	int	c;
3185	Port_t	iobase;
3186	speed_t	speed;
3187	int	s;
3188	struct siocnstate	sp;
3189
3190	if (siogdbunit == siocnunit) {
3191		iobase = siocniobase;
3192		speed = comdefaultrate;
3193	} else {
3194		iobase = siogdbiobase;
3195		speed = gdbdefaultrate;
3196	}
3197
3198	s = spltty();
3199	siocnopen(&sp, iobase, speed);
3200	while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3201		;
3202	c = inb(iobase + com_data);
3203	siocnclose(&sp, iobase);
3204	splx(s);
3205	return (c);
3206}
3207
3208void
3209siogdbputc(c)
3210	int	c;
3211{
3212	Port_t	iobase;
3213	speed_t	speed;
3214	int	s;
3215	struct siocnstate	sp;
3216
3217	if (siogdbunit == siocnunit) {
3218		iobase = siocniobase;
3219		speed = comdefaultrate;
3220	} else {
3221		iobase = siogdbiobase;
3222		speed = gdbdefaultrate;
3223	}
3224
3225	s = spltty();
3226	siocnopen(&sp, iobase, speed);
3227	siocntxwait(siogdbiobase);
3228	outb(siogdbiobase + com_data, c);
3229	siocnclose(&sp, siogdbiobase);
3230	splx(s);
3231}
3232#endif
3233