si.h revision 179668
1/*-
2 * Device driver for Specialix range (SI/XIO) of serial line multiplexors.
3 * 'C' definitions for Specialix serial multiplex driver.
4 *
5 * Copyright (C) 1990, 1992, 1998 Specialix International,
6 * Copyright (C) 1993, Andy Rutter <andy@acronym.co.uk>
7 * Copyright (C) 1995, Peter Wemm <peter@netplex.com.au>
8 *
9 * Derived from:	SunOS 4.x version
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notices, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notices, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *	This product includes software developed by Andy Rutter of
22 *	Advanced Methods and Tools Ltd. based on original information
23 *	from Specialix International.
24 * 4. Neither the name of Advanced Methods and Tools, nor Specialix
25 *    International may be used to endorse or promote products derived from
26 *    this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
31 * NO EVENT SHALL THE AUTHORS BE LIABLE.
32 *
33 * $FreeBSD: head/sys/dev/si/si.h 179668 2008-06-09 08:43:27Z ed $
34 */
35
36#include <sys/callout.h>
37
38/*
39 * We name devices with %r in make_dev() with a radix of 32.
40 */
41#define	SI_MAXPORTPERCARD	32
42
43/* Buffer parameters */
44#define	SI_BUFFERSIZE	256
45
46typedef	uint8_t 	BYTE;		/* Type cast for unsigned 8 bit */
47typedef	uint16_t 	WORD;		/* Type cast for unsigned 16 bit */
48
49/*
50 * Hardware `registers', stored in the shared memory.
51 * These are related to the firmware running on the Z280.
52 */
53
54struct si_reg	{
55	BYTE	initstat;
56	BYTE	memsize;
57	WORD	int_count;
58	WORD	revision;
59	BYTE	rx_int_count;		/* isr_count on Jet */
60	BYTE	main_count;		/* spare on Z-280 */
61	WORD	int_pending;
62	WORD	int_counter;
63	BYTE	int_scounter;
64	BYTE	res[0x80 - 13];
65};
66
67/*
68 *	Per module control structure, stored in shared memory.
69 */
70struct si_module {
71	WORD	sm_next;		/* Next module */
72	BYTE	sm_type;		/* Number of channels */
73	BYTE	sm_number;		/* Module number on cable */
74	BYTE	sm_dsr;			/* Private dsr copy */
75	BYTE	sm_res[0x80 - 5];	/* Reserve space to 128 bytes */
76};
77
78/*
79 *	The 'next' pointer & with 0x7fff + SI base addres give
80 *	the address of the next module block if fitted. (else 0)
81 *	Note that next points to the TX buffer so 0x60 must be
82 *	subtracted to find the true base.
83 */
84#define TA4		0x00
85#define TA8		0x08
86#define TA4_ASIC	0x0A
87#define TA8_ASIC	0x0B
88#define MTA		0x28
89#define SXDC		0x48
90
91/*
92 *	Per channel(port) control structure, stored in shared memory.
93 */
94struct	si_channel {
95	/*
96	 * Generic stuff
97	 */
98	WORD	next;			/* Next Channel */
99	WORD	addr_uart;		/* Uart address */
100	WORD	module;			/* address of module struct */
101	BYTE 	type;			/* Uart type */
102	BYTE	fill;
103	/*
104	 * Uart type specific stuff
105	 */
106	BYTE	x_status;		/* XON / XOFF status */
107	BYTE	c_status;		/* cooking status */
108	BYTE	hi_rxipos;		/* stuff into rx buff */
109	BYTE	hi_rxopos;		/* stuff out of rx buffer */
110	BYTE	hi_txopos;		/* Stuff into tx ptr */
111	BYTE	hi_txipos;		/* ditto out */
112	BYTE	hi_stat;		/* Command register */
113	BYTE	dsr_bit;		/* Magic bit for DSR */
114	BYTE	txon;			/* TX XON char */
115	BYTE	txoff;			/* ditto XOFF */
116	BYTE	rxon;			/* RX XON char */
117	BYTE	rxoff;			/* ditto XOFF */
118	BYTE	hi_mr1;			/* mode 1 image */
119	BYTE	hi_mr2;			/* mode 2 image */
120        BYTE	hi_csr;			/* clock register */
121	BYTE	hi_op;			/* Op control */
122	BYTE	hi_ip;			/* Input pins */
123	BYTE	hi_state;		/* status */
124	BYTE	hi_prtcl;		/* Protocol */
125	BYTE	hi_txon;		/* host copy tx xon stuff */
126	BYTE	hi_txoff;
127	BYTE	hi_rxon;
128	BYTE	hi_rxoff;
129	BYTE	close_prev;		/* Was channel previously closed */
130	BYTE	hi_break;		/* host copy break process */
131	BYTE	break_state;		/* local copy ditto */
132	BYTE	hi_mask;		/* Mask for CS7 etc. */
133	BYTE	mask_z280;		/* Z280's copy */
134	BYTE	res[0x60 - 36];
135	BYTE	hi_txbuf[SI_BUFFERSIZE];
136	BYTE	hi_rxbuf[SI_BUFFERSIZE];
137	BYTE	res1[0xA0];
138};
139
140/*
141 *	Register definitions
142 */
143
144/*
145 *	Break input control register definitions
146 */
147#define	BR_IGN		0x01	/* Ignore any received breaks */
148#define	BR_INT		0x02	/* Interrupt on received break */
149#define BR_PARMRK	0x04	/* Enable parmrk parity error processing */
150#define	BR_PARIGN	0x08	/* Ignore chars with parity errors */
151
152/*
153 *	Protocol register provided by host for XON/XOFF and cooking
154 */
155#define	SP_TANY		0x01	/* Tx XON any char */
156#define	SP_TXEN		0x02	/* Tx XON/XOFF enabled */
157#define	SP_CEN		0x04	/* Cooking enabled */
158#define	SP_RXEN		0x08	/* Rx XON/XOFF enabled */
159#define	SP_DCEN		0x20	/* DCD / DTR check */
160#define	SP_PAEN		0x80	/* Parity checking enabled */
161
162/*
163 *	HOST STATUS / COMMAND REGISTER
164 */
165#define	IDLE_OPEN	0x00	/* Default mode, TX and RX polled
166				   buffer updated etc */
167#define	LOPEN		0x02	/* Local open command (no modem ctl */
168#define MOPEN		0x04	/* Open and monitor modem lines (blocks
169				   for DCD */
170#define MPEND		0x06	/* Wating for DCD */
171#define CONFIG		0x08	/* Channel config has changed */
172#define CLOSE		0x0A	/* Close channel */
173#define SBREAK		0x0C	/* Start break */
174#define EBREAK		0x0E	/* End break */
175#define IDLE_CLOSE	0x10	/* Closed channel */
176#define IDLE_BREAK	0x12	/* In a break */
177#define FCLOSE		0x14	/* Force a close */
178#define RESUME		0x16	/* Clear a pending xoff */
179#define WFLUSH		0x18	/* Flush output buffer */
180#define RFLUSH		0x1A	/* Flush input buffer */
181
182/*
183 *	Host status register
184 */
185#define	ST_BREAK	0x01	/* Break received (clear with config) */
186
187/*
188 *	OUTPUT PORT REGISTER
189 */
190#define	OP_CTS	0x01	/* Enable CTS */
191#define OP_DSR	0x02	/* Enable DSR */
192/*
193 *	INPUT PORT REGISTER
194 */
195#define	IP_DCD	0x04	/* DCD High */
196#define IP_DTR	0x20	/* DTR High */
197#define IP_RTS	0x02	/* RTS High */
198#define	IP_RI	0x40	/* RI  High */
199
200/*
201 *	Mode register and uart specific stuff
202 */
203/*
204 *	MODE REGISTER 1
205 */
206#define	MR1_5_BITS	0x00
207#define	MR1_6_BITS	0x01
208#define	MR1_7_BITS	0x02
209#define	MR1_8_BITS	0x03
210/*
211 *	Parity
212 */
213#define	MR1_ODD		0x04
214#define	MR1_EVEN	0x00
215/*
216 *	Parity mode
217 */
218#define	MR1_WITH	0x00
219#define	MR1_FORCE	0x08
220#define	MR1_NONE	0x10
221#define	MR1_SPECIAL	0x18
222/*
223 *	Error mode
224 */
225#define	MR1_CHAR	0x00
226#define	MR1_BLOCK	0x20
227/*
228 *	Request to send line automatic control
229 */
230#define	MR1_CTSCONT	0x80
231
232/*
233 *	MODE REGISTER 2
234 */
235/*
236 *	Number of stop bits
237 */
238#define	MR2_1_STOP	0x07
239#define	MR2_2_STOP	0x0F
240/*
241 *	Clear to send automatic testing before character sent
242 */
243#define	MR2_RTSCONT	0x10
244/*
245 *	Reset RTS automatically after sending character?
246 */
247#define	MR2_CTSCONT	0x20
248/*
249 *	Channel mode
250 */
251#define	MR2_NORMAL	0x00
252#define	MR2_AUTO	0x40
253#define	MR2_LOCAL	0x80
254#define	MR2_REMOTE	0xC0
255
256/*
257 *	CLOCK SELECT REGISTER - this and the code assumes ispeed == ospeed
258 */
259/*
260 * Clocking rates are in lower and upper nibbles.. R = upper, T = lower
261 */
262#define	CLK75		0x0
263#define	CLK110		0x1	/* 110 on XIO!! */
264#define	CLK38400	0x2	/* out of sequence */
265#define	CLK150		0x3
266#define	CLK300		0x4
267#define	CLK600		0x5
268#define	CLK1200		0x6
269#define	CLK2000		0x7
270#define	CLK2400		0x8
271#define	CLK4800		0x9
272#define	CLK7200		0xa	/* unchecked */
273#define	CLK9600		0xb
274#define	CLK19200	0xc
275#define	CLK57600	0xd
276
277/*
278 * Per-port (channel) soft information structure, stored in the driver.
279 * This is visible via ioctl()'s.
280 */
281struct si_port {
282	volatile struct si_channel *sp_ccb;
283	struct tty	*sp_tty;
284	int		sp_pend;	/* pending command */
285	int		sp_last_hi_ip;	/* cached DCD */
286	int		sp_state;
287	int		sp_delta_overflows;
288	struct callout_handle lstart_ch;/* For canceling our timeout */
289	int		sp_debug;	/* debug mask */
290	char		sp_name[5];
291};
292
293/* sp_state */
294/*			0x0001	--					*/
295/*			0x0002	--					*/
296/*			0x0004	--					*/
297/*			0x0008	--					*/
298/*			0x0010	--					*/
299/*			0x0020	--					*/
300/*			0x0040	-- 	 				*/
301/*			0x0080	-- 	 				*/
302#define SS_LSTART	0x0100	/* lstart timeout pending		*/
303/*			0x0200	--					*/
304/*			0x0400	--					*/
305/*			0x0800	--					*/
306
307/*
308 *	Command post flags
309 */
310#define	SI_NOWAIT	0x00	/* Don't wait for command */
311#define SI_WAIT		0x01	/* Wait for complete */
312
313/*
314 *	SI ioctls
315 */
316/*
317 * struct for use by Specialix ioctls - used by siconfig(8)
318 */
319typedef struct {
320	unsigned char
321		sid_port:5,			/* 0 - 31 ports per card */
322		sid_card:2,			/* 0 - 3 cards */
323		sid_control:1;			/* controlling device (all cards) */
324} sidev_t;
325struct si_tcsi {
326	sidev_t	tc_dev;
327	union {
328		int	x_int;
329		int	x_dbglvl;
330	}	tc_action;
331#define	tc_card		tc_dev.sid_card
332#define	tc_port		tc_dev.sid_port
333#define	tc_int		tc_action.x_int
334#define	tc_dbglvl	tc_action.x_dbglvl
335};
336
337struct si_pstat {
338	sidev_t	tc_dev;
339	union {
340		struct si_port    x_siport;
341		struct si_channel x_ccb;
342		struct tty        x_tty;
343	} tc_action;
344#define tc_siport	tc_action.x_siport
345#define tc_ccb		tc_action.x_ccb
346#define tc_tty		tc_action.x_tty
347};
348
349#define	IOCTL_MIN	96
350#define	TCSIDEBUG	_IOW('S', 96, struct si_tcsi)	/* Toggle debug */
351#define	TCSIRXIT	_IOW('S', 97, struct si_tcsi)	/* RX int throttle */
352#define	TCSIIT		_IOW('S', 98, struct si_tcsi)	/* TX int throttle */
353			/* 99 defunct */
354			/* 100 defunct */
355			/* 101 defunct */
356			/* 102 defunct */
357			/* 103 defunct */
358			/* 104 defunct */
359#define	TCSISTATE	_IOWR('S', 105, struct si_tcsi)	/* get current state of RTS
360						   DCD and DTR pins */
361			/* 106 defunct */
362#define	TCSIPORTS	_IOR('S', 107, int)	/* Number of ports found */
363#define	TCSISDBG_LEVEL	_IOW('S', 108, struct si_tcsi)	/* equivalent of TCSIDEBUG which sets a
364					 * particular debug level (DBG_??? bit
365					 * mask), default is 0xffff */
366#define	TCSIGDBG_LEVEL	_IOWR('S', 109, struct si_tcsi)
367#define	TCSIGRXIT	_IOWR('S', 110, struct si_tcsi)
368#define	TCSIGIT		_IOWR('S', 111, struct si_tcsi)
369			/* 112 defunct */
370			/* 113 defunct */
371			/* 114 defunct */
372			/* 115 defunct */
373			/* 116 defunct */
374			/* 117 defunct */
375
376#define	TCSISDBG_ALL	_IOW('S', 118, int)		/* set global debug level */
377#define	TCSIGDBG_ALL	_IOR('S', 119, int)		/* get global debug level */
378
379			/* 120 defunct */
380			/* 121 defunct */
381			/* 122 defunct */
382			/* 123 defunct */
383#define	TCSIMODULES	_IOR('S', 124, int)	/* Number of modules found */
384
385/* Various stats and monitoring hooks per tty device */
386#define	TCSI_PORT	_IOWR('S', 125, struct si_pstat) /* get si_port */
387#define	TCSI_CCB	_IOWR('S', 126, struct si_pstat) /* get si_ccb */
388
389#define	IOCTL_MAX	127
390
391#define	IS_SI_IOCTL(cmd)	((u_int)((cmd)&0xff00) == ('S'<<8) && \
392		(u_int)((cmd)&0xff) >= IOCTL_MIN && \
393		(u_int)((cmd)&0xff) <= IOCTL_MAX)
394
395#define	CONTROLDEV	"/dev/si_control"
396