si.h revision 12174
1/* 2 * Device driver for Specialix range (SLXOS) of serial line multiplexors. 3 * 'C' definitions for Specialix serial multiplex driver. 4 * 5 * Copyright (C) 1990, 1992 Specialix International, 6 * Copyright (C) 1993, Andy Rutter <andy@acronym.co.uk> 7 * Copyright (C) 1995, Peter Wemm <peter@haywire.dialix.com> 8 * 9 * Derived from: SunOS 4.x version 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notices, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notices, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Andy Rutter of 22 * Advanced Methods and Tools Ltd. based on original information 23 * from Specialix International. 24 * 4. Neither the name of Advanced Methods and Tools, nor Specialix 25 * International may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 31 * NO EVENT SHALL THE AUTHORS BE LIABLE. 32 * 33 * $Id: si.h,v 1.4 1995/09/13 08:39:28 peter Exp $ 34 */ 35 36/* 37 * Macro to turn a device number into various parameters, and test for 38 * CONTROL device. 39 * max of 4 controllers with up to 32 ports per controller. 40 * minor device allocation is: 41 * adapter port 42 * 0 0-31 43 * 1 32-63 44 * 2 64-95 45 * 3 96-127 46 */ 47#define SI_MAXPORTPERCARD 32 48#define SI_MAXCONTROLLER 4 49 50 51/* 52 * breakup of minor device number: 53 * lowest 5 bits: port number on card 0x1f 54 * next 2 bits: card number 0x60 55 * top bit: callout 0x80 56 * next 8 bits is the major number 57 * next 2 bits select initial/lock states 58 * next 1 bit selects the master control device 59 */ 60 61#define SI_PORT_MASK 0x1f 62#define SI_CARD_MASK 0x60 63#define SI_TTY_MASK 0x7f 64#define SI_CALLOUT_MASK 0x80 65#define SI_INIT_STATE_MASK 0x10000 66#define SI_LOCK_STATE_MASK 0x20000 67#define SI_STATE_MASK 0x30000 68#define SI_CONTROLDEV_MASK 0x40000 69#define SI_SPECIAL_MASK 0x70000 70 71#define SI_PORT(m) (m & SI_PORT_MASK) 72#define SI_CARD(m) ((m & SI_CARD_MASK) >> 5) 73#define SI_TTY(m) (m & SI_TTY_MASK) 74 75#define IS_CALLOUT(m) (m & SI_CALLOUT_MASK) 76#define IS_STATE(m) (m & SI_STATE_MASK) 77#define IS_CONTROLDEV(m) (m & SI_CONTROLDEV_MASK) 78#define IS_SPECIAL(m) (m & SI_SPECIAL_MASK) 79 80#define MINOR2SC(m) (&si_softc[SI_CARD(m)]) 81#define MINOR2PP(m) (MINOR2SC((m))->sc_ports + SI_PORT((m))) 82#define MINOR2TP(m) (MINOR2PP((m))->sp_tty) 83#define TP2PP(tp) (MINOR2PP(SI_TTY(minor((tp)->t_dev)))) 84 85/* Adapter types */ 86#define SIEMPTY 0 87#define SIHOST 1 88#define SI2 2 89#define SIHOST2 3 90#define SIEISA 4 91 92/* Buffer parameters */ 93#define SLXOS_BUFFERSIZE 256 94 95typedef unsigned char BYTE; /* Type cast for unsigned 8 bit */ 96typedef unsigned short WORD; /* Type cast for unsigned 16 bit */ 97 98 99/* 100 * Hardware `registers', stored in the shared memory. 101 * These are related to the firmware running on the Z280. 102 */ 103 104struct si_reg { 105 BYTE initstat; 106 BYTE memsize; 107 WORD int_count; 108 WORD revision; 109 BYTE rx_int_count; 110 BYTE spare; 111 WORD int_pending; 112 WORD int_counter; 113 BYTE int_scounter; 114 BYTE res[0x80 - 13]; 115}; 116 117/* 118 * Per module control structure, stored in shared memory. 119 */ 120struct si_module { 121 WORD sm_next; /* Next module */ 122 BYTE sm_type; /* Number of channels */ 123 BYTE sm_number; /* Module number on cable */ 124 BYTE sm_dsr; /* Private dsr copy */ 125 BYTE sm_res[0x80 - 5]; /* Reserve space to 128 bytes */ 126}; 127 128/* 129 * The 'next' pointer & with 0x7fff + SI base addres give 130 * the address of the next module block if fitted. (else 0) 131 * Note that next points to the TX buffer so 0x60 must be 132 * subtracted to find the true base. 133 * 134 * Type is a bit field as follows: The bottom 5 bits are the 135 * number of channels on this module, the top 3 bits are 136 * as the module type thus: 137 * 138 * 000 2698 RS232 module (4 port or 8 port) 139 * 001 Reserved for 2698 RS422 module 140 * 010 Reserved for 8530 based sync module 141 * 011 Reserved for parallel printer module 142 * 100 Reserved for network module 143 * 101-111 Reserved for expansion. 144 * 145 * The number field is the cable position of the module. 146 */ 147#define M232 0x00 148#define M422 0x20 /* not supported */ 149#define MSYNC 0x40 /* this is the Telebit Netblazer module */ 150#define MCENT 0x60 /* not supported */ 151#define MNET 0x80 /* not supported */ 152#define MMASK 0x1F 153 154/* 155 * Per channel(port) control structure, stored in shared memory. 156 */ 157struct si_channel { 158 /* 159 * Generic stuff 160 */ 161 WORD next; /* Next Channel */ 162 WORD addr_uart; /* Uart address */ 163 WORD module; /* address of module struct */ 164 BYTE type; /* Uart type */ 165 BYTE fill; 166 /* 167 * Uart type specific stuff 168 */ 169 BYTE x_status; /* XON / XOFF status */ 170 BYTE c_status; /* cooking status */ 171 BYTE hi_rxipos; /* stuff into rx buff */ 172 BYTE hi_rxopos; /* stuff out of rx buffer */ 173 BYTE hi_txopos; /* Stuff into tx ptr */ 174 BYTE hi_txipos; /* ditto out */ 175 BYTE hi_stat; /* Command register */ 176 BYTE dsr_bit; /* Magic bit for DSR */ 177 BYTE txon; /* TX XON char */ 178 BYTE txoff; /* ditto XOFF */ 179 BYTE rxon; /* RX XON char */ 180 BYTE rxoff; /* ditto XOFF */ 181 BYTE hi_mr1; /* mode 1 image */ 182 BYTE hi_mr2; /* mode 2 image */ 183 BYTE hi_csr; /* clock register */ 184 BYTE hi_op; /* Op control */ 185 BYTE hi_ip; /* Input pins */ 186 BYTE hi_state; /* status */ 187 BYTE hi_prtcl; /* Protocol */ 188 BYTE hi_txon; /* host copy tx xon stuff */ 189 BYTE hi_txoff; 190 BYTE hi_rxon; 191 BYTE hi_rxoff; 192 BYTE close_prev; /* Was channel previously closed */ 193 BYTE hi_break; /* host copy break process */ 194 BYTE break_state; /* local copy ditto */ 195 BYTE hi_mask; /* Mask for CS7 etc. */ 196 BYTE mask_z280; /* Z280's copy */ 197 BYTE res[0x60 - 36]; 198 BYTE hi_txbuf[SLXOS_BUFFERSIZE]; 199 BYTE hi_rxbuf[SLXOS_BUFFERSIZE]; 200 BYTE res1[0xA0]; 201}; 202 203/* 204 * Register definitions 205 */ 206 207/* 208 * Break input control register definitions 209 */ 210#define BR_IGN 0x01 /* Ignore any received breaks */ 211#define BR_INT 0x02 /* Interrupt on received break */ 212#define BR_PARMRK 0x04 /* Enable parmrk parity error processing */ 213#define BR_PARIGN 0x08 /* Ignore chars with parity errors */ 214 215/* 216 * Protocol register provided by host for XON/XOFF and cooking 217 */ 218#define SP_TANY 0x01 /* Tx XON any char */ 219#define SP_TXEN 0x02 /* Tx XON/XOFF enabled */ 220#define SP_CEN 0x04 /* Cooking enabled */ 221#define SP_RXEN 0x08 /* Rx XON/XOFF enabled */ 222#define SP_DCEN 0x20 /* DCD / DTR check */ 223#define SP_PAEN 0x80 /* Parity checking enabled */ 224 225/* 226 * HOST STATUS / COMMAND REGISTER 227 */ 228#define IDLE_OPEN 0x00 /* Default mode, TX and RX polled 229 buffer updated etc */ 230#define LOPEN 0x02 /* Local open command (no modem ctl */ 231#define MOPEN 0x04 /* Open and monitor modem lines (blocks 232 for DCD */ 233#define MPEND 0x06 /* Wating for DCD */ 234#define CONFIG 0x08 /* Channel config has changed */ 235#define CLOSE 0x0A /* Close channel */ 236#define SBREAK 0x0C /* Start break */ 237#define EBREAK 0x0E /* End break */ 238#define IDLE_CLOSE 0x10 /* Closed channel */ 239#define IDLE_BREAK 0x12 /* In a break */ 240#define FCLOSE 0x14 /* Force a close */ 241#define RESUME 0x16 /* Clear a pending xoff */ 242#define WFLUSH 0x18 /* Flush output buffer */ 243#define RFLUSH 0x1A /* Flush input buffer */ 244 245/* 246 * Host status register 247 */ 248#define ST_BREAK 0x01 /* Break received (clear with config) */ 249 250/* 251 * OUTPUT PORT REGISTER 252 */ 253#define OP_CTS 0x01 /* Enable CTS */ 254#define OP_DSR 0x02 /* Enable DSR */ 255/* 256 * INPUT PORT REGISTER 257 */ 258#define IP_DCD 0x04 /* DCD High */ 259#define IP_DTR 0x20 /* DTR High */ 260#define IP_RTS 0x02 /* RTS High */ 261#define IP_RI 0x40 /* RI High */ 262 263/* 264 * Mode register and uart specific stuff 265 */ 266/* 267 * MODE REGISTER 1 268 */ 269#define MR1_5_BITS 0x00 270#define MR1_6_BITS 0x01 271#define MR1_7_BITS 0x02 272#define MR1_8_BITS 0x03 273/* 274 * Parity 275 */ 276#define MR1_ODD 0x04 277#define MR1_EVEN 0x00 278/* 279 * Parity mode 280 */ 281#define MR1_WITH 0x00 282#define MR1_FORCE 0x08 283#define MR1_NONE 0x10 284#define MR1_SPECIAL 0x18 285/* 286 * Error mode 287 */ 288#define MR1_CHAR 0x00 289#define MR1_BLOCK 0x20 290/* 291 * Request to send line automatic control 292 */ 293#define MR1_CTSCONT 0x80 294 295/* 296 * MODE REGISTER 2 297 */ 298/* 299 * Number of stop bits 300 */ 301#define MR2_1_STOP 0x07 302#define MR2_2_STOP 0x0F 303/* 304 * Clear to send automatic testing before character sent 305 */ 306#define MR2_RTSCONT 0x10 307/* 308 * Reset RTS automatically after sending character? 309 */ 310#define MR2_CTSCONT 0x20 311/* 312 * Channel mode 313 */ 314#define MR2_NORMAL 0x00 315#define MR2_AUTO 0x40 316#define MR2_LOCAL 0x80 317#define MR2_REMOTE 0xC0 318 319/* 320 * CLOCK SELECT REGISTER - this and the code assumes ispeed == ospeed 321 */ 322/* 323 * Clocking rates are in lower and upper nibbles.. R = upper, T = lower 324 */ 325#define CLK75 0x0 326#define CLK110 0x1 /* 110 on XIO!! */ 327#define CLK38400 0x2 /* out of sequence */ 328#define CLK150 0x3 329#define CLK300 0x4 330#define CLK600 0x5 331#define CLK1200 0x6 332#define CLK2000 0x7 333#define CLK2400 0x8 334#define CLK4800 0x9 335#define CLK7200 0xa /* unchecked */ 336#define CLK9600 0xb 337#define CLK19200 0xc 338#define CLK57600 0xd 339 340/* 341 * Per-port (channel) soft information structure, stored in the driver. 342 * This is visible via ioctl()'s. 343 */ 344struct si_port { 345 volatile struct si_channel *sp_ccb; 346 struct tty *sp_tty; 347 int sp_pend; /* pending command */ 348 int sp_last_hi_ip; /* cached DCD */ 349 int sp_state; 350 int sp_active_out; /* callout is open */ 351 int sp_dtr_wait; /* DTR holddown in hz */ 352 int sp_delta_overflows; 353 u_int sp_wopeners; /* # procs waiting DCD */ 354 u_char sp_hotchar; /* ldisc specific ASAP char */ 355 /* Initial state. */ 356 struct termios sp_iin; 357 struct termios sp_iout; 358 /* Lock state. */ 359 struct termios sp_lin; 360 struct termios sp_lout; 361#ifdef SI_DEBUG 362 int sp_debug; /* debug mask */ 363#endif 364}; 365 366/* sp_state */ 367#define SS_CLOSED 0x0000 368#define SS_OPEN 0x0001 /* Port is active */ 369/* 0x0002 -- */ 370/* 0x0004 -- */ 371/* 0x0008 -- */ 372/* 0x0010 -- */ 373/* 0x0020 -- */ 374/* 0x0040 -- */ 375/* 0x0080 -- */ 376#define SS_LSTART 0x0100 /* lstart timeout pending */ 377#define SS_INLSTART 0x0200 /* running an lstart induced t_oproc */ 378#define SS_CLOSING 0x0400 /* in the middle of a siclose() */ 379/* 0x0800 -- */ 380#define SS_WAITWRITE 0x1000 381#define SS_BLOCKWRITE 0x2000 382#define SS_DTR_OFF 0x4000 /* DTR held off */ 383 384/* 385 * Command post flags 386 */ 387#define SI_NOWAIT 0x00 /* Don't wait for command */ 388#define SI_WAIT 0x01 /* Wait for complete */ 389 390/* 391 * Extensive debugging stuff - manipulated using siconfig(8) 392 */ 393#define DBG_ENTRY 0x00000001 394#define DBG_DRAIN 0x00000002 395#define DBG_OPEN 0x00000004 396#define DBG_CLOSE 0x00000008 397#define DBG_READ 0x00000010 398#define DBG_WRITE 0x00000020 399#define DBG_PARAM 0x00000040 400#define DBG_INTR 0x00000080 401#define DBG_IOCTL 0x00000100 402/* 0x00000200 */ 403#define DBG_SELECT 0x00000400 404#define DBG_OPTIM 0x00000800 405#define DBG_START 0x00001000 406#define DBG_EXIT 0x00002000 407#define DBG_FAIL 0x00004000 408#define DBG_STOP 0x00008000 409#define DBG_AUTOBOOT 0x00010000 410#define DBG_MODEM 0x00020000 411#define DBG_DOWNLOAD 0x00040000 412#define DBG_LSTART 0x00080000 413#define DBG_POLL 0x00100000 414#define DBG_ALL 0xffffffff 415 416/* 417 * SI ioctls 418 */ 419/* 420 * struct for use by Specialix ioctls - used by siconfig(8) 421 */ 422typedef struct { 423 unsigned char 424 sid_port:5, /* 0 - 31 ports per card */ 425 sid_card:2, /* 0 - 3 cards */ 426 sid_control:1; /* controlling device (all cards) */ 427} sidev_t; 428struct si_tcsi { 429 sidev_t tc_dev; 430 union { 431 int x_int; 432 int x_dbglvl; 433 } tc_action; 434#define tc_card tc_dev.sid_card 435#define tc_port tc_dev.sid_port 436#define tc_int tc_action.x_int 437#define tc_dbglvl tc_action.x_dbglvl 438}; 439 440struct si_pstat { 441 sidev_t tc_dev; 442 union { 443 struct si_port x_siport; 444 struct si_channel x_ccb; 445 struct tty x_tty; 446 } tc_action; 447#define tc_siport tc_action.x_siport 448#define tc_ccb tc_action.x_ccb 449#define tc_tty tc_action.x_tty 450}; 451 452#define IOCTL_MIN 96 453#define TCSIDEBUG _IOW('S', 96, struct si_tcsi) /* Toggle debug */ 454#define TCSIRXIT _IOW('S', 97, struct si_tcsi) /* RX int throttle */ 455#define TCSIIT _IOW('S', 98, struct si_tcsi) /* TX int throttle */ 456 /* 99 defunct */ 457 /* 100 defunct */ 458 /* 101 defunct */ 459 /* 102 defunct */ 460 /* 103 defunct */ 461 /* 104 defunct */ 462#define TCSISTATE _IOWR('S', 105, struct si_tcsi) /* get current state of RTS 463 DCD and DTR pins */ 464 /* 106 defunct */ 465#define TCSIPORTS _IOR('S', 107, int) /* Number of ports found */ 466#define TCSISDBG_LEVEL _IOW('S', 108, struct si_tcsi) /* equivalent of TCSIDEBUG which sets a 467 * particular debug level (DBG_??? bit 468 * mask), default is 0xffff */ 469#define TCSIGDBG_LEVEL _IOWR('S', 109, struct si_tcsi) 470#define TCSIGRXIT _IOWR('S', 110, struct si_tcsi) 471#define TCSIGIT _IOWR('S', 111, struct si_tcsi) 472 /* 112 defunct */ 473 /* 113 defunct */ 474 /* 114 defunct */ 475 /* 115 defunct */ 476 /* 116 defunct */ 477 /* 117 defunct */ 478 479#define TCSISDBG_ALL _IOW('S', 118, int) /* set global debug level */ 480#define TCSIGDBG_ALL _IOR('S', 119, int) /* get global debug level */ 481 482 /* 120 defunct */ 483 /* 121 defunct */ 484 /* 122 defunct */ 485 /* 123 defunct */ 486#define TCSIMODULES _IOR('S', 124, int) /* Number of modules found */ 487 488/* Various stats and monitoring hooks per tty device */ 489#define TCSI_PORT _IOWR('S', 125, struct si_pstat) /* get si_port */ 490#define TCSI_CCB _IOWR('S', 126, struct si_pstat) /* get si_ccb */ 491#define TCSI_TTY _IOWR('S', 127, struct si_pstat) /* get tty struct */ 492 493#define IOCTL_MAX 127 494 495#define IS_SI_IOCTL(cmd) ((u_int)((cmd)&0xff00) == ('S'<<8) && \ 496 (u_int)((cmd)&0xff) >= IOCTL_MIN && \ 497 (u_int)((cmd)&0xff) <= IOCTL_MAX) 498 499#define CONTROLDEV "/dev/si_control" 500