1223927Sray/*-
2223927Sray * Copyright (c) 2010-2011 Aleksandr Rybalko <ray@ddteam.net>
3223927Sray * Copyright (c) 2009-2010 Alexander Egorenkov <egorenar@gmail.com>
4223927Sray * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
5223927Sray *
6223927Sray * Redistribution and use in source and binary forms, with or without
7223927Sray * modification, are permitted provided that the following conditions
8223927Sray * are met:
9223927Sray * 1. Redistributions of source code must retain the above copyright
10223927Sray *    notice unmodified, this list of conditions, and the following
11223927Sray *    disclaimer.
12223927Sray * 2. Redistributions in binary form must reproduce the above copyright
13223927Sray *    notice, this list of conditions and the following disclaimer in the
14223927Sray *    documentation and/or other materials provided with the distribution.
15223927Sray *
16223927Sray * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17223927Sray * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18223927Sray * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19223927Sray * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20223927Sray * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21223927Sray * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22223927Sray * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23223927Sray * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24223927Sray * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25223927Sray * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26223927Sray * SUCH DAMAGE.
27223927Sray *
28223927Sray * $FreeBSD$
29223927Sray */
30223927Sray
31223927Sray#ifndef _IF_RTVAR_H_
32223927Sray#define	_IF_RTVAR_H_
33223927Sray
34223927Sray#include <sys/param.h>
35223927Sray#include <sys/sysctl.h>
36223927Sray#include <sys/sockio.h>
37223927Sray#include <sys/mbuf.h>
38223927Sray#include <sys/kernel.h>
39223927Sray#include <sys/socket.h>
40223927Sray#include <sys/systm.h>
41223927Sray#include <sys/malloc.h>
42223927Sray#include <sys/taskqueue.h>
43223927Sray#include <sys/module.h>
44223927Sray#include <sys/bus.h>
45223927Sray#include <sys/endian.h>
46223927Sray
47223927Sray#include <machine/bus.h>
48223927Sray#include <machine/resource.h>
49223927Sray#include <sys/rman.h>
50223927Sray
51223927Sray#include <net/bpf.h>
52223927Sray#include <net/if.h>
53223927Sray#include <net/if_arp.h>
54223927Sray#include <net/ethernet.h>
55223927Sray#include <net/if_dl.h>
56223927Sray#include <net/if_media.h>
57223927Sray#include <net/if_types.h>
58223927Sray
59223927Sray#include "opt_if_rt.h"
60223927Sray
61223927Sray#define	RT_SOFTC_LOCK(sc)		mtx_lock(&(sc)->lock)
62223927Sray#define	RT_SOFTC_UNLOCK(sc)		mtx_unlock(&(sc)->lock)
63223927Sray#define	RT_SOFTC_ASSERT_LOCKED(sc)	mtx_assert(&(sc)->lock, MA_OWNED)
64223927Sray
65223927Sray#define	RT_SOFTC_TX_RING_LOCK(ring)		mtx_lock(&(ring)->lock)
66223927Sray#define	RT_SOFTC_TX_RING_UNLOCK(ring)		mtx_unlock(&(ring)->lock)
67223927Sray#define	RT_SOFTC_TX_RING_ASSERT_LOCKED(ring)	\
68223927Sray		    mtx_assert(&(ring)->lock, MA_OWNED)
69223927Sray
70223927Sray#define	RT_SOFTC_TX_RING_COUNT		4
71223927Sray
72223927Sray#ifndef IF_RT_RING_DATA_COUNT
73223927Sray#define	IF_RT_RING_DATA_COUNT	128
74223927Sray#endif
75223927Sray
76223927Sray#define	RT_SOFTC_RX_RING_DATA_COUNT	IF_RT_RING_DATA_COUNT
77223927Sray
78223927Sray#define	RT_SOFTC_MAX_SCATTER		10
79223927Sray
80223927Sray#define	RT_SOFTC_TX_RING_DATA_COUNT	(IF_RT_RING_DATA_COUNT/4)
81223927Sray#define	RT_SOFTC_TX_RING_DESC_COUNT				\
82223927Sray	(RT_SOFTC_TX_RING_DATA_COUNT * RT_SOFTC_MAX_SCATTER)
83223927Sray
84223927Sray#define	RT_TXDESC_SDL1_BURST		(1 << 15)
85223927Sray#define	RT_TXDESC_SDL1_LASTSEG		(1 << 14)
86223927Sray#define	RT_TXDESC_SDL0_DDONE		(1 << 15)
87223927Sray#define	RT_TXDESC_SDL0_LASTSEG		(1 << 14)
88223927Sraystruct rt_txdesc
89223927Sray{
90223927Sray	uint32_t sdp0;
91223927Sray	uint16_t sdl1;
92223927Sray	uint16_t sdl0;
93223927Sray	uint32_t sdp1;
94223927Sray	uint8_t vid;
95223927Sray#define	TXDSCR_INS_VLAN_TAG	0x80
96223927Sray#define	TXDSCR_VLAN_PRIO_MASK	0x70
97223927Sray#define	TXDSCR_VLAN_IDX_MASK	0x0f
98223927Sray	uint8_t	pppoe;
99223927Sray#define	TXDSCR_USR_DEF_FLD	0x80
100223927Sray#define	TXDSCR_INS_PPPOE_HDR	0x10
101223927Sray#define	TXDSCR_PPPOE_SID_MASK	0x0f
102223927Sray	uint8_t qn;
103223927Sray#define	TXDSCR_QUEUE_MASK	0x07
104223927Sray	uint8_t	dst;
105223927Sray#define	TXDSCR_IP_CSUM_GEN	0x80
106223927Sray#define	TXDSCR_UDP_CSUM_GEN	0x40
107223927Sray#define	TXDSCR_TCP_CSUM_GEN	0x20
108223927Sray#define	TXDSCR_DST_PORT_MASK	0x07
109223927Sray#define	TXDSCR_DST_PORT_CPU	0x00
110223927Sray#define	TXDSCR_DST_PORT_GDMA1	0x01
111223927Sray#define	TXDSCR_DST_PORT_GDMA2	0x02
112223927Sray#define	TXDSCR_DST_PORT_PPE	0x06
113223927Sray#define	TXDSCR_DST_PORT_DISC	0x07
114223927Sray} __packed;
115223927Sray
116223927Sray#define	RT_RXDESC_SDL0_DDONE		(1 << 15)
117223927Sraystruct rt_rxdesc
118223927Sray{
119223927Sray	uint32_t sdp0;
120223927Sray	uint16_t sdl1;
121223927Sray	uint16_t sdl0;
122223927Sray	uint32_t sdp1;
123223927Sray	uint16_t foe;
124223927Sray#define	RXDSXR_FOE_ENTRY_VALID		0x40
125223927Sray#define	RXDSXR_FOE_ENTRY_MASK		0x3f
126223927Sray	uint8_t ai;
127223927Sray#define	RXDSXR_AI_COU_REASON		0xff
128223927Sray#define	RXDSXR_AI_PARSER_RSLT_MASK	0xff
129223927Sray	uint8_t src;
130223927Sray#define	RXDSXR_SRC_IPFVLD		0x80
131223927Sray#define	RXDSXR_SRC_L4FVLD		0x40
132223927Sray#define	RXDSXR_SRC_IP_CSUM_FAIL	0x20
133223927Sray#define	RXDSXR_SRC_L4_CSUM_FAIL	0x10
134223927Sray#define	RXDSXR_SRC_AIS			0x08
135223927Sray#define	RXDSXR_SRC_PORT_MASK		0x07
136223927Sray} __packed;
137223927Sray
138223927Sraystruct rt_softc_rx_data
139223927Sray{
140223927Sray	bus_dmamap_t dma_map;
141223927Sray	struct mbuf *m;
142223927Sray};
143223927Sray
144223927Sraystruct rt_softc_rx_ring
145223927Sray{
146223927Sray	bus_dma_tag_t desc_dma_tag;
147223927Sray	bus_dmamap_t desc_dma_map;
148223927Sray	bus_addr_t desc_phys_addr;
149223927Sray	struct rt_rxdesc *desc;
150223927Sray	bus_dma_tag_t data_dma_tag;
151223927Sray	bus_dmamap_t spare_dma_map;
152223927Sray	struct rt_softc_rx_data data[RT_SOFTC_RX_RING_DATA_COUNT];
153223927Sray	int cur;
154223927Sray};
155223927Sray
156223927Sraystruct rt_softc_tx_data
157223927Sray{
158223927Sray	bus_dmamap_t dma_map;
159223927Sray	struct mbuf *m;
160223927Sray};
161223927Sray
162223927Sraystruct rt_softc_tx_ring
163223927Sray{
164223927Sray	struct mtx lock;
165223927Sray	bus_dma_tag_t desc_dma_tag;
166223927Sray	bus_dmamap_t desc_dma_map;
167223927Sray	bus_addr_t desc_phys_addr;
168223927Sray	struct rt_txdesc *desc;
169223927Sray	int desc_queued;
170223927Sray	int desc_cur;
171223927Sray	int desc_next;
172223927Sray	bus_dma_tag_t seg0_dma_tag;
173223927Sray	bus_dmamap_t seg0_dma_map;
174223927Sray	bus_addr_t seg0_phys_addr;
175223927Sray	uint8_t *seg0;
176223927Sray	bus_dma_tag_t data_dma_tag;
177223927Sray	struct rt_softc_tx_data data[RT_SOFTC_TX_RING_DATA_COUNT];
178223927Sray	int data_queued;
179223927Sray	int data_cur;
180223927Sray	int data_next;
181223927Sray	int qid;
182223927Sray};
183223927Sray
184223927Sraystruct rt_softc
185223927Sray{
186223927Sray	device_t 	 dev;
187223927Sray	struct mtx 	 lock;
188223927Sray	uint32_t 	 flags;
189223927Sray
190223927Sray	int		 mem_rid;
191223927Sray	struct resource	*mem;
192223927Sray	int		 irq_rid;
193223927Sray	struct resource *irq;
194223927Sray	void		*irqh;
195223927Sray
196223927Sray	bus_space_tag_t	 bst;
197223927Sray	bus_space_handle_t bsh;
198223927Sray
199223927Sray	struct ifnet	*ifp;
200223927Sray	int 		 if_flags;
201223927Sray	struct ifmedia	 rt_ifmedia;
202223927Sray
203223927Sray	uint32_t	 mac_rev;
204223927Sray	uint8_t		 mac_addr[ETHER_ADDR_LEN];
205223927Sray	device_t	 rt_miibus;
206223927Sray
207223927Sray	uint32_t	 intr_enable_mask;
208223927Sray	uint32_t	 intr_disable_mask;
209223927Sray	uint32_t	 intr_pending_mask;
210223927Sray
211223927Sray	struct task	 rx_done_task;
212223927Sray	int		 rx_process_limit;
213223927Sray	struct task	 tx_done_task;
214223927Sray	struct task	 periodic_task;
215223927Sray	struct callout	 periodic_ch;
216223927Sray	unsigned long	 periodic_round;
217223927Sray	struct taskqueue *taskqueue;
218223927Sray
219223927Sray	struct rt_softc_rx_ring rx_ring;
220223927Sray	struct rt_softc_tx_ring tx_ring[RT_SOFTC_TX_RING_COUNT];
221223927Sray	int		 tx_ring_mgtqid;
222223927Sray
223223927Sray	struct callout	 tx_watchdog_ch;
224223927Sray	int		 tx_timer;
225223927Sray
226223927Sray	/* statistic counters */
227223927Sray	unsigned long	 interrupts;
228223927Sray	unsigned long	 tx_coherent_interrupts;
229223927Sray	unsigned long	 rx_coherent_interrupts;
230223927Sray	unsigned long	 rx_interrupts;
231223927Sray	unsigned long	 rx_delay_interrupts;
232223927Sray	unsigned long	 tx_interrupts[RT_SOFTC_TX_RING_COUNT];
233223927Sray	unsigned long	 tx_delay_interrupts;
234223927Sray	unsigned long	 tx_data_queue_full[RT_SOFTC_TX_RING_COUNT];
235223927Sray	unsigned long	 tx_watchdog_timeouts;
236223927Sray	unsigned long	 tx_defrag_packets;
237223927Sray	unsigned long	 no_tx_desc_avail;
238223927Sray	unsigned long	 rx_mbuf_alloc_errors;
239223927Sray	unsigned long	 rx_mbuf_dmamap_errors;
240223927Sray	unsigned long	 tx_queue_not_empty[2];
241223927Sray
242223927Sray	unsigned long	 rx_bytes;
243223927Sray	unsigned long	 rx_packets;
244223927Sray	unsigned long	 rx_crc_err;
245223927Sray	unsigned long	 rx_phy_err;
246223927Sray	unsigned long	 rx_dup_packets;
247223927Sray	unsigned long	 rx_fifo_overflows;
248223927Sray	unsigned long	 rx_short_err;
249223927Sray	unsigned long	 rx_long_err;
250223927Sray	unsigned long	 tx_bytes;
251223927Sray	unsigned long	 tx_packets;
252223927Sray	unsigned long	 tx_skip;
253223927Sray	unsigned long	 tx_collision;
254223927Sray
255223927Sray	int		 phy_addr;
256223927Sray
257223927Sray#ifdef IF_RT_DEBUG
258223927Sray	int		 debug;
259223927Sray#endif
260223927Sray};
261223927Sray
262223927Sray#ifdef IF_RT_DEBUG
263223927Srayenum
264223927Sray{
265223927Sray	RT_DEBUG_RX = 0x00000001,
266223927Sray	RT_DEBUG_TX = 0x00000002,
267223927Sray	RT_DEBUG_INTR = 0x00000004,
268223927Sray	RT_DEBUG_STATE = 0x00000008,
269223927Sray	RT_DEBUG_STATS = 0x00000010,
270223927Sray	RT_DEBUG_PERIODIC = 0x00000020,
271223927Sray	RT_DEBUG_WATCHDOG = 0x00000040,
272223927Sray	RT_DEBUG_ANY = 0xffffffff
273223927Sray};
274223927Sray
275223927Sray#define	RT_DPRINTF(sc, m, fmt, ...)		\
276223927Sray	do { if ((sc)->debug & (m)) 		\
277223927Sray	    device_printf(sc->dev, fmt, __VA_ARGS__); } while (0)
278223927Sray#else
279223927Sray#define	RT_DPRINTF(sc, m, fmt, ...)
280223927Sray#endif /* #ifdef IF_RT_DEBUG */
281223927Sray
282223927Sray#endif /* #ifndef _IF_RTVAR_H_ */
283