rt2661.c revision 206358
1156321Sdamien/*	$FreeBSD: head/sys/dev/ral/rt2661.c 206358 2010-04-07 15:29:13Z rpaulo $	*/
2156321Sdamien
3156321Sdamien/*-
4156321Sdamien * Copyright (c) 2006
5156321Sdamien *	Damien Bergamini <damien.bergamini@free.fr>
6156321Sdamien *
7156321Sdamien * Permission to use, copy, modify, and distribute this software for any
8156321Sdamien * purpose with or without fee is hereby granted, provided that the above
9156321Sdamien * copyright notice and this permission notice appear in all copies.
10156321Sdamien *
11156321Sdamien * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12156321Sdamien * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13156321Sdamien * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14156321Sdamien * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15156321Sdamien * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16156321Sdamien * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17156321Sdamien * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18156321Sdamien */
19156321Sdamien
20156321Sdamien#include <sys/cdefs.h>
21156321Sdamien__FBSDID("$FreeBSD: head/sys/dev/ral/rt2661.c 206358 2010-04-07 15:29:13Z rpaulo $");
22156321Sdamien
23156321Sdamien/*-
24156321Sdamien * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
25156321Sdamien * http://www.ralinktech.com/
26156321Sdamien */
27156321Sdamien
28156321Sdamien#include <sys/param.h>
29156321Sdamien#include <sys/sysctl.h>
30156321Sdamien#include <sys/sockio.h>
31156321Sdamien#include <sys/mbuf.h>
32156321Sdamien#include <sys/kernel.h>
33156321Sdamien#include <sys/socket.h>
34156321Sdamien#include <sys/systm.h>
35156321Sdamien#include <sys/malloc.h>
36164982Skevlo#include <sys/lock.h>
37164982Skevlo#include <sys/mutex.h>
38156321Sdamien#include <sys/module.h>
39156321Sdamien#include <sys/bus.h>
40156321Sdamien#include <sys/endian.h>
41178354Ssam#include <sys/firmware.h>
42156321Sdamien
43156321Sdamien#include <machine/bus.h>
44156321Sdamien#include <machine/resource.h>
45156321Sdamien#include <sys/rman.h>
46156321Sdamien
47156321Sdamien#include <net/bpf.h>
48156321Sdamien#include <net/if.h>
49156321Sdamien#include <net/if_arp.h>
50156321Sdamien#include <net/ethernet.h>
51156321Sdamien#include <net/if_dl.h>
52156321Sdamien#include <net/if_media.h>
53156321Sdamien#include <net/if_types.h>
54156321Sdamien
55156321Sdamien#include <net80211/ieee80211_var.h>
56156321Sdamien#include <net80211/ieee80211_radiotap.h>
57170530Ssam#include <net80211/ieee80211_regdomain.h>
58206358Srpaulo#include <net80211/ieee80211_ratectl.h>
59156321Sdamien
60156321Sdamien#include <netinet/in.h>
61156321Sdamien#include <netinet/in_systm.h>
62156321Sdamien#include <netinet/in_var.h>
63156321Sdamien#include <netinet/ip.h>
64156321Sdamien#include <netinet/if_ether.h>
65156321Sdamien
66156327Ssilby#include <dev/ral/rt2661reg.h>
67156327Ssilby#include <dev/ral/rt2661var.h>
68156321Sdamien
69178354Ssam#define RAL_DEBUG
70156321Sdamien#ifdef RAL_DEBUG
71178354Ssam#define DPRINTF(sc, fmt, ...) do {				\
72178354Ssam	if (sc->sc_debug > 0)					\
73178354Ssam		printf(fmt, __VA_ARGS__);			\
74178354Ssam} while (0)
75178354Ssam#define DPRINTFN(sc, n, fmt, ...) do {				\
76178354Ssam	if (sc->sc_debug >= (n))				\
77178354Ssam		printf(fmt, __VA_ARGS__);			\
78178354Ssam} while (0)
79156321Sdamien#else
80178354Ssam#define DPRINTF(sc, fmt, ...)
81178354Ssam#define DPRINTFN(sc, n, fmt, ...)
82156321Sdamien#endif
83156321Sdamien
84178354Ssamstatic struct ieee80211vap *rt2661_vap_create(struct ieee80211com *,
85178354Ssam			    const char name[IFNAMSIZ], int unit, int opmode,
86178354Ssam			    int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
87178354Ssam			    const uint8_t mac[IEEE80211_ADDR_LEN]);
88178354Ssamstatic void		rt2661_vap_delete(struct ieee80211vap *);
89156321Sdamienstatic void		rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
90156321Sdamien			    int);
91156321Sdamienstatic int		rt2661_alloc_tx_ring(struct rt2661_softc *,
92156321Sdamien			    struct rt2661_tx_ring *, int);
93156321Sdamienstatic void		rt2661_reset_tx_ring(struct rt2661_softc *,
94156321Sdamien			    struct rt2661_tx_ring *);
95156321Sdamienstatic void		rt2661_free_tx_ring(struct rt2661_softc *,
96156321Sdamien			    struct rt2661_tx_ring *);
97156321Sdamienstatic int		rt2661_alloc_rx_ring(struct rt2661_softc *,
98156321Sdamien			    struct rt2661_rx_ring *, int);
99156321Sdamienstatic void		rt2661_reset_rx_ring(struct rt2661_softc *,
100156321Sdamien			    struct rt2661_rx_ring *);
101156321Sdamienstatic void		rt2661_free_rx_ring(struct rt2661_softc *,
102156321Sdamien			    struct rt2661_rx_ring *);
103178354Ssamstatic void		rt2661_newassoc(struct ieee80211_node *, int);
104178354Ssamstatic int		rt2661_newstate(struct ieee80211vap *,
105156321Sdamien			    enum ieee80211_state, int);
106156321Sdamienstatic uint16_t		rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
107156321Sdamienstatic void		rt2661_rx_intr(struct rt2661_softc *);
108156321Sdamienstatic void		rt2661_tx_intr(struct rt2661_softc *);
109156321Sdamienstatic void		rt2661_tx_dma_intr(struct rt2661_softc *,
110156321Sdamien			    struct rt2661_tx_ring *);
111156321Sdamienstatic void		rt2661_mcu_beacon_expire(struct rt2661_softc *);
112156321Sdamienstatic void		rt2661_mcu_wakeup(struct rt2661_softc *);
113156321Sdamienstatic void		rt2661_mcu_cmd_intr(struct rt2661_softc *);
114170530Ssamstatic void		rt2661_scan_start(struct ieee80211com *);
115170530Ssamstatic void		rt2661_scan_end(struct ieee80211com *);
116170530Ssamstatic void		rt2661_set_channel(struct ieee80211com *);
117156321Sdamienstatic void		rt2661_setup_tx_desc(struct rt2661_softc *,
118156321Sdamien			    struct rt2661_tx_desc *, uint32_t, uint16_t, int,
119156321Sdamien			    int, const bus_dma_segment_t *, int, int);
120156321Sdamienstatic int		rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
121156321Sdamien			    struct ieee80211_node *, int);
122156321Sdamienstatic int		rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
123156321Sdamien			    struct ieee80211_node *);
124178354Ssamstatic void		rt2661_start_locked(struct ifnet *);
125156321Sdamienstatic void		rt2661_start(struct ifnet *);
126178354Ssamstatic int		rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *,
127178354Ssam			    const struct ieee80211_bpf_params *);
128165352Sbmsstatic void		rt2661_watchdog(void *);
129156321Sdamienstatic int		rt2661_ioctl(struct ifnet *, u_long, caddr_t);
130156321Sdamienstatic void		rt2661_bbp_write(struct rt2661_softc *, uint8_t,
131156321Sdamien			    uint8_t);
132156321Sdamienstatic uint8_t		rt2661_bbp_read(struct rt2661_softc *, uint8_t);
133156321Sdamienstatic void		rt2661_rf_write(struct rt2661_softc *, uint8_t,
134156321Sdamien			    uint32_t);
135156321Sdamienstatic int		rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
136156321Sdamien			    uint16_t);
137156321Sdamienstatic void		rt2661_select_antenna(struct rt2661_softc *);
138156321Sdamienstatic void		rt2661_enable_mrr(struct rt2661_softc *);
139156321Sdamienstatic void		rt2661_set_txpreamble(struct rt2661_softc *);
140156321Sdamienstatic void		rt2661_set_basicrates(struct rt2661_softc *,
141156321Sdamien			    const struct ieee80211_rateset *);
142156321Sdamienstatic void		rt2661_select_band(struct rt2661_softc *,
143156321Sdamien			    struct ieee80211_channel *);
144156321Sdamienstatic void		rt2661_set_chan(struct rt2661_softc *,
145156321Sdamien			    struct ieee80211_channel *);
146156321Sdamienstatic void		rt2661_set_bssid(struct rt2661_softc *,
147156321Sdamien			    const uint8_t *);
148156321Sdamienstatic void		rt2661_set_macaddr(struct rt2661_softc *,
149156321Sdamien			   const uint8_t *);
150178354Ssamstatic void		rt2661_update_promisc(struct ifnet *);
151156321Sdamienstatic int		rt2661_wme_update(struct ieee80211com *) __unused;
152156321Sdamienstatic void		rt2661_update_slot(struct ifnet *);
153156321Sdamienstatic const char	*rt2661_get_rf(int);
154178354Ssamstatic void		rt2661_read_eeprom(struct rt2661_softc *,
155190526Ssam			    uint8_t macaddr[IEEE80211_ADDR_LEN]);
156156321Sdamienstatic int		rt2661_bbp_init(struct rt2661_softc *);
157178354Ssamstatic void		rt2661_init_locked(struct rt2661_softc *);
158156321Sdamienstatic void		rt2661_init(void *);
159178354Ssamstatic void             rt2661_stop_locked(struct rt2661_softc *);
160156321Sdamienstatic void		rt2661_stop(void *);
161178354Ssamstatic int		rt2661_load_microcode(struct rt2661_softc *);
162156321Sdamien#ifdef notyet
163156321Sdamienstatic void		rt2661_rx_tune(struct rt2661_softc *);
164156321Sdamienstatic void		rt2661_radar_start(struct rt2661_softc *);
165156321Sdamienstatic int		rt2661_radar_stop(struct rt2661_softc *);
166156321Sdamien#endif
167178354Ssamstatic int		rt2661_prepare_beacon(struct rt2661_softc *,
168178354Ssam			    struct ieee80211vap *);
169156321Sdamienstatic void		rt2661_enable_tsf_sync(struct rt2661_softc *);
170192468Ssamstatic void		rt2661_enable_tsf(struct rt2661_softc *);
171156321Sdamienstatic int		rt2661_get_rssi(struct rt2661_softc *, uint8_t);
172156321Sdamien
173156321Sdamienstatic const struct {
174156321Sdamien	uint32_t	reg;
175156321Sdamien	uint32_t	val;
176156321Sdamien} rt2661_def_mac[] = {
177156321Sdamien	RT2661_DEF_MAC
178156321Sdamien};
179156321Sdamien
180156321Sdamienstatic const struct {
181156321Sdamien	uint8_t	reg;
182156321Sdamien	uint8_t	val;
183156321Sdamien} rt2661_def_bbp[] = {
184156321Sdamien	RT2661_DEF_BBP
185156321Sdamien};
186156321Sdamien
187156321Sdamienstatic const struct rfprog {
188156321Sdamien	uint8_t		chan;
189156321Sdamien	uint32_t	r1, r2, r3, r4;
190156321Sdamien}  rt2661_rf5225_1[] = {
191156321Sdamien	RT2661_RF5225_1
192156321Sdamien}, rt2661_rf5225_2[] = {
193156321Sdamien	RT2661_RF5225_2
194156321Sdamien};
195156321Sdamien
196156321Sdamienint
197156321Sdamienrt2661_attach(device_t dev, int id)
198156321Sdamien{
199156321Sdamien	struct rt2661_softc *sc = device_get_softc(dev);
200178354Ssam	struct ieee80211com *ic;
201156321Sdamien	struct ifnet *ifp;
202156321Sdamien	uint32_t val;
203178354Ssam	int error, ac, ntries;
204178354Ssam	uint8_t bands;
205190526Ssam	uint8_t macaddr[IEEE80211_ADDR_LEN];
206156321Sdamien
207178354Ssam	sc->sc_id = id;
208156321Sdamien	sc->sc_dev = dev;
209156321Sdamien
210178354Ssam	ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
211178354Ssam	if (ifp == NULL) {
212178354Ssam		device_printf(sc->sc_dev, "can not if_alloc()\n");
213178354Ssam		return ENOMEM;
214178354Ssam	}
215178354Ssam	ic = ifp->if_l2com;
216178354Ssam
217156321Sdamien	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
218156321Sdamien	    MTX_DEF | MTX_RECURSE);
219156321Sdamien
220165352Sbms	callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
221156321Sdamien
222156321Sdamien	/* wait for NIC to initialize */
223156321Sdamien	for (ntries = 0; ntries < 1000; ntries++) {
224156321Sdamien		if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
225156321Sdamien			break;
226156321Sdamien		DELAY(1000);
227156321Sdamien	}
228156321Sdamien	if (ntries == 1000) {
229156321Sdamien		device_printf(sc->sc_dev,
230156321Sdamien		    "timeout waiting for NIC to initialize\n");
231156321Sdamien		error = EIO;
232156321Sdamien		goto fail1;
233156321Sdamien	}
234156321Sdamien
235156321Sdamien	/* retrieve RF rev. no and various other things from EEPROM */
236190526Ssam	rt2661_read_eeprom(sc, macaddr);
237156321Sdamien
238156321Sdamien	device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
239156321Sdamien	    rt2661_get_rf(sc->rf_rev));
240156321Sdamien
241156321Sdamien	/*
242156321Sdamien	 * Allocate Tx and Rx rings.
243156321Sdamien	 */
244156321Sdamien	for (ac = 0; ac < 4; ac++) {
245156321Sdamien		error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
246156321Sdamien		    RT2661_TX_RING_COUNT);
247156321Sdamien		if (error != 0) {
248156321Sdamien			device_printf(sc->sc_dev,
249156321Sdamien			    "could not allocate Tx ring %d\n", ac);
250156321Sdamien			goto fail2;
251156321Sdamien		}
252156321Sdamien	}
253156321Sdamien
254156321Sdamien	error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
255156321Sdamien	if (error != 0) {
256156321Sdamien		device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
257156321Sdamien		goto fail2;
258156321Sdamien	}
259156321Sdamien
260156321Sdamien	error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
261156321Sdamien	if (error != 0) {
262156321Sdamien		device_printf(sc->sc_dev, "could not allocate Rx ring\n");
263156321Sdamien		goto fail3;
264156321Sdamien	}
265156321Sdamien
266156321Sdamien	ifp->if_softc = sc;
267156321Sdamien	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
268156321Sdamien	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
269156321Sdamien	ifp->if_init = rt2661_init;
270156321Sdamien	ifp->if_ioctl = rt2661_ioctl;
271156321Sdamien	ifp->if_start = rt2661_start;
272156321Sdamien	IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
273156321Sdamien	ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
274156321Sdamien	IFQ_SET_READY(&ifp->if_snd);
275156321Sdamien
276156321Sdamien	ic->ic_ifp = ifp;
277178354Ssam	ic->ic_opmode = IEEE80211_M_STA;
278156321Sdamien	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
279156321Sdamien
280156321Sdamien	/* set device capabilities */
281156321Sdamien	ic->ic_caps =
282178957Ssam		  IEEE80211_C_STA		/* station mode */
283178957Ssam		| IEEE80211_C_IBSS		/* ibss, nee adhoc, mode */
284178354Ssam		| IEEE80211_C_HOSTAP		/* hostap mode */
285178354Ssam		| IEEE80211_C_MONITOR		/* monitor mode */
286178354Ssam		| IEEE80211_C_AHDEMO		/* adhoc demo mode */
287178354Ssam		| IEEE80211_C_WDS		/* 4-address traffic works */
288195618Srpaulo		| IEEE80211_C_MBSS		/* mesh point link mode */
289178354Ssam		| IEEE80211_C_SHPREAMBLE	/* short preamble supported */
290178354Ssam		| IEEE80211_C_SHSLOT		/* short slot time supported */
291178354Ssam		| IEEE80211_C_WPA		/* capable of WPA1+WPA2 */
292178354Ssam		| IEEE80211_C_BGSCAN		/* capable of bg scanning */
293156407Sdamien#ifdef notyet
294178354Ssam		| IEEE80211_C_TXFRAG		/* handle tx frags */
295178354Ssam		| IEEE80211_C_WME		/* 802.11e */
296156407Sdamien#endif
297178354Ssam		;
298156321Sdamien
299170530Ssam	bands = 0;
300170530Ssam	setbit(&bands, IEEE80211_MODE_11B);
301170530Ssam	setbit(&bands, IEEE80211_MODE_11G);
302170530Ssam	if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325)
303170530Ssam		setbit(&bands, IEEE80211_MODE_11A);
304178354Ssam	ieee80211_init_channels(ic, NULL, &bands);
305156321Sdamien
306190526Ssam	ieee80211_ifattach(ic, macaddr);
307178354Ssam	ic->ic_newassoc = rt2661_newassoc;
308178354Ssam#if 0
309178354Ssam	ic->ic_wme.wme_update = rt2661_wme_update;
310178354Ssam#endif
311170530Ssam	ic->ic_scan_start = rt2661_scan_start;
312170530Ssam	ic->ic_scan_end = rt2661_scan_end;
313170530Ssam	ic->ic_set_channel = rt2661_set_channel;
314156321Sdamien	ic->ic_updateslot = rt2661_update_slot;
315178354Ssam	ic->ic_update_promisc = rt2661_update_promisc;
316178354Ssam	ic->ic_raw_xmit = rt2661_raw_xmit;
317156321Sdamien
318178354Ssam	ic->ic_vap_create = rt2661_vap_create;
319178354Ssam	ic->ic_vap_delete = rt2661_vap_delete;
320156321Sdamien
321192468Ssam	ieee80211_radiotap_attach(ic,
322192468Ssam	    &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
323192468Ssam		RT2661_TX_RADIOTAP_PRESENT,
324192468Ssam	    &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
325192468Ssam		RT2661_RX_RADIOTAP_PRESENT);
326178354Ssam
327178354Ssam#ifdef RAL_DEBUG
328156321Sdamien	SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
329178354Ssam	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
330178354Ssam	    "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
331178354Ssam#endif
332156321Sdamien	if (bootverbose)
333156321Sdamien		ieee80211_announce(ic);
334156321Sdamien
335156321Sdamien	return 0;
336156321Sdamien
337156321Sdamienfail3:	rt2661_free_tx_ring(sc, &sc->mgtq);
338156321Sdamienfail2:	while (--ac >= 0)
339156321Sdamien		rt2661_free_tx_ring(sc, &sc->txq[ac]);
340156321Sdamienfail1:	mtx_destroy(&sc->sc_mtx);
341178354Ssam	if_free(ifp);
342156321Sdamien	return error;
343156321Sdamien}
344156321Sdamien
345156321Sdamienint
346156321Sdamienrt2661_detach(void *xsc)
347156321Sdamien{
348156321Sdamien	struct rt2661_softc *sc = xsc;
349178354Ssam	struct ifnet *ifp = sc->sc_ifp;
350178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
351170530Ssam
352178038Ssam	RAL_LOCK(sc);
353178038Ssam	rt2661_stop_locked(sc);
354178038Ssam	RAL_UNLOCK(sc);
355156321Sdamien
356156321Sdamien	ieee80211_ifdetach(ic);
357156321Sdamien
358156321Sdamien	rt2661_free_tx_ring(sc, &sc->txq[0]);
359156321Sdamien	rt2661_free_tx_ring(sc, &sc->txq[1]);
360156321Sdamien	rt2661_free_tx_ring(sc, &sc->txq[2]);
361156321Sdamien	rt2661_free_tx_ring(sc, &sc->txq[3]);
362156321Sdamien	rt2661_free_tx_ring(sc, &sc->mgtq);
363156321Sdamien	rt2661_free_rx_ring(sc, &sc->rxq);
364156321Sdamien
365156321Sdamien	if_free(ifp);
366156321Sdamien
367156321Sdamien	mtx_destroy(&sc->sc_mtx);
368156321Sdamien
369156321Sdamien	return 0;
370156321Sdamien}
371156321Sdamien
372178354Ssamstatic struct ieee80211vap *
373178354Ssamrt2661_vap_create(struct ieee80211com *ic,
374178354Ssam	const char name[IFNAMSIZ], int unit, int opmode, int flags,
375178354Ssam	const uint8_t bssid[IEEE80211_ADDR_LEN],
376178354Ssam	const uint8_t mac[IEEE80211_ADDR_LEN])
377178354Ssam{
378178354Ssam	struct ifnet *ifp = ic->ic_ifp;
379178354Ssam	struct rt2661_vap *rvp;
380178354Ssam	struct ieee80211vap *vap;
381178354Ssam
382178354Ssam	switch (opmode) {
383178354Ssam	case IEEE80211_M_STA:
384178354Ssam	case IEEE80211_M_IBSS:
385178354Ssam	case IEEE80211_M_AHDEMO:
386178354Ssam	case IEEE80211_M_MONITOR:
387178354Ssam	case IEEE80211_M_HOSTAP:
388195618Srpaulo	case IEEE80211_M_MBSS:
389195618Srpaulo		/* XXXRP: TBD */
390178354Ssam		if (!TAILQ_EMPTY(&ic->ic_vaps)) {
391178354Ssam			if_printf(ifp, "only 1 vap supported\n");
392178354Ssam			return NULL;
393178354Ssam		}
394178354Ssam		if (opmode == IEEE80211_M_STA)
395178354Ssam			flags |= IEEE80211_CLONE_NOBEACONS;
396178354Ssam		break;
397178354Ssam	case IEEE80211_M_WDS:
398178354Ssam		if (TAILQ_EMPTY(&ic->ic_vaps) ||
399178354Ssam		    ic->ic_opmode != IEEE80211_M_HOSTAP) {
400178354Ssam			if_printf(ifp, "wds only supported in ap mode\n");
401178354Ssam			return NULL;
402178354Ssam		}
403178354Ssam		/*
404178354Ssam		 * Silently remove any request for a unique
405178354Ssam		 * bssid; WDS vap's always share the local
406178354Ssam		 * mac address.
407178354Ssam		 */
408178354Ssam		flags &= ~IEEE80211_CLONE_BSSID;
409178354Ssam		break;
410178354Ssam	default:
411178354Ssam		if_printf(ifp, "unknown opmode %d\n", opmode);
412178354Ssam		return NULL;
413178354Ssam	}
414178354Ssam	rvp = (struct rt2661_vap *) malloc(sizeof(struct rt2661_vap),
415178354Ssam	    M_80211_VAP, M_NOWAIT | M_ZERO);
416178354Ssam	if (rvp == NULL)
417178354Ssam		return NULL;
418178354Ssam	vap = &rvp->ral_vap;
419178354Ssam	ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
420178354Ssam
421178354Ssam	/* override state transition machine */
422178354Ssam	rvp->ral_newstate = vap->iv_newstate;
423178354Ssam	vap->iv_newstate = rt2661_newstate;
424178354Ssam#if 0
425178354Ssam	vap->iv_update_beacon = rt2661_beacon_update;
426178354Ssam#endif
427178354Ssam
428206358Srpaulo	ieee80211_ratectl_init(vap);
429178354Ssam	/* complete setup */
430178354Ssam	ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
431178354Ssam	if (TAILQ_FIRST(&ic->ic_vaps) == vap)
432178354Ssam		ic->ic_opmode = opmode;
433178354Ssam	return vap;
434178354Ssam}
435178354Ssam
436178354Ssamstatic void
437178354Ssamrt2661_vap_delete(struct ieee80211vap *vap)
438178354Ssam{
439178354Ssam	struct rt2661_vap *rvp = RT2661_VAP(vap);
440178354Ssam
441206358Srpaulo	ieee80211_ratectl_deinit(vap);
442178354Ssam	ieee80211_vap_detach(vap);
443178354Ssam	free(rvp, M_80211_VAP);
444178354Ssam}
445178354Ssam
446156321Sdamienvoid
447156321Sdamienrt2661_shutdown(void *xsc)
448156321Sdamien{
449156321Sdamien	struct rt2661_softc *sc = xsc;
450156321Sdamien
451156321Sdamien	rt2661_stop(sc);
452156321Sdamien}
453156321Sdamien
454156321Sdamienvoid
455156321Sdamienrt2661_suspend(void *xsc)
456156321Sdamien{
457156321Sdamien	struct rt2661_softc *sc = xsc;
458156321Sdamien
459156321Sdamien	rt2661_stop(sc);
460156321Sdamien}
461156321Sdamien
462156321Sdamienvoid
463156321Sdamienrt2661_resume(void *xsc)
464156321Sdamien{
465156321Sdamien	struct rt2661_softc *sc = xsc;
466178354Ssam	struct ifnet *ifp = sc->sc_ifp;
467156321Sdamien
468178354Ssam	if (ifp->if_flags & IFF_UP)
469178354Ssam		rt2661_init(sc);
470156321Sdamien}
471156321Sdamien
472156321Sdamienstatic void
473156321Sdamienrt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
474156321Sdamien{
475156321Sdamien	if (error != 0)
476156321Sdamien		return;
477156321Sdamien
478156321Sdamien	KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
479156321Sdamien
480156321Sdamien	*(bus_addr_t *)arg = segs[0].ds_addr;
481156321Sdamien}
482156321Sdamien
483156321Sdamienstatic int
484156321Sdamienrt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
485156321Sdamien    int count)
486156321Sdamien{
487156321Sdamien	int i, error;
488156321Sdamien
489156321Sdamien	ring->count = count;
490156321Sdamien	ring->queued = 0;
491156321Sdamien	ring->cur = ring->next = ring->stat = 0;
492156321Sdamien
493171535Skevlo	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
494171535Skevlo	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
495171535Skevlo	    count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE,
496171535Skevlo	    0, NULL, NULL, &ring->desc_dmat);
497156321Sdamien	if (error != 0) {
498156321Sdamien		device_printf(sc->sc_dev, "could not create desc DMA tag\n");
499156321Sdamien		goto fail;
500156321Sdamien	}
501156321Sdamien
502156321Sdamien	error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
503156321Sdamien	    BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
504156321Sdamien	if (error != 0) {
505156321Sdamien		device_printf(sc->sc_dev, "could not allocate DMA memory\n");
506156321Sdamien		goto fail;
507156321Sdamien	}
508156321Sdamien
509156321Sdamien	error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
510156321Sdamien	    count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
511156321Sdamien	    0);
512156321Sdamien	if (error != 0) {
513156321Sdamien		device_printf(sc->sc_dev, "could not load desc DMA map\n");
514156321Sdamien		goto fail;
515156321Sdamien	}
516156321Sdamien
517156321Sdamien	ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
518156321Sdamien	    M_NOWAIT | M_ZERO);
519156321Sdamien	if (ring->data == NULL) {
520156321Sdamien		device_printf(sc->sc_dev, "could not allocate soft data\n");
521156321Sdamien		error = ENOMEM;
522156321Sdamien		goto fail;
523156321Sdamien	}
524156321Sdamien
525171535Skevlo	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
526171535Skevlo	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
527171535Skevlo	    RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
528156321Sdamien	if (error != 0) {
529156321Sdamien		device_printf(sc->sc_dev, "could not create data DMA tag\n");
530156321Sdamien		goto fail;
531156321Sdamien	}
532156321Sdamien
533156321Sdamien	for (i = 0; i < count; i++) {
534156321Sdamien		error = bus_dmamap_create(ring->data_dmat, 0,
535156321Sdamien		    &ring->data[i].map);
536156321Sdamien		if (error != 0) {
537156321Sdamien			device_printf(sc->sc_dev, "could not create DMA map\n");
538156321Sdamien			goto fail;
539156321Sdamien		}
540156321Sdamien	}
541156321Sdamien
542156321Sdamien	return 0;
543156321Sdamien
544156321Sdamienfail:	rt2661_free_tx_ring(sc, ring);
545156321Sdamien	return error;
546156321Sdamien}
547156321Sdamien
548156321Sdamienstatic void
549156321Sdamienrt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
550156321Sdamien{
551156321Sdamien	struct rt2661_tx_desc *desc;
552156321Sdamien	struct rt2661_tx_data *data;
553156321Sdamien	int i;
554156321Sdamien
555156321Sdamien	for (i = 0; i < ring->count; i++) {
556156321Sdamien		desc = &ring->desc[i];
557156321Sdamien		data = &ring->data[i];
558156321Sdamien
559156321Sdamien		if (data->m != NULL) {
560156321Sdamien			bus_dmamap_sync(ring->data_dmat, data->map,
561156321Sdamien			    BUS_DMASYNC_POSTWRITE);
562156321Sdamien			bus_dmamap_unload(ring->data_dmat, data->map);
563156321Sdamien			m_freem(data->m);
564156321Sdamien			data->m = NULL;
565156321Sdamien		}
566156321Sdamien
567156321Sdamien		if (data->ni != NULL) {
568156321Sdamien			ieee80211_free_node(data->ni);
569156321Sdamien			data->ni = NULL;
570156321Sdamien		}
571156321Sdamien
572156321Sdamien		desc->flags = 0;
573156321Sdamien	}
574156321Sdamien
575156321Sdamien	bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
576156321Sdamien
577156321Sdamien	ring->queued = 0;
578156321Sdamien	ring->cur = ring->next = ring->stat = 0;
579156321Sdamien}
580156321Sdamien
581156321Sdamienstatic void
582156321Sdamienrt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
583156321Sdamien{
584156321Sdamien	struct rt2661_tx_data *data;
585156321Sdamien	int i;
586156321Sdamien
587156321Sdamien	if (ring->desc != NULL) {
588156321Sdamien		bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
589156321Sdamien		    BUS_DMASYNC_POSTWRITE);
590156321Sdamien		bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
591156321Sdamien		bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
592156321Sdamien	}
593156321Sdamien
594156321Sdamien	if (ring->desc_dmat != NULL)
595156321Sdamien		bus_dma_tag_destroy(ring->desc_dmat);
596156321Sdamien
597156321Sdamien	if (ring->data != NULL) {
598156321Sdamien		for (i = 0; i < ring->count; i++) {
599156321Sdamien			data = &ring->data[i];
600156321Sdamien
601156321Sdamien			if (data->m != NULL) {
602156321Sdamien				bus_dmamap_sync(ring->data_dmat, data->map,
603156321Sdamien				    BUS_DMASYNC_POSTWRITE);
604156321Sdamien				bus_dmamap_unload(ring->data_dmat, data->map);
605156321Sdamien				m_freem(data->m);
606156321Sdamien			}
607156321Sdamien
608156321Sdamien			if (data->ni != NULL)
609156321Sdamien				ieee80211_free_node(data->ni);
610156321Sdamien
611156321Sdamien			if (data->map != NULL)
612156321Sdamien				bus_dmamap_destroy(ring->data_dmat, data->map);
613156321Sdamien		}
614156321Sdamien
615156321Sdamien		free(ring->data, M_DEVBUF);
616156321Sdamien	}
617156321Sdamien
618156321Sdamien	if (ring->data_dmat != NULL)
619156321Sdamien		bus_dma_tag_destroy(ring->data_dmat);
620156321Sdamien}
621156321Sdamien
622156321Sdamienstatic int
623156321Sdamienrt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
624156321Sdamien    int count)
625156321Sdamien{
626156321Sdamien	struct rt2661_rx_desc *desc;
627156321Sdamien	struct rt2661_rx_data *data;
628156321Sdamien	bus_addr_t physaddr;
629156321Sdamien	int i, error;
630156321Sdamien
631156321Sdamien	ring->count = count;
632156321Sdamien	ring->cur = ring->next = 0;
633156321Sdamien
634171535Skevlo	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
635171535Skevlo	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
636171535Skevlo	    count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE,
637171535Skevlo	    0, NULL, NULL, &ring->desc_dmat);
638156321Sdamien	if (error != 0) {
639156321Sdamien		device_printf(sc->sc_dev, "could not create desc DMA tag\n");
640156321Sdamien		goto fail;
641156321Sdamien	}
642156321Sdamien
643156321Sdamien	error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
644156321Sdamien	    BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
645156321Sdamien	if (error != 0) {
646156321Sdamien		device_printf(sc->sc_dev, "could not allocate DMA memory\n");
647156321Sdamien		goto fail;
648156321Sdamien	}
649156321Sdamien
650156321Sdamien	error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
651156321Sdamien	    count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
652156321Sdamien	    0);
653156321Sdamien	if (error != 0) {
654156321Sdamien		device_printf(sc->sc_dev, "could not load desc DMA map\n");
655156321Sdamien		goto fail;
656156321Sdamien	}
657156321Sdamien
658156321Sdamien	ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
659156321Sdamien	    M_NOWAIT | M_ZERO);
660156321Sdamien	if (ring->data == NULL) {
661156321Sdamien		device_printf(sc->sc_dev, "could not allocate soft data\n");
662156321Sdamien		error = ENOMEM;
663156321Sdamien		goto fail;
664156321Sdamien	}
665156321Sdamien
666156321Sdamien	/*
667156321Sdamien	 * Pre-allocate Rx buffers and populate Rx ring.
668156321Sdamien	 */
669171535Skevlo	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
670171535Skevlo	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
671171535Skevlo	    1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
672156321Sdamien	if (error != 0) {
673156321Sdamien		device_printf(sc->sc_dev, "could not create data DMA tag\n");
674156321Sdamien		goto fail;
675156321Sdamien	}
676156321Sdamien
677156321Sdamien	for (i = 0; i < count; i++) {
678156321Sdamien		desc = &sc->rxq.desc[i];
679156321Sdamien		data = &sc->rxq.data[i];
680156321Sdamien
681156321Sdamien		error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
682156321Sdamien		if (error != 0) {
683156321Sdamien			device_printf(sc->sc_dev, "could not create DMA map\n");
684156321Sdamien			goto fail;
685156321Sdamien		}
686156321Sdamien
687156321Sdamien		data->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
688156321Sdamien		if (data->m == NULL) {
689156321Sdamien			device_printf(sc->sc_dev,
690156321Sdamien			    "could not allocate rx mbuf\n");
691156321Sdamien			error = ENOMEM;
692156321Sdamien			goto fail;
693156321Sdamien		}
694156321Sdamien
695156321Sdamien		error = bus_dmamap_load(ring->data_dmat, data->map,
696156321Sdamien		    mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
697156321Sdamien		    &physaddr, 0);
698156321Sdamien		if (error != 0) {
699156321Sdamien			device_printf(sc->sc_dev,
700156321Sdamien			    "could not load rx buf DMA map");
701156321Sdamien			goto fail;
702156321Sdamien		}
703156321Sdamien
704156321Sdamien		desc->flags = htole32(RT2661_RX_BUSY);
705156321Sdamien		desc->physaddr = htole32(physaddr);
706156321Sdamien	}
707156321Sdamien
708156321Sdamien	bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
709156321Sdamien
710156321Sdamien	return 0;
711156321Sdamien
712156321Sdamienfail:	rt2661_free_rx_ring(sc, ring);
713156321Sdamien	return error;
714156321Sdamien}
715156321Sdamien
716156321Sdamienstatic void
717156321Sdamienrt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
718156321Sdamien{
719156321Sdamien	int i;
720156321Sdamien
721156321Sdamien	for (i = 0; i < ring->count; i++)
722156321Sdamien		ring->desc[i].flags = htole32(RT2661_RX_BUSY);
723156321Sdamien
724156321Sdamien	bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
725156321Sdamien
726156321Sdamien	ring->cur = ring->next = 0;
727156321Sdamien}
728156321Sdamien
729156321Sdamienstatic void
730156321Sdamienrt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
731156321Sdamien{
732156321Sdamien	struct rt2661_rx_data *data;
733156321Sdamien	int i;
734156321Sdamien
735156321Sdamien	if (ring->desc != NULL) {
736156321Sdamien		bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
737156321Sdamien		    BUS_DMASYNC_POSTWRITE);
738156321Sdamien		bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
739156321Sdamien		bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
740156321Sdamien	}
741156321Sdamien
742156321Sdamien	if (ring->desc_dmat != NULL)
743156321Sdamien		bus_dma_tag_destroy(ring->desc_dmat);
744156321Sdamien
745156321Sdamien	if (ring->data != NULL) {
746156321Sdamien		for (i = 0; i < ring->count; i++) {
747156321Sdamien			data = &ring->data[i];
748156321Sdamien
749156321Sdamien			if (data->m != NULL) {
750156321Sdamien				bus_dmamap_sync(ring->data_dmat, data->map,
751156321Sdamien				    BUS_DMASYNC_POSTREAD);
752156321Sdamien				bus_dmamap_unload(ring->data_dmat, data->map);
753156321Sdamien				m_freem(data->m);
754156321Sdamien			}
755156321Sdamien
756156321Sdamien			if (data->map != NULL)
757156321Sdamien				bus_dmamap_destroy(ring->data_dmat, data->map);
758156321Sdamien		}
759156321Sdamien
760156321Sdamien		free(ring->data, M_DEVBUF);
761156321Sdamien	}
762156321Sdamien
763156321Sdamien	if (ring->data_dmat != NULL)
764156321Sdamien		bus_dma_tag_destroy(ring->data_dmat);
765156321Sdamien}
766156321Sdamien
767156321Sdamienstatic void
768178354Ssamrt2661_newassoc(struct ieee80211_node *ni, int isnew)
769156321Sdamien{
770206358Srpaulo	/* XXX move */
771206358Srpaulo	ieee80211_ratectl_node_init(ni);
772156321Sdamien}
773156321Sdamien
774156321Sdamienstatic int
775178354Ssamrt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
776156321Sdamien{
777178354Ssam	struct rt2661_vap *rvp = RT2661_VAP(vap);
778178354Ssam	struct ieee80211com *ic = vap->iv_ic;
779156321Sdamien	struct rt2661_softc *sc = ic->ic_ifp->if_softc;
780178354Ssam	int error;
781156321Sdamien
782178354Ssam	if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
783178354Ssam		uint32_t tmp;
784156321Sdamien
785178354Ssam		/* abort TSF synchronization */
786178354Ssam		tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
787178354Ssam		RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
788178354Ssam	}
789156321Sdamien
790178354Ssam	error = rvp->ral_newstate(vap, nstate, arg);
791156321Sdamien
792178354Ssam	if (error == 0 && nstate == IEEE80211_S_RUN) {
793178354Ssam		struct ieee80211_node *ni = vap->iv_bss;
794178354Ssam
795178354Ssam		if (vap->iv_opmode != IEEE80211_M_MONITOR) {
796156321Sdamien			rt2661_enable_mrr(sc);
797156321Sdamien			rt2661_set_txpreamble(sc);
798156321Sdamien			rt2661_set_basicrates(sc, &ni->ni_rates);
799156321Sdamien			rt2661_set_bssid(sc, ni->ni_bssid);
800156321Sdamien		}
801156321Sdamien
802178354Ssam		if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
803195618Srpaulo		    vap->iv_opmode == IEEE80211_M_IBSS ||
804195618Srpaulo		    vap->iv_opmode == IEEE80211_M_MBSS) {
805178354Ssam			error = rt2661_prepare_beacon(sc, vap);
806178354Ssam			if (error != 0)
807178354Ssam				return error;
808156321Sdamien		}
809184345Ssam		if (vap->iv_opmode != IEEE80211_M_MONITOR)
810156321Sdamien			rt2661_enable_tsf_sync(sc);
811192468Ssam		else
812192468Ssam			rt2661_enable_tsf(sc);
813178354Ssam	}
814178354Ssam	return error;
815156321Sdamien}
816156321Sdamien
817156321Sdamien/*
818156321Sdamien * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
819156321Sdamien * 93C66).
820156321Sdamien */
821156321Sdamienstatic uint16_t
822156321Sdamienrt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
823156321Sdamien{
824156321Sdamien	uint32_t tmp;
825156321Sdamien	uint16_t val;
826156321Sdamien	int n;
827156321Sdamien
828156321Sdamien	/* clock C once before the first command */
829156321Sdamien	RT2661_EEPROM_CTL(sc, 0);
830156321Sdamien
831156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S);
832156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
833156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S);
834156321Sdamien
835156321Sdamien	/* write start bit (1) */
836156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
837156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
838156321Sdamien
839156321Sdamien	/* write READ opcode (10) */
840156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
841156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
842156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S);
843156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
844156321Sdamien
845156321Sdamien	/* write address (A5-A0 or A7-A0) */
846156321Sdamien	n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
847156321Sdamien	for (; n >= 0; n--) {
848156321Sdamien		RT2661_EEPROM_CTL(sc, RT2661_S |
849156321Sdamien		    (((addr >> n) & 1) << RT2661_SHIFT_D));
850156321Sdamien		RT2661_EEPROM_CTL(sc, RT2661_S |
851156321Sdamien		    (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
852156321Sdamien	}
853156321Sdamien
854156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S);
855156321Sdamien
856156321Sdamien	/* read data Q15-Q0 */
857156321Sdamien	val = 0;
858156321Sdamien	for (n = 15; n >= 0; n--) {
859156321Sdamien		RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
860156321Sdamien		tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
861156321Sdamien		val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
862156321Sdamien		RT2661_EEPROM_CTL(sc, RT2661_S);
863156321Sdamien	}
864156321Sdamien
865156321Sdamien	RT2661_EEPROM_CTL(sc, 0);
866156321Sdamien
867156321Sdamien	/* clear Chip Select and clock C */
868156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S);
869156321Sdamien	RT2661_EEPROM_CTL(sc, 0);
870156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_C);
871156321Sdamien
872156321Sdamien	return val;
873156321Sdamien}
874156321Sdamien
875156321Sdamienstatic void
876156321Sdamienrt2661_tx_intr(struct rt2661_softc *sc)
877156321Sdamien{
878178354Ssam	struct ifnet *ifp = sc->sc_ifp;
879156321Sdamien	struct rt2661_tx_ring *txq;
880156321Sdamien	struct rt2661_tx_data *data;
881156321Sdamien	uint32_t val;
882156321Sdamien	int qid, retrycnt;
883206358Srpaulo	struct ieee80211vap *vap;
884156321Sdamien
885156321Sdamien	for (;;) {
886170530Ssam		struct ieee80211_node *ni;
887170530Ssam		struct mbuf *m;
888170530Ssam
889156321Sdamien		val = RAL_READ(sc, RT2661_STA_CSR4);
890156321Sdamien		if (!(val & RT2661_TX_STAT_VALID))
891156321Sdamien			break;
892156321Sdamien
893156321Sdamien		/* retrieve the queue in which this frame was sent */
894156321Sdamien		qid = RT2661_TX_QID(val);
895156321Sdamien		txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
896156321Sdamien
897156321Sdamien		/* retrieve rate control algorithm context */
898156321Sdamien		data = &txq->data[txq->stat];
899170530Ssam		m = data->m;
900170530Ssam		data->m = NULL;
901170530Ssam		ni = data->ni;
902170530Ssam		data->ni = NULL;
903206358Srpaulo		vap = ni->ni_vap;
904156321Sdamien
905159301Sfjoe		/* if no frame has been sent, ignore */
906170530Ssam		if (ni == NULL)
907159301Sfjoe			continue;
908159301Sfjoe
909156321Sdamien		switch (RT2661_TX_RESULT(val)) {
910156321Sdamien		case RT2661_TX_SUCCESS:
911156321Sdamien			retrycnt = RT2661_TX_RETRYCNT(val);
912156321Sdamien
913178354Ssam			DPRINTFN(sc, 10, "data frame sent successfully after "
914178354Ssam			    "%d retries\n", retrycnt);
915178354Ssam			if (data->rix != IEEE80211_FIXED_RATE_NONE)
916206358Srpaulo				ieee80211_ratectl_tx_complete(vap, ni,
917206358Srpaulo				    IEEE80211_RATECTL_TX_SUCCESS,
918206358Srpaulo				    &retrycnt, NULL);
919156321Sdamien			ifp->if_opackets++;
920156321Sdamien			break;
921156321Sdamien
922156321Sdamien		case RT2661_TX_RETRY_FAIL:
923178354Ssam			retrycnt = RT2661_TX_RETRYCNT(val);
924178354Ssam
925178354Ssam			DPRINTFN(sc, 9, "%s\n",
926178354Ssam			    "sending data frame failed (too much retries)");
927178354Ssam			if (data->rix != IEEE80211_FIXED_RATE_NONE)
928206358Srpaulo				ieee80211_ratectl_tx_complete(vap, ni,
929206358Srpaulo				    IEEE80211_RATECTL_TX_FAILURE,
930206358Srpaulo				    &retrycnt, NULL);
931156321Sdamien			ifp->if_oerrors++;
932156321Sdamien			break;
933156321Sdamien
934156321Sdamien		default:
935156321Sdamien			/* other failure */
936156321Sdamien			device_printf(sc->sc_dev,
937156321Sdamien			    "sending data frame failed 0x%08x\n", val);
938156321Sdamien			ifp->if_oerrors++;
939156321Sdamien		}
940156321Sdamien
941178354Ssam		DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat);
942156321Sdamien
943156321Sdamien		txq->queued--;
944156321Sdamien		if (++txq->stat >= txq->count)	/* faster than % count */
945156321Sdamien			txq->stat = 0;
946170530Ssam
947170530Ssam		if (m->m_flags & M_TXCB)
948170530Ssam			ieee80211_process_callback(ni, m,
949170530Ssam				RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS);
950170530Ssam		m_freem(m);
951170530Ssam		ieee80211_free_node(ni);
952156321Sdamien	}
953156321Sdamien
954156321Sdamien	sc->sc_tx_timer = 0;
955156321Sdamien	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
956178354Ssam
957178354Ssam	rt2661_start_locked(ifp);
958156321Sdamien}
959156321Sdamien
960156321Sdamienstatic void
961156321Sdamienrt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
962156321Sdamien{
963156321Sdamien	struct rt2661_tx_desc *desc;
964156321Sdamien	struct rt2661_tx_data *data;
965156321Sdamien
966156321Sdamien	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
967156321Sdamien
968156321Sdamien	for (;;) {
969156321Sdamien		desc = &txq->desc[txq->next];
970156321Sdamien		data = &txq->data[txq->next];
971156321Sdamien
972156321Sdamien		if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
973156321Sdamien		    !(le32toh(desc->flags) & RT2661_TX_VALID))
974156321Sdamien			break;
975156321Sdamien
976156321Sdamien		bus_dmamap_sync(txq->data_dmat, data->map,
977156321Sdamien		    BUS_DMASYNC_POSTWRITE);
978156321Sdamien		bus_dmamap_unload(txq->data_dmat, data->map);
979156321Sdamien
980156321Sdamien		/* descriptor is no longer valid */
981156321Sdamien		desc->flags &= ~htole32(RT2661_TX_VALID);
982156321Sdamien
983178354Ssam		DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next);
984156321Sdamien
985156321Sdamien		if (++txq->next >= txq->count)	/* faster than % count */
986156321Sdamien			txq->next = 0;
987156321Sdamien	}
988156321Sdamien
989156321Sdamien	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
990156321Sdamien}
991156321Sdamien
992156321Sdamienstatic void
993156321Sdamienrt2661_rx_intr(struct rt2661_softc *sc)
994156321Sdamien{
995178354Ssam	struct ifnet *ifp = sc->sc_ifp;
996178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
997156321Sdamien	struct rt2661_rx_desc *desc;
998156321Sdamien	struct rt2661_rx_data *data;
999156321Sdamien	bus_addr_t physaddr;
1000156321Sdamien	struct ieee80211_frame *wh;
1001156321Sdamien	struct ieee80211_node *ni;
1002156321Sdamien	struct mbuf *mnew, *m;
1003156321Sdamien	int error;
1004156321Sdamien
1005156321Sdamien	bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1006156321Sdamien	    BUS_DMASYNC_POSTREAD);
1007156321Sdamien
1008156321Sdamien	for (;;) {
1009192468Ssam		int8_t rssi, nf;
1010170530Ssam
1011156321Sdamien		desc = &sc->rxq.desc[sc->rxq.cur];
1012156321Sdamien		data = &sc->rxq.data[sc->rxq.cur];
1013156321Sdamien
1014156321Sdamien		if (le32toh(desc->flags) & RT2661_RX_BUSY)
1015156321Sdamien			break;
1016156321Sdamien
1017156321Sdamien		if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1018156321Sdamien		    (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
1019156321Sdamien			/*
1020156321Sdamien			 * This should not happen since we did not request
1021156321Sdamien			 * to receive those frames when we filled TXRX_CSR0.
1022156321Sdamien			 */
1023178354Ssam			DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
1024178354Ssam			    le32toh(desc->flags));
1025156321Sdamien			ifp->if_ierrors++;
1026156321Sdamien			goto skip;
1027156321Sdamien		}
1028156321Sdamien
1029156321Sdamien		if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
1030156321Sdamien			ifp->if_ierrors++;
1031156321Sdamien			goto skip;
1032156321Sdamien		}
1033156321Sdamien
1034156321Sdamien		/*
1035156321Sdamien		 * Try to allocate a new mbuf for this ring element and load it
1036156321Sdamien		 * before processing the current mbuf. If the ring element
1037156321Sdamien		 * cannot be loaded, drop the received packet and reuse the old
1038156321Sdamien		 * mbuf. In the unlikely case that the old mbuf can't be
1039156321Sdamien		 * reloaded either, explicitly panic.
1040156321Sdamien		 */
1041156321Sdamien		mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1042156321Sdamien		if (mnew == NULL) {
1043156321Sdamien			ifp->if_ierrors++;
1044156321Sdamien			goto skip;
1045156321Sdamien		}
1046156321Sdamien
1047156321Sdamien		bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1048156321Sdamien		    BUS_DMASYNC_POSTREAD);
1049156321Sdamien		bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1050156321Sdamien
1051156321Sdamien		error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1052156321Sdamien		    mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1053156321Sdamien		    &physaddr, 0);
1054156321Sdamien		if (error != 0) {
1055156321Sdamien			m_freem(mnew);
1056156321Sdamien
1057156321Sdamien			/* try to reload the old mbuf */
1058156321Sdamien			error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1059156321Sdamien			    mtod(data->m, void *), MCLBYTES,
1060156321Sdamien			    rt2661_dma_map_addr, &physaddr, 0);
1061156321Sdamien			if (error != 0) {
1062156321Sdamien				/* very unlikely that it will fail... */
1063156321Sdamien				panic("%s: could not load old rx mbuf",
1064156321Sdamien				    device_get_name(sc->sc_dev));
1065156321Sdamien			}
1066156321Sdamien			ifp->if_ierrors++;
1067156321Sdamien			goto skip;
1068156321Sdamien		}
1069156321Sdamien
1070156321Sdamien		/*
1071156321Sdamien	 	 * New mbuf successfully loaded, update Rx ring and continue
1072156321Sdamien		 * processing.
1073156321Sdamien		 */
1074156321Sdamien		m = data->m;
1075156321Sdamien		data->m = mnew;
1076156321Sdamien		desc->physaddr = htole32(physaddr);
1077156321Sdamien
1078156321Sdamien		/* finalize mbuf */
1079156321Sdamien		m->m_pkthdr.rcvif = ifp;
1080156321Sdamien		m->m_pkthdr.len = m->m_len =
1081156321Sdamien		    (le32toh(desc->flags) >> 16) & 0xfff;
1082156321Sdamien
1083170530Ssam		rssi = rt2661_get_rssi(sc, desc->rssi);
1084192468Ssam		/* Error happened during RSSI conversion. */
1085192468Ssam		if (rssi < 0)
1086192468Ssam			rssi = -30;	/* XXX ignored by net80211 */
1087192468Ssam		nf = RT2661_NOISE_FLOOR;
1088170530Ssam
1089192468Ssam		if (ieee80211_radiotap_active(ic)) {
1090156321Sdamien			struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1091156321Sdamien			uint32_t tsf_lo, tsf_hi;
1092156321Sdamien
1093156321Sdamien			/* get timestamp (low and high 32 bits) */
1094156321Sdamien			tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1095156321Sdamien			tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1096156321Sdamien
1097156321Sdamien			tap->wr_tsf =
1098156321Sdamien			    htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1099156321Sdamien			tap->wr_flags = 0;
1100178354Ssam			tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1101178958Ssam			    (desc->flags & htole32(RT2661_RX_OFDM)) ?
1102178958Ssam				IEEE80211_T_OFDM : IEEE80211_T_CCK);
1103192468Ssam			tap->wr_antsignal = nf + rssi;
1104192468Ssam			tap->wr_antnoise = nf;
1105156321Sdamien		}
1106170530Ssam		sc->sc_flags |= RAL_INPUT_RUNNING;
1107170530Ssam		RAL_UNLOCK(sc);
1108156321Sdamien		wh = mtod(m, struct ieee80211_frame *);
1109178354Ssam
1110178354Ssam		/* send the frame to the 802.11 layer */
1111156321Sdamien		ni = ieee80211_find_rxnode(ic,
1112156321Sdamien		    (struct ieee80211_frame_min *)wh);
1113178354Ssam		if (ni != NULL) {
1114192468Ssam			(void) ieee80211_input(ni, m, rssi, nf);
1115178354Ssam			ieee80211_free_node(ni);
1116178354Ssam		} else
1117192468Ssam			(void) ieee80211_input_all(ic, m, rssi, nf);
1118170530Ssam
1119170530Ssam		RAL_LOCK(sc);
1120170530Ssam		sc->sc_flags &= ~RAL_INPUT_RUNNING;
1121156321Sdamien
1122156321Sdamienskip:		desc->flags |= htole32(RT2661_RX_BUSY);
1123156321Sdamien
1124178354Ssam		DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur);
1125156321Sdamien
1126156321Sdamien		sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1127156321Sdamien	}
1128156321Sdamien
1129156321Sdamien	bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1130156321Sdamien	    BUS_DMASYNC_PREWRITE);
1131156321Sdamien}
1132156321Sdamien
1133156321Sdamien/* ARGSUSED */
1134156321Sdamienstatic void
1135156321Sdamienrt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1136156321Sdamien{
1137156321Sdamien	/* do nothing */
1138156321Sdamien}
1139156321Sdamien
1140156321Sdamienstatic void
1141156321Sdamienrt2661_mcu_wakeup(struct rt2661_softc *sc)
1142156321Sdamien{
1143156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1144156321Sdamien
1145156321Sdamien	RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1146156321Sdamien	RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1147156321Sdamien	RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1148156321Sdamien
1149156321Sdamien	/* send wakeup command to MCU */
1150156321Sdamien	rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1151156321Sdamien}
1152156321Sdamien
1153156321Sdamienstatic void
1154156321Sdamienrt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1155156321Sdamien{
1156156321Sdamien	RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1157156321Sdamien	RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1158156321Sdamien}
1159156321Sdamien
1160156321Sdamienvoid
1161156321Sdamienrt2661_intr(void *arg)
1162156321Sdamien{
1163156321Sdamien	struct rt2661_softc *sc = arg;
1164156975Sdamien	struct ifnet *ifp = sc->sc_ifp;
1165156321Sdamien	uint32_t r1, r2;
1166156321Sdamien
1167156321Sdamien	RAL_LOCK(sc);
1168156321Sdamien
1169156321Sdamien	/* disable MAC and MCU interrupts */
1170156321Sdamien	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1171156321Sdamien	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1172156321Sdamien
1173156975Sdamien	/* don't re-enable interrupts if we're shutting down */
1174156975Sdamien	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1175156975Sdamien		RAL_UNLOCK(sc);
1176156975Sdamien		return;
1177156975Sdamien	}
1178156975Sdamien
1179156321Sdamien	r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1180156321Sdamien	RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1181156321Sdamien
1182156321Sdamien	r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1183156321Sdamien	RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1184156321Sdamien
1185156321Sdamien	if (r1 & RT2661_MGT_DONE)
1186156321Sdamien		rt2661_tx_dma_intr(sc, &sc->mgtq);
1187156321Sdamien
1188156321Sdamien	if (r1 & RT2661_RX_DONE)
1189156321Sdamien		rt2661_rx_intr(sc);
1190156321Sdamien
1191156321Sdamien	if (r1 & RT2661_TX0_DMA_DONE)
1192156321Sdamien		rt2661_tx_dma_intr(sc, &sc->txq[0]);
1193156321Sdamien
1194156321Sdamien	if (r1 & RT2661_TX1_DMA_DONE)
1195156321Sdamien		rt2661_tx_dma_intr(sc, &sc->txq[1]);
1196156321Sdamien
1197156321Sdamien	if (r1 & RT2661_TX2_DMA_DONE)
1198156321Sdamien		rt2661_tx_dma_intr(sc, &sc->txq[2]);
1199156321Sdamien
1200156321Sdamien	if (r1 & RT2661_TX3_DMA_DONE)
1201156321Sdamien		rt2661_tx_dma_intr(sc, &sc->txq[3]);
1202156321Sdamien
1203156321Sdamien	if (r1 & RT2661_TX_DONE)
1204156321Sdamien		rt2661_tx_intr(sc);
1205156321Sdamien
1206156321Sdamien	if (r2 & RT2661_MCU_CMD_DONE)
1207156321Sdamien		rt2661_mcu_cmd_intr(sc);
1208156321Sdamien
1209156321Sdamien	if (r2 & RT2661_MCU_BEACON_EXPIRE)
1210156321Sdamien		rt2661_mcu_beacon_expire(sc);
1211156321Sdamien
1212156321Sdamien	if (r2 & RT2661_MCU_WAKEUP)
1213156321Sdamien		rt2661_mcu_wakeup(sc);
1214156321Sdamien
1215156321Sdamien	/* re-enable MAC and MCU interrupts */
1216156321Sdamien	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1217156321Sdamien	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1218156321Sdamien
1219156321Sdamien	RAL_UNLOCK(sc);
1220156321Sdamien}
1221156321Sdamien
1222178958Ssamstatic uint8_t
1223178958Ssamrt2661_plcp_signal(int rate)
1224178958Ssam{
1225178958Ssam	switch (rate) {
1226178958Ssam	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1227178958Ssam	case 12:	return 0xb;
1228178958Ssam	case 18:	return 0xf;
1229178958Ssam	case 24:	return 0xa;
1230178958Ssam	case 36:	return 0xe;
1231178958Ssam	case 48:	return 0x9;
1232178958Ssam	case 72:	return 0xd;
1233178958Ssam	case 96:	return 0x8;
1234178958Ssam	case 108:	return 0xc;
1235178958Ssam
1236178958Ssam	/* CCK rates (NB: not IEEE std, device-specific) */
1237178958Ssam	case 2:		return 0x0;
1238178958Ssam	case 4:		return 0x1;
1239178958Ssam	case 11:	return 0x2;
1240178958Ssam	case 22:	return 0x3;
1241178958Ssam	}
1242178958Ssam	return 0xff;		/* XXX unsupported/unknown rate */
1243178958Ssam}
1244178958Ssam
1245156321Sdamienstatic void
1246156321Sdamienrt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1247156321Sdamien    uint32_t flags, uint16_t xflags, int len, int rate,
1248156321Sdamien    const bus_dma_segment_t *segs, int nsegs, int ac)
1249156321Sdamien{
1250178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1251178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1252156321Sdamien	uint16_t plcp_length;
1253156321Sdamien	int i, remainder;
1254156321Sdamien
1255156321Sdamien	desc->flags = htole32(flags);
1256156321Sdamien	desc->flags |= htole32(len << 16);
1257156321Sdamien	desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
1258156321Sdamien
1259156321Sdamien	desc->xflags = htole16(xflags);
1260156321Sdamien	desc->xflags |= htole16(nsegs << 13);
1261156321Sdamien
1262156321Sdamien	desc->wme = htole16(
1263156321Sdamien	    RT2661_QID(ac) |
1264156321Sdamien	    RT2661_AIFSN(2) |
1265156321Sdamien	    RT2661_LOGCWMIN(4) |
1266156321Sdamien	    RT2661_LOGCWMAX(10));
1267156321Sdamien
1268156321Sdamien	/*
1269156321Sdamien	 * Remember in which queue this frame was sent. This field is driver
1270156321Sdamien	 * private data only. It will be made available by the NIC in STA_CSR4
1271156321Sdamien	 * on Tx interrupts.
1272156321Sdamien	 */
1273156321Sdamien	desc->qid = ac;
1274156321Sdamien
1275156321Sdamien	/* setup PLCP fields */
1276178958Ssam	desc->plcp_signal  = rt2661_plcp_signal(rate);
1277156321Sdamien	desc->plcp_service = 4;
1278156321Sdamien
1279156321Sdamien	len += IEEE80211_CRC_LEN;
1280190532Ssam	if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1281156321Sdamien		desc->flags |= htole32(RT2661_TX_OFDM);
1282156321Sdamien
1283156321Sdamien		plcp_length = len & 0xfff;
1284156321Sdamien		desc->plcp_length_hi = plcp_length >> 6;
1285156321Sdamien		desc->plcp_length_lo = plcp_length & 0x3f;
1286156321Sdamien	} else {
1287156321Sdamien		plcp_length = (16 * len + rate - 1) / rate;
1288156321Sdamien		if (rate == 22) {
1289156321Sdamien			remainder = (16 * len) % 22;
1290156321Sdamien			if (remainder != 0 && remainder < 7)
1291156321Sdamien				desc->plcp_service |= RT2661_PLCP_LENGEXT;
1292156321Sdamien		}
1293156321Sdamien		desc->plcp_length_hi = plcp_length >> 8;
1294156321Sdamien		desc->plcp_length_lo = plcp_length & 0xff;
1295156321Sdamien
1296156321Sdamien		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1297156321Sdamien			desc->plcp_signal |= 0x08;
1298156321Sdamien	}
1299156321Sdamien
1300156321Sdamien	/* RT2x61 supports scatter with up to 5 segments */
1301156321Sdamien	for (i = 0; i < nsegs; i++) {
1302156321Sdamien		desc->addr[i] = htole32(segs[i].ds_addr);
1303156321Sdamien		desc->len [i] = htole16(segs[i].ds_len);
1304156321Sdamien	}
1305156321Sdamien}
1306156321Sdamien
1307156321Sdamienstatic int
1308156321Sdamienrt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1309156321Sdamien    struct ieee80211_node *ni)
1310156321Sdamien{
1311178354Ssam	struct ieee80211vap *vap = ni->ni_vap;
1312178354Ssam	struct ieee80211com *ic = ni->ni_ic;
1313156321Sdamien	struct rt2661_tx_desc *desc;
1314156321Sdamien	struct rt2661_tx_data *data;
1315156321Sdamien	struct ieee80211_frame *wh;
1316173386Skevlo	struct ieee80211_key *k;
1317156321Sdamien	bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1318156321Sdamien	uint16_t dur;
1319156321Sdamien	uint32_t flags = 0;	/* XXX HWSEQ */
1320156321Sdamien	int nsegs, rate, error;
1321156321Sdamien
1322156321Sdamien	desc = &sc->mgtq.desc[sc->mgtq.cur];
1323156321Sdamien	data = &sc->mgtq.data[sc->mgtq.cur];
1324156321Sdamien
1325178354Ssam	rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate;
1326156321Sdamien
1327173386Skevlo	wh = mtod(m0, struct ieee80211_frame *);
1328173386Skevlo
1329173386Skevlo	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1330178354Ssam		k = ieee80211_crypto_encap(ni, m0);
1331173386Skevlo		if (k == NULL) {
1332173386Skevlo			m_freem(m0);
1333173386Skevlo			return ENOBUFS;
1334173386Skevlo		}
1335173386Skevlo	}
1336173386Skevlo
1337156321Sdamien	error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0,
1338156321Sdamien	    segs, &nsegs, 0);
1339156321Sdamien	if (error != 0) {
1340156321Sdamien		device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1341156321Sdamien		    error);
1342156321Sdamien		m_freem(m0);
1343156321Sdamien		return error;
1344156321Sdamien	}
1345156321Sdamien
1346192468Ssam	if (ieee80211_radiotap_active_vap(vap)) {
1347156321Sdamien		struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1348156321Sdamien
1349156321Sdamien		tap->wt_flags = 0;
1350156321Sdamien		tap->wt_rate = rate;
1351156321Sdamien
1352192468Ssam		ieee80211_radiotap_tx(vap, m0);
1353156321Sdamien	}
1354156321Sdamien
1355156321Sdamien	data->m = m0;
1356156321Sdamien	data->ni = ni;
1357178354Ssam	/* management frames are not taken into account for amrr */
1358178354Ssam	data->rix = IEEE80211_FIXED_RATE_NONE;
1359156321Sdamien
1360156321Sdamien	wh = mtod(m0, struct ieee80211_frame *);
1361156321Sdamien
1362156321Sdamien	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1363156321Sdamien		flags |= RT2661_TX_NEED_ACK;
1364156321Sdamien
1365190532Ssam		dur = ieee80211_ack_duration(ic->ic_rt,
1366178354Ssam		    rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1367156321Sdamien		*(uint16_t *)wh->i_dur = htole16(dur);
1368156321Sdamien
1369156321Sdamien		/* tell hardware to add timestamp in probe responses */
1370156321Sdamien		if ((wh->i_fc[0] &
1371156321Sdamien		    (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1372156321Sdamien		    (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1373156321Sdamien			flags |= RT2661_TX_TIMESTAMP;
1374156321Sdamien	}
1375156321Sdamien
1376156321Sdamien	rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1377156321Sdamien	    m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT);
1378156321Sdamien
1379156321Sdamien	bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1380156321Sdamien	bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1381156321Sdamien	    BUS_DMASYNC_PREWRITE);
1382156321Sdamien
1383178354Ssam	DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1384178354Ssam	    m0->m_pkthdr.len, sc->mgtq.cur, rate);
1385156321Sdamien
1386156321Sdamien	/* kick mgt */
1387156321Sdamien	sc->mgtq.queued++;
1388156321Sdamien	sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1389156321Sdamien	RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1390156321Sdamien
1391156321Sdamien	return 0;
1392156321Sdamien}
1393156321Sdamien
1394178354Ssamstatic int
1395178354Ssamrt2661_sendprot(struct rt2661_softc *sc, int ac,
1396178354Ssam    const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1397156321Sdamien{
1398178354Ssam	struct ieee80211com *ic = ni->ni_ic;
1399178354Ssam	struct rt2661_tx_ring *txq = &sc->txq[ac];
1400178354Ssam	const struct ieee80211_frame *wh;
1401178354Ssam	struct rt2661_tx_desc *desc;
1402178354Ssam	struct rt2661_tx_data *data;
1403178354Ssam	struct mbuf *mprot;
1404178354Ssam	int protrate, ackrate, pktlen, flags, isshort, error;
1405178354Ssam	uint16_t dur;
1406178354Ssam	bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1407178354Ssam	int nsegs;
1408156321Sdamien
1409178354Ssam	KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1410178354Ssam	    ("protection %d", prot));
1411178354Ssam
1412178354Ssam	wh = mtod(m, const struct ieee80211_frame *);
1413178354Ssam	pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1414178354Ssam
1415190532Ssam	protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1416190532Ssam	ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1417178354Ssam
1418178354Ssam	isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1419190532Ssam	dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1420190532Ssam	    + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1421178354Ssam	flags = RT2661_TX_MORE_FRAG;
1422178354Ssam	if (prot == IEEE80211_PROT_RTSCTS) {
1423178354Ssam		/* NB: CTS is the same size as an ACK */
1424190532Ssam		dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1425178354Ssam		flags |= RT2661_TX_NEED_ACK;
1426178354Ssam		mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1427178354Ssam	} else {
1428178354Ssam		mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1429156321Sdamien	}
1430178354Ssam	if (mprot == NULL) {
1431178354Ssam		/* XXX stat + msg */
1432178354Ssam		return ENOBUFS;
1433178354Ssam	}
1434156321Sdamien
1435178354Ssam	data = &txq->data[txq->cur];
1436178354Ssam	desc = &txq->desc[txq->cur];
1437156321Sdamien
1438178354Ssam	error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs,
1439178354Ssam	    &nsegs, 0);
1440178354Ssam	if (error != 0) {
1441178354Ssam		device_printf(sc->sc_dev,
1442178354Ssam		    "could not map mbuf (error %d)\n", error);
1443178354Ssam		m_freem(mprot);
1444178354Ssam		return error;
1445178354Ssam	}
1446156321Sdamien
1447178354Ssam	data->m = mprot;
1448178354Ssam	data->ni = ieee80211_ref_node(ni);
1449178354Ssam	/* ctl frames are not taken into account for amrr */
1450178354Ssam	data->rix = IEEE80211_FIXED_RATE_NONE;
1451156321Sdamien
1452178354Ssam	rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len,
1453178354Ssam	    protrate, segs, 1, ac);
1454178354Ssam
1455178354Ssam	bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1456178354Ssam	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1457178354Ssam
1458178354Ssam	txq->queued++;
1459178354Ssam	txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1460178354Ssam
1461178354Ssam	return 0;
1462156321Sdamien}
1463156321Sdamien
1464156321Sdamienstatic int
1465156321Sdamienrt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1466156321Sdamien    struct ieee80211_node *ni, int ac)
1467156321Sdamien{
1468178354Ssam	struct ieee80211vap *vap = ni->ni_vap;
1469178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1470178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1471156321Sdamien	struct rt2661_tx_ring *txq = &sc->txq[ac];
1472156321Sdamien	struct rt2661_tx_desc *desc;
1473156321Sdamien	struct rt2661_tx_data *data;
1474156321Sdamien	struct ieee80211_frame *wh;
1475178354Ssam	const struct ieee80211_txparam *tp;
1476156321Sdamien	struct ieee80211_key *k;
1477156321Sdamien	const struct chanAccParams *cap;
1478156321Sdamien	struct mbuf *mnew;
1479156321Sdamien	bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1480156321Sdamien	uint16_t dur;
1481178354Ssam	uint32_t flags;
1482156321Sdamien	int error, nsegs, rate, noack = 0;
1483156321Sdamien
1484156321Sdamien	wh = mtod(m0, struct ieee80211_frame *);
1485156321Sdamien
1486178354Ssam	tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1487178354Ssam	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1488178354Ssam		rate = tp->mcastrate;
1489178354Ssam	} else if (m0->m_flags & M_EAPOL) {
1490178354Ssam		rate = tp->mgmtrate;
1491178354Ssam	} else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1492178354Ssam		rate = tp->ucastrate;
1493156321Sdamien	} else {
1494206358Srpaulo		(void) ieee80211_ratectl_rate(ni, NULL, 0);
1495178354Ssam		rate = ni->ni_txrate;
1496156321Sdamien	}
1497156321Sdamien	rate &= IEEE80211_RATE_VAL;
1498156321Sdamien
1499156321Sdamien	if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
1500156321Sdamien		cap = &ic->ic_wme.wme_chanParams;
1501156321Sdamien		noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1502156321Sdamien	}
1503156321Sdamien
1504156321Sdamien	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1505178354Ssam		k = ieee80211_crypto_encap(ni, m0);
1506156321Sdamien		if (k == NULL) {
1507156321Sdamien			m_freem(m0);
1508156321Sdamien			return ENOBUFS;
1509156321Sdamien		}
1510156321Sdamien
1511156321Sdamien		/* packet header may have moved, reset our local pointer */
1512156321Sdamien		wh = mtod(m0, struct ieee80211_frame *);
1513156321Sdamien	}
1514156321Sdamien
1515178354Ssam	flags = 0;
1516178354Ssam	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1517178354Ssam		int prot = IEEE80211_PROT_NONE;
1518178354Ssam		if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1519178354Ssam			prot = IEEE80211_PROT_RTSCTS;
1520178354Ssam		else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1521190532Ssam		    ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1522178354Ssam			prot = ic->ic_protmode;
1523178354Ssam		if (prot != IEEE80211_PROT_NONE) {
1524178354Ssam			error = rt2661_sendprot(sc, ac, m0, ni, prot, rate);
1525178354Ssam			if (error) {
1526178354Ssam				m_freem(m0);
1527178354Ssam				return error;
1528178354Ssam			}
1529178354Ssam			flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1530156321Sdamien		}
1531156321Sdamien	}
1532156321Sdamien
1533156321Sdamien	data = &txq->data[txq->cur];
1534156321Sdamien	desc = &txq->desc[txq->cur];
1535156321Sdamien
1536156321Sdamien	error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs,
1537156321Sdamien	    &nsegs, 0);
1538156321Sdamien	if (error != 0 && error != EFBIG) {
1539156321Sdamien		device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1540156321Sdamien		    error);
1541156321Sdamien		m_freem(m0);
1542156321Sdamien		return error;
1543156321Sdamien	}
1544156321Sdamien	if (error != 0) {
1545156321Sdamien		mnew = m_defrag(m0, M_DONTWAIT);
1546156321Sdamien		if (mnew == NULL) {
1547156321Sdamien			device_printf(sc->sc_dev,
1548156321Sdamien			    "could not defragment mbuf\n");
1549156321Sdamien			m_freem(m0);
1550156321Sdamien			return ENOBUFS;
1551156321Sdamien		}
1552156321Sdamien		m0 = mnew;
1553156321Sdamien
1554156321Sdamien		error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0,
1555156321Sdamien		    segs, &nsegs, 0);
1556156321Sdamien		if (error != 0) {
1557156321Sdamien			device_printf(sc->sc_dev,
1558156321Sdamien			    "could not map mbuf (error %d)\n", error);
1559156321Sdamien			m_freem(m0);
1560156321Sdamien			return error;
1561156321Sdamien		}
1562156321Sdamien
1563156321Sdamien		/* packet header have moved, reset our local pointer */
1564156321Sdamien		wh = mtod(m0, struct ieee80211_frame *);
1565156321Sdamien	}
1566156321Sdamien
1567192468Ssam	if (ieee80211_radiotap_active_vap(vap)) {
1568156321Sdamien		struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1569156321Sdamien
1570156321Sdamien		tap->wt_flags = 0;
1571156321Sdamien		tap->wt_rate = rate;
1572156321Sdamien
1573192468Ssam		ieee80211_radiotap_tx(vap, m0);
1574156321Sdamien	}
1575156321Sdamien
1576156321Sdamien	data->m = m0;
1577156321Sdamien	data->ni = ni;
1578156321Sdamien
1579156321Sdamien	/* remember link conditions for rate adaptation algorithm */
1580178354Ssam	if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1581178354Ssam		data->rix = ni->ni_txrate;
1582178354Ssam		/* XXX probably need last rssi value and not avg */
1583178354Ssam		data->rssi = ic->ic_node_getrssi(ni);
1584156321Sdamien	} else
1585178354Ssam		data->rix = IEEE80211_FIXED_RATE_NONE;
1586156321Sdamien
1587156321Sdamien	if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1588156321Sdamien		flags |= RT2661_TX_NEED_ACK;
1589156321Sdamien
1590190532Ssam		dur = ieee80211_ack_duration(ic->ic_rt,
1591178354Ssam		    rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1592156321Sdamien		*(uint16_t *)wh->i_dur = htole16(dur);
1593156321Sdamien	}
1594156321Sdamien
1595156321Sdamien	rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs,
1596156321Sdamien	    nsegs, ac);
1597156321Sdamien
1598156321Sdamien	bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1599156321Sdamien	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1600156321Sdamien
1601178354Ssam	DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1602178354Ssam	    m0->m_pkthdr.len, txq->cur, rate);
1603156321Sdamien
1604156321Sdamien	/* kick Tx */
1605156321Sdamien	txq->queued++;
1606156321Sdamien	txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1607156321Sdamien	RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1608156321Sdamien
1609156321Sdamien	return 0;
1610156321Sdamien}
1611156321Sdamien
1612156321Sdamienstatic void
1613178354Ssamrt2661_start_locked(struct ifnet *ifp)
1614156321Sdamien{
1615156321Sdamien	struct rt2661_softc *sc = ifp->if_softc;
1616178354Ssam	struct mbuf *m;
1617156321Sdamien	struct ieee80211_node *ni;
1618156321Sdamien	int ac;
1619156321Sdamien
1620178354Ssam	RAL_LOCK_ASSERT(sc);
1621156321Sdamien
1622156975Sdamien	/* prevent management frames from being sent if we're not ready */
1623178354Ssam	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) || sc->sc_invalid)
1624156975Sdamien		return;
1625156975Sdamien
1626156321Sdamien	for (;;) {
1627178354Ssam		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1628178354Ssam		if (m == NULL)
1629178354Ssam			break;
1630156321Sdamien
1631178354Ssam		ac = M_WME_GETAC(m);
1632178354Ssam		if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1633178354Ssam			/* there is no place left in this ring */
1634178354Ssam			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1635178354Ssam			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1636178354Ssam			break;
1637178354Ssam		}
1638178354Ssam		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1639178354Ssam		if (rt2661_tx_data(sc, m, ni, ac) != 0) {
1640178354Ssam			ieee80211_free_node(ni);
1641178354Ssam			ifp->if_oerrors++;
1642178354Ssam			break;
1643178354Ssam		}
1644156321Sdamien
1645178354Ssam		sc->sc_tx_timer = 5;
1646178354Ssam	}
1647178354Ssam}
1648156321Sdamien
1649178354Ssamstatic void
1650178354Ssamrt2661_start(struct ifnet *ifp)
1651178354Ssam{
1652178354Ssam	struct rt2661_softc *sc = ifp->if_softc;
1653156321Sdamien
1654178354Ssam	RAL_LOCK(sc);
1655178354Ssam	rt2661_start_locked(ifp);
1656178354Ssam	RAL_UNLOCK(sc);
1657178354Ssam}
1658156321Sdamien
1659178354Ssamstatic int
1660178354Ssamrt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1661178354Ssam	const struct ieee80211_bpf_params *params)
1662178354Ssam{
1663178354Ssam	struct ieee80211com *ic = ni->ni_ic;
1664178354Ssam	struct ifnet *ifp = ic->ic_ifp;
1665178354Ssam	struct rt2661_softc *sc = ifp->if_softc;
1666156321Sdamien
1667178354Ssam	RAL_LOCK(sc);
1668156321Sdamien
1669178354Ssam	/* prevent management frames from being sent if we're not ready */
1670178354Ssam	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1671178354Ssam		RAL_UNLOCK(sc);
1672178354Ssam		m_freem(m);
1673178354Ssam		ieee80211_free_node(ni);
1674178354Ssam		return ENETDOWN;
1675178354Ssam	}
1676178354Ssam	if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1677178354Ssam		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1678178354Ssam		RAL_UNLOCK(sc);
1679178354Ssam		m_freem(m);
1680178354Ssam		ieee80211_free_node(ni);
1681178354Ssam		return ENOBUFS;		/* XXX */
1682178354Ssam	}
1683156321Sdamien
1684178354Ssam	ifp->if_opackets++;
1685156321Sdamien
1686178354Ssam	/*
1687178354Ssam	 * Legacy path; interpret frame contents to decide
1688178354Ssam	 * precisely how to send the frame.
1689178354Ssam	 * XXX raw path
1690178354Ssam	 */
1691178354Ssam	if (rt2661_tx_mgt(sc, m, ni) != 0)
1692178354Ssam		goto bad;
1693178354Ssam	sc->sc_tx_timer = 5;
1694156321Sdamien
1695178354Ssam	RAL_UNLOCK(sc);
1696156321Sdamien
1697178354Ssam	return 0;
1698178354Ssambad:
1699178354Ssam	ifp->if_oerrors++;
1700178354Ssam	ieee80211_free_node(ni);
1701156321Sdamien	RAL_UNLOCK(sc);
1702178354Ssam	return EIO;		/* XXX */
1703156321Sdamien}
1704156321Sdamien
1705156321Sdamienstatic void
1706165352Sbmsrt2661_watchdog(void *arg)
1707156321Sdamien{
1708165352Sbms	struct rt2661_softc *sc = (struct rt2661_softc *)arg;
1709178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1710156321Sdamien
1711178354Ssam	RAL_LOCK_ASSERT(sc);
1712156321Sdamien
1713178354Ssam	KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running"));
1714156321Sdamien
1715178354Ssam	if (sc->sc_invalid)		/* card ejected */
1716178354Ssam		return;
1717156321Sdamien
1718178354Ssam	if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1719178354Ssam		if_printf(ifp, "device timeout\n");
1720178354Ssam		rt2661_init_locked(sc);
1721178354Ssam		ifp->if_oerrors++;
1722178354Ssam		/* NB: callout is reset in rt2661_init() */
1723178354Ssam		return;
1724178354Ssam	}
1725178354Ssam	callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
1726156321Sdamien}
1727156321Sdamien
1728156321Sdamienstatic int
1729156321Sdamienrt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1730156321Sdamien{
1731156321Sdamien	struct rt2661_softc *sc = ifp->if_softc;
1732178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1733178354Ssam	struct ifreq *ifr = (struct ifreq *) data;
1734178354Ssam	int error = 0, startall = 0;
1735156321Sdamien
1736156321Sdamien	switch (cmd) {
1737156321Sdamien	case SIOCSIFFLAGS:
1738178704Sthompsa		RAL_LOCK(sc);
1739156321Sdamien		if (ifp->if_flags & IFF_UP) {
1740178354Ssam			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1741178354Ssam				rt2661_init_locked(sc);
1742178354Ssam				startall = 1;
1743178354Ssam			} else
1744178354Ssam				rt2661_update_promisc(ifp);
1745156321Sdamien		} else {
1746156321Sdamien			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1747178354Ssam				rt2661_stop_locked(sc);
1748156321Sdamien		}
1749178704Sthompsa		RAL_UNLOCK(sc);
1750178704Sthompsa		if (startall)
1751178704Sthompsa			ieee80211_start_all(ic);
1752156321Sdamien		break;
1753178354Ssam	case SIOCGIFMEDIA:
1754178354Ssam		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1755178354Ssam		break;
1756178704Sthompsa	case SIOCGIFADDR:
1757178354Ssam		error = ether_ioctl(ifp, cmd, data);
1758178354Ssam		break;
1759178704Sthompsa	default:
1760178704Sthompsa		error = EINVAL;
1761178704Sthompsa		break;
1762156321Sdamien	}
1763156321Sdamien	return error;
1764156321Sdamien}
1765156321Sdamien
1766156321Sdamienstatic void
1767156321Sdamienrt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
1768156321Sdamien{
1769156321Sdamien	uint32_t tmp;
1770156321Sdamien	int ntries;
1771156321Sdamien
1772156321Sdamien	for (ntries = 0; ntries < 100; ntries++) {
1773156321Sdamien		if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1774156321Sdamien			break;
1775156321Sdamien		DELAY(1);
1776156321Sdamien	}
1777156321Sdamien	if (ntries == 100) {
1778156321Sdamien		device_printf(sc->sc_dev, "could not write to BBP\n");
1779156321Sdamien		return;
1780156321Sdamien	}
1781156321Sdamien
1782156321Sdamien	tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
1783156321Sdamien	RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
1784156321Sdamien
1785178354Ssam	DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
1786156321Sdamien}
1787156321Sdamien
1788156321Sdamienstatic uint8_t
1789156321Sdamienrt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
1790156321Sdamien{
1791156321Sdamien	uint32_t val;
1792156321Sdamien	int ntries;
1793156321Sdamien
1794156321Sdamien	for (ntries = 0; ntries < 100; ntries++) {
1795156321Sdamien		if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1796156321Sdamien			break;
1797156321Sdamien		DELAY(1);
1798156321Sdamien	}
1799156321Sdamien	if (ntries == 100) {
1800156321Sdamien		device_printf(sc->sc_dev, "could not read from BBP\n");
1801156321Sdamien		return 0;
1802156321Sdamien	}
1803156321Sdamien
1804156321Sdamien	val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
1805156321Sdamien	RAL_WRITE(sc, RT2661_PHY_CSR3, val);
1806156321Sdamien
1807156321Sdamien	for (ntries = 0; ntries < 100; ntries++) {
1808156321Sdamien		val = RAL_READ(sc, RT2661_PHY_CSR3);
1809156321Sdamien		if (!(val & RT2661_BBP_BUSY))
1810156321Sdamien			return val & 0xff;
1811156321Sdamien		DELAY(1);
1812156321Sdamien	}
1813156321Sdamien
1814156321Sdamien	device_printf(sc->sc_dev, "could not read from BBP\n");
1815156321Sdamien	return 0;
1816156321Sdamien}
1817156321Sdamien
1818156321Sdamienstatic void
1819156321Sdamienrt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
1820156321Sdamien{
1821156321Sdamien	uint32_t tmp;
1822156321Sdamien	int ntries;
1823156321Sdamien
1824156321Sdamien	for (ntries = 0; ntries < 100; ntries++) {
1825156321Sdamien		if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
1826156321Sdamien			break;
1827156321Sdamien		DELAY(1);
1828156321Sdamien	}
1829156321Sdamien	if (ntries == 100) {
1830156321Sdamien		device_printf(sc->sc_dev, "could not write to RF\n");
1831156321Sdamien		return;
1832156321Sdamien	}
1833156321Sdamien
1834156321Sdamien	tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
1835156321Sdamien	    (reg & 3);
1836156321Sdamien	RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
1837156321Sdamien
1838156321Sdamien	/* remember last written value in sc */
1839156321Sdamien	sc->rf_regs[reg] = val;
1840156321Sdamien
1841178354Ssam	DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
1842156321Sdamien}
1843156321Sdamien
1844156321Sdamienstatic int
1845156321Sdamienrt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
1846156321Sdamien{
1847156321Sdamien	if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
1848156321Sdamien		return EIO;	/* there is already a command pending */
1849156321Sdamien
1850156321Sdamien	RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
1851156321Sdamien	    RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
1852156321Sdamien
1853156321Sdamien	RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
1854156321Sdamien
1855156321Sdamien	return 0;
1856156321Sdamien}
1857156321Sdamien
1858156321Sdamienstatic void
1859156321Sdamienrt2661_select_antenna(struct rt2661_softc *sc)
1860156321Sdamien{
1861156321Sdamien	uint8_t bbp4, bbp77;
1862156321Sdamien	uint32_t tmp;
1863156321Sdamien
1864156321Sdamien	bbp4  = rt2661_bbp_read(sc,  4);
1865156321Sdamien	bbp77 = rt2661_bbp_read(sc, 77);
1866156321Sdamien
1867156321Sdamien	/* TBD */
1868156321Sdamien
1869156321Sdamien	/* make sure Rx is disabled before switching antenna */
1870156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
1871156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
1872156321Sdamien
1873156321Sdamien	rt2661_bbp_write(sc,  4, bbp4);
1874156321Sdamien	rt2661_bbp_write(sc, 77, bbp77);
1875156321Sdamien
1876156321Sdamien	/* restore Rx filter */
1877156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
1878156321Sdamien}
1879156321Sdamien
1880156321Sdamien/*
1881156321Sdamien * Enable multi-rate retries for frames sent at OFDM rates.
1882156321Sdamien * In 802.11b/g mode, allow fallback to CCK rates.
1883156321Sdamien */
1884156321Sdamienstatic void
1885156321Sdamienrt2661_enable_mrr(struct rt2661_softc *sc)
1886156321Sdamien{
1887178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1888178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1889156321Sdamien	uint32_t tmp;
1890156321Sdamien
1891156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1892156321Sdamien
1893156321Sdamien	tmp &= ~RT2661_MRR_CCK_FALLBACK;
1894178354Ssam	if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
1895156321Sdamien		tmp |= RT2661_MRR_CCK_FALLBACK;
1896156321Sdamien	tmp |= RT2661_MRR_ENABLED;
1897156321Sdamien
1898156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1899156321Sdamien}
1900156321Sdamien
1901156321Sdamienstatic void
1902156321Sdamienrt2661_set_txpreamble(struct rt2661_softc *sc)
1903156321Sdamien{
1904178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1905178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1906156321Sdamien	uint32_t tmp;
1907156321Sdamien
1908156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1909156321Sdamien
1910156321Sdamien	tmp &= ~RT2661_SHORT_PREAMBLE;
1911178354Ssam	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1912156321Sdamien		tmp |= RT2661_SHORT_PREAMBLE;
1913156321Sdamien
1914156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1915156321Sdamien}
1916156321Sdamien
1917156321Sdamienstatic void
1918156321Sdamienrt2661_set_basicrates(struct rt2661_softc *sc,
1919156321Sdamien    const struct ieee80211_rateset *rs)
1920156321Sdamien{
1921156321Sdamien#define RV(r)	((r) & IEEE80211_RATE_VAL)
1922178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1923178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1924156321Sdamien	uint32_t mask = 0;
1925156321Sdamien	uint8_t rate;
1926156321Sdamien	int i, j;
1927156321Sdamien
1928156321Sdamien	for (i = 0; i < rs->rs_nrates; i++) {
1929156321Sdamien		rate = rs->rs_rates[i];
1930156321Sdamien
1931156321Sdamien		if (!(rate & IEEE80211_RATE_BASIC))
1932156321Sdamien			continue;
1933156321Sdamien
1934156321Sdamien		/*
1935156321Sdamien		 * Find h/w rate index.  We know it exists because the rate
1936156321Sdamien		 * set has already been negotiated.
1937156321Sdamien		 */
1938167470Ssam		for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++);
1939156321Sdamien
1940156321Sdamien		mask |= 1 << j;
1941156321Sdamien	}
1942156321Sdamien
1943156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
1944156321Sdamien
1945178354Ssam	DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
1946156321Sdamien#undef RV
1947156321Sdamien}
1948156321Sdamien
1949156321Sdamien/*
1950156321Sdamien * Reprogram MAC/BBP to switch to a new band.  Values taken from the reference
1951156321Sdamien * driver.
1952156321Sdamien */
1953156321Sdamienstatic void
1954156321Sdamienrt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
1955156321Sdamien{
1956156321Sdamien	uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
1957156321Sdamien	uint32_t tmp;
1958156321Sdamien
1959156321Sdamien	/* update all BBP registers that depend on the band */
1960156321Sdamien	bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
1961156321Sdamien	bbp35 = 0x50; bbp97 = 0x48; bbp98  = 0x48;
1962156321Sdamien	if (IEEE80211_IS_CHAN_5GHZ(c)) {
1963156321Sdamien		bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
1964156321Sdamien		bbp35 += 0x10; bbp97 += 0x10; bbp98  += 0x10;
1965156321Sdamien	}
1966156321Sdamien	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1967156321Sdamien	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1968156321Sdamien		bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
1969156321Sdamien	}
1970156321Sdamien
1971156321Sdamien	rt2661_bbp_write(sc,  17, bbp17);
1972156321Sdamien	rt2661_bbp_write(sc,  96, bbp96);
1973156321Sdamien	rt2661_bbp_write(sc, 104, bbp104);
1974156321Sdamien
1975156321Sdamien	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1976156321Sdamien	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1977156321Sdamien		rt2661_bbp_write(sc, 75, 0x80);
1978156321Sdamien		rt2661_bbp_write(sc, 86, 0x80);
1979156321Sdamien		rt2661_bbp_write(sc, 88, 0x80);
1980156321Sdamien	}
1981156321Sdamien
1982156321Sdamien	rt2661_bbp_write(sc, 35, bbp35);
1983156321Sdamien	rt2661_bbp_write(sc, 97, bbp97);
1984156321Sdamien	rt2661_bbp_write(sc, 98, bbp98);
1985156321Sdamien
1986156321Sdamien	tmp = RAL_READ(sc, RT2661_PHY_CSR0);
1987156321Sdamien	tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
1988156321Sdamien	if (IEEE80211_IS_CHAN_2GHZ(c))
1989156321Sdamien		tmp |= RT2661_PA_PE_2GHZ;
1990156321Sdamien	else
1991156321Sdamien		tmp |= RT2661_PA_PE_5GHZ;
1992156321Sdamien	RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
1993156321Sdamien}
1994156321Sdamien
1995156321Sdamienstatic void
1996156321Sdamienrt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
1997156321Sdamien{
1998178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1999178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2000156321Sdamien	const struct rfprog *rfprog;
2001156321Sdamien	uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
2002156321Sdamien	int8_t power;
2003156321Sdamien	u_int i, chan;
2004156321Sdamien
2005156321Sdamien	chan = ieee80211_chan2ieee(ic, c);
2006178354Ssam	KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
2007156321Sdamien
2008156321Sdamien	/* select the appropriate RF settings based on what EEPROM says */
2009156321Sdamien	rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
2010156321Sdamien
2011156321Sdamien	/* find the settings for this channel (we know it exists) */
2012156321Sdamien	for (i = 0; rfprog[i].chan != chan; i++);
2013156321Sdamien
2014156321Sdamien	power = sc->txpow[i];
2015156321Sdamien	if (power < 0) {
2016156321Sdamien		bbp94 += power;
2017156321Sdamien		power = 0;
2018156321Sdamien	} else if (power > 31) {
2019156321Sdamien		bbp94 += power - 31;
2020156321Sdamien		power = 31;
2021156321Sdamien	}
2022156321Sdamien
2023156321Sdamien	/*
2024156321Sdamien	 * If we are switching from the 2GHz band to the 5GHz band or
2025156321Sdamien	 * vice-versa, BBP registers need to be reprogrammed.
2026156321Sdamien	 */
2027156321Sdamien	if (c->ic_flags != sc->sc_curchan->ic_flags) {
2028156321Sdamien		rt2661_select_band(sc, c);
2029156321Sdamien		rt2661_select_antenna(sc);
2030156321Sdamien	}
2031156321Sdamien	sc->sc_curchan = c;
2032156321Sdamien
2033156321Sdamien	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2034156321Sdamien	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2035156321Sdamien	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2036156321Sdamien	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2037156321Sdamien
2038156321Sdamien	DELAY(200);
2039156321Sdamien
2040156321Sdamien	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2041156321Sdamien	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2042156321Sdamien	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
2043156321Sdamien	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2044156321Sdamien
2045156321Sdamien	DELAY(200);
2046156321Sdamien
2047156321Sdamien	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2048156321Sdamien	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2049156321Sdamien	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2050156321Sdamien	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2051156321Sdamien
2052156321Sdamien	/* enable smart mode for MIMO-capable RFs */
2053156321Sdamien	bbp3 = rt2661_bbp_read(sc, 3);
2054156321Sdamien
2055156321Sdamien	bbp3 &= ~RT2661_SMART_MODE;
2056156321Sdamien	if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
2057156321Sdamien		bbp3 |= RT2661_SMART_MODE;
2058156321Sdamien
2059156321Sdamien	rt2661_bbp_write(sc, 3, bbp3);
2060156321Sdamien
2061156321Sdamien	if (bbp94 != RT2661_BBPR94_DEFAULT)
2062156321Sdamien		rt2661_bbp_write(sc, 94, bbp94);
2063156321Sdamien
2064156321Sdamien	/* 5GHz radio needs a 1ms delay here */
2065156321Sdamien	if (IEEE80211_IS_CHAN_5GHZ(c))
2066156321Sdamien		DELAY(1000);
2067156321Sdamien}
2068156321Sdamien
2069156321Sdamienstatic void
2070156321Sdamienrt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2071156321Sdamien{
2072156321Sdamien	uint32_t tmp;
2073156321Sdamien
2074156321Sdamien	tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2075156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2076156321Sdamien
2077156321Sdamien	tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2078156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2079156321Sdamien}
2080156321Sdamien
2081156321Sdamienstatic void
2082156321Sdamienrt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2083156321Sdamien{
2084156321Sdamien	uint32_t tmp;
2085156321Sdamien
2086156321Sdamien	tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2087156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2088156321Sdamien
2089156321Sdamien	tmp = addr[4] | addr[5] << 8;
2090156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2091156321Sdamien}
2092156321Sdamien
2093156321Sdamienstatic void
2094178354Ssamrt2661_update_promisc(struct ifnet *ifp)
2095156321Sdamien{
2096178354Ssam	struct rt2661_softc *sc = ifp->if_softc;
2097156321Sdamien	uint32_t tmp;
2098156321Sdamien
2099156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2100156321Sdamien
2101156321Sdamien	tmp &= ~RT2661_DROP_NOT_TO_ME;
2102156321Sdamien	if (!(ifp->if_flags & IFF_PROMISC))
2103156321Sdamien		tmp |= RT2661_DROP_NOT_TO_ME;
2104156321Sdamien
2105156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2106156321Sdamien
2107178354Ssam	DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2108178354Ssam	    "entering" : "leaving");
2109156321Sdamien}
2110156321Sdamien
2111156321Sdamien/*
2112156321Sdamien * Update QoS (802.11e) settings for each h/w Tx ring.
2113156321Sdamien */
2114156321Sdamienstatic int
2115156321Sdamienrt2661_wme_update(struct ieee80211com *ic)
2116156321Sdamien{
2117156321Sdamien	struct rt2661_softc *sc = ic->ic_ifp->if_softc;
2118156321Sdamien	const struct wmeParams *wmep;
2119156321Sdamien
2120156321Sdamien	wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
2121156321Sdamien
2122156321Sdamien	/* XXX: not sure about shifts. */
2123156321Sdamien	/* XXX: the reference driver plays with AC_VI settings too. */
2124156321Sdamien
2125156321Sdamien	/* update TxOp */
2126156321Sdamien	RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2127156321Sdamien	    wmep[WME_AC_BE].wmep_txopLimit << 16 |
2128156321Sdamien	    wmep[WME_AC_BK].wmep_txopLimit);
2129156321Sdamien	RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2130156321Sdamien	    wmep[WME_AC_VI].wmep_txopLimit << 16 |
2131156321Sdamien	    wmep[WME_AC_VO].wmep_txopLimit);
2132156321Sdamien
2133156321Sdamien	/* update CWmin */
2134156321Sdamien	RAL_WRITE(sc, RT2661_CWMIN_CSR,
2135156321Sdamien	    wmep[WME_AC_BE].wmep_logcwmin << 12 |
2136156321Sdamien	    wmep[WME_AC_BK].wmep_logcwmin <<  8 |
2137156321Sdamien	    wmep[WME_AC_VI].wmep_logcwmin <<  4 |
2138156321Sdamien	    wmep[WME_AC_VO].wmep_logcwmin);
2139156321Sdamien
2140156321Sdamien	/* update CWmax */
2141156321Sdamien	RAL_WRITE(sc, RT2661_CWMAX_CSR,
2142156321Sdamien	    wmep[WME_AC_BE].wmep_logcwmax << 12 |
2143156321Sdamien	    wmep[WME_AC_BK].wmep_logcwmax <<  8 |
2144156321Sdamien	    wmep[WME_AC_VI].wmep_logcwmax <<  4 |
2145156321Sdamien	    wmep[WME_AC_VO].wmep_logcwmax);
2146156321Sdamien
2147156321Sdamien	/* update Aifsn */
2148156321Sdamien	RAL_WRITE(sc, RT2661_AIFSN_CSR,
2149156321Sdamien	    wmep[WME_AC_BE].wmep_aifsn << 12 |
2150156321Sdamien	    wmep[WME_AC_BK].wmep_aifsn <<  8 |
2151156321Sdamien	    wmep[WME_AC_VI].wmep_aifsn <<  4 |
2152156321Sdamien	    wmep[WME_AC_VO].wmep_aifsn);
2153156321Sdamien
2154156321Sdamien	return 0;
2155156321Sdamien}
2156156321Sdamien
2157156321Sdamienstatic void
2158156321Sdamienrt2661_update_slot(struct ifnet *ifp)
2159156321Sdamien{
2160156321Sdamien	struct rt2661_softc *sc = ifp->if_softc;
2161178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2162156321Sdamien	uint8_t slottime;
2163156321Sdamien	uint32_t tmp;
2164156321Sdamien
2165156321Sdamien	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2166156321Sdamien
2167156321Sdamien	tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2168156321Sdamien	tmp = (tmp & ~0xff) | slottime;
2169156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2170156321Sdamien}
2171156321Sdamien
2172156321Sdamienstatic const char *
2173156321Sdamienrt2661_get_rf(int rev)
2174156321Sdamien{
2175156321Sdamien	switch (rev) {
2176156321Sdamien	case RT2661_RF_5225:	return "RT5225";
2177156321Sdamien	case RT2661_RF_5325:	return "RT5325 (MIMO XR)";
2178156321Sdamien	case RT2661_RF_2527:	return "RT2527";
2179156321Sdamien	case RT2661_RF_2529:	return "RT2529 (MIMO XR)";
2180156321Sdamien	default:		return "unknown";
2181156321Sdamien	}
2182156321Sdamien}
2183156321Sdamien
2184156321Sdamienstatic void
2185190526Ssamrt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2186156321Sdamien{
2187156321Sdamien	uint16_t val;
2188156321Sdamien	int i;
2189156321Sdamien
2190156321Sdamien	/* read MAC address */
2191156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2192190526Ssam	macaddr[0] = val & 0xff;
2193190526Ssam	macaddr[1] = val >> 8;
2194156321Sdamien
2195156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2196190526Ssam	macaddr[2] = val & 0xff;
2197190526Ssam	macaddr[3] = val >> 8;
2198156321Sdamien
2199156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2200190526Ssam	macaddr[4] = val & 0xff;
2201190526Ssam	macaddr[5] = val >> 8;
2202156321Sdamien
2203156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2204156321Sdamien	/* XXX: test if different from 0xffff? */
2205156321Sdamien	sc->rf_rev   = (val >> 11) & 0x1f;
2206156321Sdamien	sc->hw_radio = (val >> 10) & 0x1;
2207156321Sdamien	sc->rx_ant   = (val >> 4)  & 0x3;
2208156321Sdamien	sc->tx_ant   = (val >> 2)  & 0x3;
2209156321Sdamien	sc->nb_ant   = val & 0x3;
2210156321Sdamien
2211178354Ssam	DPRINTF(sc, "RF revision=%d\n", sc->rf_rev);
2212156321Sdamien
2213156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2214156321Sdamien	sc->ext_5ghz_lna = (val >> 6) & 0x1;
2215156321Sdamien	sc->ext_2ghz_lna = (val >> 4) & 0x1;
2216156321Sdamien
2217178354Ssam	DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2218178354Ssam	    sc->ext_2ghz_lna, sc->ext_5ghz_lna);
2219156321Sdamien
2220156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2221156321Sdamien	if ((val & 0xff) != 0xff)
2222156321Sdamien		sc->rssi_2ghz_corr = (int8_t)(val & 0xff);	/* signed */
2223156321Sdamien
2224170530Ssam	/* Only [-10, 10] is valid */
2225170530Ssam	if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
2226170530Ssam		sc->rssi_2ghz_corr = 0;
2227170530Ssam
2228156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2229156321Sdamien	if ((val & 0xff) != 0xff)
2230156321Sdamien		sc->rssi_5ghz_corr = (int8_t)(val & 0xff);	/* signed */
2231156321Sdamien
2232170530Ssam	/* Only [-10, 10] is valid */
2233170530Ssam	if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
2234170530Ssam		sc->rssi_5ghz_corr = 0;
2235170530Ssam
2236156321Sdamien	/* adjust RSSI correction for external low-noise amplifier */
2237156321Sdamien	if (sc->ext_2ghz_lna)
2238156321Sdamien		sc->rssi_2ghz_corr -= 14;
2239156321Sdamien	if (sc->ext_5ghz_lna)
2240156321Sdamien		sc->rssi_5ghz_corr -= 14;
2241156321Sdamien
2242178354Ssam	DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2243178354Ssam	    sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
2244156321Sdamien
2245156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2246156321Sdamien	if ((val >> 8) != 0xff)
2247156321Sdamien		sc->rfprog = (val >> 8) & 0x3;
2248156321Sdamien	if ((val & 0xff) != 0xff)
2249156321Sdamien		sc->rffreq = val & 0xff;
2250156321Sdamien
2251178354Ssam	DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq);
2252156321Sdamien
2253156321Sdamien	/* read Tx power for all a/b/g channels */
2254156321Sdamien	for (i = 0; i < 19; i++) {
2255156321Sdamien		val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2256156321Sdamien		sc->txpow[i * 2] = (int8_t)(val >> 8);		/* signed */
2257178354Ssam		DPRINTF(sc, "Channel=%d Tx power=%d\n",
2258178354Ssam		    rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]);
2259156321Sdamien		sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff);	/* signed */
2260178354Ssam		DPRINTF(sc, "Channel=%d Tx power=%d\n",
2261178354Ssam		    rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]);
2262156321Sdamien	}
2263156321Sdamien
2264156321Sdamien	/* read vendor-specific BBP values */
2265156321Sdamien	for (i = 0; i < 16; i++) {
2266156321Sdamien		val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2267156321Sdamien		if (val == 0 || val == 0xffff)
2268156321Sdamien			continue;	/* skip invalid entries */
2269156321Sdamien		sc->bbp_prom[i].reg = val >> 8;
2270156321Sdamien		sc->bbp_prom[i].val = val & 0xff;
2271178354Ssam		DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2272178354Ssam		    sc->bbp_prom[i].val);
2273156321Sdamien	}
2274156321Sdamien}
2275156321Sdamien
2276156321Sdamienstatic int
2277156321Sdamienrt2661_bbp_init(struct rt2661_softc *sc)
2278156321Sdamien{
2279156321Sdamien#define N(a)	(sizeof (a) / sizeof ((a)[0]))
2280156321Sdamien	int i, ntries;
2281156321Sdamien	uint8_t val;
2282156321Sdamien
2283156321Sdamien	/* wait for BBP to be ready */
2284156321Sdamien	for (ntries = 0; ntries < 100; ntries++) {
2285156321Sdamien		val = rt2661_bbp_read(sc, 0);
2286156321Sdamien		if (val != 0 && val != 0xff)
2287156321Sdamien			break;
2288156321Sdamien		DELAY(100);
2289156321Sdamien	}
2290156321Sdamien	if (ntries == 100) {
2291156321Sdamien		device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2292156321Sdamien		return EIO;
2293156321Sdamien	}
2294156321Sdamien
2295156321Sdamien	/* initialize BBP registers to default values */
2296156321Sdamien	for (i = 0; i < N(rt2661_def_bbp); i++) {
2297156321Sdamien		rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2298156321Sdamien		    rt2661_def_bbp[i].val);
2299156321Sdamien	}
2300156321Sdamien
2301156321Sdamien	/* write vendor-specific BBP values (from EEPROM) */
2302156321Sdamien	for (i = 0; i < 16; i++) {
2303156321Sdamien		if (sc->bbp_prom[i].reg == 0)
2304156321Sdamien			continue;
2305156321Sdamien		rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2306156321Sdamien	}
2307156321Sdamien
2308156321Sdamien	return 0;
2309156321Sdamien#undef N
2310156321Sdamien}
2311156321Sdamien
2312156321Sdamienstatic void
2313178354Ssamrt2661_init_locked(struct rt2661_softc *sc)
2314156321Sdamien{
2315156321Sdamien#define N(a)	(sizeof (a) / sizeof ((a)[0]))
2316178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2317178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2318156321Sdamien	uint32_t tmp, sta[3];
2319178354Ssam	int i, error, ntries;
2320156321Sdamien
2321178354Ssam	RAL_LOCK_ASSERT(sc);
2322156975Sdamien
2323178354Ssam	if ((sc->sc_flags & RAL_FW_LOADED) == 0) {
2324178354Ssam		error = rt2661_load_microcode(sc);
2325178354Ssam		if (error != 0) {
2326178354Ssam			if_printf(ifp,
2327178354Ssam			    "%s: could not load 8051 microcode, error %d\n",
2328178354Ssam			    __func__, error);
2329178354Ssam			return;
2330178354Ssam		}
2331178354Ssam		sc->sc_flags |= RAL_FW_LOADED;
2332178354Ssam	}
2333178354Ssam
2334170530Ssam	rt2661_stop_locked(sc);
2335156321Sdamien
2336156321Sdamien	/* initialize Tx rings */
2337156321Sdamien	RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2338156321Sdamien	RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2339156321Sdamien	RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2340156321Sdamien	RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2341156321Sdamien
2342156321Sdamien	/* initialize Mgt ring */
2343156321Sdamien	RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2344156321Sdamien
2345156321Sdamien	/* initialize Rx ring */
2346156321Sdamien	RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2347156321Sdamien
2348156321Sdamien	/* initialize Tx rings sizes */
2349156321Sdamien	RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2350156321Sdamien	    RT2661_TX_RING_COUNT << 24 |
2351156321Sdamien	    RT2661_TX_RING_COUNT << 16 |
2352156321Sdamien	    RT2661_TX_RING_COUNT <<  8 |
2353156321Sdamien	    RT2661_TX_RING_COUNT);
2354156321Sdamien
2355156321Sdamien	RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2356156321Sdamien	    RT2661_TX_DESC_WSIZE << 16 |
2357156321Sdamien	    RT2661_TX_RING_COUNT <<  8 |	/* XXX: HCCA ring unused */
2358156321Sdamien	    RT2661_MGT_RING_COUNT);
2359156321Sdamien
2360156321Sdamien	/* initialize Rx rings */
2361156321Sdamien	RAL_WRITE(sc, RT2661_RX_RING_CSR,
2362156321Sdamien	    RT2661_RX_DESC_BACK  << 16 |
2363156321Sdamien	    RT2661_RX_DESC_WSIZE <<  8 |
2364156321Sdamien	    RT2661_RX_RING_COUNT);
2365156321Sdamien
2366156321Sdamien	/* XXX: some magic here */
2367156321Sdamien	RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2368156321Sdamien
2369156321Sdamien	/* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2370156321Sdamien	RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2371156321Sdamien
2372156321Sdamien	/* load base address of Rx ring */
2373156321Sdamien	RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2374156321Sdamien
2375156321Sdamien	/* initialize MAC registers to default values */
2376156321Sdamien	for (i = 0; i < N(rt2661_def_mac); i++)
2377156321Sdamien		RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2378156321Sdamien
2379190526Ssam	rt2661_set_macaddr(sc, IF_LLADDR(ifp));
2380156321Sdamien
2381156321Sdamien	/* set host ready */
2382156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2383156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2384156321Sdamien
2385156321Sdamien	/* wait for BBP/RF to wakeup */
2386156321Sdamien	for (ntries = 0; ntries < 1000; ntries++) {
2387156321Sdamien		if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2388156321Sdamien			break;
2389156321Sdamien		DELAY(1000);
2390156321Sdamien	}
2391156321Sdamien	if (ntries == 1000) {
2392156321Sdamien		printf("timeout waiting for BBP/RF to wakeup\n");
2393170530Ssam		rt2661_stop_locked(sc);
2394156321Sdamien		return;
2395156321Sdamien	}
2396156321Sdamien
2397156321Sdamien	if (rt2661_bbp_init(sc) != 0) {
2398170530Ssam		rt2661_stop_locked(sc);
2399156321Sdamien		return;
2400156321Sdamien	}
2401156321Sdamien
2402156321Sdamien	/* select default channel */
2403156321Sdamien	sc->sc_curchan = ic->ic_curchan;
2404156321Sdamien	rt2661_select_band(sc, sc->sc_curchan);
2405156321Sdamien	rt2661_select_antenna(sc);
2406156321Sdamien	rt2661_set_chan(sc, sc->sc_curchan);
2407156321Sdamien
2408156321Sdamien	/* update Rx filter */
2409156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2410156321Sdamien
2411156321Sdamien	tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2412156321Sdamien	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2413156321Sdamien		tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2414156321Sdamien		       RT2661_DROP_ACKCTS;
2415195618Srpaulo		if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2416195618Srpaulo		    ic->ic_opmode != IEEE80211_M_MBSS)
2417156321Sdamien			tmp |= RT2661_DROP_TODS;
2418156321Sdamien		if (!(ifp->if_flags & IFF_PROMISC))
2419156321Sdamien			tmp |= RT2661_DROP_NOT_TO_ME;
2420156321Sdamien	}
2421156321Sdamien
2422156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2423156321Sdamien
2424156321Sdamien	/* clear STA registers */
2425156321Sdamien	RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
2426156321Sdamien
2427156321Sdamien	/* initialize ASIC */
2428156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2429156321Sdamien
2430156321Sdamien	/* clear any pending interrupt */
2431156321Sdamien	RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2432156321Sdamien
2433156321Sdamien	/* enable interrupts */
2434156321Sdamien	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2435156321Sdamien	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2436156321Sdamien
2437156321Sdamien	/* kick Rx */
2438156321Sdamien	RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2439156321Sdamien
2440156321Sdamien	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2441156321Sdamien	ifp->if_drv_flags |= IFF_DRV_RUNNING;
2442156321Sdamien
2443178354Ssam	callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
2444156975Sdamien#undef N
2445156321Sdamien}
2446156321Sdamien
2447178354Ssamstatic void
2448178354Ssamrt2661_init(void *priv)
2449156321Sdamien{
2450156321Sdamien	struct rt2661_softc *sc = priv;
2451178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2452178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2453170530Ssam
2454170530Ssam	RAL_LOCK(sc);
2455178354Ssam	rt2661_init_locked(sc);
2456170530Ssam	RAL_UNLOCK(sc);
2457178354Ssam
2458178931Sthompsa	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2459178931Sthompsa		ieee80211_start_all(ic);		/* start all vap's */
2460170530Ssam}
2461170530Ssam
2462170530Ssamvoid
2463170530Ssamrt2661_stop_locked(struct rt2661_softc *sc)
2464170530Ssam{
2465178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2466156321Sdamien	uint32_t tmp;
2467170530Ssam	volatile int *flags = &sc->sc_flags;
2468156321Sdamien
2469178354Ssam	while (*flags & RAL_INPUT_RUNNING)
2470170530Ssam		msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
2471156321Sdamien
2472178354Ssam	callout_stop(&sc->watchdog_ch);
2473178354Ssam	sc->sc_tx_timer = 0;
2474178354Ssam
2475170530Ssam	if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
2476170530Ssam		ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2477178354Ssam
2478170530Ssam		/* abort Tx (for all 5 Tx rings) */
2479170530Ssam		RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2480170530Ssam
2481170530Ssam		/* disable Rx (value remains after reset!) */
2482170530Ssam		tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2483170530Ssam		RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2484170530Ssam
2485170530Ssam		/* reset ASIC */
2486170530Ssam		RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2487170530Ssam		RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2488170530Ssam
2489170530Ssam		/* disable interrupts */
2490170530Ssam		RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2491170530Ssam		RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2492170530Ssam
2493170530Ssam		/* clear any pending interrupt */
2494170530Ssam		RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2495170530Ssam		RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2496170530Ssam
2497170530Ssam		/* reset Tx and Rx rings */
2498170530Ssam		rt2661_reset_tx_ring(sc, &sc->txq[0]);
2499170530Ssam		rt2661_reset_tx_ring(sc, &sc->txq[1]);
2500170530Ssam		rt2661_reset_tx_ring(sc, &sc->txq[2]);
2501170530Ssam		rt2661_reset_tx_ring(sc, &sc->txq[3]);
2502170530Ssam		rt2661_reset_tx_ring(sc, &sc->mgtq);
2503170530Ssam		rt2661_reset_rx_ring(sc, &sc->rxq);
2504170530Ssam	}
2505156321Sdamien}
2506156321Sdamien
2507178354Ssamvoid
2508178354Ssamrt2661_stop(void *priv)
2509178354Ssam{
2510178354Ssam	struct rt2661_softc *sc = priv;
2511178354Ssam
2512178354Ssam	RAL_LOCK(sc);
2513178354Ssam	rt2661_stop_locked(sc);
2514178354Ssam	RAL_UNLOCK(sc);
2515178354Ssam}
2516178354Ssam
2517156321Sdamienstatic int
2518178354Ssamrt2661_load_microcode(struct rt2661_softc *sc)
2519156321Sdamien{
2520178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2521178354Ssam	const struct firmware *fp;
2522178354Ssam	const char *imagename;
2523178354Ssam	int ntries, error;
2524156321Sdamien
2525178354Ssam	RAL_LOCK_ASSERT(sc);
2526178354Ssam
2527178354Ssam	switch (sc->sc_id) {
2528178354Ssam	case 0x0301: imagename = "rt2561sfw"; break;
2529178354Ssam	case 0x0302: imagename = "rt2561fw"; break;
2530178354Ssam	case 0x0401: imagename = "rt2661fw"; break;
2531178354Ssam	default:
2532178354Ssam		if_printf(ifp, "%s: unexpected pci device id 0x%x, "
2533178354Ssam		    "don't know how to retrieve firmware\n",
2534178354Ssam		    __func__, sc->sc_id);
2535178354Ssam		return EINVAL;
2536178354Ssam	}
2537178354Ssam	RAL_UNLOCK(sc);
2538178354Ssam	fp = firmware_get(imagename);
2539178354Ssam	RAL_LOCK(sc);
2540178354Ssam	if (fp == NULL) {
2541178354Ssam		if_printf(ifp, "%s: unable to retrieve firmware image %s\n",
2542178354Ssam		    __func__, imagename);
2543178354Ssam		return EINVAL;
2544178354Ssam	}
2545178354Ssam
2546178354Ssam	/*
2547178354Ssam	 * Load 8051 microcode into NIC.
2548178354Ssam	 */
2549156321Sdamien	/* reset 8051 */
2550156321Sdamien	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2551156321Sdamien
2552156321Sdamien	/* cancel any pending Host to MCU command */
2553156321Sdamien	RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2554156321Sdamien	RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2555156321Sdamien	RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2556156321Sdamien
2557156321Sdamien	/* write 8051's microcode */
2558156321Sdamien	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2559178354Ssam	RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize);
2560156321Sdamien	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2561156321Sdamien
2562156321Sdamien	/* kick 8051's ass */
2563156321Sdamien	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2564156321Sdamien
2565156321Sdamien	/* wait for 8051 to initialize */
2566156321Sdamien	for (ntries = 0; ntries < 500; ntries++) {
2567156321Sdamien		if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2568156321Sdamien			break;
2569156321Sdamien		DELAY(100);
2570156321Sdamien	}
2571156321Sdamien	if (ntries == 500) {
2572178354Ssam		if_printf(ifp, "%s: timeout waiting for MCU to initialize\n",
2573178354Ssam		    __func__);
2574178354Ssam		error = EIO;
2575178354Ssam	} else
2576178354Ssam		error = 0;
2577178354Ssam
2578178354Ssam	firmware_put(fp, FIRMWARE_UNLOAD);
2579178354Ssam	return error;
2580156321Sdamien}
2581156321Sdamien
2582156321Sdamien#ifdef notyet
2583156321Sdamien/*
2584156321Sdamien * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2585156321Sdamien * false CCA count.  This function is called periodically (every seconds) when
2586156321Sdamien * in the RUN state.  Values taken from the reference driver.
2587156321Sdamien */
2588156321Sdamienstatic void
2589156321Sdamienrt2661_rx_tune(struct rt2661_softc *sc)
2590156321Sdamien{
2591156321Sdamien	uint8_t bbp17;
2592156321Sdamien	uint16_t cca;
2593156321Sdamien	int lo, hi, dbm;
2594156321Sdamien
2595156321Sdamien	/*
2596156321Sdamien	 * Tuning range depends on operating band and on the presence of an
2597156321Sdamien	 * external low-noise amplifier.
2598156321Sdamien	 */
2599156321Sdamien	lo = 0x20;
2600156321Sdamien	if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2601156321Sdamien		lo += 0x08;
2602156321Sdamien	if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2603156321Sdamien	    (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2604156321Sdamien		lo += 0x10;
2605156321Sdamien	hi = lo + 0x20;
2606156321Sdamien
2607156321Sdamien	/* retrieve false CCA count since last call (clear on read) */
2608156321Sdamien	cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2609156321Sdamien
2610156321Sdamien	if (dbm >= -35) {
2611156321Sdamien		bbp17 = 0x60;
2612156321Sdamien	} else if (dbm >= -58) {
2613156321Sdamien		bbp17 = hi;
2614156321Sdamien	} else if (dbm >= -66) {
2615156321Sdamien		bbp17 = lo + 0x10;
2616156321Sdamien	} else if (dbm >= -74) {
2617156321Sdamien		bbp17 = lo + 0x08;
2618156321Sdamien	} else {
2619156321Sdamien		/* RSSI < -74dBm, tune using false CCA count */
2620156321Sdamien
2621156321Sdamien		bbp17 = sc->bbp17; /* current value */
2622156321Sdamien
2623156321Sdamien		hi -= 2 * (-74 - dbm);
2624156321Sdamien		if (hi < lo)
2625156321Sdamien			hi = lo;
2626156321Sdamien
2627156321Sdamien		if (bbp17 > hi) {
2628156321Sdamien			bbp17 = hi;
2629156321Sdamien
2630156321Sdamien		} else if (cca > 512) {
2631156321Sdamien			if (++bbp17 > hi)
2632156321Sdamien				bbp17 = hi;
2633156321Sdamien		} else if (cca < 100) {
2634156321Sdamien			if (--bbp17 < lo)
2635156321Sdamien				bbp17 = lo;
2636156321Sdamien		}
2637156321Sdamien	}
2638156321Sdamien
2639156321Sdamien	if (bbp17 != sc->bbp17) {
2640156321Sdamien		rt2661_bbp_write(sc, 17, bbp17);
2641156321Sdamien		sc->bbp17 = bbp17;
2642156321Sdamien	}
2643156321Sdamien}
2644156321Sdamien
2645156321Sdamien/*
2646156321Sdamien * Enter/Leave radar detection mode.
2647156321Sdamien * This is for 802.11h additional regulatory domains.
2648156321Sdamien */
2649156321Sdamienstatic void
2650156321Sdamienrt2661_radar_start(struct rt2661_softc *sc)
2651156321Sdamien{
2652156321Sdamien	uint32_t tmp;
2653156321Sdamien
2654156321Sdamien	/* disable Rx */
2655156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2656156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2657156321Sdamien
2658156321Sdamien	rt2661_bbp_write(sc, 82, 0x20);
2659156321Sdamien	rt2661_bbp_write(sc, 83, 0x00);
2660156321Sdamien	rt2661_bbp_write(sc, 84, 0x40);
2661156321Sdamien
2662156321Sdamien	/* save current BBP registers values */
2663156321Sdamien	sc->bbp18 = rt2661_bbp_read(sc, 18);
2664156321Sdamien	sc->bbp21 = rt2661_bbp_read(sc, 21);
2665156321Sdamien	sc->bbp22 = rt2661_bbp_read(sc, 22);
2666156321Sdamien	sc->bbp16 = rt2661_bbp_read(sc, 16);
2667156321Sdamien	sc->bbp17 = rt2661_bbp_read(sc, 17);
2668156321Sdamien	sc->bbp64 = rt2661_bbp_read(sc, 64);
2669156321Sdamien
2670156321Sdamien	rt2661_bbp_write(sc, 18, 0xff);
2671156321Sdamien	rt2661_bbp_write(sc, 21, 0x3f);
2672156321Sdamien	rt2661_bbp_write(sc, 22, 0x3f);
2673156321Sdamien	rt2661_bbp_write(sc, 16, 0xbd);
2674156321Sdamien	rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2675156321Sdamien	rt2661_bbp_write(sc, 64, 0x21);
2676156321Sdamien
2677156321Sdamien	/* restore Rx filter */
2678156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2679156321Sdamien}
2680156321Sdamien
2681156321Sdamienstatic int
2682156321Sdamienrt2661_radar_stop(struct rt2661_softc *sc)
2683156321Sdamien{
2684156321Sdamien	uint8_t bbp66;
2685156321Sdamien
2686156321Sdamien	/* read radar detection result */
2687156321Sdamien	bbp66 = rt2661_bbp_read(sc, 66);
2688156321Sdamien
2689156321Sdamien	/* restore BBP registers values */
2690156321Sdamien	rt2661_bbp_write(sc, 16, sc->bbp16);
2691156321Sdamien	rt2661_bbp_write(sc, 17, sc->bbp17);
2692156321Sdamien	rt2661_bbp_write(sc, 18, sc->bbp18);
2693156321Sdamien	rt2661_bbp_write(sc, 21, sc->bbp21);
2694156321Sdamien	rt2661_bbp_write(sc, 22, sc->bbp22);
2695156321Sdamien	rt2661_bbp_write(sc, 64, sc->bbp64);
2696156321Sdamien
2697156321Sdamien	return bbp66 == 1;
2698156321Sdamien}
2699156321Sdamien#endif
2700156321Sdamien
2701156321Sdamienstatic int
2702178354Ssamrt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap)
2703156321Sdamien{
2704178354Ssam	struct ieee80211com *ic = vap->iv_ic;
2705156321Sdamien	struct ieee80211_beacon_offsets bo;
2706156321Sdamien	struct rt2661_tx_desc desc;
2707156321Sdamien	struct mbuf *m0;
2708156321Sdamien	int rate;
2709156321Sdamien
2710178354Ssam	m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo);
2711156321Sdamien	if (m0 == NULL) {
2712156321Sdamien		device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2713156321Sdamien		return ENOBUFS;
2714156321Sdamien	}
2715156321Sdamien
2716156321Sdamien	/* send beacons at the lowest available rate */
2717178354Ssam	rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2;
2718156321Sdamien
2719156321Sdamien	rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2720156321Sdamien	    m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2721156321Sdamien
2722156321Sdamien	/* copy the first 24 bytes of Tx descriptor into NIC memory */
2723156321Sdamien	RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2724156321Sdamien
2725156321Sdamien	/* copy beacon header and payload into NIC memory */
2726156321Sdamien	RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2727156321Sdamien	    mtod(m0, uint8_t *), m0->m_pkthdr.len);
2728156321Sdamien
2729156321Sdamien	m_freem(m0);
2730156321Sdamien
2731156321Sdamien	return 0;
2732156321Sdamien}
2733156321Sdamien
2734156321Sdamien/*
2735156321Sdamien * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2736156321Sdamien * and HostAP operating modes.
2737156321Sdamien */
2738156321Sdamienstatic void
2739156321Sdamienrt2661_enable_tsf_sync(struct rt2661_softc *sc)
2740156321Sdamien{
2741178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2742178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2743178354Ssam	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2744156321Sdamien	uint32_t tmp;
2745156321Sdamien
2746178354Ssam	if (vap->iv_opmode != IEEE80211_M_STA) {
2747156321Sdamien		/*
2748156321Sdamien		 * Change default 16ms TBTT adjustment to 8ms.
2749156321Sdamien		 * Must be done before enabling beacon generation.
2750156321Sdamien		 */
2751156321Sdamien		RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2752156321Sdamien	}
2753156321Sdamien
2754156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2755156321Sdamien
2756156321Sdamien	/* set beacon interval (in 1/16ms unit) */
2757178354Ssam	tmp |= vap->iv_bss->ni_intval * 16;
2758156321Sdamien
2759156321Sdamien	tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2760178354Ssam	if (vap->iv_opmode == IEEE80211_M_STA)
2761156321Sdamien		tmp |= RT2661_TSF_MODE(1);
2762156321Sdamien	else
2763156321Sdamien		tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2764156321Sdamien
2765156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2766156321Sdamien}
2767156321Sdamien
2768192468Ssamstatic void
2769192468Ssamrt2661_enable_tsf(struct rt2661_softc *sc)
2770192468Ssam{
2771192468Ssam	RAL_WRITE(sc, RT2661_TXRX_CSR9,
2772192468Ssam	      (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000)
2773192468Ssam	    | RT2661_TSF_TICKING | RT2661_TSF_MODE(2));
2774192468Ssam}
2775192468Ssam
2776156321Sdamien/*
2777156321Sdamien * Retrieve the "Received Signal Strength Indicator" from the raw values
2778156321Sdamien * contained in Rx descriptors.  The computation depends on which band the
2779156321Sdamien * frame was received.  Correction values taken from the reference driver.
2780156321Sdamien */
2781156321Sdamienstatic int
2782156321Sdamienrt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2783156321Sdamien{
2784156321Sdamien	int lna, agc, rssi;
2785156321Sdamien
2786156321Sdamien	lna = (raw >> 5) & 0x3;
2787156321Sdamien	agc = raw & 0x1f;
2788156321Sdamien
2789170530Ssam	if (lna == 0) {
2790170530Ssam		/*
2791170530Ssam		 * No mapping available.
2792170530Ssam		 *
2793170530Ssam		 * NB: Since RSSI is relative to noise floor, -1 is
2794170530Ssam		 *     adequate for caller to know error happened.
2795170530Ssam		 */
2796170530Ssam		return -1;
2797170530Ssam	}
2798156321Sdamien
2799170530Ssam	rssi = (2 * agc) - RT2661_NOISE_FLOOR;
2800170530Ssam
2801156321Sdamien	if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2802156321Sdamien		rssi += sc->rssi_2ghz_corr;
2803156321Sdamien
2804156321Sdamien		if (lna == 1)
2805156321Sdamien			rssi -= 64;
2806156321Sdamien		else if (lna == 2)
2807156321Sdamien			rssi -= 74;
2808156321Sdamien		else if (lna == 3)
2809156321Sdamien			rssi -= 90;
2810156321Sdamien	} else {
2811156321Sdamien		rssi += sc->rssi_5ghz_corr;
2812156321Sdamien
2813156321Sdamien		if (lna == 1)
2814156321Sdamien			rssi -= 64;
2815156321Sdamien		else if (lna == 2)
2816156321Sdamien			rssi -= 86;
2817156321Sdamien		else if (lna == 3)
2818156321Sdamien			rssi -= 100;
2819156321Sdamien	}
2820156321Sdamien	return rssi;
2821156321Sdamien}
2822170530Ssam
2823170530Ssamstatic void
2824170530Ssamrt2661_scan_start(struct ieee80211com *ic)
2825170530Ssam{
2826170530Ssam	struct ifnet *ifp = ic->ic_ifp;
2827170530Ssam	struct rt2661_softc *sc = ifp->if_softc;
2828170530Ssam	uint32_t tmp;
2829170530Ssam
2830170530Ssam	/* abort TSF synchronization */
2831170530Ssam	tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
2832170530Ssam	RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff);
2833170530Ssam	rt2661_set_bssid(sc, ifp->if_broadcastaddr);
2834170530Ssam}
2835170530Ssam
2836170530Ssamstatic void
2837170530Ssamrt2661_scan_end(struct ieee80211com *ic)
2838170530Ssam{
2839170530Ssam	struct ifnet *ifp = ic->ic_ifp;
2840170530Ssam	struct rt2661_softc *sc = ifp->if_softc;
2841178354Ssam	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2842170530Ssam
2843170530Ssam	rt2661_enable_tsf_sync(sc);
2844170530Ssam	/* XXX keep local copy */
2845178354Ssam	rt2661_set_bssid(sc, vap->iv_bss->ni_bssid);
2846170530Ssam}
2847170530Ssam
2848170530Ssamstatic void
2849170530Ssamrt2661_set_channel(struct ieee80211com *ic)
2850170530Ssam{
2851170530Ssam	struct ifnet *ifp = ic->ic_ifp;
2852170530Ssam	struct rt2661_softc *sc = ifp->if_softc;
2853170530Ssam
2854170530Ssam	RAL_LOCK(sc);
2855170530Ssam	rt2661_set_chan(sc, ic->ic_curchan);
2856170530Ssam	RAL_UNLOCK(sc);
2857170530Ssam
2858170530Ssam}
2859