rt2661.c revision 195618
1156321Sdamien/*	$FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $	*/
2156321Sdamien
3156321Sdamien/*-
4156321Sdamien * Copyright (c) 2006
5156321Sdamien *	Damien Bergamini <damien.bergamini@free.fr>
6156321Sdamien *
7156321Sdamien * Permission to use, copy, modify, and distribute this software for any
8156321Sdamien * purpose with or without fee is hereby granted, provided that the above
9156321Sdamien * copyright notice and this permission notice appear in all copies.
10156321Sdamien *
11156321Sdamien * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12156321Sdamien * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13156321Sdamien * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14156321Sdamien * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15156321Sdamien * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16156321Sdamien * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17156321Sdamien * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18156321Sdamien */
19156321Sdamien
20156321Sdamien#include <sys/cdefs.h>
21156321Sdamien__FBSDID("$FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $");
22156321Sdamien
23156321Sdamien/*-
24156321Sdamien * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
25156321Sdamien * http://www.ralinktech.com/
26156321Sdamien */
27156321Sdamien
28156321Sdamien#include <sys/param.h>
29156321Sdamien#include <sys/sysctl.h>
30156321Sdamien#include <sys/sockio.h>
31156321Sdamien#include <sys/mbuf.h>
32156321Sdamien#include <sys/kernel.h>
33156321Sdamien#include <sys/socket.h>
34156321Sdamien#include <sys/systm.h>
35156321Sdamien#include <sys/malloc.h>
36164982Skevlo#include <sys/lock.h>
37164982Skevlo#include <sys/mutex.h>
38156321Sdamien#include <sys/module.h>
39156321Sdamien#include <sys/bus.h>
40156321Sdamien#include <sys/endian.h>
41178354Ssam#include <sys/firmware.h>
42156321Sdamien
43156321Sdamien#include <machine/bus.h>
44156321Sdamien#include <machine/resource.h>
45156321Sdamien#include <sys/rman.h>
46156321Sdamien
47156321Sdamien#include <net/bpf.h>
48156321Sdamien#include <net/if.h>
49156321Sdamien#include <net/if_arp.h>
50156321Sdamien#include <net/ethernet.h>
51156321Sdamien#include <net/if_dl.h>
52156321Sdamien#include <net/if_media.h>
53156321Sdamien#include <net/if_types.h>
54156321Sdamien
55156321Sdamien#include <net80211/ieee80211_var.h>
56156321Sdamien#include <net80211/ieee80211_radiotap.h>
57170530Ssam#include <net80211/ieee80211_regdomain.h>
58178354Ssam#include <net80211/ieee80211_amrr.h>
59156321Sdamien
60156321Sdamien#include <netinet/in.h>
61156321Sdamien#include <netinet/in_systm.h>
62156321Sdamien#include <netinet/in_var.h>
63156321Sdamien#include <netinet/ip.h>
64156321Sdamien#include <netinet/if_ether.h>
65156321Sdamien
66156327Ssilby#include <dev/ral/rt2661reg.h>
67156327Ssilby#include <dev/ral/rt2661var.h>
68156321Sdamien
69178354Ssam#define RAL_DEBUG
70156321Sdamien#ifdef RAL_DEBUG
71178354Ssam#define DPRINTF(sc, fmt, ...) do {				\
72178354Ssam	if (sc->sc_debug > 0)					\
73178354Ssam		printf(fmt, __VA_ARGS__);			\
74178354Ssam} while (0)
75178354Ssam#define DPRINTFN(sc, n, fmt, ...) do {				\
76178354Ssam	if (sc->sc_debug >= (n))				\
77178354Ssam		printf(fmt, __VA_ARGS__);			\
78178354Ssam} while (0)
79156321Sdamien#else
80178354Ssam#define DPRINTF(sc, fmt, ...)
81178354Ssam#define DPRINTFN(sc, n, fmt, ...)
82156321Sdamien#endif
83156321Sdamien
84178354Ssamstatic struct ieee80211vap *rt2661_vap_create(struct ieee80211com *,
85178354Ssam			    const char name[IFNAMSIZ], int unit, int opmode,
86178354Ssam			    int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
87178354Ssam			    const uint8_t mac[IEEE80211_ADDR_LEN]);
88178354Ssamstatic void		rt2661_vap_delete(struct ieee80211vap *);
89156321Sdamienstatic void		rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
90156321Sdamien			    int);
91156321Sdamienstatic int		rt2661_alloc_tx_ring(struct rt2661_softc *,
92156321Sdamien			    struct rt2661_tx_ring *, int);
93156321Sdamienstatic void		rt2661_reset_tx_ring(struct rt2661_softc *,
94156321Sdamien			    struct rt2661_tx_ring *);
95156321Sdamienstatic void		rt2661_free_tx_ring(struct rt2661_softc *,
96156321Sdamien			    struct rt2661_tx_ring *);
97156321Sdamienstatic int		rt2661_alloc_rx_ring(struct rt2661_softc *,
98156321Sdamien			    struct rt2661_rx_ring *, int);
99156321Sdamienstatic void		rt2661_reset_rx_ring(struct rt2661_softc *,
100156321Sdamien			    struct rt2661_rx_ring *);
101156321Sdamienstatic void		rt2661_free_rx_ring(struct rt2661_softc *,
102156321Sdamien			    struct rt2661_rx_ring *);
103179643Ssamstatic struct ieee80211_node *rt2661_node_alloc(struct ieee80211vap *,
104179643Ssam			    const uint8_t [IEEE80211_ADDR_LEN]);
105178354Ssamstatic void		rt2661_newassoc(struct ieee80211_node *, int);
106178354Ssamstatic int		rt2661_newstate(struct ieee80211vap *,
107156321Sdamien			    enum ieee80211_state, int);
108156321Sdamienstatic uint16_t		rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
109156321Sdamienstatic void		rt2661_rx_intr(struct rt2661_softc *);
110156321Sdamienstatic void		rt2661_tx_intr(struct rt2661_softc *);
111156321Sdamienstatic void		rt2661_tx_dma_intr(struct rt2661_softc *,
112156321Sdamien			    struct rt2661_tx_ring *);
113156321Sdamienstatic void		rt2661_mcu_beacon_expire(struct rt2661_softc *);
114156321Sdamienstatic void		rt2661_mcu_wakeup(struct rt2661_softc *);
115156321Sdamienstatic void		rt2661_mcu_cmd_intr(struct rt2661_softc *);
116170530Ssamstatic void		rt2661_scan_start(struct ieee80211com *);
117170530Ssamstatic void		rt2661_scan_end(struct ieee80211com *);
118170530Ssamstatic void		rt2661_set_channel(struct ieee80211com *);
119156321Sdamienstatic void		rt2661_setup_tx_desc(struct rt2661_softc *,
120156321Sdamien			    struct rt2661_tx_desc *, uint32_t, uint16_t, int,
121156321Sdamien			    int, const bus_dma_segment_t *, int, int);
122156321Sdamienstatic int		rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
123156321Sdamien			    struct ieee80211_node *, int);
124156321Sdamienstatic int		rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
125156321Sdamien			    struct ieee80211_node *);
126178354Ssamstatic void		rt2661_start_locked(struct ifnet *);
127156321Sdamienstatic void		rt2661_start(struct ifnet *);
128178354Ssamstatic int		rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *,
129178354Ssam			    const struct ieee80211_bpf_params *);
130165352Sbmsstatic void		rt2661_watchdog(void *);
131156321Sdamienstatic int		rt2661_ioctl(struct ifnet *, u_long, caddr_t);
132156321Sdamienstatic void		rt2661_bbp_write(struct rt2661_softc *, uint8_t,
133156321Sdamien			    uint8_t);
134156321Sdamienstatic uint8_t		rt2661_bbp_read(struct rt2661_softc *, uint8_t);
135156321Sdamienstatic void		rt2661_rf_write(struct rt2661_softc *, uint8_t,
136156321Sdamien			    uint32_t);
137156321Sdamienstatic int		rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
138156321Sdamien			    uint16_t);
139156321Sdamienstatic void		rt2661_select_antenna(struct rt2661_softc *);
140156321Sdamienstatic void		rt2661_enable_mrr(struct rt2661_softc *);
141156321Sdamienstatic void		rt2661_set_txpreamble(struct rt2661_softc *);
142156321Sdamienstatic void		rt2661_set_basicrates(struct rt2661_softc *,
143156321Sdamien			    const struct ieee80211_rateset *);
144156321Sdamienstatic void		rt2661_select_band(struct rt2661_softc *,
145156321Sdamien			    struct ieee80211_channel *);
146156321Sdamienstatic void		rt2661_set_chan(struct rt2661_softc *,
147156321Sdamien			    struct ieee80211_channel *);
148156321Sdamienstatic void		rt2661_set_bssid(struct rt2661_softc *,
149156321Sdamien			    const uint8_t *);
150156321Sdamienstatic void		rt2661_set_macaddr(struct rt2661_softc *,
151156321Sdamien			   const uint8_t *);
152178354Ssamstatic void		rt2661_update_promisc(struct ifnet *);
153156321Sdamienstatic int		rt2661_wme_update(struct ieee80211com *) __unused;
154156321Sdamienstatic void		rt2661_update_slot(struct ifnet *);
155156321Sdamienstatic const char	*rt2661_get_rf(int);
156178354Ssamstatic void		rt2661_read_eeprom(struct rt2661_softc *,
157190526Ssam			    uint8_t macaddr[IEEE80211_ADDR_LEN]);
158156321Sdamienstatic int		rt2661_bbp_init(struct rt2661_softc *);
159178354Ssamstatic void		rt2661_init_locked(struct rt2661_softc *);
160156321Sdamienstatic void		rt2661_init(void *);
161178354Ssamstatic void             rt2661_stop_locked(struct rt2661_softc *);
162156321Sdamienstatic void		rt2661_stop(void *);
163178354Ssamstatic int		rt2661_load_microcode(struct rt2661_softc *);
164156321Sdamien#ifdef notyet
165156321Sdamienstatic void		rt2661_rx_tune(struct rt2661_softc *);
166156321Sdamienstatic void		rt2661_radar_start(struct rt2661_softc *);
167156321Sdamienstatic int		rt2661_radar_stop(struct rt2661_softc *);
168156321Sdamien#endif
169178354Ssamstatic int		rt2661_prepare_beacon(struct rt2661_softc *,
170178354Ssam			    struct ieee80211vap *);
171156321Sdamienstatic void		rt2661_enable_tsf_sync(struct rt2661_softc *);
172192468Ssamstatic void		rt2661_enable_tsf(struct rt2661_softc *);
173156321Sdamienstatic int		rt2661_get_rssi(struct rt2661_softc *, uint8_t);
174156321Sdamien
175156321Sdamienstatic const struct {
176156321Sdamien	uint32_t	reg;
177156321Sdamien	uint32_t	val;
178156321Sdamien} rt2661_def_mac[] = {
179156321Sdamien	RT2661_DEF_MAC
180156321Sdamien};
181156321Sdamien
182156321Sdamienstatic const struct {
183156321Sdamien	uint8_t	reg;
184156321Sdamien	uint8_t	val;
185156321Sdamien} rt2661_def_bbp[] = {
186156321Sdamien	RT2661_DEF_BBP
187156321Sdamien};
188156321Sdamien
189156321Sdamienstatic const struct rfprog {
190156321Sdamien	uint8_t		chan;
191156321Sdamien	uint32_t	r1, r2, r3, r4;
192156321Sdamien}  rt2661_rf5225_1[] = {
193156321Sdamien	RT2661_RF5225_1
194156321Sdamien}, rt2661_rf5225_2[] = {
195156321Sdamien	RT2661_RF5225_2
196156321Sdamien};
197156321Sdamien
198156321Sdamienint
199156321Sdamienrt2661_attach(device_t dev, int id)
200156321Sdamien{
201156321Sdamien	struct rt2661_softc *sc = device_get_softc(dev);
202178354Ssam	struct ieee80211com *ic;
203156321Sdamien	struct ifnet *ifp;
204156321Sdamien	uint32_t val;
205178354Ssam	int error, ac, ntries;
206178354Ssam	uint8_t bands;
207190526Ssam	uint8_t macaddr[IEEE80211_ADDR_LEN];
208156321Sdamien
209178354Ssam	sc->sc_id = id;
210156321Sdamien	sc->sc_dev = dev;
211156321Sdamien
212178354Ssam	ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
213178354Ssam	if (ifp == NULL) {
214178354Ssam		device_printf(sc->sc_dev, "can not if_alloc()\n");
215178354Ssam		return ENOMEM;
216178354Ssam	}
217178354Ssam	ic = ifp->if_l2com;
218178354Ssam
219156321Sdamien	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
220156321Sdamien	    MTX_DEF | MTX_RECURSE);
221156321Sdamien
222165352Sbms	callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
223156321Sdamien
224156321Sdamien	/* wait for NIC to initialize */
225156321Sdamien	for (ntries = 0; ntries < 1000; ntries++) {
226156321Sdamien		if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
227156321Sdamien			break;
228156321Sdamien		DELAY(1000);
229156321Sdamien	}
230156321Sdamien	if (ntries == 1000) {
231156321Sdamien		device_printf(sc->sc_dev,
232156321Sdamien		    "timeout waiting for NIC to initialize\n");
233156321Sdamien		error = EIO;
234156321Sdamien		goto fail1;
235156321Sdamien	}
236156321Sdamien
237156321Sdamien	/* retrieve RF rev. no and various other things from EEPROM */
238190526Ssam	rt2661_read_eeprom(sc, macaddr);
239156321Sdamien
240156321Sdamien	device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
241156321Sdamien	    rt2661_get_rf(sc->rf_rev));
242156321Sdamien
243156321Sdamien	/*
244156321Sdamien	 * Allocate Tx and Rx rings.
245156321Sdamien	 */
246156321Sdamien	for (ac = 0; ac < 4; ac++) {
247156321Sdamien		error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
248156321Sdamien		    RT2661_TX_RING_COUNT);
249156321Sdamien		if (error != 0) {
250156321Sdamien			device_printf(sc->sc_dev,
251156321Sdamien			    "could not allocate Tx ring %d\n", ac);
252156321Sdamien			goto fail2;
253156321Sdamien		}
254156321Sdamien	}
255156321Sdamien
256156321Sdamien	error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
257156321Sdamien	if (error != 0) {
258156321Sdamien		device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
259156321Sdamien		goto fail2;
260156321Sdamien	}
261156321Sdamien
262156321Sdamien	error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
263156321Sdamien	if (error != 0) {
264156321Sdamien		device_printf(sc->sc_dev, "could not allocate Rx ring\n");
265156321Sdamien		goto fail3;
266156321Sdamien	}
267156321Sdamien
268156321Sdamien	ifp->if_softc = sc;
269156321Sdamien	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
270156321Sdamien	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
271156321Sdamien	ifp->if_init = rt2661_init;
272156321Sdamien	ifp->if_ioctl = rt2661_ioctl;
273156321Sdamien	ifp->if_start = rt2661_start;
274156321Sdamien	IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
275156321Sdamien	ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
276156321Sdamien	IFQ_SET_READY(&ifp->if_snd);
277156321Sdamien
278156321Sdamien	ic->ic_ifp = ifp;
279178354Ssam	ic->ic_opmode = IEEE80211_M_STA;
280156321Sdamien	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
281156321Sdamien
282156321Sdamien	/* set device capabilities */
283156321Sdamien	ic->ic_caps =
284178957Ssam		  IEEE80211_C_STA		/* station mode */
285178957Ssam		| IEEE80211_C_IBSS		/* ibss, nee adhoc, mode */
286178354Ssam		| IEEE80211_C_HOSTAP		/* hostap mode */
287178354Ssam		| IEEE80211_C_MONITOR		/* monitor mode */
288178354Ssam		| IEEE80211_C_AHDEMO		/* adhoc demo mode */
289178354Ssam		| IEEE80211_C_WDS		/* 4-address traffic works */
290195618Srpaulo		| IEEE80211_C_MBSS		/* mesh point link mode */
291178354Ssam		| IEEE80211_C_SHPREAMBLE	/* short preamble supported */
292178354Ssam		| IEEE80211_C_SHSLOT		/* short slot time supported */
293178354Ssam		| IEEE80211_C_WPA		/* capable of WPA1+WPA2 */
294178354Ssam		| IEEE80211_C_BGSCAN		/* capable of bg scanning */
295156407Sdamien#ifdef notyet
296178354Ssam		| IEEE80211_C_TXFRAG		/* handle tx frags */
297178354Ssam		| IEEE80211_C_WME		/* 802.11e */
298156407Sdamien#endif
299178354Ssam		;
300156321Sdamien
301170530Ssam	bands = 0;
302170530Ssam	setbit(&bands, IEEE80211_MODE_11B);
303170530Ssam	setbit(&bands, IEEE80211_MODE_11G);
304170530Ssam	if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325)
305170530Ssam		setbit(&bands, IEEE80211_MODE_11A);
306178354Ssam	ieee80211_init_channels(ic, NULL, &bands);
307156321Sdamien
308190526Ssam	ieee80211_ifattach(ic, macaddr);
309178354Ssam	ic->ic_newassoc = rt2661_newassoc;
310156321Sdamien	ic->ic_node_alloc = rt2661_node_alloc;
311178354Ssam#if 0
312178354Ssam	ic->ic_wme.wme_update = rt2661_wme_update;
313178354Ssam#endif
314170530Ssam	ic->ic_scan_start = rt2661_scan_start;
315170530Ssam	ic->ic_scan_end = rt2661_scan_end;
316170530Ssam	ic->ic_set_channel = rt2661_set_channel;
317156321Sdamien	ic->ic_updateslot = rt2661_update_slot;
318178354Ssam	ic->ic_update_promisc = rt2661_update_promisc;
319178354Ssam	ic->ic_raw_xmit = rt2661_raw_xmit;
320156321Sdamien
321178354Ssam	ic->ic_vap_create = rt2661_vap_create;
322178354Ssam	ic->ic_vap_delete = rt2661_vap_delete;
323156321Sdamien
324192468Ssam	ieee80211_radiotap_attach(ic,
325192468Ssam	    &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
326192468Ssam		RT2661_TX_RADIOTAP_PRESENT,
327192468Ssam	    &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
328192468Ssam		RT2661_RX_RADIOTAP_PRESENT);
329178354Ssam
330178354Ssam#ifdef RAL_DEBUG
331156321Sdamien	SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
332178354Ssam	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
333178354Ssam	    "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
334178354Ssam#endif
335156321Sdamien	if (bootverbose)
336156321Sdamien		ieee80211_announce(ic);
337156321Sdamien
338156321Sdamien	return 0;
339156321Sdamien
340156321Sdamienfail3:	rt2661_free_tx_ring(sc, &sc->mgtq);
341156321Sdamienfail2:	while (--ac >= 0)
342156321Sdamien		rt2661_free_tx_ring(sc, &sc->txq[ac]);
343156321Sdamienfail1:	mtx_destroy(&sc->sc_mtx);
344178354Ssam	if_free(ifp);
345156321Sdamien	return error;
346156321Sdamien}
347156321Sdamien
348156321Sdamienint
349156321Sdamienrt2661_detach(void *xsc)
350156321Sdamien{
351156321Sdamien	struct rt2661_softc *sc = xsc;
352178354Ssam	struct ifnet *ifp = sc->sc_ifp;
353178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
354170530Ssam
355178038Ssam	RAL_LOCK(sc);
356178038Ssam	rt2661_stop_locked(sc);
357178038Ssam	RAL_UNLOCK(sc);
358156321Sdamien
359156321Sdamien	ieee80211_ifdetach(ic);
360156321Sdamien
361156321Sdamien	rt2661_free_tx_ring(sc, &sc->txq[0]);
362156321Sdamien	rt2661_free_tx_ring(sc, &sc->txq[1]);
363156321Sdamien	rt2661_free_tx_ring(sc, &sc->txq[2]);
364156321Sdamien	rt2661_free_tx_ring(sc, &sc->txq[3]);
365156321Sdamien	rt2661_free_tx_ring(sc, &sc->mgtq);
366156321Sdamien	rt2661_free_rx_ring(sc, &sc->rxq);
367156321Sdamien
368156321Sdamien	if_free(ifp);
369156321Sdamien
370156321Sdamien	mtx_destroy(&sc->sc_mtx);
371156321Sdamien
372156321Sdamien	return 0;
373156321Sdamien}
374156321Sdamien
375178354Ssamstatic struct ieee80211vap *
376178354Ssamrt2661_vap_create(struct ieee80211com *ic,
377178354Ssam	const char name[IFNAMSIZ], int unit, int opmode, int flags,
378178354Ssam	const uint8_t bssid[IEEE80211_ADDR_LEN],
379178354Ssam	const uint8_t mac[IEEE80211_ADDR_LEN])
380178354Ssam{
381178354Ssam	struct ifnet *ifp = ic->ic_ifp;
382178354Ssam	struct rt2661_vap *rvp;
383178354Ssam	struct ieee80211vap *vap;
384178354Ssam
385178354Ssam	switch (opmode) {
386178354Ssam	case IEEE80211_M_STA:
387178354Ssam	case IEEE80211_M_IBSS:
388178354Ssam	case IEEE80211_M_AHDEMO:
389178354Ssam	case IEEE80211_M_MONITOR:
390178354Ssam	case IEEE80211_M_HOSTAP:
391195618Srpaulo	case IEEE80211_M_MBSS:
392195618Srpaulo		/* XXXRP: TBD */
393178354Ssam		if (!TAILQ_EMPTY(&ic->ic_vaps)) {
394178354Ssam			if_printf(ifp, "only 1 vap supported\n");
395178354Ssam			return NULL;
396178354Ssam		}
397178354Ssam		if (opmode == IEEE80211_M_STA)
398178354Ssam			flags |= IEEE80211_CLONE_NOBEACONS;
399178354Ssam		break;
400178354Ssam	case IEEE80211_M_WDS:
401178354Ssam		if (TAILQ_EMPTY(&ic->ic_vaps) ||
402178354Ssam		    ic->ic_opmode != IEEE80211_M_HOSTAP) {
403178354Ssam			if_printf(ifp, "wds only supported in ap mode\n");
404178354Ssam			return NULL;
405178354Ssam		}
406178354Ssam		/*
407178354Ssam		 * Silently remove any request for a unique
408178354Ssam		 * bssid; WDS vap's always share the local
409178354Ssam		 * mac address.
410178354Ssam		 */
411178354Ssam		flags &= ~IEEE80211_CLONE_BSSID;
412178354Ssam		break;
413178354Ssam	default:
414178354Ssam		if_printf(ifp, "unknown opmode %d\n", opmode);
415178354Ssam		return NULL;
416178354Ssam	}
417178354Ssam	rvp = (struct rt2661_vap *) malloc(sizeof(struct rt2661_vap),
418178354Ssam	    M_80211_VAP, M_NOWAIT | M_ZERO);
419178354Ssam	if (rvp == NULL)
420178354Ssam		return NULL;
421178354Ssam	vap = &rvp->ral_vap;
422178354Ssam	ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
423178354Ssam
424178354Ssam	/* override state transition machine */
425178354Ssam	rvp->ral_newstate = vap->iv_newstate;
426178354Ssam	vap->iv_newstate = rt2661_newstate;
427178354Ssam#if 0
428178354Ssam	vap->iv_update_beacon = rt2661_beacon_update;
429178354Ssam#endif
430178354Ssam
431178354Ssam	ieee80211_amrr_init(&rvp->amrr, vap,
432178354Ssam	    IEEE80211_AMRR_MIN_SUCCESS_THRESHOLD,
433178354Ssam	    IEEE80211_AMRR_MAX_SUCCESS_THRESHOLD,
434178354Ssam	    500 /* ms */);
435178354Ssam
436178354Ssam	/* complete setup */
437178354Ssam	ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
438178354Ssam	if (TAILQ_FIRST(&ic->ic_vaps) == vap)
439178354Ssam		ic->ic_opmode = opmode;
440178354Ssam	return vap;
441178354Ssam}
442178354Ssam
443178354Ssamstatic void
444178354Ssamrt2661_vap_delete(struct ieee80211vap *vap)
445178354Ssam{
446178354Ssam	struct rt2661_vap *rvp = RT2661_VAP(vap);
447178354Ssam
448178354Ssam	ieee80211_amrr_cleanup(&rvp->amrr);
449178354Ssam	ieee80211_vap_detach(vap);
450178354Ssam	free(rvp, M_80211_VAP);
451178354Ssam}
452178354Ssam
453156321Sdamienvoid
454156321Sdamienrt2661_shutdown(void *xsc)
455156321Sdamien{
456156321Sdamien	struct rt2661_softc *sc = xsc;
457156321Sdamien
458156321Sdamien	rt2661_stop(sc);
459156321Sdamien}
460156321Sdamien
461156321Sdamienvoid
462156321Sdamienrt2661_suspend(void *xsc)
463156321Sdamien{
464156321Sdamien	struct rt2661_softc *sc = xsc;
465156321Sdamien
466156321Sdamien	rt2661_stop(sc);
467156321Sdamien}
468156321Sdamien
469156321Sdamienvoid
470156321Sdamienrt2661_resume(void *xsc)
471156321Sdamien{
472156321Sdamien	struct rt2661_softc *sc = xsc;
473178354Ssam	struct ifnet *ifp = sc->sc_ifp;
474156321Sdamien
475178354Ssam	if (ifp->if_flags & IFF_UP)
476178354Ssam		rt2661_init(sc);
477156321Sdamien}
478156321Sdamien
479156321Sdamienstatic void
480156321Sdamienrt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
481156321Sdamien{
482156321Sdamien	if (error != 0)
483156321Sdamien		return;
484156321Sdamien
485156321Sdamien	KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
486156321Sdamien
487156321Sdamien	*(bus_addr_t *)arg = segs[0].ds_addr;
488156321Sdamien}
489156321Sdamien
490156321Sdamienstatic int
491156321Sdamienrt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
492156321Sdamien    int count)
493156321Sdamien{
494156321Sdamien	int i, error;
495156321Sdamien
496156321Sdamien	ring->count = count;
497156321Sdamien	ring->queued = 0;
498156321Sdamien	ring->cur = ring->next = ring->stat = 0;
499156321Sdamien
500171535Skevlo	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
501171535Skevlo	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
502171535Skevlo	    count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE,
503171535Skevlo	    0, NULL, NULL, &ring->desc_dmat);
504156321Sdamien	if (error != 0) {
505156321Sdamien		device_printf(sc->sc_dev, "could not create desc DMA tag\n");
506156321Sdamien		goto fail;
507156321Sdamien	}
508156321Sdamien
509156321Sdamien	error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
510156321Sdamien	    BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
511156321Sdamien	if (error != 0) {
512156321Sdamien		device_printf(sc->sc_dev, "could not allocate DMA memory\n");
513156321Sdamien		goto fail;
514156321Sdamien	}
515156321Sdamien
516156321Sdamien	error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
517156321Sdamien	    count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
518156321Sdamien	    0);
519156321Sdamien	if (error != 0) {
520156321Sdamien		device_printf(sc->sc_dev, "could not load desc DMA map\n");
521156321Sdamien		goto fail;
522156321Sdamien	}
523156321Sdamien
524156321Sdamien	ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
525156321Sdamien	    M_NOWAIT | M_ZERO);
526156321Sdamien	if (ring->data == NULL) {
527156321Sdamien		device_printf(sc->sc_dev, "could not allocate soft data\n");
528156321Sdamien		error = ENOMEM;
529156321Sdamien		goto fail;
530156321Sdamien	}
531156321Sdamien
532171535Skevlo	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
533171535Skevlo	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
534171535Skevlo	    RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
535156321Sdamien	if (error != 0) {
536156321Sdamien		device_printf(sc->sc_dev, "could not create data DMA tag\n");
537156321Sdamien		goto fail;
538156321Sdamien	}
539156321Sdamien
540156321Sdamien	for (i = 0; i < count; i++) {
541156321Sdamien		error = bus_dmamap_create(ring->data_dmat, 0,
542156321Sdamien		    &ring->data[i].map);
543156321Sdamien		if (error != 0) {
544156321Sdamien			device_printf(sc->sc_dev, "could not create DMA map\n");
545156321Sdamien			goto fail;
546156321Sdamien		}
547156321Sdamien	}
548156321Sdamien
549156321Sdamien	return 0;
550156321Sdamien
551156321Sdamienfail:	rt2661_free_tx_ring(sc, ring);
552156321Sdamien	return error;
553156321Sdamien}
554156321Sdamien
555156321Sdamienstatic void
556156321Sdamienrt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
557156321Sdamien{
558156321Sdamien	struct rt2661_tx_desc *desc;
559156321Sdamien	struct rt2661_tx_data *data;
560156321Sdamien	int i;
561156321Sdamien
562156321Sdamien	for (i = 0; i < ring->count; i++) {
563156321Sdamien		desc = &ring->desc[i];
564156321Sdamien		data = &ring->data[i];
565156321Sdamien
566156321Sdamien		if (data->m != NULL) {
567156321Sdamien			bus_dmamap_sync(ring->data_dmat, data->map,
568156321Sdamien			    BUS_DMASYNC_POSTWRITE);
569156321Sdamien			bus_dmamap_unload(ring->data_dmat, data->map);
570156321Sdamien			m_freem(data->m);
571156321Sdamien			data->m = NULL;
572156321Sdamien		}
573156321Sdamien
574156321Sdamien		if (data->ni != NULL) {
575156321Sdamien			ieee80211_free_node(data->ni);
576156321Sdamien			data->ni = NULL;
577156321Sdamien		}
578156321Sdamien
579156321Sdamien		desc->flags = 0;
580156321Sdamien	}
581156321Sdamien
582156321Sdamien	bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
583156321Sdamien
584156321Sdamien	ring->queued = 0;
585156321Sdamien	ring->cur = ring->next = ring->stat = 0;
586156321Sdamien}
587156321Sdamien
588156321Sdamienstatic void
589156321Sdamienrt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
590156321Sdamien{
591156321Sdamien	struct rt2661_tx_data *data;
592156321Sdamien	int i;
593156321Sdamien
594156321Sdamien	if (ring->desc != NULL) {
595156321Sdamien		bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
596156321Sdamien		    BUS_DMASYNC_POSTWRITE);
597156321Sdamien		bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
598156321Sdamien		bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
599156321Sdamien	}
600156321Sdamien
601156321Sdamien	if (ring->desc_dmat != NULL)
602156321Sdamien		bus_dma_tag_destroy(ring->desc_dmat);
603156321Sdamien
604156321Sdamien	if (ring->data != NULL) {
605156321Sdamien		for (i = 0; i < ring->count; i++) {
606156321Sdamien			data = &ring->data[i];
607156321Sdamien
608156321Sdamien			if (data->m != NULL) {
609156321Sdamien				bus_dmamap_sync(ring->data_dmat, data->map,
610156321Sdamien				    BUS_DMASYNC_POSTWRITE);
611156321Sdamien				bus_dmamap_unload(ring->data_dmat, data->map);
612156321Sdamien				m_freem(data->m);
613156321Sdamien			}
614156321Sdamien
615156321Sdamien			if (data->ni != NULL)
616156321Sdamien				ieee80211_free_node(data->ni);
617156321Sdamien
618156321Sdamien			if (data->map != NULL)
619156321Sdamien				bus_dmamap_destroy(ring->data_dmat, data->map);
620156321Sdamien		}
621156321Sdamien
622156321Sdamien		free(ring->data, M_DEVBUF);
623156321Sdamien	}
624156321Sdamien
625156321Sdamien	if (ring->data_dmat != NULL)
626156321Sdamien		bus_dma_tag_destroy(ring->data_dmat);
627156321Sdamien}
628156321Sdamien
629156321Sdamienstatic int
630156321Sdamienrt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
631156321Sdamien    int count)
632156321Sdamien{
633156321Sdamien	struct rt2661_rx_desc *desc;
634156321Sdamien	struct rt2661_rx_data *data;
635156321Sdamien	bus_addr_t physaddr;
636156321Sdamien	int i, error;
637156321Sdamien
638156321Sdamien	ring->count = count;
639156321Sdamien	ring->cur = ring->next = 0;
640156321Sdamien
641171535Skevlo	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
642171535Skevlo	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
643171535Skevlo	    count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE,
644171535Skevlo	    0, NULL, NULL, &ring->desc_dmat);
645156321Sdamien	if (error != 0) {
646156321Sdamien		device_printf(sc->sc_dev, "could not create desc DMA tag\n");
647156321Sdamien		goto fail;
648156321Sdamien	}
649156321Sdamien
650156321Sdamien	error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
651156321Sdamien	    BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
652156321Sdamien	if (error != 0) {
653156321Sdamien		device_printf(sc->sc_dev, "could not allocate DMA memory\n");
654156321Sdamien		goto fail;
655156321Sdamien	}
656156321Sdamien
657156321Sdamien	error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
658156321Sdamien	    count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
659156321Sdamien	    0);
660156321Sdamien	if (error != 0) {
661156321Sdamien		device_printf(sc->sc_dev, "could not load desc DMA map\n");
662156321Sdamien		goto fail;
663156321Sdamien	}
664156321Sdamien
665156321Sdamien	ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
666156321Sdamien	    M_NOWAIT | M_ZERO);
667156321Sdamien	if (ring->data == NULL) {
668156321Sdamien		device_printf(sc->sc_dev, "could not allocate soft data\n");
669156321Sdamien		error = ENOMEM;
670156321Sdamien		goto fail;
671156321Sdamien	}
672156321Sdamien
673156321Sdamien	/*
674156321Sdamien	 * Pre-allocate Rx buffers and populate Rx ring.
675156321Sdamien	 */
676171535Skevlo	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
677171535Skevlo	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
678171535Skevlo	    1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
679156321Sdamien	if (error != 0) {
680156321Sdamien		device_printf(sc->sc_dev, "could not create data DMA tag\n");
681156321Sdamien		goto fail;
682156321Sdamien	}
683156321Sdamien
684156321Sdamien	for (i = 0; i < count; i++) {
685156321Sdamien		desc = &sc->rxq.desc[i];
686156321Sdamien		data = &sc->rxq.data[i];
687156321Sdamien
688156321Sdamien		error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
689156321Sdamien		if (error != 0) {
690156321Sdamien			device_printf(sc->sc_dev, "could not create DMA map\n");
691156321Sdamien			goto fail;
692156321Sdamien		}
693156321Sdamien
694156321Sdamien		data->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
695156321Sdamien		if (data->m == NULL) {
696156321Sdamien			device_printf(sc->sc_dev,
697156321Sdamien			    "could not allocate rx mbuf\n");
698156321Sdamien			error = ENOMEM;
699156321Sdamien			goto fail;
700156321Sdamien		}
701156321Sdamien
702156321Sdamien		error = bus_dmamap_load(ring->data_dmat, data->map,
703156321Sdamien		    mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
704156321Sdamien		    &physaddr, 0);
705156321Sdamien		if (error != 0) {
706156321Sdamien			device_printf(sc->sc_dev,
707156321Sdamien			    "could not load rx buf DMA map");
708156321Sdamien			goto fail;
709156321Sdamien		}
710156321Sdamien
711156321Sdamien		desc->flags = htole32(RT2661_RX_BUSY);
712156321Sdamien		desc->physaddr = htole32(physaddr);
713156321Sdamien	}
714156321Sdamien
715156321Sdamien	bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
716156321Sdamien
717156321Sdamien	return 0;
718156321Sdamien
719156321Sdamienfail:	rt2661_free_rx_ring(sc, ring);
720156321Sdamien	return error;
721156321Sdamien}
722156321Sdamien
723156321Sdamienstatic void
724156321Sdamienrt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
725156321Sdamien{
726156321Sdamien	int i;
727156321Sdamien
728156321Sdamien	for (i = 0; i < ring->count; i++)
729156321Sdamien		ring->desc[i].flags = htole32(RT2661_RX_BUSY);
730156321Sdamien
731156321Sdamien	bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
732156321Sdamien
733156321Sdamien	ring->cur = ring->next = 0;
734156321Sdamien}
735156321Sdamien
736156321Sdamienstatic void
737156321Sdamienrt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
738156321Sdamien{
739156321Sdamien	struct rt2661_rx_data *data;
740156321Sdamien	int i;
741156321Sdamien
742156321Sdamien	if (ring->desc != NULL) {
743156321Sdamien		bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
744156321Sdamien		    BUS_DMASYNC_POSTWRITE);
745156321Sdamien		bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
746156321Sdamien		bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
747156321Sdamien	}
748156321Sdamien
749156321Sdamien	if (ring->desc_dmat != NULL)
750156321Sdamien		bus_dma_tag_destroy(ring->desc_dmat);
751156321Sdamien
752156321Sdamien	if (ring->data != NULL) {
753156321Sdamien		for (i = 0; i < ring->count; i++) {
754156321Sdamien			data = &ring->data[i];
755156321Sdamien
756156321Sdamien			if (data->m != NULL) {
757156321Sdamien				bus_dmamap_sync(ring->data_dmat, data->map,
758156321Sdamien				    BUS_DMASYNC_POSTREAD);
759156321Sdamien				bus_dmamap_unload(ring->data_dmat, data->map);
760156321Sdamien				m_freem(data->m);
761156321Sdamien			}
762156321Sdamien
763156321Sdamien			if (data->map != NULL)
764156321Sdamien				bus_dmamap_destroy(ring->data_dmat, data->map);
765156321Sdamien		}
766156321Sdamien
767156321Sdamien		free(ring->data, M_DEVBUF);
768156321Sdamien	}
769156321Sdamien
770156321Sdamien	if (ring->data_dmat != NULL)
771156321Sdamien		bus_dma_tag_destroy(ring->data_dmat);
772156321Sdamien}
773156321Sdamien
774156321Sdamienstatic struct ieee80211_node *
775179643Ssamrt2661_node_alloc(struct ieee80211vap *vap,
776179643Ssam	const uint8_t mac[IEEE80211_ADDR_LEN])
777156321Sdamien{
778156321Sdamien	struct rt2661_node *rn;
779156321Sdamien
780156321Sdamien	rn = malloc(sizeof (struct rt2661_node), M_80211_NODE,
781156321Sdamien	    M_NOWAIT | M_ZERO);
782156321Sdamien
783156321Sdamien	return (rn != NULL) ? &rn->ni : NULL;
784156321Sdamien}
785156321Sdamien
786156321Sdamienstatic void
787178354Ssamrt2661_newassoc(struct ieee80211_node *ni, int isnew)
788156321Sdamien{
789178354Ssam	struct ieee80211vap *vap = ni->ni_vap;
790156321Sdamien
791178354Ssam	ieee80211_amrr_node_init(&RT2661_VAP(vap)->amrr,
792178354Ssam	    &RT2661_NODE(ni)->amrr, ni);
793156321Sdamien}
794156321Sdamien
795156321Sdamienstatic int
796178354Ssamrt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
797156321Sdamien{
798178354Ssam	struct rt2661_vap *rvp = RT2661_VAP(vap);
799178354Ssam	struct ieee80211com *ic = vap->iv_ic;
800156321Sdamien	struct rt2661_softc *sc = ic->ic_ifp->if_softc;
801178354Ssam	int error;
802156321Sdamien
803178354Ssam	if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
804178354Ssam		uint32_t tmp;
805156321Sdamien
806178354Ssam		/* abort TSF synchronization */
807178354Ssam		tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
808178354Ssam		RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
809178354Ssam	}
810156321Sdamien
811178354Ssam	error = rvp->ral_newstate(vap, nstate, arg);
812156321Sdamien
813178354Ssam	if (error == 0 && nstate == IEEE80211_S_RUN) {
814178354Ssam		struct ieee80211_node *ni = vap->iv_bss;
815178354Ssam
816178354Ssam		if (vap->iv_opmode != IEEE80211_M_MONITOR) {
817156321Sdamien			rt2661_enable_mrr(sc);
818156321Sdamien			rt2661_set_txpreamble(sc);
819156321Sdamien			rt2661_set_basicrates(sc, &ni->ni_rates);
820156321Sdamien			rt2661_set_bssid(sc, ni->ni_bssid);
821156321Sdamien		}
822156321Sdamien
823178354Ssam		if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
824195618Srpaulo		    vap->iv_opmode == IEEE80211_M_IBSS ||
825195618Srpaulo		    vap->iv_opmode == IEEE80211_M_MBSS) {
826178354Ssam			error = rt2661_prepare_beacon(sc, vap);
827178354Ssam			if (error != 0)
828178354Ssam				return error;
829156321Sdamien		}
830184345Ssam		if (vap->iv_opmode != IEEE80211_M_MONITOR)
831156321Sdamien			rt2661_enable_tsf_sync(sc);
832192468Ssam		else
833192468Ssam			rt2661_enable_tsf(sc);
834178354Ssam	}
835178354Ssam	return error;
836156321Sdamien}
837156321Sdamien
838156321Sdamien/*
839156321Sdamien * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
840156321Sdamien * 93C66).
841156321Sdamien */
842156321Sdamienstatic uint16_t
843156321Sdamienrt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
844156321Sdamien{
845156321Sdamien	uint32_t tmp;
846156321Sdamien	uint16_t val;
847156321Sdamien	int n;
848156321Sdamien
849156321Sdamien	/* clock C once before the first command */
850156321Sdamien	RT2661_EEPROM_CTL(sc, 0);
851156321Sdamien
852156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S);
853156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
854156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S);
855156321Sdamien
856156321Sdamien	/* write start bit (1) */
857156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
858156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
859156321Sdamien
860156321Sdamien	/* write READ opcode (10) */
861156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
862156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
863156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S);
864156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
865156321Sdamien
866156321Sdamien	/* write address (A5-A0 or A7-A0) */
867156321Sdamien	n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
868156321Sdamien	for (; n >= 0; n--) {
869156321Sdamien		RT2661_EEPROM_CTL(sc, RT2661_S |
870156321Sdamien		    (((addr >> n) & 1) << RT2661_SHIFT_D));
871156321Sdamien		RT2661_EEPROM_CTL(sc, RT2661_S |
872156321Sdamien		    (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
873156321Sdamien	}
874156321Sdamien
875156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S);
876156321Sdamien
877156321Sdamien	/* read data Q15-Q0 */
878156321Sdamien	val = 0;
879156321Sdamien	for (n = 15; n >= 0; n--) {
880156321Sdamien		RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
881156321Sdamien		tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
882156321Sdamien		val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
883156321Sdamien		RT2661_EEPROM_CTL(sc, RT2661_S);
884156321Sdamien	}
885156321Sdamien
886156321Sdamien	RT2661_EEPROM_CTL(sc, 0);
887156321Sdamien
888156321Sdamien	/* clear Chip Select and clock C */
889156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_S);
890156321Sdamien	RT2661_EEPROM_CTL(sc, 0);
891156321Sdamien	RT2661_EEPROM_CTL(sc, RT2661_C);
892156321Sdamien
893156321Sdamien	return val;
894156321Sdamien}
895156321Sdamien
896156321Sdamienstatic void
897156321Sdamienrt2661_tx_intr(struct rt2661_softc *sc)
898156321Sdamien{
899178354Ssam	struct ifnet *ifp = sc->sc_ifp;
900156321Sdamien	struct rt2661_tx_ring *txq;
901156321Sdamien	struct rt2661_tx_data *data;
902156321Sdamien	struct rt2661_node *rn;
903156321Sdamien	uint32_t val;
904156321Sdamien	int qid, retrycnt;
905156321Sdamien
906156321Sdamien	for (;;) {
907170530Ssam		struct ieee80211_node *ni;
908170530Ssam		struct mbuf *m;
909170530Ssam
910156321Sdamien		val = RAL_READ(sc, RT2661_STA_CSR4);
911156321Sdamien		if (!(val & RT2661_TX_STAT_VALID))
912156321Sdamien			break;
913156321Sdamien
914156321Sdamien		/* retrieve the queue in which this frame was sent */
915156321Sdamien		qid = RT2661_TX_QID(val);
916156321Sdamien		txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
917156321Sdamien
918156321Sdamien		/* retrieve rate control algorithm context */
919156321Sdamien		data = &txq->data[txq->stat];
920170530Ssam		m = data->m;
921170530Ssam		data->m = NULL;
922170530Ssam		ni = data->ni;
923170530Ssam		data->ni = NULL;
924156321Sdamien
925159301Sfjoe		/* if no frame has been sent, ignore */
926170530Ssam		if (ni == NULL)
927159301Sfjoe			continue;
928159301Sfjoe
929178354Ssam		rn = RT2661_NODE(ni);
930170530Ssam
931156321Sdamien		switch (RT2661_TX_RESULT(val)) {
932156321Sdamien		case RT2661_TX_SUCCESS:
933156321Sdamien			retrycnt = RT2661_TX_RETRYCNT(val);
934156321Sdamien
935178354Ssam			DPRINTFN(sc, 10, "data frame sent successfully after "
936178354Ssam			    "%d retries\n", retrycnt);
937178354Ssam			if (data->rix != IEEE80211_FIXED_RATE_NONE)
938178354Ssam				ieee80211_amrr_tx_complete(&rn->amrr,
939178354Ssam				    IEEE80211_AMRR_SUCCESS, retrycnt);
940156321Sdamien			ifp->if_opackets++;
941156321Sdamien			break;
942156321Sdamien
943156321Sdamien		case RT2661_TX_RETRY_FAIL:
944178354Ssam			retrycnt = RT2661_TX_RETRYCNT(val);
945178354Ssam
946178354Ssam			DPRINTFN(sc, 9, "%s\n",
947178354Ssam			    "sending data frame failed (too much retries)");
948178354Ssam			if (data->rix != IEEE80211_FIXED_RATE_NONE)
949178354Ssam				ieee80211_amrr_tx_complete(&rn->amrr,
950178354Ssam				    IEEE80211_AMRR_FAILURE, retrycnt);
951156321Sdamien			ifp->if_oerrors++;
952156321Sdamien			break;
953156321Sdamien
954156321Sdamien		default:
955156321Sdamien			/* other failure */
956156321Sdamien			device_printf(sc->sc_dev,
957156321Sdamien			    "sending data frame failed 0x%08x\n", val);
958156321Sdamien			ifp->if_oerrors++;
959156321Sdamien		}
960156321Sdamien
961178354Ssam		DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat);
962156321Sdamien
963156321Sdamien		txq->queued--;
964156321Sdamien		if (++txq->stat >= txq->count)	/* faster than % count */
965156321Sdamien			txq->stat = 0;
966170530Ssam
967170530Ssam		if (m->m_flags & M_TXCB)
968170530Ssam			ieee80211_process_callback(ni, m,
969170530Ssam				RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS);
970170530Ssam		m_freem(m);
971170530Ssam		ieee80211_free_node(ni);
972156321Sdamien	}
973156321Sdamien
974156321Sdamien	sc->sc_tx_timer = 0;
975156321Sdamien	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
976178354Ssam
977178354Ssam	rt2661_start_locked(ifp);
978156321Sdamien}
979156321Sdamien
980156321Sdamienstatic void
981156321Sdamienrt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
982156321Sdamien{
983156321Sdamien	struct rt2661_tx_desc *desc;
984156321Sdamien	struct rt2661_tx_data *data;
985156321Sdamien
986156321Sdamien	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
987156321Sdamien
988156321Sdamien	for (;;) {
989156321Sdamien		desc = &txq->desc[txq->next];
990156321Sdamien		data = &txq->data[txq->next];
991156321Sdamien
992156321Sdamien		if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
993156321Sdamien		    !(le32toh(desc->flags) & RT2661_TX_VALID))
994156321Sdamien			break;
995156321Sdamien
996156321Sdamien		bus_dmamap_sync(txq->data_dmat, data->map,
997156321Sdamien		    BUS_DMASYNC_POSTWRITE);
998156321Sdamien		bus_dmamap_unload(txq->data_dmat, data->map);
999156321Sdamien
1000156321Sdamien		/* descriptor is no longer valid */
1001156321Sdamien		desc->flags &= ~htole32(RT2661_TX_VALID);
1002156321Sdamien
1003178354Ssam		DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next);
1004156321Sdamien
1005156321Sdamien		if (++txq->next >= txq->count)	/* faster than % count */
1006156321Sdamien			txq->next = 0;
1007156321Sdamien	}
1008156321Sdamien
1009156321Sdamien	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1010156321Sdamien}
1011156321Sdamien
1012156321Sdamienstatic void
1013156321Sdamienrt2661_rx_intr(struct rt2661_softc *sc)
1014156321Sdamien{
1015178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1016178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1017156321Sdamien	struct rt2661_rx_desc *desc;
1018156321Sdamien	struct rt2661_rx_data *data;
1019156321Sdamien	bus_addr_t physaddr;
1020156321Sdamien	struct ieee80211_frame *wh;
1021156321Sdamien	struct ieee80211_node *ni;
1022156321Sdamien	struct mbuf *mnew, *m;
1023156321Sdamien	int error;
1024156321Sdamien
1025156321Sdamien	bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1026156321Sdamien	    BUS_DMASYNC_POSTREAD);
1027156321Sdamien
1028156321Sdamien	for (;;) {
1029192468Ssam		int8_t rssi, nf;
1030170530Ssam
1031156321Sdamien		desc = &sc->rxq.desc[sc->rxq.cur];
1032156321Sdamien		data = &sc->rxq.data[sc->rxq.cur];
1033156321Sdamien
1034156321Sdamien		if (le32toh(desc->flags) & RT2661_RX_BUSY)
1035156321Sdamien			break;
1036156321Sdamien
1037156321Sdamien		if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1038156321Sdamien		    (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
1039156321Sdamien			/*
1040156321Sdamien			 * This should not happen since we did not request
1041156321Sdamien			 * to receive those frames when we filled TXRX_CSR0.
1042156321Sdamien			 */
1043178354Ssam			DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
1044178354Ssam			    le32toh(desc->flags));
1045156321Sdamien			ifp->if_ierrors++;
1046156321Sdamien			goto skip;
1047156321Sdamien		}
1048156321Sdamien
1049156321Sdamien		if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
1050156321Sdamien			ifp->if_ierrors++;
1051156321Sdamien			goto skip;
1052156321Sdamien		}
1053156321Sdamien
1054156321Sdamien		/*
1055156321Sdamien		 * Try to allocate a new mbuf for this ring element and load it
1056156321Sdamien		 * before processing the current mbuf. If the ring element
1057156321Sdamien		 * cannot be loaded, drop the received packet and reuse the old
1058156321Sdamien		 * mbuf. In the unlikely case that the old mbuf can't be
1059156321Sdamien		 * reloaded either, explicitly panic.
1060156321Sdamien		 */
1061156321Sdamien		mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1062156321Sdamien		if (mnew == NULL) {
1063156321Sdamien			ifp->if_ierrors++;
1064156321Sdamien			goto skip;
1065156321Sdamien		}
1066156321Sdamien
1067156321Sdamien		bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1068156321Sdamien		    BUS_DMASYNC_POSTREAD);
1069156321Sdamien		bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1070156321Sdamien
1071156321Sdamien		error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1072156321Sdamien		    mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1073156321Sdamien		    &physaddr, 0);
1074156321Sdamien		if (error != 0) {
1075156321Sdamien			m_freem(mnew);
1076156321Sdamien
1077156321Sdamien			/* try to reload the old mbuf */
1078156321Sdamien			error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1079156321Sdamien			    mtod(data->m, void *), MCLBYTES,
1080156321Sdamien			    rt2661_dma_map_addr, &physaddr, 0);
1081156321Sdamien			if (error != 0) {
1082156321Sdamien				/* very unlikely that it will fail... */
1083156321Sdamien				panic("%s: could not load old rx mbuf",
1084156321Sdamien				    device_get_name(sc->sc_dev));
1085156321Sdamien			}
1086156321Sdamien			ifp->if_ierrors++;
1087156321Sdamien			goto skip;
1088156321Sdamien		}
1089156321Sdamien
1090156321Sdamien		/*
1091156321Sdamien	 	 * New mbuf successfully loaded, update Rx ring and continue
1092156321Sdamien		 * processing.
1093156321Sdamien		 */
1094156321Sdamien		m = data->m;
1095156321Sdamien		data->m = mnew;
1096156321Sdamien		desc->physaddr = htole32(physaddr);
1097156321Sdamien
1098156321Sdamien		/* finalize mbuf */
1099156321Sdamien		m->m_pkthdr.rcvif = ifp;
1100156321Sdamien		m->m_pkthdr.len = m->m_len =
1101156321Sdamien		    (le32toh(desc->flags) >> 16) & 0xfff;
1102156321Sdamien
1103170530Ssam		rssi = rt2661_get_rssi(sc, desc->rssi);
1104192468Ssam		/* Error happened during RSSI conversion. */
1105192468Ssam		if (rssi < 0)
1106192468Ssam			rssi = -30;	/* XXX ignored by net80211 */
1107192468Ssam		nf = RT2661_NOISE_FLOOR;
1108170530Ssam
1109192468Ssam		if (ieee80211_radiotap_active(ic)) {
1110156321Sdamien			struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1111156321Sdamien			uint32_t tsf_lo, tsf_hi;
1112156321Sdamien
1113156321Sdamien			/* get timestamp (low and high 32 bits) */
1114156321Sdamien			tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1115156321Sdamien			tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1116156321Sdamien
1117156321Sdamien			tap->wr_tsf =
1118156321Sdamien			    htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1119156321Sdamien			tap->wr_flags = 0;
1120178354Ssam			tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1121178958Ssam			    (desc->flags & htole32(RT2661_RX_OFDM)) ?
1122178958Ssam				IEEE80211_T_OFDM : IEEE80211_T_CCK);
1123192468Ssam			tap->wr_antsignal = nf + rssi;
1124192468Ssam			tap->wr_antnoise = nf;
1125156321Sdamien		}
1126170530Ssam		sc->sc_flags |= RAL_INPUT_RUNNING;
1127170530Ssam		RAL_UNLOCK(sc);
1128156321Sdamien		wh = mtod(m, struct ieee80211_frame *);
1129178354Ssam
1130178354Ssam		/* send the frame to the 802.11 layer */
1131156321Sdamien		ni = ieee80211_find_rxnode(ic,
1132156321Sdamien		    (struct ieee80211_frame_min *)wh);
1133178354Ssam		if (ni != NULL) {
1134192468Ssam			(void) ieee80211_input(ni, m, rssi, nf);
1135178354Ssam			ieee80211_free_node(ni);
1136178354Ssam		} else
1137192468Ssam			(void) ieee80211_input_all(ic, m, rssi, nf);
1138170530Ssam
1139170530Ssam		RAL_LOCK(sc);
1140170530Ssam		sc->sc_flags &= ~RAL_INPUT_RUNNING;
1141156321Sdamien
1142156321Sdamienskip:		desc->flags |= htole32(RT2661_RX_BUSY);
1143156321Sdamien
1144178354Ssam		DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur);
1145156321Sdamien
1146156321Sdamien		sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1147156321Sdamien	}
1148156321Sdamien
1149156321Sdamien	bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1150156321Sdamien	    BUS_DMASYNC_PREWRITE);
1151156321Sdamien}
1152156321Sdamien
1153156321Sdamien/* ARGSUSED */
1154156321Sdamienstatic void
1155156321Sdamienrt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1156156321Sdamien{
1157156321Sdamien	/* do nothing */
1158156321Sdamien}
1159156321Sdamien
1160156321Sdamienstatic void
1161156321Sdamienrt2661_mcu_wakeup(struct rt2661_softc *sc)
1162156321Sdamien{
1163156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1164156321Sdamien
1165156321Sdamien	RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1166156321Sdamien	RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1167156321Sdamien	RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1168156321Sdamien
1169156321Sdamien	/* send wakeup command to MCU */
1170156321Sdamien	rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1171156321Sdamien}
1172156321Sdamien
1173156321Sdamienstatic void
1174156321Sdamienrt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1175156321Sdamien{
1176156321Sdamien	RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1177156321Sdamien	RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1178156321Sdamien}
1179156321Sdamien
1180156321Sdamienvoid
1181156321Sdamienrt2661_intr(void *arg)
1182156321Sdamien{
1183156321Sdamien	struct rt2661_softc *sc = arg;
1184156975Sdamien	struct ifnet *ifp = sc->sc_ifp;
1185156321Sdamien	uint32_t r1, r2;
1186156321Sdamien
1187156321Sdamien	RAL_LOCK(sc);
1188156321Sdamien
1189156321Sdamien	/* disable MAC and MCU interrupts */
1190156321Sdamien	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1191156321Sdamien	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1192156321Sdamien
1193156975Sdamien	/* don't re-enable interrupts if we're shutting down */
1194156975Sdamien	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1195156975Sdamien		RAL_UNLOCK(sc);
1196156975Sdamien		return;
1197156975Sdamien	}
1198156975Sdamien
1199156321Sdamien	r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1200156321Sdamien	RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1201156321Sdamien
1202156321Sdamien	r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1203156321Sdamien	RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1204156321Sdamien
1205156321Sdamien	if (r1 & RT2661_MGT_DONE)
1206156321Sdamien		rt2661_tx_dma_intr(sc, &sc->mgtq);
1207156321Sdamien
1208156321Sdamien	if (r1 & RT2661_RX_DONE)
1209156321Sdamien		rt2661_rx_intr(sc);
1210156321Sdamien
1211156321Sdamien	if (r1 & RT2661_TX0_DMA_DONE)
1212156321Sdamien		rt2661_tx_dma_intr(sc, &sc->txq[0]);
1213156321Sdamien
1214156321Sdamien	if (r1 & RT2661_TX1_DMA_DONE)
1215156321Sdamien		rt2661_tx_dma_intr(sc, &sc->txq[1]);
1216156321Sdamien
1217156321Sdamien	if (r1 & RT2661_TX2_DMA_DONE)
1218156321Sdamien		rt2661_tx_dma_intr(sc, &sc->txq[2]);
1219156321Sdamien
1220156321Sdamien	if (r1 & RT2661_TX3_DMA_DONE)
1221156321Sdamien		rt2661_tx_dma_intr(sc, &sc->txq[3]);
1222156321Sdamien
1223156321Sdamien	if (r1 & RT2661_TX_DONE)
1224156321Sdamien		rt2661_tx_intr(sc);
1225156321Sdamien
1226156321Sdamien	if (r2 & RT2661_MCU_CMD_DONE)
1227156321Sdamien		rt2661_mcu_cmd_intr(sc);
1228156321Sdamien
1229156321Sdamien	if (r2 & RT2661_MCU_BEACON_EXPIRE)
1230156321Sdamien		rt2661_mcu_beacon_expire(sc);
1231156321Sdamien
1232156321Sdamien	if (r2 & RT2661_MCU_WAKEUP)
1233156321Sdamien		rt2661_mcu_wakeup(sc);
1234156321Sdamien
1235156321Sdamien	/* re-enable MAC and MCU interrupts */
1236156321Sdamien	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1237156321Sdamien	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1238156321Sdamien
1239156321Sdamien	RAL_UNLOCK(sc);
1240156321Sdamien}
1241156321Sdamien
1242178958Ssamstatic uint8_t
1243178958Ssamrt2661_plcp_signal(int rate)
1244178958Ssam{
1245178958Ssam	switch (rate) {
1246178958Ssam	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1247178958Ssam	case 12:	return 0xb;
1248178958Ssam	case 18:	return 0xf;
1249178958Ssam	case 24:	return 0xa;
1250178958Ssam	case 36:	return 0xe;
1251178958Ssam	case 48:	return 0x9;
1252178958Ssam	case 72:	return 0xd;
1253178958Ssam	case 96:	return 0x8;
1254178958Ssam	case 108:	return 0xc;
1255178958Ssam
1256178958Ssam	/* CCK rates (NB: not IEEE std, device-specific) */
1257178958Ssam	case 2:		return 0x0;
1258178958Ssam	case 4:		return 0x1;
1259178958Ssam	case 11:	return 0x2;
1260178958Ssam	case 22:	return 0x3;
1261178958Ssam	}
1262178958Ssam	return 0xff;		/* XXX unsupported/unknown rate */
1263178958Ssam}
1264178958Ssam
1265156321Sdamienstatic void
1266156321Sdamienrt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1267156321Sdamien    uint32_t flags, uint16_t xflags, int len, int rate,
1268156321Sdamien    const bus_dma_segment_t *segs, int nsegs, int ac)
1269156321Sdamien{
1270178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1271178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1272156321Sdamien	uint16_t plcp_length;
1273156321Sdamien	int i, remainder;
1274156321Sdamien
1275156321Sdamien	desc->flags = htole32(flags);
1276156321Sdamien	desc->flags |= htole32(len << 16);
1277156321Sdamien	desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
1278156321Sdamien
1279156321Sdamien	desc->xflags = htole16(xflags);
1280156321Sdamien	desc->xflags |= htole16(nsegs << 13);
1281156321Sdamien
1282156321Sdamien	desc->wme = htole16(
1283156321Sdamien	    RT2661_QID(ac) |
1284156321Sdamien	    RT2661_AIFSN(2) |
1285156321Sdamien	    RT2661_LOGCWMIN(4) |
1286156321Sdamien	    RT2661_LOGCWMAX(10));
1287156321Sdamien
1288156321Sdamien	/*
1289156321Sdamien	 * Remember in which queue this frame was sent. This field is driver
1290156321Sdamien	 * private data only. It will be made available by the NIC in STA_CSR4
1291156321Sdamien	 * on Tx interrupts.
1292156321Sdamien	 */
1293156321Sdamien	desc->qid = ac;
1294156321Sdamien
1295156321Sdamien	/* setup PLCP fields */
1296178958Ssam	desc->plcp_signal  = rt2661_plcp_signal(rate);
1297156321Sdamien	desc->plcp_service = 4;
1298156321Sdamien
1299156321Sdamien	len += IEEE80211_CRC_LEN;
1300190532Ssam	if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1301156321Sdamien		desc->flags |= htole32(RT2661_TX_OFDM);
1302156321Sdamien
1303156321Sdamien		plcp_length = len & 0xfff;
1304156321Sdamien		desc->plcp_length_hi = plcp_length >> 6;
1305156321Sdamien		desc->plcp_length_lo = plcp_length & 0x3f;
1306156321Sdamien	} else {
1307156321Sdamien		plcp_length = (16 * len + rate - 1) / rate;
1308156321Sdamien		if (rate == 22) {
1309156321Sdamien			remainder = (16 * len) % 22;
1310156321Sdamien			if (remainder != 0 && remainder < 7)
1311156321Sdamien				desc->plcp_service |= RT2661_PLCP_LENGEXT;
1312156321Sdamien		}
1313156321Sdamien		desc->plcp_length_hi = plcp_length >> 8;
1314156321Sdamien		desc->plcp_length_lo = plcp_length & 0xff;
1315156321Sdamien
1316156321Sdamien		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1317156321Sdamien			desc->plcp_signal |= 0x08;
1318156321Sdamien	}
1319156321Sdamien
1320156321Sdamien	/* RT2x61 supports scatter with up to 5 segments */
1321156321Sdamien	for (i = 0; i < nsegs; i++) {
1322156321Sdamien		desc->addr[i] = htole32(segs[i].ds_addr);
1323156321Sdamien		desc->len [i] = htole16(segs[i].ds_len);
1324156321Sdamien	}
1325156321Sdamien}
1326156321Sdamien
1327156321Sdamienstatic int
1328156321Sdamienrt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1329156321Sdamien    struct ieee80211_node *ni)
1330156321Sdamien{
1331178354Ssam	struct ieee80211vap *vap = ni->ni_vap;
1332178354Ssam	struct ieee80211com *ic = ni->ni_ic;
1333156321Sdamien	struct rt2661_tx_desc *desc;
1334156321Sdamien	struct rt2661_tx_data *data;
1335156321Sdamien	struct ieee80211_frame *wh;
1336173386Skevlo	struct ieee80211_key *k;
1337156321Sdamien	bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1338156321Sdamien	uint16_t dur;
1339156321Sdamien	uint32_t flags = 0;	/* XXX HWSEQ */
1340156321Sdamien	int nsegs, rate, error;
1341156321Sdamien
1342156321Sdamien	desc = &sc->mgtq.desc[sc->mgtq.cur];
1343156321Sdamien	data = &sc->mgtq.data[sc->mgtq.cur];
1344156321Sdamien
1345178354Ssam	rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate;
1346156321Sdamien
1347173386Skevlo	wh = mtod(m0, struct ieee80211_frame *);
1348173386Skevlo
1349173386Skevlo	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1350178354Ssam		k = ieee80211_crypto_encap(ni, m0);
1351173386Skevlo		if (k == NULL) {
1352173386Skevlo			m_freem(m0);
1353173386Skevlo			return ENOBUFS;
1354173386Skevlo		}
1355173386Skevlo	}
1356173386Skevlo
1357156321Sdamien	error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0,
1358156321Sdamien	    segs, &nsegs, 0);
1359156321Sdamien	if (error != 0) {
1360156321Sdamien		device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1361156321Sdamien		    error);
1362156321Sdamien		m_freem(m0);
1363156321Sdamien		return error;
1364156321Sdamien	}
1365156321Sdamien
1366192468Ssam	if (ieee80211_radiotap_active_vap(vap)) {
1367156321Sdamien		struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1368156321Sdamien
1369156321Sdamien		tap->wt_flags = 0;
1370156321Sdamien		tap->wt_rate = rate;
1371156321Sdamien
1372192468Ssam		ieee80211_radiotap_tx(vap, m0);
1373156321Sdamien	}
1374156321Sdamien
1375156321Sdamien	data->m = m0;
1376156321Sdamien	data->ni = ni;
1377178354Ssam	/* management frames are not taken into account for amrr */
1378178354Ssam	data->rix = IEEE80211_FIXED_RATE_NONE;
1379156321Sdamien
1380156321Sdamien	wh = mtod(m0, struct ieee80211_frame *);
1381156321Sdamien
1382156321Sdamien	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1383156321Sdamien		flags |= RT2661_TX_NEED_ACK;
1384156321Sdamien
1385190532Ssam		dur = ieee80211_ack_duration(ic->ic_rt,
1386178354Ssam		    rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1387156321Sdamien		*(uint16_t *)wh->i_dur = htole16(dur);
1388156321Sdamien
1389156321Sdamien		/* tell hardware to add timestamp in probe responses */
1390156321Sdamien		if ((wh->i_fc[0] &
1391156321Sdamien		    (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1392156321Sdamien		    (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1393156321Sdamien			flags |= RT2661_TX_TIMESTAMP;
1394156321Sdamien	}
1395156321Sdamien
1396156321Sdamien	rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1397156321Sdamien	    m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT);
1398156321Sdamien
1399156321Sdamien	bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1400156321Sdamien	bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1401156321Sdamien	    BUS_DMASYNC_PREWRITE);
1402156321Sdamien
1403178354Ssam	DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1404178354Ssam	    m0->m_pkthdr.len, sc->mgtq.cur, rate);
1405156321Sdamien
1406156321Sdamien	/* kick mgt */
1407156321Sdamien	sc->mgtq.queued++;
1408156321Sdamien	sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1409156321Sdamien	RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1410156321Sdamien
1411156321Sdamien	return 0;
1412156321Sdamien}
1413156321Sdamien
1414178354Ssamstatic int
1415178354Ssamrt2661_sendprot(struct rt2661_softc *sc, int ac,
1416178354Ssam    const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1417156321Sdamien{
1418178354Ssam	struct ieee80211com *ic = ni->ni_ic;
1419178354Ssam	struct rt2661_tx_ring *txq = &sc->txq[ac];
1420178354Ssam	const struct ieee80211_frame *wh;
1421178354Ssam	struct rt2661_tx_desc *desc;
1422178354Ssam	struct rt2661_tx_data *data;
1423178354Ssam	struct mbuf *mprot;
1424178354Ssam	int protrate, ackrate, pktlen, flags, isshort, error;
1425178354Ssam	uint16_t dur;
1426178354Ssam	bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1427178354Ssam	int nsegs;
1428156321Sdamien
1429178354Ssam	KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1430178354Ssam	    ("protection %d", prot));
1431178354Ssam
1432178354Ssam	wh = mtod(m, const struct ieee80211_frame *);
1433178354Ssam	pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1434178354Ssam
1435190532Ssam	protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1436190532Ssam	ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1437178354Ssam
1438178354Ssam	isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1439190532Ssam	dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1440190532Ssam	    + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1441178354Ssam	flags = RT2661_TX_MORE_FRAG;
1442178354Ssam	if (prot == IEEE80211_PROT_RTSCTS) {
1443178354Ssam		/* NB: CTS is the same size as an ACK */
1444190532Ssam		dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1445178354Ssam		flags |= RT2661_TX_NEED_ACK;
1446178354Ssam		mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1447178354Ssam	} else {
1448178354Ssam		mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1449156321Sdamien	}
1450178354Ssam	if (mprot == NULL) {
1451178354Ssam		/* XXX stat + msg */
1452178354Ssam		return ENOBUFS;
1453178354Ssam	}
1454156321Sdamien
1455178354Ssam	data = &txq->data[txq->cur];
1456178354Ssam	desc = &txq->desc[txq->cur];
1457156321Sdamien
1458178354Ssam	error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs,
1459178354Ssam	    &nsegs, 0);
1460178354Ssam	if (error != 0) {
1461178354Ssam		device_printf(sc->sc_dev,
1462178354Ssam		    "could not map mbuf (error %d)\n", error);
1463178354Ssam		m_freem(mprot);
1464178354Ssam		return error;
1465178354Ssam	}
1466156321Sdamien
1467178354Ssam	data->m = mprot;
1468178354Ssam	data->ni = ieee80211_ref_node(ni);
1469178354Ssam	/* ctl frames are not taken into account for amrr */
1470178354Ssam	data->rix = IEEE80211_FIXED_RATE_NONE;
1471156321Sdamien
1472178354Ssam	rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len,
1473178354Ssam	    protrate, segs, 1, ac);
1474178354Ssam
1475178354Ssam	bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1476178354Ssam	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1477178354Ssam
1478178354Ssam	txq->queued++;
1479178354Ssam	txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1480178354Ssam
1481178354Ssam	return 0;
1482156321Sdamien}
1483156321Sdamien
1484156321Sdamienstatic int
1485156321Sdamienrt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1486156321Sdamien    struct ieee80211_node *ni, int ac)
1487156321Sdamien{
1488178354Ssam	struct ieee80211vap *vap = ni->ni_vap;
1489178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1490178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1491156321Sdamien	struct rt2661_tx_ring *txq = &sc->txq[ac];
1492156321Sdamien	struct rt2661_tx_desc *desc;
1493156321Sdamien	struct rt2661_tx_data *data;
1494156321Sdamien	struct ieee80211_frame *wh;
1495178354Ssam	const struct ieee80211_txparam *tp;
1496156321Sdamien	struct ieee80211_key *k;
1497156321Sdamien	const struct chanAccParams *cap;
1498156321Sdamien	struct mbuf *mnew;
1499156321Sdamien	bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1500156321Sdamien	uint16_t dur;
1501178354Ssam	uint32_t flags;
1502156321Sdamien	int error, nsegs, rate, noack = 0;
1503156321Sdamien
1504156321Sdamien	wh = mtod(m0, struct ieee80211_frame *);
1505156321Sdamien
1506178354Ssam	tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1507178354Ssam	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1508178354Ssam		rate = tp->mcastrate;
1509178354Ssam	} else if (m0->m_flags & M_EAPOL) {
1510178354Ssam		rate = tp->mgmtrate;
1511178354Ssam	} else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1512178354Ssam		rate = tp->ucastrate;
1513156321Sdamien	} else {
1514178354Ssam		(void) ieee80211_amrr_choose(ni, &RT2661_NODE(ni)->amrr);
1515178354Ssam		rate = ni->ni_txrate;
1516156321Sdamien	}
1517156321Sdamien	rate &= IEEE80211_RATE_VAL;
1518156321Sdamien
1519156321Sdamien	if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
1520156321Sdamien		cap = &ic->ic_wme.wme_chanParams;
1521156321Sdamien		noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1522156321Sdamien	}
1523156321Sdamien
1524156321Sdamien	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1525178354Ssam		k = ieee80211_crypto_encap(ni, m0);
1526156321Sdamien		if (k == NULL) {
1527156321Sdamien			m_freem(m0);
1528156321Sdamien			return ENOBUFS;
1529156321Sdamien		}
1530156321Sdamien
1531156321Sdamien		/* packet header may have moved, reset our local pointer */
1532156321Sdamien		wh = mtod(m0, struct ieee80211_frame *);
1533156321Sdamien	}
1534156321Sdamien
1535178354Ssam	flags = 0;
1536178354Ssam	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1537178354Ssam		int prot = IEEE80211_PROT_NONE;
1538178354Ssam		if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1539178354Ssam			prot = IEEE80211_PROT_RTSCTS;
1540178354Ssam		else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1541190532Ssam		    ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1542178354Ssam			prot = ic->ic_protmode;
1543178354Ssam		if (prot != IEEE80211_PROT_NONE) {
1544178354Ssam			error = rt2661_sendprot(sc, ac, m0, ni, prot, rate);
1545178354Ssam			if (error) {
1546178354Ssam				m_freem(m0);
1547178354Ssam				return error;
1548178354Ssam			}
1549178354Ssam			flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1550156321Sdamien		}
1551156321Sdamien	}
1552156321Sdamien
1553156321Sdamien	data = &txq->data[txq->cur];
1554156321Sdamien	desc = &txq->desc[txq->cur];
1555156321Sdamien
1556156321Sdamien	error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs,
1557156321Sdamien	    &nsegs, 0);
1558156321Sdamien	if (error != 0 && error != EFBIG) {
1559156321Sdamien		device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1560156321Sdamien		    error);
1561156321Sdamien		m_freem(m0);
1562156321Sdamien		return error;
1563156321Sdamien	}
1564156321Sdamien	if (error != 0) {
1565156321Sdamien		mnew = m_defrag(m0, M_DONTWAIT);
1566156321Sdamien		if (mnew == NULL) {
1567156321Sdamien			device_printf(sc->sc_dev,
1568156321Sdamien			    "could not defragment mbuf\n");
1569156321Sdamien			m_freem(m0);
1570156321Sdamien			return ENOBUFS;
1571156321Sdamien		}
1572156321Sdamien		m0 = mnew;
1573156321Sdamien
1574156321Sdamien		error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0,
1575156321Sdamien		    segs, &nsegs, 0);
1576156321Sdamien		if (error != 0) {
1577156321Sdamien			device_printf(sc->sc_dev,
1578156321Sdamien			    "could not map mbuf (error %d)\n", error);
1579156321Sdamien			m_freem(m0);
1580156321Sdamien			return error;
1581156321Sdamien		}
1582156321Sdamien
1583156321Sdamien		/* packet header have moved, reset our local pointer */
1584156321Sdamien		wh = mtod(m0, struct ieee80211_frame *);
1585156321Sdamien	}
1586156321Sdamien
1587192468Ssam	if (ieee80211_radiotap_active_vap(vap)) {
1588156321Sdamien		struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1589156321Sdamien
1590156321Sdamien		tap->wt_flags = 0;
1591156321Sdamien		tap->wt_rate = rate;
1592156321Sdamien
1593192468Ssam		ieee80211_radiotap_tx(vap, m0);
1594156321Sdamien	}
1595156321Sdamien
1596156321Sdamien	data->m = m0;
1597156321Sdamien	data->ni = ni;
1598156321Sdamien
1599156321Sdamien	/* remember link conditions for rate adaptation algorithm */
1600178354Ssam	if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1601178354Ssam		data->rix = ni->ni_txrate;
1602178354Ssam		/* XXX probably need last rssi value and not avg */
1603178354Ssam		data->rssi = ic->ic_node_getrssi(ni);
1604156321Sdamien	} else
1605178354Ssam		data->rix = IEEE80211_FIXED_RATE_NONE;
1606156321Sdamien
1607156321Sdamien	if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1608156321Sdamien		flags |= RT2661_TX_NEED_ACK;
1609156321Sdamien
1610190532Ssam		dur = ieee80211_ack_duration(ic->ic_rt,
1611178354Ssam		    rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1612156321Sdamien		*(uint16_t *)wh->i_dur = htole16(dur);
1613156321Sdamien	}
1614156321Sdamien
1615156321Sdamien	rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs,
1616156321Sdamien	    nsegs, ac);
1617156321Sdamien
1618156321Sdamien	bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1619156321Sdamien	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1620156321Sdamien
1621178354Ssam	DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1622178354Ssam	    m0->m_pkthdr.len, txq->cur, rate);
1623156321Sdamien
1624156321Sdamien	/* kick Tx */
1625156321Sdamien	txq->queued++;
1626156321Sdamien	txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1627156321Sdamien	RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1628156321Sdamien
1629156321Sdamien	return 0;
1630156321Sdamien}
1631156321Sdamien
1632156321Sdamienstatic void
1633178354Ssamrt2661_start_locked(struct ifnet *ifp)
1634156321Sdamien{
1635156321Sdamien	struct rt2661_softc *sc = ifp->if_softc;
1636178354Ssam	struct mbuf *m;
1637156321Sdamien	struct ieee80211_node *ni;
1638156321Sdamien	int ac;
1639156321Sdamien
1640178354Ssam	RAL_LOCK_ASSERT(sc);
1641156321Sdamien
1642156975Sdamien	/* prevent management frames from being sent if we're not ready */
1643178354Ssam	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) || sc->sc_invalid)
1644156975Sdamien		return;
1645156975Sdamien
1646156321Sdamien	for (;;) {
1647178354Ssam		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1648178354Ssam		if (m == NULL)
1649178354Ssam			break;
1650156321Sdamien
1651178354Ssam		ac = M_WME_GETAC(m);
1652178354Ssam		if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1653178354Ssam			/* there is no place left in this ring */
1654178354Ssam			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1655178354Ssam			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1656178354Ssam			break;
1657178354Ssam		}
1658178354Ssam		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1659178354Ssam		if (rt2661_tx_data(sc, m, ni, ac) != 0) {
1660178354Ssam			ieee80211_free_node(ni);
1661178354Ssam			ifp->if_oerrors++;
1662178354Ssam			break;
1663178354Ssam		}
1664156321Sdamien
1665178354Ssam		sc->sc_tx_timer = 5;
1666178354Ssam	}
1667178354Ssam}
1668156321Sdamien
1669178354Ssamstatic void
1670178354Ssamrt2661_start(struct ifnet *ifp)
1671178354Ssam{
1672178354Ssam	struct rt2661_softc *sc = ifp->if_softc;
1673156321Sdamien
1674178354Ssam	RAL_LOCK(sc);
1675178354Ssam	rt2661_start_locked(ifp);
1676178354Ssam	RAL_UNLOCK(sc);
1677178354Ssam}
1678156321Sdamien
1679178354Ssamstatic int
1680178354Ssamrt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1681178354Ssam	const struct ieee80211_bpf_params *params)
1682178354Ssam{
1683178354Ssam	struct ieee80211com *ic = ni->ni_ic;
1684178354Ssam	struct ifnet *ifp = ic->ic_ifp;
1685178354Ssam	struct rt2661_softc *sc = ifp->if_softc;
1686156321Sdamien
1687178354Ssam	RAL_LOCK(sc);
1688156321Sdamien
1689178354Ssam	/* prevent management frames from being sent if we're not ready */
1690178354Ssam	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1691178354Ssam		RAL_UNLOCK(sc);
1692178354Ssam		m_freem(m);
1693178354Ssam		ieee80211_free_node(ni);
1694178354Ssam		return ENETDOWN;
1695178354Ssam	}
1696178354Ssam	if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1697178354Ssam		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1698178354Ssam		RAL_UNLOCK(sc);
1699178354Ssam		m_freem(m);
1700178354Ssam		ieee80211_free_node(ni);
1701178354Ssam		return ENOBUFS;		/* XXX */
1702178354Ssam	}
1703156321Sdamien
1704178354Ssam	ifp->if_opackets++;
1705156321Sdamien
1706178354Ssam	/*
1707178354Ssam	 * Legacy path; interpret frame contents to decide
1708178354Ssam	 * precisely how to send the frame.
1709178354Ssam	 * XXX raw path
1710178354Ssam	 */
1711178354Ssam	if (rt2661_tx_mgt(sc, m, ni) != 0)
1712178354Ssam		goto bad;
1713178354Ssam	sc->sc_tx_timer = 5;
1714156321Sdamien
1715178354Ssam	RAL_UNLOCK(sc);
1716156321Sdamien
1717178354Ssam	return 0;
1718178354Ssambad:
1719178354Ssam	ifp->if_oerrors++;
1720178354Ssam	ieee80211_free_node(ni);
1721156321Sdamien	RAL_UNLOCK(sc);
1722178354Ssam	return EIO;		/* XXX */
1723156321Sdamien}
1724156321Sdamien
1725156321Sdamienstatic void
1726165352Sbmsrt2661_watchdog(void *arg)
1727156321Sdamien{
1728165352Sbms	struct rt2661_softc *sc = (struct rt2661_softc *)arg;
1729178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1730156321Sdamien
1731178354Ssam	RAL_LOCK_ASSERT(sc);
1732156321Sdamien
1733178354Ssam	KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running"));
1734156321Sdamien
1735178354Ssam	if (sc->sc_invalid)		/* card ejected */
1736178354Ssam		return;
1737156321Sdamien
1738178354Ssam	if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1739178354Ssam		if_printf(ifp, "device timeout\n");
1740178354Ssam		rt2661_init_locked(sc);
1741178354Ssam		ifp->if_oerrors++;
1742178354Ssam		/* NB: callout is reset in rt2661_init() */
1743178354Ssam		return;
1744178354Ssam	}
1745178354Ssam	callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
1746156321Sdamien}
1747156321Sdamien
1748156321Sdamienstatic int
1749156321Sdamienrt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1750156321Sdamien{
1751156321Sdamien	struct rt2661_softc *sc = ifp->if_softc;
1752178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1753178354Ssam	struct ifreq *ifr = (struct ifreq *) data;
1754178354Ssam	int error = 0, startall = 0;
1755156321Sdamien
1756156321Sdamien	switch (cmd) {
1757156321Sdamien	case SIOCSIFFLAGS:
1758178704Sthompsa		RAL_LOCK(sc);
1759156321Sdamien		if (ifp->if_flags & IFF_UP) {
1760178354Ssam			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1761178354Ssam				rt2661_init_locked(sc);
1762178354Ssam				startall = 1;
1763178354Ssam			} else
1764178354Ssam				rt2661_update_promisc(ifp);
1765156321Sdamien		} else {
1766156321Sdamien			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1767178354Ssam				rt2661_stop_locked(sc);
1768156321Sdamien		}
1769178704Sthompsa		RAL_UNLOCK(sc);
1770178704Sthompsa		if (startall)
1771178704Sthompsa			ieee80211_start_all(ic);
1772156321Sdamien		break;
1773178354Ssam	case SIOCGIFMEDIA:
1774178354Ssam		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1775178354Ssam		break;
1776178704Sthompsa	case SIOCGIFADDR:
1777178354Ssam		error = ether_ioctl(ifp, cmd, data);
1778178354Ssam		break;
1779178704Sthompsa	default:
1780178704Sthompsa		error = EINVAL;
1781178704Sthompsa		break;
1782156321Sdamien	}
1783156321Sdamien	return error;
1784156321Sdamien}
1785156321Sdamien
1786156321Sdamienstatic void
1787156321Sdamienrt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
1788156321Sdamien{
1789156321Sdamien	uint32_t tmp;
1790156321Sdamien	int ntries;
1791156321Sdamien
1792156321Sdamien	for (ntries = 0; ntries < 100; ntries++) {
1793156321Sdamien		if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1794156321Sdamien			break;
1795156321Sdamien		DELAY(1);
1796156321Sdamien	}
1797156321Sdamien	if (ntries == 100) {
1798156321Sdamien		device_printf(sc->sc_dev, "could not write to BBP\n");
1799156321Sdamien		return;
1800156321Sdamien	}
1801156321Sdamien
1802156321Sdamien	tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
1803156321Sdamien	RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
1804156321Sdamien
1805178354Ssam	DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
1806156321Sdamien}
1807156321Sdamien
1808156321Sdamienstatic uint8_t
1809156321Sdamienrt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
1810156321Sdamien{
1811156321Sdamien	uint32_t val;
1812156321Sdamien	int ntries;
1813156321Sdamien
1814156321Sdamien	for (ntries = 0; ntries < 100; ntries++) {
1815156321Sdamien		if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1816156321Sdamien			break;
1817156321Sdamien		DELAY(1);
1818156321Sdamien	}
1819156321Sdamien	if (ntries == 100) {
1820156321Sdamien		device_printf(sc->sc_dev, "could not read from BBP\n");
1821156321Sdamien		return 0;
1822156321Sdamien	}
1823156321Sdamien
1824156321Sdamien	val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
1825156321Sdamien	RAL_WRITE(sc, RT2661_PHY_CSR3, val);
1826156321Sdamien
1827156321Sdamien	for (ntries = 0; ntries < 100; ntries++) {
1828156321Sdamien		val = RAL_READ(sc, RT2661_PHY_CSR3);
1829156321Sdamien		if (!(val & RT2661_BBP_BUSY))
1830156321Sdamien			return val & 0xff;
1831156321Sdamien		DELAY(1);
1832156321Sdamien	}
1833156321Sdamien
1834156321Sdamien	device_printf(sc->sc_dev, "could not read from BBP\n");
1835156321Sdamien	return 0;
1836156321Sdamien}
1837156321Sdamien
1838156321Sdamienstatic void
1839156321Sdamienrt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
1840156321Sdamien{
1841156321Sdamien	uint32_t tmp;
1842156321Sdamien	int ntries;
1843156321Sdamien
1844156321Sdamien	for (ntries = 0; ntries < 100; ntries++) {
1845156321Sdamien		if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
1846156321Sdamien			break;
1847156321Sdamien		DELAY(1);
1848156321Sdamien	}
1849156321Sdamien	if (ntries == 100) {
1850156321Sdamien		device_printf(sc->sc_dev, "could not write to RF\n");
1851156321Sdamien		return;
1852156321Sdamien	}
1853156321Sdamien
1854156321Sdamien	tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
1855156321Sdamien	    (reg & 3);
1856156321Sdamien	RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
1857156321Sdamien
1858156321Sdamien	/* remember last written value in sc */
1859156321Sdamien	sc->rf_regs[reg] = val;
1860156321Sdamien
1861178354Ssam	DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
1862156321Sdamien}
1863156321Sdamien
1864156321Sdamienstatic int
1865156321Sdamienrt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
1866156321Sdamien{
1867156321Sdamien	if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
1868156321Sdamien		return EIO;	/* there is already a command pending */
1869156321Sdamien
1870156321Sdamien	RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
1871156321Sdamien	    RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
1872156321Sdamien
1873156321Sdamien	RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
1874156321Sdamien
1875156321Sdamien	return 0;
1876156321Sdamien}
1877156321Sdamien
1878156321Sdamienstatic void
1879156321Sdamienrt2661_select_antenna(struct rt2661_softc *sc)
1880156321Sdamien{
1881156321Sdamien	uint8_t bbp4, bbp77;
1882156321Sdamien	uint32_t tmp;
1883156321Sdamien
1884156321Sdamien	bbp4  = rt2661_bbp_read(sc,  4);
1885156321Sdamien	bbp77 = rt2661_bbp_read(sc, 77);
1886156321Sdamien
1887156321Sdamien	/* TBD */
1888156321Sdamien
1889156321Sdamien	/* make sure Rx is disabled before switching antenna */
1890156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
1891156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
1892156321Sdamien
1893156321Sdamien	rt2661_bbp_write(sc,  4, bbp4);
1894156321Sdamien	rt2661_bbp_write(sc, 77, bbp77);
1895156321Sdamien
1896156321Sdamien	/* restore Rx filter */
1897156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
1898156321Sdamien}
1899156321Sdamien
1900156321Sdamien/*
1901156321Sdamien * Enable multi-rate retries for frames sent at OFDM rates.
1902156321Sdamien * In 802.11b/g mode, allow fallback to CCK rates.
1903156321Sdamien */
1904156321Sdamienstatic void
1905156321Sdamienrt2661_enable_mrr(struct rt2661_softc *sc)
1906156321Sdamien{
1907178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1908178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1909156321Sdamien	uint32_t tmp;
1910156321Sdamien
1911156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1912156321Sdamien
1913156321Sdamien	tmp &= ~RT2661_MRR_CCK_FALLBACK;
1914178354Ssam	if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
1915156321Sdamien		tmp |= RT2661_MRR_CCK_FALLBACK;
1916156321Sdamien	tmp |= RT2661_MRR_ENABLED;
1917156321Sdamien
1918156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1919156321Sdamien}
1920156321Sdamien
1921156321Sdamienstatic void
1922156321Sdamienrt2661_set_txpreamble(struct rt2661_softc *sc)
1923156321Sdamien{
1924178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1925178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1926156321Sdamien	uint32_t tmp;
1927156321Sdamien
1928156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1929156321Sdamien
1930156321Sdamien	tmp &= ~RT2661_SHORT_PREAMBLE;
1931178354Ssam	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1932156321Sdamien		tmp |= RT2661_SHORT_PREAMBLE;
1933156321Sdamien
1934156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1935156321Sdamien}
1936156321Sdamien
1937156321Sdamienstatic void
1938156321Sdamienrt2661_set_basicrates(struct rt2661_softc *sc,
1939156321Sdamien    const struct ieee80211_rateset *rs)
1940156321Sdamien{
1941156321Sdamien#define RV(r)	((r) & IEEE80211_RATE_VAL)
1942178354Ssam	struct ifnet *ifp = sc->sc_ifp;
1943178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1944156321Sdamien	uint32_t mask = 0;
1945156321Sdamien	uint8_t rate;
1946156321Sdamien	int i, j;
1947156321Sdamien
1948156321Sdamien	for (i = 0; i < rs->rs_nrates; i++) {
1949156321Sdamien		rate = rs->rs_rates[i];
1950156321Sdamien
1951156321Sdamien		if (!(rate & IEEE80211_RATE_BASIC))
1952156321Sdamien			continue;
1953156321Sdamien
1954156321Sdamien		/*
1955156321Sdamien		 * Find h/w rate index.  We know it exists because the rate
1956156321Sdamien		 * set has already been negotiated.
1957156321Sdamien		 */
1958167470Ssam		for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++);
1959156321Sdamien
1960156321Sdamien		mask |= 1 << j;
1961156321Sdamien	}
1962156321Sdamien
1963156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
1964156321Sdamien
1965178354Ssam	DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
1966156321Sdamien#undef RV
1967156321Sdamien}
1968156321Sdamien
1969156321Sdamien/*
1970156321Sdamien * Reprogram MAC/BBP to switch to a new band.  Values taken from the reference
1971156321Sdamien * driver.
1972156321Sdamien */
1973156321Sdamienstatic void
1974156321Sdamienrt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
1975156321Sdamien{
1976156321Sdamien	uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
1977156321Sdamien	uint32_t tmp;
1978156321Sdamien
1979156321Sdamien	/* update all BBP registers that depend on the band */
1980156321Sdamien	bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
1981156321Sdamien	bbp35 = 0x50; bbp97 = 0x48; bbp98  = 0x48;
1982156321Sdamien	if (IEEE80211_IS_CHAN_5GHZ(c)) {
1983156321Sdamien		bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
1984156321Sdamien		bbp35 += 0x10; bbp97 += 0x10; bbp98  += 0x10;
1985156321Sdamien	}
1986156321Sdamien	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1987156321Sdamien	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1988156321Sdamien		bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
1989156321Sdamien	}
1990156321Sdamien
1991156321Sdamien	rt2661_bbp_write(sc,  17, bbp17);
1992156321Sdamien	rt2661_bbp_write(sc,  96, bbp96);
1993156321Sdamien	rt2661_bbp_write(sc, 104, bbp104);
1994156321Sdamien
1995156321Sdamien	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1996156321Sdamien	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1997156321Sdamien		rt2661_bbp_write(sc, 75, 0x80);
1998156321Sdamien		rt2661_bbp_write(sc, 86, 0x80);
1999156321Sdamien		rt2661_bbp_write(sc, 88, 0x80);
2000156321Sdamien	}
2001156321Sdamien
2002156321Sdamien	rt2661_bbp_write(sc, 35, bbp35);
2003156321Sdamien	rt2661_bbp_write(sc, 97, bbp97);
2004156321Sdamien	rt2661_bbp_write(sc, 98, bbp98);
2005156321Sdamien
2006156321Sdamien	tmp = RAL_READ(sc, RT2661_PHY_CSR0);
2007156321Sdamien	tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
2008156321Sdamien	if (IEEE80211_IS_CHAN_2GHZ(c))
2009156321Sdamien		tmp |= RT2661_PA_PE_2GHZ;
2010156321Sdamien	else
2011156321Sdamien		tmp |= RT2661_PA_PE_5GHZ;
2012156321Sdamien	RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
2013156321Sdamien}
2014156321Sdamien
2015156321Sdamienstatic void
2016156321Sdamienrt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
2017156321Sdamien{
2018178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2019178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2020156321Sdamien	const struct rfprog *rfprog;
2021156321Sdamien	uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
2022156321Sdamien	int8_t power;
2023156321Sdamien	u_int i, chan;
2024156321Sdamien
2025156321Sdamien	chan = ieee80211_chan2ieee(ic, c);
2026178354Ssam	KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
2027156321Sdamien
2028156321Sdamien	/* select the appropriate RF settings based on what EEPROM says */
2029156321Sdamien	rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
2030156321Sdamien
2031156321Sdamien	/* find the settings for this channel (we know it exists) */
2032156321Sdamien	for (i = 0; rfprog[i].chan != chan; i++);
2033156321Sdamien
2034156321Sdamien	power = sc->txpow[i];
2035156321Sdamien	if (power < 0) {
2036156321Sdamien		bbp94 += power;
2037156321Sdamien		power = 0;
2038156321Sdamien	} else if (power > 31) {
2039156321Sdamien		bbp94 += power - 31;
2040156321Sdamien		power = 31;
2041156321Sdamien	}
2042156321Sdamien
2043156321Sdamien	/*
2044156321Sdamien	 * If we are switching from the 2GHz band to the 5GHz band or
2045156321Sdamien	 * vice-versa, BBP registers need to be reprogrammed.
2046156321Sdamien	 */
2047156321Sdamien	if (c->ic_flags != sc->sc_curchan->ic_flags) {
2048156321Sdamien		rt2661_select_band(sc, c);
2049156321Sdamien		rt2661_select_antenna(sc);
2050156321Sdamien	}
2051156321Sdamien	sc->sc_curchan = c;
2052156321Sdamien
2053156321Sdamien	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2054156321Sdamien	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2055156321Sdamien	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2056156321Sdamien	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2057156321Sdamien
2058156321Sdamien	DELAY(200);
2059156321Sdamien
2060156321Sdamien	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2061156321Sdamien	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2062156321Sdamien	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
2063156321Sdamien	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2064156321Sdamien
2065156321Sdamien	DELAY(200);
2066156321Sdamien
2067156321Sdamien	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2068156321Sdamien	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2069156321Sdamien	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2070156321Sdamien	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2071156321Sdamien
2072156321Sdamien	/* enable smart mode for MIMO-capable RFs */
2073156321Sdamien	bbp3 = rt2661_bbp_read(sc, 3);
2074156321Sdamien
2075156321Sdamien	bbp3 &= ~RT2661_SMART_MODE;
2076156321Sdamien	if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
2077156321Sdamien		bbp3 |= RT2661_SMART_MODE;
2078156321Sdamien
2079156321Sdamien	rt2661_bbp_write(sc, 3, bbp3);
2080156321Sdamien
2081156321Sdamien	if (bbp94 != RT2661_BBPR94_DEFAULT)
2082156321Sdamien		rt2661_bbp_write(sc, 94, bbp94);
2083156321Sdamien
2084156321Sdamien	/* 5GHz radio needs a 1ms delay here */
2085156321Sdamien	if (IEEE80211_IS_CHAN_5GHZ(c))
2086156321Sdamien		DELAY(1000);
2087156321Sdamien}
2088156321Sdamien
2089156321Sdamienstatic void
2090156321Sdamienrt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2091156321Sdamien{
2092156321Sdamien	uint32_t tmp;
2093156321Sdamien
2094156321Sdamien	tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2095156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2096156321Sdamien
2097156321Sdamien	tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2098156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2099156321Sdamien}
2100156321Sdamien
2101156321Sdamienstatic void
2102156321Sdamienrt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2103156321Sdamien{
2104156321Sdamien	uint32_t tmp;
2105156321Sdamien
2106156321Sdamien	tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2107156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2108156321Sdamien
2109156321Sdamien	tmp = addr[4] | addr[5] << 8;
2110156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2111156321Sdamien}
2112156321Sdamien
2113156321Sdamienstatic void
2114178354Ssamrt2661_update_promisc(struct ifnet *ifp)
2115156321Sdamien{
2116178354Ssam	struct rt2661_softc *sc = ifp->if_softc;
2117156321Sdamien	uint32_t tmp;
2118156321Sdamien
2119156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2120156321Sdamien
2121156321Sdamien	tmp &= ~RT2661_DROP_NOT_TO_ME;
2122156321Sdamien	if (!(ifp->if_flags & IFF_PROMISC))
2123156321Sdamien		tmp |= RT2661_DROP_NOT_TO_ME;
2124156321Sdamien
2125156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2126156321Sdamien
2127178354Ssam	DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2128178354Ssam	    "entering" : "leaving");
2129156321Sdamien}
2130156321Sdamien
2131156321Sdamien/*
2132156321Sdamien * Update QoS (802.11e) settings for each h/w Tx ring.
2133156321Sdamien */
2134156321Sdamienstatic int
2135156321Sdamienrt2661_wme_update(struct ieee80211com *ic)
2136156321Sdamien{
2137156321Sdamien	struct rt2661_softc *sc = ic->ic_ifp->if_softc;
2138156321Sdamien	const struct wmeParams *wmep;
2139156321Sdamien
2140156321Sdamien	wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
2141156321Sdamien
2142156321Sdamien	/* XXX: not sure about shifts. */
2143156321Sdamien	/* XXX: the reference driver plays with AC_VI settings too. */
2144156321Sdamien
2145156321Sdamien	/* update TxOp */
2146156321Sdamien	RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2147156321Sdamien	    wmep[WME_AC_BE].wmep_txopLimit << 16 |
2148156321Sdamien	    wmep[WME_AC_BK].wmep_txopLimit);
2149156321Sdamien	RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2150156321Sdamien	    wmep[WME_AC_VI].wmep_txopLimit << 16 |
2151156321Sdamien	    wmep[WME_AC_VO].wmep_txopLimit);
2152156321Sdamien
2153156321Sdamien	/* update CWmin */
2154156321Sdamien	RAL_WRITE(sc, RT2661_CWMIN_CSR,
2155156321Sdamien	    wmep[WME_AC_BE].wmep_logcwmin << 12 |
2156156321Sdamien	    wmep[WME_AC_BK].wmep_logcwmin <<  8 |
2157156321Sdamien	    wmep[WME_AC_VI].wmep_logcwmin <<  4 |
2158156321Sdamien	    wmep[WME_AC_VO].wmep_logcwmin);
2159156321Sdamien
2160156321Sdamien	/* update CWmax */
2161156321Sdamien	RAL_WRITE(sc, RT2661_CWMAX_CSR,
2162156321Sdamien	    wmep[WME_AC_BE].wmep_logcwmax << 12 |
2163156321Sdamien	    wmep[WME_AC_BK].wmep_logcwmax <<  8 |
2164156321Sdamien	    wmep[WME_AC_VI].wmep_logcwmax <<  4 |
2165156321Sdamien	    wmep[WME_AC_VO].wmep_logcwmax);
2166156321Sdamien
2167156321Sdamien	/* update Aifsn */
2168156321Sdamien	RAL_WRITE(sc, RT2661_AIFSN_CSR,
2169156321Sdamien	    wmep[WME_AC_BE].wmep_aifsn << 12 |
2170156321Sdamien	    wmep[WME_AC_BK].wmep_aifsn <<  8 |
2171156321Sdamien	    wmep[WME_AC_VI].wmep_aifsn <<  4 |
2172156321Sdamien	    wmep[WME_AC_VO].wmep_aifsn);
2173156321Sdamien
2174156321Sdamien	return 0;
2175156321Sdamien}
2176156321Sdamien
2177156321Sdamienstatic void
2178156321Sdamienrt2661_update_slot(struct ifnet *ifp)
2179156321Sdamien{
2180156321Sdamien	struct rt2661_softc *sc = ifp->if_softc;
2181178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2182156321Sdamien	uint8_t slottime;
2183156321Sdamien	uint32_t tmp;
2184156321Sdamien
2185156321Sdamien	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2186156321Sdamien
2187156321Sdamien	tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2188156321Sdamien	tmp = (tmp & ~0xff) | slottime;
2189156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2190156321Sdamien}
2191156321Sdamien
2192156321Sdamienstatic const char *
2193156321Sdamienrt2661_get_rf(int rev)
2194156321Sdamien{
2195156321Sdamien	switch (rev) {
2196156321Sdamien	case RT2661_RF_5225:	return "RT5225";
2197156321Sdamien	case RT2661_RF_5325:	return "RT5325 (MIMO XR)";
2198156321Sdamien	case RT2661_RF_2527:	return "RT2527";
2199156321Sdamien	case RT2661_RF_2529:	return "RT2529 (MIMO XR)";
2200156321Sdamien	default:		return "unknown";
2201156321Sdamien	}
2202156321Sdamien}
2203156321Sdamien
2204156321Sdamienstatic void
2205190526Ssamrt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2206156321Sdamien{
2207156321Sdamien	uint16_t val;
2208156321Sdamien	int i;
2209156321Sdamien
2210156321Sdamien	/* read MAC address */
2211156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2212190526Ssam	macaddr[0] = val & 0xff;
2213190526Ssam	macaddr[1] = val >> 8;
2214156321Sdamien
2215156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2216190526Ssam	macaddr[2] = val & 0xff;
2217190526Ssam	macaddr[3] = val >> 8;
2218156321Sdamien
2219156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2220190526Ssam	macaddr[4] = val & 0xff;
2221190526Ssam	macaddr[5] = val >> 8;
2222156321Sdamien
2223156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2224156321Sdamien	/* XXX: test if different from 0xffff? */
2225156321Sdamien	sc->rf_rev   = (val >> 11) & 0x1f;
2226156321Sdamien	sc->hw_radio = (val >> 10) & 0x1;
2227156321Sdamien	sc->rx_ant   = (val >> 4)  & 0x3;
2228156321Sdamien	sc->tx_ant   = (val >> 2)  & 0x3;
2229156321Sdamien	sc->nb_ant   = val & 0x3;
2230156321Sdamien
2231178354Ssam	DPRINTF(sc, "RF revision=%d\n", sc->rf_rev);
2232156321Sdamien
2233156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2234156321Sdamien	sc->ext_5ghz_lna = (val >> 6) & 0x1;
2235156321Sdamien	sc->ext_2ghz_lna = (val >> 4) & 0x1;
2236156321Sdamien
2237178354Ssam	DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2238178354Ssam	    sc->ext_2ghz_lna, sc->ext_5ghz_lna);
2239156321Sdamien
2240156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2241156321Sdamien	if ((val & 0xff) != 0xff)
2242156321Sdamien		sc->rssi_2ghz_corr = (int8_t)(val & 0xff);	/* signed */
2243156321Sdamien
2244170530Ssam	/* Only [-10, 10] is valid */
2245170530Ssam	if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
2246170530Ssam		sc->rssi_2ghz_corr = 0;
2247170530Ssam
2248156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2249156321Sdamien	if ((val & 0xff) != 0xff)
2250156321Sdamien		sc->rssi_5ghz_corr = (int8_t)(val & 0xff);	/* signed */
2251156321Sdamien
2252170530Ssam	/* Only [-10, 10] is valid */
2253170530Ssam	if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
2254170530Ssam		sc->rssi_5ghz_corr = 0;
2255170530Ssam
2256156321Sdamien	/* adjust RSSI correction for external low-noise amplifier */
2257156321Sdamien	if (sc->ext_2ghz_lna)
2258156321Sdamien		sc->rssi_2ghz_corr -= 14;
2259156321Sdamien	if (sc->ext_5ghz_lna)
2260156321Sdamien		sc->rssi_5ghz_corr -= 14;
2261156321Sdamien
2262178354Ssam	DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2263178354Ssam	    sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
2264156321Sdamien
2265156321Sdamien	val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2266156321Sdamien	if ((val >> 8) != 0xff)
2267156321Sdamien		sc->rfprog = (val >> 8) & 0x3;
2268156321Sdamien	if ((val & 0xff) != 0xff)
2269156321Sdamien		sc->rffreq = val & 0xff;
2270156321Sdamien
2271178354Ssam	DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq);
2272156321Sdamien
2273156321Sdamien	/* read Tx power for all a/b/g channels */
2274156321Sdamien	for (i = 0; i < 19; i++) {
2275156321Sdamien		val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2276156321Sdamien		sc->txpow[i * 2] = (int8_t)(val >> 8);		/* signed */
2277178354Ssam		DPRINTF(sc, "Channel=%d Tx power=%d\n",
2278178354Ssam		    rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]);
2279156321Sdamien		sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff);	/* signed */
2280178354Ssam		DPRINTF(sc, "Channel=%d Tx power=%d\n",
2281178354Ssam		    rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]);
2282156321Sdamien	}
2283156321Sdamien
2284156321Sdamien	/* read vendor-specific BBP values */
2285156321Sdamien	for (i = 0; i < 16; i++) {
2286156321Sdamien		val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2287156321Sdamien		if (val == 0 || val == 0xffff)
2288156321Sdamien			continue;	/* skip invalid entries */
2289156321Sdamien		sc->bbp_prom[i].reg = val >> 8;
2290156321Sdamien		sc->bbp_prom[i].val = val & 0xff;
2291178354Ssam		DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2292178354Ssam		    sc->bbp_prom[i].val);
2293156321Sdamien	}
2294156321Sdamien}
2295156321Sdamien
2296156321Sdamienstatic int
2297156321Sdamienrt2661_bbp_init(struct rt2661_softc *sc)
2298156321Sdamien{
2299156321Sdamien#define N(a)	(sizeof (a) / sizeof ((a)[0]))
2300156321Sdamien	int i, ntries;
2301156321Sdamien	uint8_t val;
2302156321Sdamien
2303156321Sdamien	/* wait for BBP to be ready */
2304156321Sdamien	for (ntries = 0; ntries < 100; ntries++) {
2305156321Sdamien		val = rt2661_bbp_read(sc, 0);
2306156321Sdamien		if (val != 0 && val != 0xff)
2307156321Sdamien			break;
2308156321Sdamien		DELAY(100);
2309156321Sdamien	}
2310156321Sdamien	if (ntries == 100) {
2311156321Sdamien		device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2312156321Sdamien		return EIO;
2313156321Sdamien	}
2314156321Sdamien
2315156321Sdamien	/* initialize BBP registers to default values */
2316156321Sdamien	for (i = 0; i < N(rt2661_def_bbp); i++) {
2317156321Sdamien		rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2318156321Sdamien		    rt2661_def_bbp[i].val);
2319156321Sdamien	}
2320156321Sdamien
2321156321Sdamien	/* write vendor-specific BBP values (from EEPROM) */
2322156321Sdamien	for (i = 0; i < 16; i++) {
2323156321Sdamien		if (sc->bbp_prom[i].reg == 0)
2324156321Sdamien			continue;
2325156321Sdamien		rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2326156321Sdamien	}
2327156321Sdamien
2328156321Sdamien	return 0;
2329156321Sdamien#undef N
2330156321Sdamien}
2331156321Sdamien
2332156321Sdamienstatic void
2333178354Ssamrt2661_init_locked(struct rt2661_softc *sc)
2334156321Sdamien{
2335156321Sdamien#define N(a)	(sizeof (a) / sizeof ((a)[0]))
2336178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2337178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2338156321Sdamien	uint32_t tmp, sta[3];
2339178354Ssam	int i, error, ntries;
2340156321Sdamien
2341178354Ssam	RAL_LOCK_ASSERT(sc);
2342156975Sdamien
2343178354Ssam	if ((sc->sc_flags & RAL_FW_LOADED) == 0) {
2344178354Ssam		error = rt2661_load_microcode(sc);
2345178354Ssam		if (error != 0) {
2346178354Ssam			if_printf(ifp,
2347178354Ssam			    "%s: could not load 8051 microcode, error %d\n",
2348178354Ssam			    __func__, error);
2349178354Ssam			return;
2350178354Ssam		}
2351178354Ssam		sc->sc_flags |= RAL_FW_LOADED;
2352178354Ssam	}
2353178354Ssam
2354170530Ssam	rt2661_stop_locked(sc);
2355156321Sdamien
2356156321Sdamien	/* initialize Tx rings */
2357156321Sdamien	RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2358156321Sdamien	RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2359156321Sdamien	RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2360156321Sdamien	RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2361156321Sdamien
2362156321Sdamien	/* initialize Mgt ring */
2363156321Sdamien	RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2364156321Sdamien
2365156321Sdamien	/* initialize Rx ring */
2366156321Sdamien	RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2367156321Sdamien
2368156321Sdamien	/* initialize Tx rings sizes */
2369156321Sdamien	RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2370156321Sdamien	    RT2661_TX_RING_COUNT << 24 |
2371156321Sdamien	    RT2661_TX_RING_COUNT << 16 |
2372156321Sdamien	    RT2661_TX_RING_COUNT <<  8 |
2373156321Sdamien	    RT2661_TX_RING_COUNT);
2374156321Sdamien
2375156321Sdamien	RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2376156321Sdamien	    RT2661_TX_DESC_WSIZE << 16 |
2377156321Sdamien	    RT2661_TX_RING_COUNT <<  8 |	/* XXX: HCCA ring unused */
2378156321Sdamien	    RT2661_MGT_RING_COUNT);
2379156321Sdamien
2380156321Sdamien	/* initialize Rx rings */
2381156321Sdamien	RAL_WRITE(sc, RT2661_RX_RING_CSR,
2382156321Sdamien	    RT2661_RX_DESC_BACK  << 16 |
2383156321Sdamien	    RT2661_RX_DESC_WSIZE <<  8 |
2384156321Sdamien	    RT2661_RX_RING_COUNT);
2385156321Sdamien
2386156321Sdamien	/* XXX: some magic here */
2387156321Sdamien	RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2388156321Sdamien
2389156321Sdamien	/* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2390156321Sdamien	RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2391156321Sdamien
2392156321Sdamien	/* load base address of Rx ring */
2393156321Sdamien	RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2394156321Sdamien
2395156321Sdamien	/* initialize MAC registers to default values */
2396156321Sdamien	for (i = 0; i < N(rt2661_def_mac); i++)
2397156321Sdamien		RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2398156321Sdamien
2399190526Ssam	rt2661_set_macaddr(sc, IF_LLADDR(ifp));
2400156321Sdamien
2401156321Sdamien	/* set host ready */
2402156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2403156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2404156321Sdamien
2405156321Sdamien	/* wait for BBP/RF to wakeup */
2406156321Sdamien	for (ntries = 0; ntries < 1000; ntries++) {
2407156321Sdamien		if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2408156321Sdamien			break;
2409156321Sdamien		DELAY(1000);
2410156321Sdamien	}
2411156321Sdamien	if (ntries == 1000) {
2412156321Sdamien		printf("timeout waiting for BBP/RF to wakeup\n");
2413170530Ssam		rt2661_stop_locked(sc);
2414156321Sdamien		return;
2415156321Sdamien	}
2416156321Sdamien
2417156321Sdamien	if (rt2661_bbp_init(sc) != 0) {
2418170530Ssam		rt2661_stop_locked(sc);
2419156321Sdamien		return;
2420156321Sdamien	}
2421156321Sdamien
2422156321Sdamien	/* select default channel */
2423156321Sdamien	sc->sc_curchan = ic->ic_curchan;
2424156321Sdamien	rt2661_select_band(sc, sc->sc_curchan);
2425156321Sdamien	rt2661_select_antenna(sc);
2426156321Sdamien	rt2661_set_chan(sc, sc->sc_curchan);
2427156321Sdamien
2428156321Sdamien	/* update Rx filter */
2429156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2430156321Sdamien
2431156321Sdamien	tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2432156321Sdamien	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2433156321Sdamien		tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2434156321Sdamien		       RT2661_DROP_ACKCTS;
2435195618Srpaulo		if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2436195618Srpaulo		    ic->ic_opmode != IEEE80211_M_MBSS)
2437156321Sdamien			tmp |= RT2661_DROP_TODS;
2438156321Sdamien		if (!(ifp->if_flags & IFF_PROMISC))
2439156321Sdamien			tmp |= RT2661_DROP_NOT_TO_ME;
2440156321Sdamien	}
2441156321Sdamien
2442156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2443156321Sdamien
2444156321Sdamien	/* clear STA registers */
2445156321Sdamien	RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
2446156321Sdamien
2447156321Sdamien	/* initialize ASIC */
2448156321Sdamien	RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2449156321Sdamien
2450156321Sdamien	/* clear any pending interrupt */
2451156321Sdamien	RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2452156321Sdamien
2453156321Sdamien	/* enable interrupts */
2454156321Sdamien	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2455156321Sdamien	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2456156321Sdamien
2457156321Sdamien	/* kick Rx */
2458156321Sdamien	RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2459156321Sdamien
2460156321Sdamien	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2461156321Sdamien	ifp->if_drv_flags |= IFF_DRV_RUNNING;
2462156321Sdamien
2463178354Ssam	callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
2464156975Sdamien#undef N
2465156321Sdamien}
2466156321Sdamien
2467178354Ssamstatic void
2468178354Ssamrt2661_init(void *priv)
2469156321Sdamien{
2470156321Sdamien	struct rt2661_softc *sc = priv;
2471178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2472178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2473170530Ssam
2474170530Ssam	RAL_LOCK(sc);
2475178354Ssam	rt2661_init_locked(sc);
2476170530Ssam	RAL_UNLOCK(sc);
2477178354Ssam
2478178931Sthompsa	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2479178931Sthompsa		ieee80211_start_all(ic);		/* start all vap's */
2480170530Ssam}
2481170530Ssam
2482170530Ssamvoid
2483170530Ssamrt2661_stop_locked(struct rt2661_softc *sc)
2484170530Ssam{
2485178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2486156321Sdamien	uint32_t tmp;
2487170530Ssam	volatile int *flags = &sc->sc_flags;
2488156321Sdamien
2489178354Ssam	while (*flags & RAL_INPUT_RUNNING)
2490170530Ssam		msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
2491156321Sdamien
2492178354Ssam	callout_stop(&sc->watchdog_ch);
2493178354Ssam	sc->sc_tx_timer = 0;
2494178354Ssam
2495170530Ssam	if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
2496170530Ssam		ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2497178354Ssam
2498170530Ssam		/* abort Tx (for all 5 Tx rings) */
2499170530Ssam		RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2500170530Ssam
2501170530Ssam		/* disable Rx (value remains after reset!) */
2502170530Ssam		tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2503170530Ssam		RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2504170530Ssam
2505170530Ssam		/* reset ASIC */
2506170530Ssam		RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2507170530Ssam		RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2508170530Ssam
2509170530Ssam		/* disable interrupts */
2510170530Ssam		RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2511170530Ssam		RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2512170530Ssam
2513170530Ssam		/* clear any pending interrupt */
2514170530Ssam		RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2515170530Ssam		RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2516170530Ssam
2517170530Ssam		/* reset Tx and Rx rings */
2518170530Ssam		rt2661_reset_tx_ring(sc, &sc->txq[0]);
2519170530Ssam		rt2661_reset_tx_ring(sc, &sc->txq[1]);
2520170530Ssam		rt2661_reset_tx_ring(sc, &sc->txq[2]);
2521170530Ssam		rt2661_reset_tx_ring(sc, &sc->txq[3]);
2522170530Ssam		rt2661_reset_tx_ring(sc, &sc->mgtq);
2523170530Ssam		rt2661_reset_rx_ring(sc, &sc->rxq);
2524170530Ssam	}
2525156321Sdamien}
2526156321Sdamien
2527178354Ssamvoid
2528178354Ssamrt2661_stop(void *priv)
2529178354Ssam{
2530178354Ssam	struct rt2661_softc *sc = priv;
2531178354Ssam
2532178354Ssam	RAL_LOCK(sc);
2533178354Ssam	rt2661_stop_locked(sc);
2534178354Ssam	RAL_UNLOCK(sc);
2535178354Ssam}
2536178354Ssam
2537156321Sdamienstatic int
2538178354Ssamrt2661_load_microcode(struct rt2661_softc *sc)
2539156321Sdamien{
2540178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2541178354Ssam	const struct firmware *fp;
2542178354Ssam	const char *imagename;
2543178354Ssam	int ntries, error;
2544156321Sdamien
2545178354Ssam	RAL_LOCK_ASSERT(sc);
2546178354Ssam
2547178354Ssam	switch (sc->sc_id) {
2548178354Ssam	case 0x0301: imagename = "rt2561sfw"; break;
2549178354Ssam	case 0x0302: imagename = "rt2561fw"; break;
2550178354Ssam	case 0x0401: imagename = "rt2661fw"; break;
2551178354Ssam	default:
2552178354Ssam		if_printf(ifp, "%s: unexpected pci device id 0x%x, "
2553178354Ssam		    "don't know how to retrieve firmware\n",
2554178354Ssam		    __func__, sc->sc_id);
2555178354Ssam		return EINVAL;
2556178354Ssam	}
2557178354Ssam	RAL_UNLOCK(sc);
2558178354Ssam	fp = firmware_get(imagename);
2559178354Ssam	RAL_LOCK(sc);
2560178354Ssam	if (fp == NULL) {
2561178354Ssam		if_printf(ifp, "%s: unable to retrieve firmware image %s\n",
2562178354Ssam		    __func__, imagename);
2563178354Ssam		return EINVAL;
2564178354Ssam	}
2565178354Ssam
2566178354Ssam	/*
2567178354Ssam	 * Load 8051 microcode into NIC.
2568178354Ssam	 */
2569156321Sdamien	/* reset 8051 */
2570156321Sdamien	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2571156321Sdamien
2572156321Sdamien	/* cancel any pending Host to MCU command */
2573156321Sdamien	RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2574156321Sdamien	RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2575156321Sdamien	RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2576156321Sdamien
2577156321Sdamien	/* write 8051's microcode */
2578156321Sdamien	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2579178354Ssam	RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize);
2580156321Sdamien	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2581156321Sdamien
2582156321Sdamien	/* kick 8051's ass */
2583156321Sdamien	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2584156321Sdamien
2585156321Sdamien	/* wait for 8051 to initialize */
2586156321Sdamien	for (ntries = 0; ntries < 500; ntries++) {
2587156321Sdamien		if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2588156321Sdamien			break;
2589156321Sdamien		DELAY(100);
2590156321Sdamien	}
2591156321Sdamien	if (ntries == 500) {
2592178354Ssam		if_printf(ifp, "%s: timeout waiting for MCU to initialize\n",
2593178354Ssam		    __func__);
2594178354Ssam		error = EIO;
2595178354Ssam	} else
2596178354Ssam		error = 0;
2597178354Ssam
2598178354Ssam	firmware_put(fp, FIRMWARE_UNLOAD);
2599178354Ssam	return error;
2600156321Sdamien}
2601156321Sdamien
2602156321Sdamien#ifdef notyet
2603156321Sdamien/*
2604156321Sdamien * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2605156321Sdamien * false CCA count.  This function is called periodically (every seconds) when
2606156321Sdamien * in the RUN state.  Values taken from the reference driver.
2607156321Sdamien */
2608156321Sdamienstatic void
2609156321Sdamienrt2661_rx_tune(struct rt2661_softc *sc)
2610156321Sdamien{
2611156321Sdamien	uint8_t bbp17;
2612156321Sdamien	uint16_t cca;
2613156321Sdamien	int lo, hi, dbm;
2614156321Sdamien
2615156321Sdamien	/*
2616156321Sdamien	 * Tuning range depends on operating band and on the presence of an
2617156321Sdamien	 * external low-noise amplifier.
2618156321Sdamien	 */
2619156321Sdamien	lo = 0x20;
2620156321Sdamien	if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2621156321Sdamien		lo += 0x08;
2622156321Sdamien	if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2623156321Sdamien	    (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2624156321Sdamien		lo += 0x10;
2625156321Sdamien	hi = lo + 0x20;
2626156321Sdamien
2627156321Sdamien	/* retrieve false CCA count since last call (clear on read) */
2628156321Sdamien	cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2629156321Sdamien
2630156321Sdamien	if (dbm >= -35) {
2631156321Sdamien		bbp17 = 0x60;
2632156321Sdamien	} else if (dbm >= -58) {
2633156321Sdamien		bbp17 = hi;
2634156321Sdamien	} else if (dbm >= -66) {
2635156321Sdamien		bbp17 = lo + 0x10;
2636156321Sdamien	} else if (dbm >= -74) {
2637156321Sdamien		bbp17 = lo + 0x08;
2638156321Sdamien	} else {
2639156321Sdamien		/* RSSI < -74dBm, tune using false CCA count */
2640156321Sdamien
2641156321Sdamien		bbp17 = sc->bbp17; /* current value */
2642156321Sdamien
2643156321Sdamien		hi -= 2 * (-74 - dbm);
2644156321Sdamien		if (hi < lo)
2645156321Sdamien			hi = lo;
2646156321Sdamien
2647156321Sdamien		if (bbp17 > hi) {
2648156321Sdamien			bbp17 = hi;
2649156321Sdamien
2650156321Sdamien		} else if (cca > 512) {
2651156321Sdamien			if (++bbp17 > hi)
2652156321Sdamien				bbp17 = hi;
2653156321Sdamien		} else if (cca < 100) {
2654156321Sdamien			if (--bbp17 < lo)
2655156321Sdamien				bbp17 = lo;
2656156321Sdamien		}
2657156321Sdamien	}
2658156321Sdamien
2659156321Sdamien	if (bbp17 != sc->bbp17) {
2660156321Sdamien		rt2661_bbp_write(sc, 17, bbp17);
2661156321Sdamien		sc->bbp17 = bbp17;
2662156321Sdamien	}
2663156321Sdamien}
2664156321Sdamien
2665156321Sdamien/*
2666156321Sdamien * Enter/Leave radar detection mode.
2667156321Sdamien * This is for 802.11h additional regulatory domains.
2668156321Sdamien */
2669156321Sdamienstatic void
2670156321Sdamienrt2661_radar_start(struct rt2661_softc *sc)
2671156321Sdamien{
2672156321Sdamien	uint32_t tmp;
2673156321Sdamien
2674156321Sdamien	/* disable Rx */
2675156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2676156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2677156321Sdamien
2678156321Sdamien	rt2661_bbp_write(sc, 82, 0x20);
2679156321Sdamien	rt2661_bbp_write(sc, 83, 0x00);
2680156321Sdamien	rt2661_bbp_write(sc, 84, 0x40);
2681156321Sdamien
2682156321Sdamien	/* save current BBP registers values */
2683156321Sdamien	sc->bbp18 = rt2661_bbp_read(sc, 18);
2684156321Sdamien	sc->bbp21 = rt2661_bbp_read(sc, 21);
2685156321Sdamien	sc->bbp22 = rt2661_bbp_read(sc, 22);
2686156321Sdamien	sc->bbp16 = rt2661_bbp_read(sc, 16);
2687156321Sdamien	sc->bbp17 = rt2661_bbp_read(sc, 17);
2688156321Sdamien	sc->bbp64 = rt2661_bbp_read(sc, 64);
2689156321Sdamien
2690156321Sdamien	rt2661_bbp_write(sc, 18, 0xff);
2691156321Sdamien	rt2661_bbp_write(sc, 21, 0x3f);
2692156321Sdamien	rt2661_bbp_write(sc, 22, 0x3f);
2693156321Sdamien	rt2661_bbp_write(sc, 16, 0xbd);
2694156321Sdamien	rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2695156321Sdamien	rt2661_bbp_write(sc, 64, 0x21);
2696156321Sdamien
2697156321Sdamien	/* restore Rx filter */
2698156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2699156321Sdamien}
2700156321Sdamien
2701156321Sdamienstatic int
2702156321Sdamienrt2661_radar_stop(struct rt2661_softc *sc)
2703156321Sdamien{
2704156321Sdamien	uint8_t bbp66;
2705156321Sdamien
2706156321Sdamien	/* read radar detection result */
2707156321Sdamien	bbp66 = rt2661_bbp_read(sc, 66);
2708156321Sdamien
2709156321Sdamien	/* restore BBP registers values */
2710156321Sdamien	rt2661_bbp_write(sc, 16, sc->bbp16);
2711156321Sdamien	rt2661_bbp_write(sc, 17, sc->bbp17);
2712156321Sdamien	rt2661_bbp_write(sc, 18, sc->bbp18);
2713156321Sdamien	rt2661_bbp_write(sc, 21, sc->bbp21);
2714156321Sdamien	rt2661_bbp_write(sc, 22, sc->bbp22);
2715156321Sdamien	rt2661_bbp_write(sc, 64, sc->bbp64);
2716156321Sdamien
2717156321Sdamien	return bbp66 == 1;
2718156321Sdamien}
2719156321Sdamien#endif
2720156321Sdamien
2721156321Sdamienstatic int
2722178354Ssamrt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap)
2723156321Sdamien{
2724178354Ssam	struct ieee80211com *ic = vap->iv_ic;
2725156321Sdamien	struct ieee80211_beacon_offsets bo;
2726156321Sdamien	struct rt2661_tx_desc desc;
2727156321Sdamien	struct mbuf *m0;
2728156321Sdamien	int rate;
2729156321Sdamien
2730178354Ssam	m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo);
2731156321Sdamien	if (m0 == NULL) {
2732156321Sdamien		device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2733156321Sdamien		return ENOBUFS;
2734156321Sdamien	}
2735156321Sdamien
2736156321Sdamien	/* send beacons at the lowest available rate */
2737178354Ssam	rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2;
2738156321Sdamien
2739156321Sdamien	rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2740156321Sdamien	    m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2741156321Sdamien
2742156321Sdamien	/* copy the first 24 bytes of Tx descriptor into NIC memory */
2743156321Sdamien	RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2744156321Sdamien
2745156321Sdamien	/* copy beacon header and payload into NIC memory */
2746156321Sdamien	RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2747156321Sdamien	    mtod(m0, uint8_t *), m0->m_pkthdr.len);
2748156321Sdamien
2749156321Sdamien	m_freem(m0);
2750156321Sdamien
2751156321Sdamien	return 0;
2752156321Sdamien}
2753156321Sdamien
2754156321Sdamien/*
2755156321Sdamien * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2756156321Sdamien * and HostAP operating modes.
2757156321Sdamien */
2758156321Sdamienstatic void
2759156321Sdamienrt2661_enable_tsf_sync(struct rt2661_softc *sc)
2760156321Sdamien{
2761178354Ssam	struct ifnet *ifp = sc->sc_ifp;
2762178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2763178354Ssam	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2764156321Sdamien	uint32_t tmp;
2765156321Sdamien
2766178354Ssam	if (vap->iv_opmode != IEEE80211_M_STA) {
2767156321Sdamien		/*
2768156321Sdamien		 * Change default 16ms TBTT adjustment to 8ms.
2769156321Sdamien		 * Must be done before enabling beacon generation.
2770156321Sdamien		 */
2771156321Sdamien		RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2772156321Sdamien	}
2773156321Sdamien
2774156321Sdamien	tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2775156321Sdamien
2776156321Sdamien	/* set beacon interval (in 1/16ms unit) */
2777178354Ssam	tmp |= vap->iv_bss->ni_intval * 16;
2778156321Sdamien
2779156321Sdamien	tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2780178354Ssam	if (vap->iv_opmode == IEEE80211_M_STA)
2781156321Sdamien		tmp |= RT2661_TSF_MODE(1);
2782156321Sdamien	else
2783156321Sdamien		tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2784156321Sdamien
2785156321Sdamien	RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2786156321Sdamien}
2787156321Sdamien
2788192468Ssamstatic void
2789192468Ssamrt2661_enable_tsf(struct rt2661_softc *sc)
2790192468Ssam{
2791192468Ssam	RAL_WRITE(sc, RT2661_TXRX_CSR9,
2792192468Ssam	      (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000)
2793192468Ssam	    | RT2661_TSF_TICKING | RT2661_TSF_MODE(2));
2794192468Ssam}
2795192468Ssam
2796156321Sdamien/*
2797156321Sdamien * Retrieve the "Received Signal Strength Indicator" from the raw values
2798156321Sdamien * contained in Rx descriptors.  The computation depends on which band the
2799156321Sdamien * frame was received.  Correction values taken from the reference driver.
2800156321Sdamien */
2801156321Sdamienstatic int
2802156321Sdamienrt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2803156321Sdamien{
2804156321Sdamien	int lna, agc, rssi;
2805156321Sdamien
2806156321Sdamien	lna = (raw >> 5) & 0x3;
2807156321Sdamien	agc = raw & 0x1f;
2808156321Sdamien
2809170530Ssam	if (lna == 0) {
2810170530Ssam		/*
2811170530Ssam		 * No mapping available.
2812170530Ssam		 *
2813170530Ssam		 * NB: Since RSSI is relative to noise floor, -1 is
2814170530Ssam		 *     adequate for caller to know error happened.
2815170530Ssam		 */
2816170530Ssam		return -1;
2817170530Ssam	}
2818156321Sdamien
2819170530Ssam	rssi = (2 * agc) - RT2661_NOISE_FLOOR;
2820170530Ssam
2821156321Sdamien	if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2822156321Sdamien		rssi += sc->rssi_2ghz_corr;
2823156321Sdamien
2824156321Sdamien		if (lna == 1)
2825156321Sdamien			rssi -= 64;
2826156321Sdamien		else if (lna == 2)
2827156321Sdamien			rssi -= 74;
2828156321Sdamien		else if (lna == 3)
2829156321Sdamien			rssi -= 90;
2830156321Sdamien	} else {
2831156321Sdamien		rssi += sc->rssi_5ghz_corr;
2832156321Sdamien
2833156321Sdamien		if (lna == 1)
2834156321Sdamien			rssi -= 64;
2835156321Sdamien		else if (lna == 2)
2836156321Sdamien			rssi -= 86;
2837156321Sdamien		else if (lna == 3)
2838156321Sdamien			rssi -= 100;
2839156321Sdamien	}
2840156321Sdamien	return rssi;
2841156321Sdamien}
2842170530Ssam
2843170530Ssamstatic void
2844170530Ssamrt2661_scan_start(struct ieee80211com *ic)
2845170530Ssam{
2846170530Ssam	struct ifnet *ifp = ic->ic_ifp;
2847170530Ssam	struct rt2661_softc *sc = ifp->if_softc;
2848170530Ssam	uint32_t tmp;
2849170530Ssam
2850170530Ssam	/* abort TSF synchronization */
2851170530Ssam	tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
2852170530Ssam	RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff);
2853170530Ssam	rt2661_set_bssid(sc, ifp->if_broadcastaddr);
2854170530Ssam}
2855170530Ssam
2856170530Ssamstatic void
2857170530Ssamrt2661_scan_end(struct ieee80211com *ic)
2858170530Ssam{
2859170530Ssam	struct ifnet *ifp = ic->ic_ifp;
2860170530Ssam	struct rt2661_softc *sc = ifp->if_softc;
2861178354Ssam	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2862170530Ssam
2863170530Ssam	rt2661_enable_tsf_sync(sc);
2864170530Ssam	/* XXX keep local copy */
2865178354Ssam	rt2661_set_bssid(sc, vap->iv_bss->ni_bssid);
2866170530Ssam}
2867170530Ssam
2868170530Ssamstatic void
2869170530Ssamrt2661_set_channel(struct ieee80211com *ic)
2870170530Ssam{
2871170530Ssam	struct ifnet *ifp = ic->ic_ifp;
2872170530Ssam	struct rt2661_softc *sc = ifp->if_softc;
2873170530Ssam
2874170530Ssam	RAL_LOCK(sc);
2875170530Ssam	rt2661_set_chan(sc, ic->ic_curchan);
2876170530Ssam	RAL_UNLOCK(sc);
2877170530Ssam
2878170530Ssam}
2879