rt2661.c revision 178958
1156321Sdamien/* $FreeBSD: head/sys/dev/ral/rt2661.c 178958 2008-05-12 00:32:52Z sam $ */ 2156321Sdamien 3156321Sdamien/*- 4156321Sdamien * Copyright (c) 2006 5156321Sdamien * Damien Bergamini <damien.bergamini@free.fr> 6156321Sdamien * 7156321Sdamien * Permission to use, copy, modify, and distribute this software for any 8156321Sdamien * purpose with or without fee is hereby granted, provided that the above 9156321Sdamien * copyright notice and this permission notice appear in all copies. 10156321Sdamien * 11156321Sdamien * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12156321Sdamien * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13156321Sdamien * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14156321Sdamien * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15156321Sdamien * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16156321Sdamien * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17156321Sdamien * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18156321Sdamien */ 19156321Sdamien 20156321Sdamien#include <sys/cdefs.h> 21156321Sdamien__FBSDID("$FreeBSD: head/sys/dev/ral/rt2661.c 178958 2008-05-12 00:32:52Z sam $"); 22156321Sdamien 23156321Sdamien/*- 24156321Sdamien * Ralink Technology RT2561, RT2561S and RT2661 chipset driver 25156321Sdamien * http://www.ralinktech.com/ 26156321Sdamien */ 27156321Sdamien 28156321Sdamien#include <sys/param.h> 29156321Sdamien#include <sys/sysctl.h> 30156321Sdamien#include <sys/sockio.h> 31156321Sdamien#include <sys/mbuf.h> 32156321Sdamien#include <sys/kernel.h> 33156321Sdamien#include <sys/socket.h> 34156321Sdamien#include <sys/systm.h> 35156321Sdamien#include <sys/malloc.h> 36164982Skevlo#include <sys/lock.h> 37164982Skevlo#include <sys/mutex.h> 38156321Sdamien#include <sys/module.h> 39156321Sdamien#include <sys/bus.h> 40156321Sdamien#include <sys/endian.h> 41178354Ssam#include <sys/firmware.h> 42156321Sdamien 43156321Sdamien#include <machine/bus.h> 44156321Sdamien#include <machine/resource.h> 45156321Sdamien#include <sys/rman.h> 46156321Sdamien 47156321Sdamien#include <net/bpf.h> 48156321Sdamien#include <net/if.h> 49156321Sdamien#include <net/if_arp.h> 50156321Sdamien#include <net/ethernet.h> 51156321Sdamien#include <net/if_dl.h> 52156321Sdamien#include <net/if_media.h> 53156321Sdamien#include <net/if_types.h> 54156321Sdamien 55156321Sdamien#include <net80211/ieee80211_var.h> 56178354Ssam#include <net80211/ieee80211_phy.h> 57156321Sdamien#include <net80211/ieee80211_radiotap.h> 58170530Ssam#include <net80211/ieee80211_regdomain.h> 59178354Ssam#include <net80211/ieee80211_amrr.h> 60156321Sdamien 61156321Sdamien#include <netinet/in.h> 62156321Sdamien#include <netinet/in_systm.h> 63156321Sdamien#include <netinet/in_var.h> 64156321Sdamien#include <netinet/ip.h> 65156321Sdamien#include <netinet/if_ether.h> 66156321Sdamien 67156327Ssilby#include <dev/ral/rt2661reg.h> 68156327Ssilby#include <dev/ral/rt2661var.h> 69156321Sdamien 70178354Ssam#define RAL_DEBUG 71156321Sdamien#ifdef RAL_DEBUG 72178354Ssam#define DPRINTF(sc, fmt, ...) do { \ 73178354Ssam if (sc->sc_debug > 0) \ 74178354Ssam printf(fmt, __VA_ARGS__); \ 75178354Ssam} while (0) 76178354Ssam#define DPRINTFN(sc, n, fmt, ...) do { \ 77178354Ssam if (sc->sc_debug >= (n)) \ 78178354Ssam printf(fmt, __VA_ARGS__); \ 79178354Ssam} while (0) 80156321Sdamien#else 81178354Ssam#define DPRINTF(sc, fmt, ...) 82178354Ssam#define DPRINTFN(sc, n, fmt, ...) 83156321Sdamien#endif 84156321Sdamien 85178354Ssamstatic struct ieee80211vap *rt2661_vap_create(struct ieee80211com *, 86178354Ssam const char name[IFNAMSIZ], int unit, int opmode, 87178354Ssam int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 88178354Ssam const uint8_t mac[IEEE80211_ADDR_LEN]); 89178354Ssamstatic void rt2661_vap_delete(struct ieee80211vap *); 90156321Sdamienstatic void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int, 91156321Sdamien int); 92156321Sdamienstatic int rt2661_alloc_tx_ring(struct rt2661_softc *, 93156321Sdamien struct rt2661_tx_ring *, int); 94156321Sdamienstatic void rt2661_reset_tx_ring(struct rt2661_softc *, 95156321Sdamien struct rt2661_tx_ring *); 96156321Sdamienstatic void rt2661_free_tx_ring(struct rt2661_softc *, 97156321Sdamien struct rt2661_tx_ring *); 98156321Sdamienstatic int rt2661_alloc_rx_ring(struct rt2661_softc *, 99156321Sdamien struct rt2661_rx_ring *, int); 100156321Sdamienstatic void rt2661_reset_rx_ring(struct rt2661_softc *, 101156321Sdamien struct rt2661_rx_ring *); 102156321Sdamienstatic void rt2661_free_rx_ring(struct rt2661_softc *, 103156321Sdamien struct rt2661_rx_ring *); 104156321Sdamienstatic struct ieee80211_node *rt2661_node_alloc( 105156321Sdamien struct ieee80211_node_table *); 106178354Ssamstatic void rt2661_newassoc(struct ieee80211_node *, int); 107178354Ssamstatic int rt2661_newstate(struct ieee80211vap *, 108156321Sdamien enum ieee80211_state, int); 109156321Sdamienstatic uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t); 110156321Sdamienstatic void rt2661_rx_intr(struct rt2661_softc *); 111156321Sdamienstatic void rt2661_tx_intr(struct rt2661_softc *); 112156321Sdamienstatic void rt2661_tx_dma_intr(struct rt2661_softc *, 113156321Sdamien struct rt2661_tx_ring *); 114156321Sdamienstatic void rt2661_mcu_beacon_expire(struct rt2661_softc *); 115156321Sdamienstatic void rt2661_mcu_wakeup(struct rt2661_softc *); 116156321Sdamienstatic void rt2661_mcu_cmd_intr(struct rt2661_softc *); 117170530Ssamstatic void rt2661_scan_start(struct ieee80211com *); 118170530Ssamstatic void rt2661_scan_end(struct ieee80211com *); 119170530Ssamstatic void rt2661_set_channel(struct ieee80211com *); 120156321Sdamienstatic void rt2661_setup_tx_desc(struct rt2661_softc *, 121156321Sdamien struct rt2661_tx_desc *, uint32_t, uint16_t, int, 122156321Sdamien int, const bus_dma_segment_t *, int, int); 123156321Sdamienstatic int rt2661_tx_data(struct rt2661_softc *, struct mbuf *, 124156321Sdamien struct ieee80211_node *, int); 125156321Sdamienstatic int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *, 126156321Sdamien struct ieee80211_node *); 127178354Ssamstatic void rt2661_start_locked(struct ifnet *); 128156321Sdamienstatic void rt2661_start(struct ifnet *); 129178354Ssamstatic int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *, 130178354Ssam const struct ieee80211_bpf_params *); 131165352Sbmsstatic void rt2661_watchdog(void *); 132156321Sdamienstatic int rt2661_ioctl(struct ifnet *, u_long, caddr_t); 133156321Sdamienstatic void rt2661_bbp_write(struct rt2661_softc *, uint8_t, 134156321Sdamien uint8_t); 135156321Sdamienstatic uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t); 136156321Sdamienstatic void rt2661_rf_write(struct rt2661_softc *, uint8_t, 137156321Sdamien uint32_t); 138156321Sdamienstatic int rt2661_tx_cmd(struct rt2661_softc *, uint8_t, 139156321Sdamien uint16_t); 140156321Sdamienstatic void rt2661_select_antenna(struct rt2661_softc *); 141156321Sdamienstatic void rt2661_enable_mrr(struct rt2661_softc *); 142156321Sdamienstatic void rt2661_set_txpreamble(struct rt2661_softc *); 143156321Sdamienstatic void rt2661_set_basicrates(struct rt2661_softc *, 144156321Sdamien const struct ieee80211_rateset *); 145156321Sdamienstatic void rt2661_select_band(struct rt2661_softc *, 146156321Sdamien struct ieee80211_channel *); 147156321Sdamienstatic void rt2661_set_chan(struct rt2661_softc *, 148156321Sdamien struct ieee80211_channel *); 149156321Sdamienstatic void rt2661_set_bssid(struct rt2661_softc *, 150156321Sdamien const uint8_t *); 151156321Sdamienstatic void rt2661_set_macaddr(struct rt2661_softc *, 152156321Sdamien const uint8_t *); 153178354Ssamstatic void rt2661_update_promisc(struct ifnet *); 154156321Sdamienstatic int rt2661_wme_update(struct ieee80211com *) __unused; 155156321Sdamienstatic void rt2661_update_slot(struct ifnet *); 156156321Sdamienstatic const char *rt2661_get_rf(int); 157178354Ssamstatic void rt2661_read_eeprom(struct rt2661_softc *, 158178354Ssam struct ieee80211com *); 159156321Sdamienstatic int rt2661_bbp_init(struct rt2661_softc *); 160178354Ssamstatic void rt2661_init_locked(struct rt2661_softc *); 161156321Sdamienstatic void rt2661_init(void *); 162178354Ssamstatic void rt2661_stop_locked(struct rt2661_softc *); 163156321Sdamienstatic void rt2661_stop(void *); 164178354Ssamstatic int rt2661_load_microcode(struct rt2661_softc *); 165156321Sdamien#ifdef notyet 166156321Sdamienstatic void rt2661_rx_tune(struct rt2661_softc *); 167156321Sdamienstatic void rt2661_radar_start(struct rt2661_softc *); 168156321Sdamienstatic int rt2661_radar_stop(struct rt2661_softc *); 169156321Sdamien#endif 170178354Ssamstatic int rt2661_prepare_beacon(struct rt2661_softc *, 171178354Ssam struct ieee80211vap *); 172156321Sdamienstatic void rt2661_enable_tsf_sync(struct rt2661_softc *); 173156321Sdamienstatic int rt2661_get_rssi(struct rt2661_softc *, uint8_t); 174156321Sdamien 175156321Sdamienstatic const struct { 176156321Sdamien uint32_t reg; 177156321Sdamien uint32_t val; 178156321Sdamien} rt2661_def_mac[] = { 179156321Sdamien RT2661_DEF_MAC 180156321Sdamien}; 181156321Sdamien 182156321Sdamienstatic const struct { 183156321Sdamien uint8_t reg; 184156321Sdamien uint8_t val; 185156321Sdamien} rt2661_def_bbp[] = { 186156321Sdamien RT2661_DEF_BBP 187156321Sdamien}; 188156321Sdamien 189156321Sdamienstatic const struct rfprog { 190156321Sdamien uint8_t chan; 191156321Sdamien uint32_t r1, r2, r3, r4; 192156321Sdamien} rt2661_rf5225_1[] = { 193156321Sdamien RT2661_RF5225_1 194156321Sdamien}, rt2661_rf5225_2[] = { 195156321Sdamien RT2661_RF5225_2 196156321Sdamien}; 197156321Sdamien 198156321Sdamienint 199156321Sdamienrt2661_attach(device_t dev, int id) 200156321Sdamien{ 201156321Sdamien struct rt2661_softc *sc = device_get_softc(dev); 202178354Ssam struct ieee80211com *ic; 203156321Sdamien struct ifnet *ifp; 204156321Sdamien uint32_t val; 205178354Ssam int error, ac, ntries; 206178354Ssam uint8_t bands; 207156321Sdamien 208178354Ssam sc->sc_id = id; 209156321Sdamien sc->sc_dev = dev; 210156321Sdamien 211178354Ssam ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 212178354Ssam if (ifp == NULL) { 213178354Ssam device_printf(sc->sc_dev, "can not if_alloc()\n"); 214178354Ssam return ENOMEM; 215178354Ssam } 216178354Ssam ic = ifp->if_l2com; 217178354Ssam 218156321Sdamien mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 219156321Sdamien MTX_DEF | MTX_RECURSE); 220156321Sdamien 221165352Sbms callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); 222156321Sdamien 223156321Sdamien /* wait for NIC to initialize */ 224156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 225156321Sdamien if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0) 226156321Sdamien break; 227156321Sdamien DELAY(1000); 228156321Sdamien } 229156321Sdamien if (ntries == 1000) { 230156321Sdamien device_printf(sc->sc_dev, 231156321Sdamien "timeout waiting for NIC to initialize\n"); 232156321Sdamien error = EIO; 233156321Sdamien goto fail1; 234156321Sdamien } 235156321Sdamien 236156321Sdamien /* retrieve RF rev. no and various other things from EEPROM */ 237178354Ssam rt2661_read_eeprom(sc, ic); 238156321Sdamien 239156321Sdamien device_printf(dev, "MAC/BBP RT%X, RF %s\n", val, 240156321Sdamien rt2661_get_rf(sc->rf_rev)); 241156321Sdamien 242156321Sdamien /* 243156321Sdamien * Allocate Tx and Rx rings. 244156321Sdamien */ 245156321Sdamien for (ac = 0; ac < 4; ac++) { 246156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->txq[ac], 247156321Sdamien RT2661_TX_RING_COUNT); 248156321Sdamien if (error != 0) { 249156321Sdamien device_printf(sc->sc_dev, 250156321Sdamien "could not allocate Tx ring %d\n", ac); 251156321Sdamien goto fail2; 252156321Sdamien } 253156321Sdamien } 254156321Sdamien 255156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT); 256156321Sdamien if (error != 0) { 257156321Sdamien device_printf(sc->sc_dev, "could not allocate Mgt ring\n"); 258156321Sdamien goto fail2; 259156321Sdamien } 260156321Sdamien 261156321Sdamien error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT); 262156321Sdamien if (error != 0) { 263156321Sdamien device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 264156321Sdamien goto fail3; 265156321Sdamien } 266156321Sdamien 267156321Sdamien ifp->if_softc = sc; 268156321Sdamien if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 269156321Sdamien ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 270156321Sdamien ifp->if_init = rt2661_init; 271156321Sdamien ifp->if_ioctl = rt2661_ioctl; 272156321Sdamien ifp->if_start = rt2661_start; 273156321Sdamien IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 274156321Sdamien ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 275156321Sdamien IFQ_SET_READY(&ifp->if_snd); 276156321Sdamien 277156321Sdamien ic->ic_ifp = ifp; 278178354Ssam ic->ic_opmode = IEEE80211_M_STA; 279156321Sdamien ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 280156321Sdamien 281156321Sdamien /* set device capabilities */ 282156321Sdamien ic->ic_caps = 283178957Ssam IEEE80211_C_STA /* station mode */ 284178957Ssam | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 285178354Ssam | IEEE80211_C_HOSTAP /* hostap mode */ 286178354Ssam | IEEE80211_C_MONITOR /* monitor mode */ 287178354Ssam | IEEE80211_C_AHDEMO /* adhoc demo mode */ 288178354Ssam | IEEE80211_C_WDS /* 4-address traffic works */ 289178354Ssam | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 290178354Ssam | IEEE80211_C_SHSLOT /* short slot time supported */ 291178354Ssam | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 292178354Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 293156407Sdamien#ifdef notyet 294178354Ssam | IEEE80211_C_TXFRAG /* handle tx frags */ 295178354Ssam | IEEE80211_C_WME /* 802.11e */ 296156407Sdamien#endif 297178354Ssam ; 298156321Sdamien 299170530Ssam bands = 0; 300170530Ssam setbit(&bands, IEEE80211_MODE_11B); 301170530Ssam setbit(&bands, IEEE80211_MODE_11G); 302170530Ssam if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) 303170530Ssam setbit(&bands, IEEE80211_MODE_11A); 304178354Ssam ieee80211_init_channels(ic, NULL, &bands); 305156321Sdamien 306156321Sdamien ieee80211_ifattach(ic); 307178354Ssam ic->ic_newassoc = rt2661_newassoc; 308156321Sdamien ic->ic_node_alloc = rt2661_node_alloc; 309178354Ssam#if 0 310178354Ssam ic->ic_wme.wme_update = rt2661_wme_update; 311178354Ssam#endif 312170530Ssam ic->ic_scan_start = rt2661_scan_start; 313170530Ssam ic->ic_scan_end = rt2661_scan_end; 314170530Ssam ic->ic_set_channel = rt2661_set_channel; 315156321Sdamien ic->ic_updateslot = rt2661_update_slot; 316178354Ssam ic->ic_update_promisc = rt2661_update_promisc; 317178354Ssam ic->ic_raw_xmit = rt2661_raw_xmit; 318156321Sdamien 319178354Ssam ic->ic_vap_create = rt2661_vap_create; 320178354Ssam ic->ic_vap_delete = rt2661_vap_delete; 321156321Sdamien 322178354Ssam sc->sc_rates = ieee80211_get_ratetable(ic->ic_curchan); 323156321Sdamien 324178354Ssam bpfattach(ifp, DLT_IEEE802_11_RADIO, 325178354Ssam sizeof (struct ieee80211_frame) + sizeof (sc->sc_txtap)); 326178354Ssam 327171086Skevlo sc->sc_rxtap_len = sizeof sc->sc_rxtap; 328156321Sdamien sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 329156321Sdamien sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2661_RX_RADIOTAP_PRESENT); 330156321Sdamien 331171086Skevlo sc->sc_txtap_len = sizeof sc->sc_txtap; 332156321Sdamien sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 333156321Sdamien sc->sc_txtap.wt_ihdr.it_present = htole32(RT2661_TX_RADIOTAP_PRESENT); 334156321Sdamien 335178354Ssam#ifdef RAL_DEBUG 336156321Sdamien SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 337178354Ssam SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 338178354Ssam "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 339178354Ssam#endif 340156321Sdamien if (bootverbose) 341156321Sdamien ieee80211_announce(ic); 342156321Sdamien 343156321Sdamien return 0; 344156321Sdamien 345156321Sdamienfail3: rt2661_free_tx_ring(sc, &sc->mgtq); 346156321Sdamienfail2: while (--ac >= 0) 347156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[ac]); 348156321Sdamienfail1: mtx_destroy(&sc->sc_mtx); 349178354Ssam if_free(ifp); 350156321Sdamien return error; 351156321Sdamien} 352156321Sdamien 353156321Sdamienint 354156321Sdamienrt2661_detach(void *xsc) 355156321Sdamien{ 356156321Sdamien struct rt2661_softc *sc = xsc; 357178354Ssam struct ifnet *ifp = sc->sc_ifp; 358178354Ssam struct ieee80211com *ic = ifp->if_l2com; 359170530Ssam 360178038Ssam RAL_LOCK(sc); 361178038Ssam rt2661_stop_locked(sc); 362178038Ssam RAL_UNLOCK(sc); 363156321Sdamien 364156321Sdamien bpfdetach(ifp); 365156321Sdamien ieee80211_ifdetach(ic); 366156321Sdamien 367156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[0]); 368156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[1]); 369156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[2]); 370156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[3]); 371156321Sdamien rt2661_free_tx_ring(sc, &sc->mgtq); 372156321Sdamien rt2661_free_rx_ring(sc, &sc->rxq); 373156321Sdamien 374156321Sdamien if_free(ifp); 375156321Sdamien 376156321Sdamien mtx_destroy(&sc->sc_mtx); 377156321Sdamien 378156321Sdamien return 0; 379156321Sdamien} 380156321Sdamien 381178354Ssamstatic struct ieee80211vap * 382178354Ssamrt2661_vap_create(struct ieee80211com *ic, 383178354Ssam const char name[IFNAMSIZ], int unit, int opmode, int flags, 384178354Ssam const uint8_t bssid[IEEE80211_ADDR_LEN], 385178354Ssam const uint8_t mac[IEEE80211_ADDR_LEN]) 386178354Ssam{ 387178354Ssam struct ifnet *ifp = ic->ic_ifp; 388178354Ssam struct rt2661_vap *rvp; 389178354Ssam struct ieee80211vap *vap; 390178354Ssam 391178354Ssam switch (opmode) { 392178354Ssam case IEEE80211_M_STA: 393178354Ssam case IEEE80211_M_IBSS: 394178354Ssam case IEEE80211_M_AHDEMO: 395178354Ssam case IEEE80211_M_MONITOR: 396178354Ssam case IEEE80211_M_HOSTAP: 397178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 398178354Ssam if_printf(ifp, "only 1 vap supported\n"); 399178354Ssam return NULL; 400178354Ssam } 401178354Ssam if (opmode == IEEE80211_M_STA) 402178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 403178354Ssam break; 404178354Ssam case IEEE80211_M_WDS: 405178354Ssam if (TAILQ_EMPTY(&ic->ic_vaps) || 406178354Ssam ic->ic_opmode != IEEE80211_M_HOSTAP) { 407178354Ssam if_printf(ifp, "wds only supported in ap mode\n"); 408178354Ssam return NULL; 409178354Ssam } 410178354Ssam /* 411178354Ssam * Silently remove any request for a unique 412178354Ssam * bssid; WDS vap's always share the local 413178354Ssam * mac address. 414178354Ssam */ 415178354Ssam flags &= ~IEEE80211_CLONE_BSSID; 416178354Ssam break; 417178354Ssam default: 418178354Ssam if_printf(ifp, "unknown opmode %d\n", opmode); 419178354Ssam return NULL; 420178354Ssam } 421178354Ssam rvp = (struct rt2661_vap *) malloc(sizeof(struct rt2661_vap), 422178354Ssam M_80211_VAP, M_NOWAIT | M_ZERO); 423178354Ssam if (rvp == NULL) 424178354Ssam return NULL; 425178354Ssam vap = &rvp->ral_vap; 426178354Ssam ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 427178354Ssam 428178354Ssam /* override state transition machine */ 429178354Ssam rvp->ral_newstate = vap->iv_newstate; 430178354Ssam vap->iv_newstate = rt2661_newstate; 431178354Ssam#if 0 432178354Ssam vap->iv_update_beacon = rt2661_beacon_update; 433178354Ssam#endif 434178354Ssam 435178354Ssam ieee80211_amrr_init(&rvp->amrr, vap, 436178354Ssam IEEE80211_AMRR_MIN_SUCCESS_THRESHOLD, 437178354Ssam IEEE80211_AMRR_MAX_SUCCESS_THRESHOLD, 438178354Ssam 500 /* ms */); 439178354Ssam 440178354Ssam /* complete setup */ 441178354Ssam ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status); 442178354Ssam if (TAILQ_FIRST(&ic->ic_vaps) == vap) 443178354Ssam ic->ic_opmode = opmode; 444178354Ssam return vap; 445178354Ssam} 446178354Ssam 447178354Ssamstatic void 448178354Ssamrt2661_vap_delete(struct ieee80211vap *vap) 449178354Ssam{ 450178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 451178354Ssam 452178354Ssam ieee80211_amrr_cleanup(&rvp->amrr); 453178354Ssam ieee80211_vap_detach(vap); 454178354Ssam free(rvp, M_80211_VAP); 455178354Ssam} 456178354Ssam 457156321Sdamienvoid 458156321Sdamienrt2661_shutdown(void *xsc) 459156321Sdamien{ 460156321Sdamien struct rt2661_softc *sc = xsc; 461156321Sdamien 462156321Sdamien rt2661_stop(sc); 463156321Sdamien} 464156321Sdamien 465156321Sdamienvoid 466156321Sdamienrt2661_suspend(void *xsc) 467156321Sdamien{ 468156321Sdamien struct rt2661_softc *sc = xsc; 469156321Sdamien 470156321Sdamien rt2661_stop(sc); 471156321Sdamien} 472156321Sdamien 473156321Sdamienvoid 474156321Sdamienrt2661_resume(void *xsc) 475156321Sdamien{ 476156321Sdamien struct rt2661_softc *sc = xsc; 477178354Ssam struct ifnet *ifp = sc->sc_ifp; 478156321Sdamien 479178354Ssam if (ifp->if_flags & IFF_UP) 480178354Ssam rt2661_init(sc); 481156321Sdamien} 482156321Sdamien 483156321Sdamienstatic void 484156321Sdamienrt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 485156321Sdamien{ 486156321Sdamien if (error != 0) 487156321Sdamien return; 488156321Sdamien 489156321Sdamien KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 490156321Sdamien 491156321Sdamien *(bus_addr_t *)arg = segs[0].ds_addr; 492156321Sdamien} 493156321Sdamien 494156321Sdamienstatic int 495156321Sdamienrt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring, 496156321Sdamien int count) 497156321Sdamien{ 498156321Sdamien int i, error; 499156321Sdamien 500156321Sdamien ring->count = count; 501156321Sdamien ring->queued = 0; 502156321Sdamien ring->cur = ring->next = ring->stat = 0; 503156321Sdamien 504171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 505171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 506171535Skevlo count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE, 507171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 508156321Sdamien if (error != 0) { 509156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 510156321Sdamien goto fail; 511156321Sdamien } 512156321Sdamien 513156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 514156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 515156321Sdamien if (error != 0) { 516156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 517156321Sdamien goto fail; 518156321Sdamien } 519156321Sdamien 520156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 521156321Sdamien count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 522156321Sdamien 0); 523156321Sdamien if (error != 0) { 524156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 525156321Sdamien goto fail; 526156321Sdamien } 527156321Sdamien 528156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF, 529156321Sdamien M_NOWAIT | M_ZERO); 530156321Sdamien if (ring->data == NULL) { 531156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 532156321Sdamien error = ENOMEM; 533156321Sdamien goto fail; 534156321Sdamien } 535156321Sdamien 536171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 537171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 538171535Skevlo RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 539156321Sdamien if (error != 0) { 540156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 541156321Sdamien goto fail; 542156321Sdamien } 543156321Sdamien 544156321Sdamien for (i = 0; i < count; i++) { 545156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, 546156321Sdamien &ring->data[i].map); 547156321Sdamien if (error != 0) { 548156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 549156321Sdamien goto fail; 550156321Sdamien } 551156321Sdamien } 552156321Sdamien 553156321Sdamien return 0; 554156321Sdamien 555156321Sdamienfail: rt2661_free_tx_ring(sc, ring); 556156321Sdamien return error; 557156321Sdamien} 558156321Sdamien 559156321Sdamienstatic void 560156321Sdamienrt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 561156321Sdamien{ 562156321Sdamien struct rt2661_tx_desc *desc; 563156321Sdamien struct rt2661_tx_data *data; 564156321Sdamien int i; 565156321Sdamien 566156321Sdamien for (i = 0; i < ring->count; i++) { 567156321Sdamien desc = &ring->desc[i]; 568156321Sdamien data = &ring->data[i]; 569156321Sdamien 570156321Sdamien if (data->m != NULL) { 571156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 572156321Sdamien BUS_DMASYNC_POSTWRITE); 573156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 574156321Sdamien m_freem(data->m); 575156321Sdamien data->m = NULL; 576156321Sdamien } 577156321Sdamien 578156321Sdamien if (data->ni != NULL) { 579156321Sdamien ieee80211_free_node(data->ni); 580156321Sdamien data->ni = NULL; 581156321Sdamien } 582156321Sdamien 583156321Sdamien desc->flags = 0; 584156321Sdamien } 585156321Sdamien 586156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 587156321Sdamien 588156321Sdamien ring->queued = 0; 589156321Sdamien ring->cur = ring->next = ring->stat = 0; 590156321Sdamien} 591156321Sdamien 592156321Sdamienstatic void 593156321Sdamienrt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 594156321Sdamien{ 595156321Sdamien struct rt2661_tx_data *data; 596156321Sdamien int i; 597156321Sdamien 598156321Sdamien if (ring->desc != NULL) { 599156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 600156321Sdamien BUS_DMASYNC_POSTWRITE); 601156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 602156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 603156321Sdamien } 604156321Sdamien 605156321Sdamien if (ring->desc_dmat != NULL) 606156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 607156321Sdamien 608156321Sdamien if (ring->data != NULL) { 609156321Sdamien for (i = 0; i < ring->count; i++) { 610156321Sdamien data = &ring->data[i]; 611156321Sdamien 612156321Sdamien if (data->m != NULL) { 613156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 614156321Sdamien BUS_DMASYNC_POSTWRITE); 615156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 616156321Sdamien m_freem(data->m); 617156321Sdamien } 618156321Sdamien 619156321Sdamien if (data->ni != NULL) 620156321Sdamien ieee80211_free_node(data->ni); 621156321Sdamien 622156321Sdamien if (data->map != NULL) 623156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 624156321Sdamien } 625156321Sdamien 626156321Sdamien free(ring->data, M_DEVBUF); 627156321Sdamien } 628156321Sdamien 629156321Sdamien if (ring->data_dmat != NULL) 630156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 631156321Sdamien} 632156321Sdamien 633156321Sdamienstatic int 634156321Sdamienrt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring, 635156321Sdamien int count) 636156321Sdamien{ 637156321Sdamien struct rt2661_rx_desc *desc; 638156321Sdamien struct rt2661_rx_data *data; 639156321Sdamien bus_addr_t physaddr; 640156321Sdamien int i, error; 641156321Sdamien 642156321Sdamien ring->count = count; 643156321Sdamien ring->cur = ring->next = 0; 644156321Sdamien 645171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 646171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 647171535Skevlo count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE, 648171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 649156321Sdamien if (error != 0) { 650156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 651156321Sdamien goto fail; 652156321Sdamien } 653156321Sdamien 654156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 655156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 656156321Sdamien if (error != 0) { 657156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 658156321Sdamien goto fail; 659156321Sdamien } 660156321Sdamien 661156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 662156321Sdamien count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 663156321Sdamien 0); 664156321Sdamien if (error != 0) { 665156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 666156321Sdamien goto fail; 667156321Sdamien } 668156321Sdamien 669156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF, 670156321Sdamien M_NOWAIT | M_ZERO); 671156321Sdamien if (ring->data == NULL) { 672156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 673156321Sdamien error = ENOMEM; 674156321Sdamien goto fail; 675156321Sdamien } 676156321Sdamien 677156321Sdamien /* 678156321Sdamien * Pre-allocate Rx buffers and populate Rx ring. 679156321Sdamien */ 680171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 681171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 682171535Skevlo 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 683156321Sdamien if (error != 0) { 684156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 685156321Sdamien goto fail; 686156321Sdamien } 687156321Sdamien 688156321Sdamien for (i = 0; i < count; i++) { 689156321Sdamien desc = &sc->rxq.desc[i]; 690156321Sdamien data = &sc->rxq.data[i]; 691156321Sdamien 692156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 693156321Sdamien if (error != 0) { 694156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 695156321Sdamien goto fail; 696156321Sdamien } 697156321Sdamien 698156321Sdamien data->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 699156321Sdamien if (data->m == NULL) { 700156321Sdamien device_printf(sc->sc_dev, 701156321Sdamien "could not allocate rx mbuf\n"); 702156321Sdamien error = ENOMEM; 703156321Sdamien goto fail; 704156321Sdamien } 705156321Sdamien 706156321Sdamien error = bus_dmamap_load(ring->data_dmat, data->map, 707156321Sdamien mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr, 708156321Sdamien &physaddr, 0); 709156321Sdamien if (error != 0) { 710156321Sdamien device_printf(sc->sc_dev, 711156321Sdamien "could not load rx buf DMA map"); 712156321Sdamien goto fail; 713156321Sdamien } 714156321Sdamien 715156321Sdamien desc->flags = htole32(RT2661_RX_BUSY); 716156321Sdamien desc->physaddr = htole32(physaddr); 717156321Sdamien } 718156321Sdamien 719156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 720156321Sdamien 721156321Sdamien return 0; 722156321Sdamien 723156321Sdamienfail: rt2661_free_rx_ring(sc, ring); 724156321Sdamien return error; 725156321Sdamien} 726156321Sdamien 727156321Sdamienstatic void 728156321Sdamienrt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 729156321Sdamien{ 730156321Sdamien int i; 731156321Sdamien 732156321Sdamien for (i = 0; i < ring->count; i++) 733156321Sdamien ring->desc[i].flags = htole32(RT2661_RX_BUSY); 734156321Sdamien 735156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 736156321Sdamien 737156321Sdamien ring->cur = ring->next = 0; 738156321Sdamien} 739156321Sdamien 740156321Sdamienstatic void 741156321Sdamienrt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 742156321Sdamien{ 743156321Sdamien struct rt2661_rx_data *data; 744156321Sdamien int i; 745156321Sdamien 746156321Sdamien if (ring->desc != NULL) { 747156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 748156321Sdamien BUS_DMASYNC_POSTWRITE); 749156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 750156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 751156321Sdamien } 752156321Sdamien 753156321Sdamien if (ring->desc_dmat != NULL) 754156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 755156321Sdamien 756156321Sdamien if (ring->data != NULL) { 757156321Sdamien for (i = 0; i < ring->count; i++) { 758156321Sdamien data = &ring->data[i]; 759156321Sdamien 760156321Sdamien if (data->m != NULL) { 761156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 762156321Sdamien BUS_DMASYNC_POSTREAD); 763156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 764156321Sdamien m_freem(data->m); 765156321Sdamien } 766156321Sdamien 767156321Sdamien if (data->map != NULL) 768156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 769156321Sdamien } 770156321Sdamien 771156321Sdamien free(ring->data, M_DEVBUF); 772156321Sdamien } 773156321Sdamien 774156321Sdamien if (ring->data_dmat != NULL) 775156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 776156321Sdamien} 777156321Sdamien 778156321Sdamienstatic struct ieee80211_node * 779156321Sdamienrt2661_node_alloc(struct ieee80211_node_table *nt) 780156321Sdamien{ 781156321Sdamien struct rt2661_node *rn; 782156321Sdamien 783156321Sdamien rn = malloc(sizeof (struct rt2661_node), M_80211_NODE, 784156321Sdamien M_NOWAIT | M_ZERO); 785156321Sdamien 786156321Sdamien return (rn != NULL) ? &rn->ni : NULL; 787156321Sdamien} 788156321Sdamien 789156321Sdamienstatic void 790178354Ssamrt2661_newassoc(struct ieee80211_node *ni, int isnew) 791156321Sdamien{ 792178354Ssam struct ieee80211vap *vap = ni->ni_vap; 793156321Sdamien 794178354Ssam ieee80211_amrr_node_init(&RT2661_VAP(vap)->amrr, 795178354Ssam &RT2661_NODE(ni)->amrr, ni); 796156321Sdamien} 797156321Sdamien 798156321Sdamienstatic int 799178354Ssamrt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 800156321Sdamien{ 801178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 802178354Ssam struct ieee80211com *ic = vap->iv_ic; 803156321Sdamien struct rt2661_softc *sc = ic->ic_ifp->if_softc; 804178354Ssam int error; 805156321Sdamien 806178354Ssam if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 807178354Ssam uint32_t tmp; 808156321Sdamien 809178354Ssam /* abort TSF synchronization */ 810178354Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 811178354Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); 812178354Ssam } 813156321Sdamien 814178354Ssam error = rvp->ral_newstate(vap, nstate, arg); 815156321Sdamien 816178354Ssam if (error == 0 && nstate == IEEE80211_S_RUN) { 817178354Ssam struct ieee80211_node *ni = vap->iv_bss; 818178354Ssam 819178354Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) { 820156321Sdamien rt2661_enable_mrr(sc); 821156321Sdamien rt2661_set_txpreamble(sc); 822156321Sdamien rt2661_set_basicrates(sc, &ni->ni_rates); 823156321Sdamien rt2661_set_bssid(sc, ni->ni_bssid); 824156321Sdamien } 825156321Sdamien 826178354Ssam if (vap->iv_opmode == IEEE80211_M_HOSTAP || 827178354Ssam vap->iv_opmode == IEEE80211_M_IBSS) { 828178354Ssam error = rt2661_prepare_beacon(sc, vap); 829178354Ssam if (error != 0) 830178354Ssam return error; 831156321Sdamien } 832178354Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) { 833178354Ssam if (vap->iv_opmode == IEEE80211_M_STA) { 834178354Ssam /* fake a join to init the tx rate */ 835178354Ssam rt2661_newassoc(ni, 1); 836178354Ssam } 837156321Sdamien rt2661_enable_tsf_sync(sc); 838156321Sdamien } 839178354Ssam } 840178354Ssam return error; 841156321Sdamien} 842156321Sdamien 843156321Sdamien/* 844156321Sdamien * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 845156321Sdamien * 93C66). 846156321Sdamien */ 847156321Sdamienstatic uint16_t 848156321Sdamienrt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr) 849156321Sdamien{ 850156321Sdamien uint32_t tmp; 851156321Sdamien uint16_t val; 852156321Sdamien int n; 853156321Sdamien 854156321Sdamien /* clock C once before the first command */ 855156321Sdamien RT2661_EEPROM_CTL(sc, 0); 856156321Sdamien 857156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 858156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 859156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 860156321Sdamien 861156321Sdamien /* write start bit (1) */ 862156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 863156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 864156321Sdamien 865156321Sdamien /* write READ opcode (10) */ 866156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 867156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 868156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 869156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 870156321Sdamien 871156321Sdamien /* write address (A5-A0 or A7-A0) */ 872156321Sdamien n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7; 873156321Sdamien for (; n >= 0; n--) { 874156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 875156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D)); 876156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 877156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C); 878156321Sdamien } 879156321Sdamien 880156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 881156321Sdamien 882156321Sdamien /* read data Q15-Q0 */ 883156321Sdamien val = 0; 884156321Sdamien for (n = 15; n >= 0; n--) { 885156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 886156321Sdamien tmp = RAL_READ(sc, RT2661_E2PROM_CSR); 887156321Sdamien val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n; 888156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 889156321Sdamien } 890156321Sdamien 891156321Sdamien RT2661_EEPROM_CTL(sc, 0); 892156321Sdamien 893156321Sdamien /* clear Chip Select and clock C */ 894156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 895156321Sdamien RT2661_EEPROM_CTL(sc, 0); 896156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_C); 897156321Sdamien 898156321Sdamien return val; 899156321Sdamien} 900156321Sdamien 901156321Sdamienstatic void 902156321Sdamienrt2661_tx_intr(struct rt2661_softc *sc) 903156321Sdamien{ 904178354Ssam struct ifnet *ifp = sc->sc_ifp; 905156321Sdamien struct rt2661_tx_ring *txq; 906156321Sdamien struct rt2661_tx_data *data; 907156321Sdamien struct rt2661_node *rn; 908156321Sdamien uint32_t val; 909156321Sdamien int qid, retrycnt; 910156321Sdamien 911156321Sdamien for (;;) { 912170530Ssam struct ieee80211_node *ni; 913170530Ssam struct mbuf *m; 914170530Ssam 915156321Sdamien val = RAL_READ(sc, RT2661_STA_CSR4); 916156321Sdamien if (!(val & RT2661_TX_STAT_VALID)) 917156321Sdamien break; 918156321Sdamien 919156321Sdamien /* retrieve the queue in which this frame was sent */ 920156321Sdamien qid = RT2661_TX_QID(val); 921156321Sdamien txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq; 922156321Sdamien 923156321Sdamien /* retrieve rate control algorithm context */ 924156321Sdamien data = &txq->data[txq->stat]; 925170530Ssam m = data->m; 926170530Ssam data->m = NULL; 927170530Ssam ni = data->ni; 928170530Ssam data->ni = NULL; 929156321Sdamien 930159301Sfjoe /* if no frame has been sent, ignore */ 931170530Ssam if (ni == NULL) 932159301Sfjoe continue; 933159301Sfjoe 934178354Ssam rn = RT2661_NODE(ni); 935170530Ssam 936156321Sdamien switch (RT2661_TX_RESULT(val)) { 937156321Sdamien case RT2661_TX_SUCCESS: 938156321Sdamien retrycnt = RT2661_TX_RETRYCNT(val); 939156321Sdamien 940178354Ssam DPRINTFN(sc, 10, "data frame sent successfully after " 941178354Ssam "%d retries\n", retrycnt); 942178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 943178354Ssam ieee80211_amrr_tx_complete(&rn->amrr, 944178354Ssam IEEE80211_AMRR_SUCCESS, retrycnt); 945156321Sdamien ifp->if_opackets++; 946156321Sdamien break; 947156321Sdamien 948156321Sdamien case RT2661_TX_RETRY_FAIL: 949178354Ssam retrycnt = RT2661_TX_RETRYCNT(val); 950178354Ssam 951178354Ssam DPRINTFN(sc, 9, "%s\n", 952178354Ssam "sending data frame failed (too much retries)"); 953178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 954178354Ssam ieee80211_amrr_tx_complete(&rn->amrr, 955178354Ssam IEEE80211_AMRR_FAILURE, retrycnt); 956156321Sdamien ifp->if_oerrors++; 957156321Sdamien break; 958156321Sdamien 959156321Sdamien default: 960156321Sdamien /* other failure */ 961156321Sdamien device_printf(sc->sc_dev, 962156321Sdamien "sending data frame failed 0x%08x\n", val); 963156321Sdamien ifp->if_oerrors++; 964156321Sdamien } 965156321Sdamien 966178354Ssam DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat); 967156321Sdamien 968156321Sdamien txq->queued--; 969156321Sdamien if (++txq->stat >= txq->count) /* faster than % count */ 970156321Sdamien txq->stat = 0; 971170530Ssam 972170530Ssam if (m->m_flags & M_TXCB) 973170530Ssam ieee80211_process_callback(ni, m, 974170530Ssam RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS); 975170530Ssam m_freem(m); 976170530Ssam ieee80211_free_node(ni); 977156321Sdamien } 978156321Sdamien 979156321Sdamien sc->sc_tx_timer = 0; 980156321Sdamien ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 981178354Ssam 982178354Ssam rt2661_start_locked(ifp); 983156321Sdamien} 984156321Sdamien 985156321Sdamienstatic void 986156321Sdamienrt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq) 987156321Sdamien{ 988156321Sdamien struct rt2661_tx_desc *desc; 989156321Sdamien struct rt2661_tx_data *data; 990156321Sdamien 991156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD); 992156321Sdamien 993156321Sdamien for (;;) { 994156321Sdamien desc = &txq->desc[txq->next]; 995156321Sdamien data = &txq->data[txq->next]; 996156321Sdamien 997156321Sdamien if ((le32toh(desc->flags) & RT2661_TX_BUSY) || 998156321Sdamien !(le32toh(desc->flags) & RT2661_TX_VALID)) 999156321Sdamien break; 1000156321Sdamien 1001156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, 1002156321Sdamien BUS_DMASYNC_POSTWRITE); 1003156321Sdamien bus_dmamap_unload(txq->data_dmat, data->map); 1004156321Sdamien 1005156321Sdamien /* descriptor is no longer valid */ 1006156321Sdamien desc->flags &= ~htole32(RT2661_TX_VALID); 1007156321Sdamien 1008178354Ssam DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next); 1009156321Sdamien 1010156321Sdamien if (++txq->next >= txq->count) /* faster than % count */ 1011156321Sdamien txq->next = 0; 1012156321Sdamien } 1013156321Sdamien 1014156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1015156321Sdamien} 1016156321Sdamien 1017156321Sdamienstatic void 1018156321Sdamienrt2661_rx_intr(struct rt2661_softc *sc) 1019156321Sdamien{ 1020178354Ssam struct ifnet *ifp = sc->sc_ifp; 1021178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1022156321Sdamien struct rt2661_rx_desc *desc; 1023156321Sdamien struct rt2661_rx_data *data; 1024156321Sdamien bus_addr_t physaddr; 1025156321Sdamien struct ieee80211_frame *wh; 1026156321Sdamien struct ieee80211_node *ni; 1027156321Sdamien struct mbuf *mnew, *m; 1028156321Sdamien int error; 1029156321Sdamien 1030156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1031156321Sdamien BUS_DMASYNC_POSTREAD); 1032156321Sdamien 1033156321Sdamien for (;;) { 1034170530Ssam int rssi; 1035170530Ssam 1036156321Sdamien desc = &sc->rxq.desc[sc->rxq.cur]; 1037156321Sdamien data = &sc->rxq.data[sc->rxq.cur]; 1038156321Sdamien 1039156321Sdamien if (le32toh(desc->flags) & RT2661_RX_BUSY) 1040156321Sdamien break; 1041156321Sdamien 1042156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) || 1043156321Sdamien (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) { 1044156321Sdamien /* 1045156321Sdamien * This should not happen since we did not request 1046156321Sdamien * to receive those frames when we filled TXRX_CSR0. 1047156321Sdamien */ 1048178354Ssam DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 1049178354Ssam le32toh(desc->flags)); 1050156321Sdamien ifp->if_ierrors++; 1051156321Sdamien goto skip; 1052156321Sdamien } 1053156321Sdamien 1054156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) { 1055156321Sdamien ifp->if_ierrors++; 1056156321Sdamien goto skip; 1057156321Sdamien } 1058156321Sdamien 1059156321Sdamien /* 1060156321Sdamien * Try to allocate a new mbuf for this ring element and load it 1061156321Sdamien * before processing the current mbuf. If the ring element 1062156321Sdamien * cannot be loaded, drop the received packet and reuse the old 1063156321Sdamien * mbuf. In the unlikely case that the old mbuf can't be 1064156321Sdamien * reloaded either, explicitly panic. 1065156321Sdamien */ 1066156321Sdamien mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1067156321Sdamien if (mnew == NULL) { 1068156321Sdamien ifp->if_ierrors++; 1069156321Sdamien goto skip; 1070156321Sdamien } 1071156321Sdamien 1072156321Sdamien bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1073156321Sdamien BUS_DMASYNC_POSTREAD); 1074156321Sdamien bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1075156321Sdamien 1076156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1077156321Sdamien mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr, 1078156321Sdamien &physaddr, 0); 1079156321Sdamien if (error != 0) { 1080156321Sdamien m_freem(mnew); 1081156321Sdamien 1082156321Sdamien /* try to reload the old mbuf */ 1083156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1084156321Sdamien mtod(data->m, void *), MCLBYTES, 1085156321Sdamien rt2661_dma_map_addr, &physaddr, 0); 1086156321Sdamien if (error != 0) { 1087156321Sdamien /* very unlikely that it will fail... */ 1088156321Sdamien panic("%s: could not load old rx mbuf", 1089156321Sdamien device_get_name(sc->sc_dev)); 1090156321Sdamien } 1091156321Sdamien ifp->if_ierrors++; 1092156321Sdamien goto skip; 1093156321Sdamien } 1094156321Sdamien 1095156321Sdamien /* 1096156321Sdamien * New mbuf successfully loaded, update Rx ring and continue 1097156321Sdamien * processing. 1098156321Sdamien */ 1099156321Sdamien m = data->m; 1100156321Sdamien data->m = mnew; 1101156321Sdamien desc->physaddr = htole32(physaddr); 1102156321Sdamien 1103156321Sdamien /* finalize mbuf */ 1104156321Sdamien m->m_pkthdr.rcvif = ifp; 1105156321Sdamien m->m_pkthdr.len = m->m_len = 1106156321Sdamien (le32toh(desc->flags) >> 16) & 0xfff; 1107156321Sdamien 1108170530Ssam rssi = rt2661_get_rssi(sc, desc->rssi); 1109170530Ssam 1110178354Ssam if (bpf_peers_present(ifp->if_bpf)) { 1111156321Sdamien struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap; 1112156321Sdamien uint32_t tsf_lo, tsf_hi; 1113156321Sdamien 1114156321Sdamien /* get timestamp (low and high 32 bits) */ 1115156321Sdamien tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13); 1116156321Sdamien tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12); 1117156321Sdamien 1118156321Sdamien tap->wr_tsf = 1119156321Sdamien htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1120156321Sdamien tap->wr_flags = 0; 1121178354Ssam tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1122178958Ssam (desc->flags & htole32(RT2661_RX_OFDM)) ? 1123178958Ssam IEEE80211_T_OFDM : IEEE80211_T_CCK); 1124170530Ssam tap->wr_antsignal = rssi < 0 ? 0 : rssi; 1125156321Sdamien 1126178354Ssam bpf_mtap2(ifp->if_bpf, tap, sc->sc_rxtap_len, m); 1127156321Sdamien } 1128170530Ssam sc->sc_flags |= RAL_INPUT_RUNNING; 1129170530Ssam RAL_UNLOCK(sc); 1130156321Sdamien wh = mtod(m, struct ieee80211_frame *); 1131178354Ssam 1132178354Ssam /* send the frame to the 802.11 layer */ 1133156321Sdamien ni = ieee80211_find_rxnode(ic, 1134156321Sdamien (struct ieee80211_frame_min *)wh); 1135178354Ssam if (ni != NULL) { 1136178354Ssam /* Error happened during RSSI conversion. */ 1137178354Ssam if (rssi < 0) 1138178354Ssam rssi = -30; /* XXX ignored by net80211 */ 1139156321Sdamien 1140178354Ssam (void) ieee80211_input(ni, m, rssi, 1141178354Ssam RT2661_NOISE_FLOOR, 0); 1142178354Ssam ieee80211_free_node(ni); 1143178354Ssam } else 1144178354Ssam (void) ieee80211_input_all(ic, m, rssi, 1145178354Ssam RT2661_NOISE_FLOOR, 0); 1146170530Ssam 1147170530Ssam RAL_LOCK(sc); 1148170530Ssam sc->sc_flags &= ~RAL_INPUT_RUNNING; 1149156321Sdamien 1150156321Sdamienskip: desc->flags |= htole32(RT2661_RX_BUSY); 1151156321Sdamien 1152178354Ssam DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur); 1153156321Sdamien 1154156321Sdamien sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT; 1155156321Sdamien } 1156156321Sdamien 1157156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1158156321Sdamien BUS_DMASYNC_PREWRITE); 1159156321Sdamien} 1160156321Sdamien 1161156321Sdamien/* ARGSUSED */ 1162156321Sdamienstatic void 1163156321Sdamienrt2661_mcu_beacon_expire(struct rt2661_softc *sc) 1164156321Sdamien{ 1165156321Sdamien /* do nothing */ 1166156321Sdamien} 1167156321Sdamien 1168156321Sdamienstatic void 1169156321Sdamienrt2661_mcu_wakeup(struct rt2661_softc *sc) 1170156321Sdamien{ 1171156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); 1172156321Sdamien 1173156321Sdamien RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); 1174156321Sdamien RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); 1175156321Sdamien RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); 1176156321Sdamien 1177156321Sdamien /* send wakeup command to MCU */ 1178156321Sdamien rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0); 1179156321Sdamien} 1180156321Sdamien 1181156321Sdamienstatic void 1182156321Sdamienrt2661_mcu_cmd_intr(struct rt2661_softc *sc) 1183156321Sdamien{ 1184156321Sdamien RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR); 1185156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 1186156321Sdamien} 1187156321Sdamien 1188156321Sdamienvoid 1189156321Sdamienrt2661_intr(void *arg) 1190156321Sdamien{ 1191156321Sdamien struct rt2661_softc *sc = arg; 1192156975Sdamien struct ifnet *ifp = sc->sc_ifp; 1193156321Sdamien uint32_t r1, r2; 1194156321Sdamien 1195156321Sdamien RAL_LOCK(sc); 1196156321Sdamien 1197156321Sdamien /* disable MAC and MCU interrupts */ 1198156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); 1199156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 1200156321Sdamien 1201156975Sdamien /* don't re-enable interrupts if we're shutting down */ 1202156975Sdamien if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1203156975Sdamien RAL_UNLOCK(sc); 1204156975Sdamien return; 1205156975Sdamien } 1206156975Sdamien 1207156321Sdamien r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR); 1208156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); 1209156321Sdamien 1210156321Sdamien r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR); 1211156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); 1212156321Sdamien 1213156321Sdamien if (r1 & RT2661_MGT_DONE) 1214156321Sdamien rt2661_tx_dma_intr(sc, &sc->mgtq); 1215156321Sdamien 1216156321Sdamien if (r1 & RT2661_RX_DONE) 1217156321Sdamien rt2661_rx_intr(sc); 1218156321Sdamien 1219156321Sdamien if (r1 & RT2661_TX0_DMA_DONE) 1220156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[0]); 1221156321Sdamien 1222156321Sdamien if (r1 & RT2661_TX1_DMA_DONE) 1223156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[1]); 1224156321Sdamien 1225156321Sdamien if (r1 & RT2661_TX2_DMA_DONE) 1226156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[2]); 1227156321Sdamien 1228156321Sdamien if (r1 & RT2661_TX3_DMA_DONE) 1229156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[3]); 1230156321Sdamien 1231156321Sdamien if (r1 & RT2661_TX_DONE) 1232156321Sdamien rt2661_tx_intr(sc); 1233156321Sdamien 1234156321Sdamien if (r2 & RT2661_MCU_CMD_DONE) 1235156321Sdamien rt2661_mcu_cmd_intr(sc); 1236156321Sdamien 1237156321Sdamien if (r2 & RT2661_MCU_BEACON_EXPIRE) 1238156321Sdamien rt2661_mcu_beacon_expire(sc); 1239156321Sdamien 1240156321Sdamien if (r2 & RT2661_MCU_WAKEUP) 1241156321Sdamien rt2661_mcu_wakeup(sc); 1242156321Sdamien 1243156321Sdamien /* re-enable MAC and MCU interrupts */ 1244156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 1245156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 1246156321Sdamien 1247156321Sdamien RAL_UNLOCK(sc); 1248156321Sdamien} 1249156321Sdamien 1250178958Ssamstatic uint8_t 1251178958Ssamrt2661_plcp_signal(int rate) 1252178958Ssam{ 1253178958Ssam switch (rate) { 1254178958Ssam /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1255178958Ssam case 12: return 0xb; 1256178958Ssam case 18: return 0xf; 1257178958Ssam case 24: return 0xa; 1258178958Ssam case 36: return 0xe; 1259178958Ssam case 48: return 0x9; 1260178958Ssam case 72: return 0xd; 1261178958Ssam case 96: return 0x8; 1262178958Ssam case 108: return 0xc; 1263178958Ssam 1264178958Ssam /* CCK rates (NB: not IEEE std, device-specific) */ 1265178958Ssam case 2: return 0x0; 1266178958Ssam case 4: return 0x1; 1267178958Ssam case 11: return 0x2; 1268178958Ssam case 22: return 0x3; 1269178958Ssam } 1270178958Ssam return 0xff; /* XXX unsupported/unknown rate */ 1271178958Ssam} 1272178958Ssam 1273156321Sdamienstatic void 1274156321Sdamienrt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc, 1275156321Sdamien uint32_t flags, uint16_t xflags, int len, int rate, 1276156321Sdamien const bus_dma_segment_t *segs, int nsegs, int ac) 1277156321Sdamien{ 1278178354Ssam struct ifnet *ifp = sc->sc_ifp; 1279178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1280156321Sdamien uint16_t plcp_length; 1281156321Sdamien int i, remainder; 1282156321Sdamien 1283156321Sdamien desc->flags = htole32(flags); 1284156321Sdamien desc->flags |= htole32(len << 16); 1285156321Sdamien desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID); 1286156321Sdamien 1287156321Sdamien desc->xflags = htole16(xflags); 1288156321Sdamien desc->xflags |= htole16(nsegs << 13); 1289156321Sdamien 1290156321Sdamien desc->wme = htole16( 1291156321Sdamien RT2661_QID(ac) | 1292156321Sdamien RT2661_AIFSN(2) | 1293156321Sdamien RT2661_LOGCWMIN(4) | 1294156321Sdamien RT2661_LOGCWMAX(10)); 1295156321Sdamien 1296156321Sdamien /* 1297156321Sdamien * Remember in which queue this frame was sent. This field is driver 1298156321Sdamien * private data only. It will be made available by the NIC in STA_CSR4 1299156321Sdamien * on Tx interrupts. 1300156321Sdamien */ 1301156321Sdamien desc->qid = ac; 1302156321Sdamien 1303156321Sdamien /* setup PLCP fields */ 1304178958Ssam desc->plcp_signal = rt2661_plcp_signal(rate); 1305156321Sdamien desc->plcp_service = 4; 1306156321Sdamien 1307156321Sdamien len += IEEE80211_CRC_LEN; 1308178354Ssam if (ieee80211_rate2phytype(sc->sc_rates, rate) == IEEE80211_T_OFDM) { 1309156321Sdamien desc->flags |= htole32(RT2661_TX_OFDM); 1310156321Sdamien 1311156321Sdamien plcp_length = len & 0xfff; 1312156321Sdamien desc->plcp_length_hi = plcp_length >> 6; 1313156321Sdamien desc->plcp_length_lo = plcp_length & 0x3f; 1314156321Sdamien } else { 1315156321Sdamien plcp_length = (16 * len + rate - 1) / rate; 1316156321Sdamien if (rate == 22) { 1317156321Sdamien remainder = (16 * len) % 22; 1318156321Sdamien if (remainder != 0 && remainder < 7) 1319156321Sdamien desc->plcp_service |= RT2661_PLCP_LENGEXT; 1320156321Sdamien } 1321156321Sdamien desc->plcp_length_hi = plcp_length >> 8; 1322156321Sdamien desc->plcp_length_lo = plcp_length & 0xff; 1323156321Sdamien 1324156321Sdamien if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1325156321Sdamien desc->plcp_signal |= 0x08; 1326156321Sdamien } 1327156321Sdamien 1328156321Sdamien /* RT2x61 supports scatter with up to 5 segments */ 1329156321Sdamien for (i = 0; i < nsegs; i++) { 1330156321Sdamien desc->addr[i] = htole32(segs[i].ds_addr); 1331156321Sdamien desc->len [i] = htole16(segs[i].ds_len); 1332156321Sdamien } 1333156321Sdamien} 1334156321Sdamien 1335156321Sdamienstatic int 1336156321Sdamienrt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0, 1337156321Sdamien struct ieee80211_node *ni) 1338156321Sdamien{ 1339178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1340178354Ssam struct ieee80211com *ic = ni->ni_ic; 1341178354Ssam struct ifnet *ifp = sc->sc_ifp; 1342156321Sdamien struct rt2661_tx_desc *desc; 1343156321Sdamien struct rt2661_tx_data *data; 1344156321Sdamien struct ieee80211_frame *wh; 1345173386Skevlo struct ieee80211_key *k; 1346156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1347156321Sdamien uint16_t dur; 1348156321Sdamien uint32_t flags = 0; /* XXX HWSEQ */ 1349156321Sdamien int nsegs, rate, error; 1350156321Sdamien 1351156321Sdamien desc = &sc->mgtq.desc[sc->mgtq.cur]; 1352156321Sdamien data = &sc->mgtq.data[sc->mgtq.cur]; 1353156321Sdamien 1354178354Ssam rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1355156321Sdamien 1356173386Skevlo wh = mtod(m0, struct ieee80211_frame *); 1357173386Skevlo 1358173386Skevlo if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1359178354Ssam k = ieee80211_crypto_encap(ni, m0); 1360173386Skevlo if (k == NULL) { 1361173386Skevlo m_freem(m0); 1362173386Skevlo return ENOBUFS; 1363173386Skevlo } 1364173386Skevlo } 1365173386Skevlo 1366156321Sdamien error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0, 1367156321Sdamien segs, &nsegs, 0); 1368156321Sdamien if (error != 0) { 1369156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1370156321Sdamien error); 1371156321Sdamien m_freem(m0); 1372156321Sdamien return error; 1373156321Sdamien } 1374156321Sdamien 1375178354Ssam if (bpf_peers_present(ifp->if_bpf)) { 1376156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1377156321Sdamien 1378156321Sdamien tap->wt_flags = 0; 1379156321Sdamien tap->wt_rate = rate; 1380156321Sdamien 1381178354Ssam bpf_mtap2(ifp->if_bpf, tap, sc->sc_txtap_len, m0); 1382156321Sdamien } 1383156321Sdamien 1384156321Sdamien data->m = m0; 1385156321Sdamien data->ni = ni; 1386178354Ssam /* management frames are not taken into account for amrr */ 1387178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1388156321Sdamien 1389156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1390156321Sdamien 1391156321Sdamien if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1392156321Sdamien flags |= RT2661_TX_NEED_ACK; 1393156321Sdamien 1394178354Ssam dur = ieee80211_ack_duration(sc->sc_rates, 1395178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1396156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1397156321Sdamien 1398156321Sdamien /* tell hardware to add timestamp in probe responses */ 1399156321Sdamien if ((wh->i_fc[0] & 1400156321Sdamien (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1401156321Sdamien (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1402156321Sdamien flags |= RT2661_TX_TIMESTAMP; 1403156321Sdamien } 1404156321Sdamien 1405156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */, 1406156321Sdamien m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT); 1407156321Sdamien 1408156321Sdamien bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1409156321Sdamien bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map, 1410156321Sdamien BUS_DMASYNC_PREWRITE); 1411156321Sdamien 1412178354Ssam DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1413178354Ssam m0->m_pkthdr.len, sc->mgtq.cur, rate); 1414156321Sdamien 1415156321Sdamien /* kick mgt */ 1416156321Sdamien sc->mgtq.queued++; 1417156321Sdamien sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT; 1418156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); 1419156321Sdamien 1420156321Sdamien return 0; 1421156321Sdamien} 1422156321Sdamien 1423178354Ssamstatic int 1424178354Ssamrt2661_sendprot(struct rt2661_softc *sc, int ac, 1425178354Ssam const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1426156321Sdamien{ 1427178354Ssam struct ieee80211com *ic = ni->ni_ic; 1428178354Ssam struct rt2661_tx_ring *txq = &sc->txq[ac]; 1429178354Ssam const struct ieee80211_frame *wh; 1430178354Ssam struct rt2661_tx_desc *desc; 1431178354Ssam struct rt2661_tx_data *data; 1432178354Ssam struct mbuf *mprot; 1433178354Ssam int protrate, ackrate, pktlen, flags, isshort, error; 1434178354Ssam uint16_t dur; 1435178354Ssam bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1436178354Ssam int nsegs; 1437156321Sdamien 1438178354Ssam KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1439178354Ssam ("protection %d", prot)); 1440178354Ssam 1441178354Ssam wh = mtod(m, const struct ieee80211_frame *); 1442178354Ssam pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1443178354Ssam 1444178354Ssam protrate = ieee80211_ctl_rate(sc->sc_rates, rate); 1445178354Ssam ackrate = ieee80211_ack_rate(sc->sc_rates, rate); 1446178354Ssam 1447178354Ssam isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1448178948Ssam dur = ieee80211_compute_duration(sc->sc_rates, pktlen, rate, isshort) 1449178354Ssam + ieee80211_ack_duration(sc->sc_rates, rate, isshort); 1450178354Ssam flags = RT2661_TX_MORE_FRAG; 1451178354Ssam if (prot == IEEE80211_PROT_RTSCTS) { 1452178354Ssam /* NB: CTS is the same size as an ACK */ 1453178354Ssam dur += ieee80211_ack_duration(sc->sc_rates, rate, isshort); 1454178354Ssam flags |= RT2661_TX_NEED_ACK; 1455178354Ssam mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1456178354Ssam } else { 1457178354Ssam mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1458156321Sdamien } 1459178354Ssam if (mprot == NULL) { 1460178354Ssam /* XXX stat + msg */ 1461178354Ssam return ENOBUFS; 1462178354Ssam } 1463156321Sdamien 1464178354Ssam data = &txq->data[txq->cur]; 1465178354Ssam desc = &txq->desc[txq->cur]; 1466156321Sdamien 1467178354Ssam error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs, 1468178354Ssam &nsegs, 0); 1469178354Ssam if (error != 0) { 1470178354Ssam device_printf(sc->sc_dev, 1471178354Ssam "could not map mbuf (error %d)\n", error); 1472178354Ssam m_freem(mprot); 1473178354Ssam return error; 1474178354Ssam } 1475156321Sdamien 1476178354Ssam data->m = mprot; 1477178354Ssam data->ni = ieee80211_ref_node(ni); 1478178354Ssam /* ctl frames are not taken into account for amrr */ 1479178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1480156321Sdamien 1481178354Ssam rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len, 1482178354Ssam protrate, segs, 1, ac); 1483178354Ssam 1484178354Ssam bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1485178354Ssam bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1486178354Ssam 1487178354Ssam txq->queued++; 1488178354Ssam txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1489178354Ssam 1490178354Ssam return 0; 1491156321Sdamien} 1492156321Sdamien 1493156321Sdamienstatic int 1494156321Sdamienrt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0, 1495156321Sdamien struct ieee80211_node *ni, int ac) 1496156321Sdamien{ 1497178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1498178354Ssam struct ifnet *ifp = sc->sc_ifp; 1499178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1500156321Sdamien struct rt2661_tx_ring *txq = &sc->txq[ac]; 1501156321Sdamien struct rt2661_tx_desc *desc; 1502156321Sdamien struct rt2661_tx_data *data; 1503156321Sdamien struct ieee80211_frame *wh; 1504178354Ssam const struct ieee80211_txparam *tp; 1505156321Sdamien struct ieee80211_key *k; 1506156321Sdamien const struct chanAccParams *cap; 1507156321Sdamien struct mbuf *mnew; 1508156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1509156321Sdamien uint16_t dur; 1510178354Ssam uint32_t flags; 1511156321Sdamien int error, nsegs, rate, noack = 0; 1512156321Sdamien 1513156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1514156321Sdamien 1515178354Ssam tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1516178354Ssam if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1517178354Ssam rate = tp->mcastrate; 1518178354Ssam } else if (m0->m_flags & M_EAPOL) { 1519178354Ssam rate = tp->mgmtrate; 1520178354Ssam } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1521178354Ssam rate = tp->ucastrate; 1522156321Sdamien } else { 1523178354Ssam (void) ieee80211_amrr_choose(ni, &RT2661_NODE(ni)->amrr); 1524178354Ssam rate = ni->ni_txrate; 1525156321Sdamien } 1526156321Sdamien rate &= IEEE80211_RATE_VAL; 1527156321Sdamien 1528156321Sdamien if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) { 1529156321Sdamien cap = &ic->ic_wme.wme_chanParams; 1530156321Sdamien noack = cap->cap_wmeParams[ac].wmep_noackPolicy; 1531156321Sdamien } 1532156321Sdamien 1533156321Sdamien if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1534178354Ssam k = ieee80211_crypto_encap(ni, m0); 1535156321Sdamien if (k == NULL) { 1536156321Sdamien m_freem(m0); 1537156321Sdamien return ENOBUFS; 1538156321Sdamien } 1539156321Sdamien 1540156321Sdamien /* packet header may have moved, reset our local pointer */ 1541156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1542156321Sdamien } 1543156321Sdamien 1544178354Ssam flags = 0; 1545178354Ssam if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1546178354Ssam int prot = IEEE80211_PROT_NONE; 1547178354Ssam if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1548178354Ssam prot = IEEE80211_PROT_RTSCTS; 1549178354Ssam else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1550178354Ssam ieee80211_rate2phytype(sc->sc_rates, rate) == IEEE80211_T_OFDM) 1551178354Ssam prot = ic->ic_protmode; 1552178354Ssam if (prot != IEEE80211_PROT_NONE) { 1553178354Ssam error = rt2661_sendprot(sc, ac, m0, ni, prot, rate); 1554178354Ssam if (error) { 1555178354Ssam m_freem(m0); 1556178354Ssam return error; 1557178354Ssam } 1558178354Ssam flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS; 1559156321Sdamien } 1560156321Sdamien } 1561156321Sdamien 1562156321Sdamien data = &txq->data[txq->cur]; 1563156321Sdamien desc = &txq->desc[txq->cur]; 1564156321Sdamien 1565156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs, 1566156321Sdamien &nsegs, 0); 1567156321Sdamien if (error != 0 && error != EFBIG) { 1568156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1569156321Sdamien error); 1570156321Sdamien m_freem(m0); 1571156321Sdamien return error; 1572156321Sdamien } 1573156321Sdamien if (error != 0) { 1574156321Sdamien mnew = m_defrag(m0, M_DONTWAIT); 1575156321Sdamien if (mnew == NULL) { 1576156321Sdamien device_printf(sc->sc_dev, 1577156321Sdamien "could not defragment mbuf\n"); 1578156321Sdamien m_freem(m0); 1579156321Sdamien return ENOBUFS; 1580156321Sdamien } 1581156321Sdamien m0 = mnew; 1582156321Sdamien 1583156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, 1584156321Sdamien segs, &nsegs, 0); 1585156321Sdamien if (error != 0) { 1586156321Sdamien device_printf(sc->sc_dev, 1587156321Sdamien "could not map mbuf (error %d)\n", error); 1588156321Sdamien m_freem(m0); 1589156321Sdamien return error; 1590156321Sdamien } 1591156321Sdamien 1592156321Sdamien /* packet header have moved, reset our local pointer */ 1593156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1594156321Sdamien } 1595156321Sdamien 1596178354Ssam if (bpf_peers_present(ifp->if_bpf)) { 1597156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1598156321Sdamien 1599156321Sdamien tap->wt_flags = 0; 1600156321Sdamien tap->wt_rate = rate; 1601156321Sdamien tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1602156321Sdamien tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1603156321Sdamien 1604178354Ssam bpf_mtap2(ifp->if_bpf, tap, sc->sc_txtap_len, m0); 1605156321Sdamien } 1606156321Sdamien 1607156321Sdamien data->m = m0; 1608156321Sdamien data->ni = ni; 1609156321Sdamien 1610156321Sdamien /* remember link conditions for rate adaptation algorithm */ 1611178354Ssam if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1612178354Ssam data->rix = ni->ni_txrate; 1613178354Ssam /* XXX probably need last rssi value and not avg */ 1614178354Ssam data->rssi = ic->ic_node_getrssi(ni); 1615156321Sdamien } else 1616178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1617156321Sdamien 1618156321Sdamien if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1619156321Sdamien flags |= RT2661_TX_NEED_ACK; 1620156321Sdamien 1621178354Ssam dur = ieee80211_ack_duration(sc->sc_rates, 1622178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1623156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1624156321Sdamien } 1625156321Sdamien 1626156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs, 1627156321Sdamien nsegs, ac); 1628156321Sdamien 1629156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1630156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1631156321Sdamien 1632178354Ssam DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1633178354Ssam m0->m_pkthdr.len, txq->cur, rate); 1634156321Sdamien 1635156321Sdamien /* kick Tx */ 1636156321Sdamien txq->queued++; 1637156321Sdamien txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1638156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac); 1639156321Sdamien 1640156321Sdamien return 0; 1641156321Sdamien} 1642156321Sdamien 1643156321Sdamienstatic void 1644178354Ssamrt2661_start_locked(struct ifnet *ifp) 1645156321Sdamien{ 1646156321Sdamien struct rt2661_softc *sc = ifp->if_softc; 1647178354Ssam struct mbuf *m; 1648156321Sdamien struct ieee80211_node *ni; 1649156321Sdamien int ac; 1650156321Sdamien 1651178354Ssam RAL_LOCK_ASSERT(sc); 1652156321Sdamien 1653156975Sdamien /* prevent management frames from being sent if we're not ready */ 1654178354Ssam if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) || sc->sc_invalid) 1655156975Sdamien return; 1656156975Sdamien 1657156321Sdamien for (;;) { 1658178354Ssam IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1659178354Ssam if (m == NULL) 1660178354Ssam break; 1661156321Sdamien 1662178354Ssam ac = M_WME_GETAC(m); 1663178354Ssam if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) { 1664178354Ssam /* there is no place left in this ring */ 1665178354Ssam IFQ_DRV_PREPEND(&ifp->if_snd, m); 1666178354Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1667178354Ssam break; 1668178354Ssam } 1669156321Sdamien 1670178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1671178354Ssam m = ieee80211_encap(ni, m); 1672178354Ssam if (m == NULL) { 1673178354Ssam ieee80211_free_node(ni); 1674178354Ssam ifp->if_oerrors++; 1675178354Ssam continue; 1676178354Ssam } 1677156321Sdamien 1678178354Ssam if (rt2661_tx_data(sc, m, ni, ac) != 0) { 1679178354Ssam ieee80211_free_node(ni); 1680178354Ssam ifp->if_oerrors++; 1681178354Ssam break; 1682178354Ssam } 1683156321Sdamien 1684178354Ssam sc->sc_tx_timer = 5; 1685178354Ssam } 1686178354Ssam} 1687156321Sdamien 1688178354Ssamstatic void 1689178354Ssamrt2661_start(struct ifnet *ifp) 1690178354Ssam{ 1691178354Ssam struct rt2661_softc *sc = ifp->if_softc; 1692156321Sdamien 1693178354Ssam RAL_LOCK(sc); 1694178354Ssam rt2661_start_locked(ifp); 1695178354Ssam RAL_UNLOCK(sc); 1696178354Ssam} 1697156321Sdamien 1698178354Ssamstatic int 1699178354Ssamrt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1700178354Ssam const struct ieee80211_bpf_params *params) 1701178354Ssam{ 1702178354Ssam struct ieee80211com *ic = ni->ni_ic; 1703178354Ssam struct ifnet *ifp = ic->ic_ifp; 1704178354Ssam struct rt2661_softc *sc = ifp->if_softc; 1705156321Sdamien 1706178354Ssam RAL_LOCK(sc); 1707156321Sdamien 1708178354Ssam /* prevent management frames from being sent if we're not ready */ 1709178354Ssam if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1710178354Ssam RAL_UNLOCK(sc); 1711178354Ssam m_freem(m); 1712178354Ssam ieee80211_free_node(ni); 1713178354Ssam return ENETDOWN; 1714178354Ssam } 1715178354Ssam if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) { 1716178354Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1717178354Ssam RAL_UNLOCK(sc); 1718178354Ssam m_freem(m); 1719178354Ssam ieee80211_free_node(ni); 1720178354Ssam return ENOBUFS; /* XXX */ 1721178354Ssam } 1722156321Sdamien 1723178354Ssam ifp->if_opackets++; 1724156321Sdamien 1725178354Ssam /* 1726178354Ssam * Legacy path; interpret frame contents to decide 1727178354Ssam * precisely how to send the frame. 1728178354Ssam * XXX raw path 1729178354Ssam */ 1730178354Ssam if (rt2661_tx_mgt(sc, m, ni) != 0) 1731178354Ssam goto bad; 1732178354Ssam sc->sc_tx_timer = 5; 1733156321Sdamien 1734178354Ssam RAL_UNLOCK(sc); 1735156321Sdamien 1736178354Ssam return 0; 1737178354Ssambad: 1738178354Ssam ifp->if_oerrors++; 1739178354Ssam ieee80211_free_node(ni); 1740156321Sdamien RAL_UNLOCK(sc); 1741178354Ssam return EIO; /* XXX */ 1742156321Sdamien} 1743156321Sdamien 1744156321Sdamienstatic void 1745165352Sbmsrt2661_watchdog(void *arg) 1746156321Sdamien{ 1747165352Sbms struct rt2661_softc *sc = (struct rt2661_softc *)arg; 1748178354Ssam struct ifnet *ifp = sc->sc_ifp; 1749156321Sdamien 1750178354Ssam RAL_LOCK_ASSERT(sc); 1751156321Sdamien 1752178354Ssam KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running")); 1753156321Sdamien 1754178354Ssam if (sc->sc_invalid) /* card ejected */ 1755178354Ssam return; 1756156321Sdamien 1757178354Ssam if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1758178354Ssam if_printf(ifp, "device timeout\n"); 1759178354Ssam rt2661_init_locked(sc); 1760178354Ssam ifp->if_oerrors++; 1761178354Ssam /* NB: callout is reset in rt2661_init() */ 1762178354Ssam return; 1763178354Ssam } 1764178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 1765156321Sdamien} 1766156321Sdamien 1767156321Sdamienstatic int 1768156321Sdamienrt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1769156321Sdamien{ 1770156321Sdamien struct rt2661_softc *sc = ifp->if_softc; 1771178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1772178354Ssam struct ifreq *ifr = (struct ifreq *) data; 1773178354Ssam int error = 0, startall = 0; 1774156321Sdamien 1775156321Sdamien switch (cmd) { 1776156321Sdamien case SIOCSIFFLAGS: 1777178704Sthompsa RAL_LOCK(sc); 1778156321Sdamien if (ifp->if_flags & IFF_UP) { 1779178354Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1780178354Ssam rt2661_init_locked(sc); 1781178354Ssam startall = 1; 1782178354Ssam } else 1783178354Ssam rt2661_update_promisc(ifp); 1784156321Sdamien } else { 1785156321Sdamien if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1786178354Ssam rt2661_stop_locked(sc); 1787156321Sdamien } 1788178704Sthompsa RAL_UNLOCK(sc); 1789178704Sthompsa if (startall) 1790178704Sthompsa ieee80211_start_all(ic); 1791156321Sdamien break; 1792178354Ssam case SIOCGIFMEDIA: 1793178354Ssam error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1794178354Ssam break; 1795178704Sthompsa case SIOCGIFADDR: 1796178354Ssam error = ether_ioctl(ifp, cmd, data); 1797178354Ssam break; 1798178704Sthompsa default: 1799178704Sthompsa error = EINVAL; 1800178704Sthompsa break; 1801156321Sdamien } 1802156321Sdamien return error; 1803156321Sdamien} 1804156321Sdamien 1805156321Sdamienstatic void 1806156321Sdamienrt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val) 1807156321Sdamien{ 1808156321Sdamien uint32_t tmp; 1809156321Sdamien int ntries; 1810156321Sdamien 1811156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1812156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1813156321Sdamien break; 1814156321Sdamien DELAY(1); 1815156321Sdamien } 1816156321Sdamien if (ntries == 100) { 1817156321Sdamien device_printf(sc->sc_dev, "could not write to BBP\n"); 1818156321Sdamien return; 1819156321Sdamien } 1820156321Sdamien 1821156321Sdamien tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val; 1822156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); 1823156321Sdamien 1824178354Ssam DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1825156321Sdamien} 1826156321Sdamien 1827156321Sdamienstatic uint8_t 1828156321Sdamienrt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg) 1829156321Sdamien{ 1830156321Sdamien uint32_t val; 1831156321Sdamien int ntries; 1832156321Sdamien 1833156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1834156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1835156321Sdamien break; 1836156321Sdamien DELAY(1); 1837156321Sdamien } 1838156321Sdamien if (ntries == 100) { 1839156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1840156321Sdamien return 0; 1841156321Sdamien } 1842156321Sdamien 1843156321Sdamien val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8; 1844156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, val); 1845156321Sdamien 1846156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1847156321Sdamien val = RAL_READ(sc, RT2661_PHY_CSR3); 1848156321Sdamien if (!(val & RT2661_BBP_BUSY)) 1849156321Sdamien return val & 0xff; 1850156321Sdamien DELAY(1); 1851156321Sdamien } 1852156321Sdamien 1853156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1854156321Sdamien return 0; 1855156321Sdamien} 1856156321Sdamien 1857156321Sdamienstatic void 1858156321Sdamienrt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val) 1859156321Sdamien{ 1860156321Sdamien uint32_t tmp; 1861156321Sdamien int ntries; 1862156321Sdamien 1863156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1864156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY)) 1865156321Sdamien break; 1866156321Sdamien DELAY(1); 1867156321Sdamien } 1868156321Sdamien if (ntries == 100) { 1869156321Sdamien device_printf(sc->sc_dev, "could not write to RF\n"); 1870156321Sdamien return; 1871156321Sdamien } 1872156321Sdamien 1873156321Sdamien tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 | 1874156321Sdamien (reg & 3); 1875156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); 1876156321Sdamien 1877156321Sdamien /* remember last written value in sc */ 1878156321Sdamien sc->rf_regs[reg] = val; 1879156321Sdamien 1880178354Ssam DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff); 1881156321Sdamien} 1882156321Sdamien 1883156321Sdamienstatic int 1884156321Sdamienrt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg) 1885156321Sdamien{ 1886156321Sdamien if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) 1887156321Sdamien return EIO; /* there is already a command pending */ 1888156321Sdamien 1889156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 1890156321Sdamien RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg); 1891156321Sdamien 1892156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); 1893156321Sdamien 1894156321Sdamien return 0; 1895156321Sdamien} 1896156321Sdamien 1897156321Sdamienstatic void 1898156321Sdamienrt2661_select_antenna(struct rt2661_softc *sc) 1899156321Sdamien{ 1900156321Sdamien uint8_t bbp4, bbp77; 1901156321Sdamien uint32_t tmp; 1902156321Sdamien 1903156321Sdamien bbp4 = rt2661_bbp_read(sc, 4); 1904156321Sdamien bbp77 = rt2661_bbp_read(sc, 77); 1905156321Sdamien 1906156321Sdamien /* TBD */ 1907156321Sdamien 1908156321Sdamien /* make sure Rx is disabled before switching antenna */ 1909156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 1910156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 1911156321Sdamien 1912156321Sdamien rt2661_bbp_write(sc, 4, bbp4); 1913156321Sdamien rt2661_bbp_write(sc, 77, bbp77); 1914156321Sdamien 1915156321Sdamien /* restore Rx filter */ 1916156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 1917156321Sdamien} 1918156321Sdamien 1919156321Sdamien/* 1920156321Sdamien * Enable multi-rate retries for frames sent at OFDM rates. 1921156321Sdamien * In 802.11b/g mode, allow fallback to CCK rates. 1922156321Sdamien */ 1923156321Sdamienstatic void 1924156321Sdamienrt2661_enable_mrr(struct rt2661_softc *sc) 1925156321Sdamien{ 1926178354Ssam struct ifnet *ifp = sc->sc_ifp; 1927178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1928156321Sdamien uint32_t tmp; 1929156321Sdamien 1930156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1931156321Sdamien 1932156321Sdamien tmp &= ~RT2661_MRR_CCK_FALLBACK; 1933178354Ssam if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 1934156321Sdamien tmp |= RT2661_MRR_CCK_FALLBACK; 1935156321Sdamien tmp |= RT2661_MRR_ENABLED; 1936156321Sdamien 1937156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1938156321Sdamien} 1939156321Sdamien 1940156321Sdamienstatic void 1941156321Sdamienrt2661_set_txpreamble(struct rt2661_softc *sc) 1942156321Sdamien{ 1943178354Ssam struct ifnet *ifp = sc->sc_ifp; 1944178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1945156321Sdamien uint32_t tmp; 1946156321Sdamien 1947156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1948156321Sdamien 1949156321Sdamien tmp &= ~RT2661_SHORT_PREAMBLE; 1950178354Ssam if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1951156321Sdamien tmp |= RT2661_SHORT_PREAMBLE; 1952156321Sdamien 1953156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1954156321Sdamien} 1955156321Sdamien 1956156321Sdamienstatic void 1957156321Sdamienrt2661_set_basicrates(struct rt2661_softc *sc, 1958156321Sdamien const struct ieee80211_rateset *rs) 1959156321Sdamien{ 1960156321Sdamien#define RV(r) ((r) & IEEE80211_RATE_VAL) 1961178354Ssam struct ifnet *ifp = sc->sc_ifp; 1962178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1963156321Sdamien uint32_t mask = 0; 1964156321Sdamien uint8_t rate; 1965156321Sdamien int i, j; 1966156321Sdamien 1967156321Sdamien for (i = 0; i < rs->rs_nrates; i++) { 1968156321Sdamien rate = rs->rs_rates[i]; 1969156321Sdamien 1970156321Sdamien if (!(rate & IEEE80211_RATE_BASIC)) 1971156321Sdamien continue; 1972156321Sdamien 1973156321Sdamien /* 1974156321Sdamien * Find h/w rate index. We know it exists because the rate 1975156321Sdamien * set has already been negotiated. 1976156321Sdamien */ 1977167470Ssam for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++); 1978156321Sdamien 1979156321Sdamien mask |= 1 << j; 1980156321Sdamien } 1981156321Sdamien 1982156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); 1983156321Sdamien 1984178354Ssam DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 1985156321Sdamien#undef RV 1986156321Sdamien} 1987156321Sdamien 1988156321Sdamien/* 1989156321Sdamien * Reprogram MAC/BBP to switch to a new band. Values taken from the reference 1990156321Sdamien * driver. 1991156321Sdamien */ 1992156321Sdamienstatic void 1993156321Sdamienrt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c) 1994156321Sdamien{ 1995156321Sdamien uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104; 1996156321Sdamien uint32_t tmp; 1997156321Sdamien 1998156321Sdamien /* update all BBP registers that depend on the band */ 1999156321Sdamien bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c; 2000156321Sdamien bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48; 2001156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) { 2002156321Sdamien bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c; 2003156321Sdamien bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10; 2004156321Sdamien } 2005156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 2006156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 2007156321Sdamien bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10; 2008156321Sdamien } 2009156321Sdamien 2010156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 2011156321Sdamien rt2661_bbp_write(sc, 96, bbp96); 2012156321Sdamien rt2661_bbp_write(sc, 104, bbp104); 2013156321Sdamien 2014156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 2015156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 2016156321Sdamien rt2661_bbp_write(sc, 75, 0x80); 2017156321Sdamien rt2661_bbp_write(sc, 86, 0x80); 2018156321Sdamien rt2661_bbp_write(sc, 88, 0x80); 2019156321Sdamien } 2020156321Sdamien 2021156321Sdamien rt2661_bbp_write(sc, 35, bbp35); 2022156321Sdamien rt2661_bbp_write(sc, 97, bbp97); 2023156321Sdamien rt2661_bbp_write(sc, 98, bbp98); 2024156321Sdamien 2025156321Sdamien tmp = RAL_READ(sc, RT2661_PHY_CSR0); 2026156321Sdamien tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ); 2027156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(c)) 2028156321Sdamien tmp |= RT2661_PA_PE_2GHZ; 2029156321Sdamien else 2030156321Sdamien tmp |= RT2661_PA_PE_5GHZ; 2031156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); 2032156321Sdamien} 2033156321Sdamien 2034156321Sdamienstatic void 2035156321Sdamienrt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c) 2036156321Sdamien{ 2037178354Ssam struct ifnet *ifp = sc->sc_ifp; 2038178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2039156321Sdamien const struct rfprog *rfprog; 2040156321Sdamien uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT; 2041156321Sdamien int8_t power; 2042156321Sdamien u_int i, chan; 2043156321Sdamien 2044156321Sdamien chan = ieee80211_chan2ieee(ic, c); 2045178354Ssam KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 2046156321Sdamien 2047178354Ssam sc->sc_rates = ieee80211_get_ratetable(c); 2048178354Ssam 2049156321Sdamien /* select the appropriate RF settings based on what EEPROM says */ 2050156321Sdamien rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2; 2051156321Sdamien 2052156321Sdamien /* find the settings for this channel (we know it exists) */ 2053156321Sdamien for (i = 0; rfprog[i].chan != chan; i++); 2054156321Sdamien 2055156321Sdamien power = sc->txpow[i]; 2056156321Sdamien if (power < 0) { 2057156321Sdamien bbp94 += power; 2058156321Sdamien power = 0; 2059156321Sdamien } else if (power > 31) { 2060156321Sdamien bbp94 += power - 31; 2061156321Sdamien power = 31; 2062156321Sdamien } 2063156321Sdamien 2064156321Sdamien /* 2065156321Sdamien * If we are switching from the 2GHz band to the 5GHz band or 2066156321Sdamien * vice-versa, BBP registers need to be reprogrammed. 2067156321Sdamien */ 2068156321Sdamien if (c->ic_flags != sc->sc_curchan->ic_flags) { 2069156321Sdamien rt2661_select_band(sc, c); 2070156321Sdamien rt2661_select_antenna(sc); 2071156321Sdamien } 2072156321Sdamien sc->sc_curchan = c; 2073156321Sdamien 2074156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2075156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2076156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2077156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2078156321Sdamien 2079156321Sdamien DELAY(200); 2080156321Sdamien 2081156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2082156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2083156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1); 2084156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2085156321Sdamien 2086156321Sdamien DELAY(200); 2087156321Sdamien 2088156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2089156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2090156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2091156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2092156321Sdamien 2093156321Sdamien /* enable smart mode for MIMO-capable RFs */ 2094156321Sdamien bbp3 = rt2661_bbp_read(sc, 3); 2095156321Sdamien 2096156321Sdamien bbp3 &= ~RT2661_SMART_MODE; 2097156321Sdamien if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529) 2098156321Sdamien bbp3 |= RT2661_SMART_MODE; 2099156321Sdamien 2100156321Sdamien rt2661_bbp_write(sc, 3, bbp3); 2101156321Sdamien 2102156321Sdamien if (bbp94 != RT2661_BBPR94_DEFAULT) 2103156321Sdamien rt2661_bbp_write(sc, 94, bbp94); 2104156321Sdamien 2105156321Sdamien /* 5GHz radio needs a 1ms delay here */ 2106156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) 2107156321Sdamien DELAY(1000); 2108156321Sdamien} 2109156321Sdamien 2110156321Sdamienstatic void 2111156321Sdamienrt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid) 2112156321Sdamien{ 2113156321Sdamien uint32_t tmp; 2114156321Sdamien 2115156321Sdamien tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2116156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); 2117156321Sdamien 2118156321Sdamien tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16; 2119156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); 2120156321Sdamien} 2121156321Sdamien 2122156321Sdamienstatic void 2123156321Sdamienrt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) 2124156321Sdamien{ 2125156321Sdamien uint32_t tmp; 2126156321Sdamien 2127156321Sdamien tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2128156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); 2129156321Sdamien 2130156321Sdamien tmp = addr[4] | addr[5] << 8; 2131156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); 2132156321Sdamien} 2133156321Sdamien 2134156321Sdamienstatic void 2135178354Ssamrt2661_update_promisc(struct ifnet *ifp) 2136156321Sdamien{ 2137178354Ssam struct rt2661_softc *sc = ifp->if_softc; 2138156321Sdamien uint32_t tmp; 2139156321Sdamien 2140156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2141156321Sdamien 2142156321Sdamien tmp &= ~RT2661_DROP_NOT_TO_ME; 2143156321Sdamien if (!(ifp->if_flags & IFF_PROMISC)) 2144156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2145156321Sdamien 2146156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2147156321Sdamien 2148178354Ssam DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2149178354Ssam "entering" : "leaving"); 2150156321Sdamien} 2151156321Sdamien 2152156321Sdamien/* 2153156321Sdamien * Update QoS (802.11e) settings for each h/w Tx ring. 2154156321Sdamien */ 2155156321Sdamienstatic int 2156156321Sdamienrt2661_wme_update(struct ieee80211com *ic) 2157156321Sdamien{ 2158156321Sdamien struct rt2661_softc *sc = ic->ic_ifp->if_softc; 2159156321Sdamien const struct wmeParams *wmep; 2160156321Sdamien 2161156321Sdamien wmep = ic->ic_wme.wme_chanParams.cap_wmeParams; 2162156321Sdamien 2163156321Sdamien /* XXX: not sure about shifts. */ 2164156321Sdamien /* XXX: the reference driver plays with AC_VI settings too. */ 2165156321Sdamien 2166156321Sdamien /* update TxOp */ 2167156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR0, 2168156321Sdamien wmep[WME_AC_BE].wmep_txopLimit << 16 | 2169156321Sdamien wmep[WME_AC_BK].wmep_txopLimit); 2170156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR1, 2171156321Sdamien wmep[WME_AC_VI].wmep_txopLimit << 16 | 2172156321Sdamien wmep[WME_AC_VO].wmep_txopLimit); 2173156321Sdamien 2174156321Sdamien /* update CWmin */ 2175156321Sdamien RAL_WRITE(sc, RT2661_CWMIN_CSR, 2176156321Sdamien wmep[WME_AC_BE].wmep_logcwmin << 12 | 2177156321Sdamien wmep[WME_AC_BK].wmep_logcwmin << 8 | 2178156321Sdamien wmep[WME_AC_VI].wmep_logcwmin << 4 | 2179156321Sdamien wmep[WME_AC_VO].wmep_logcwmin); 2180156321Sdamien 2181156321Sdamien /* update CWmax */ 2182156321Sdamien RAL_WRITE(sc, RT2661_CWMAX_CSR, 2183156321Sdamien wmep[WME_AC_BE].wmep_logcwmax << 12 | 2184156321Sdamien wmep[WME_AC_BK].wmep_logcwmax << 8 | 2185156321Sdamien wmep[WME_AC_VI].wmep_logcwmax << 4 | 2186156321Sdamien wmep[WME_AC_VO].wmep_logcwmax); 2187156321Sdamien 2188156321Sdamien /* update Aifsn */ 2189156321Sdamien RAL_WRITE(sc, RT2661_AIFSN_CSR, 2190156321Sdamien wmep[WME_AC_BE].wmep_aifsn << 12 | 2191156321Sdamien wmep[WME_AC_BK].wmep_aifsn << 8 | 2192156321Sdamien wmep[WME_AC_VI].wmep_aifsn << 4 | 2193156321Sdamien wmep[WME_AC_VO].wmep_aifsn); 2194156321Sdamien 2195156321Sdamien return 0; 2196156321Sdamien} 2197156321Sdamien 2198156321Sdamienstatic void 2199156321Sdamienrt2661_update_slot(struct ifnet *ifp) 2200156321Sdamien{ 2201156321Sdamien struct rt2661_softc *sc = ifp->if_softc; 2202178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2203156321Sdamien uint8_t slottime; 2204156321Sdamien uint32_t tmp; 2205156321Sdamien 2206156321Sdamien slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2207156321Sdamien 2208156321Sdamien tmp = RAL_READ(sc, RT2661_MAC_CSR9); 2209156321Sdamien tmp = (tmp & ~0xff) | slottime; 2210156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); 2211156321Sdamien} 2212156321Sdamien 2213156321Sdamienstatic const char * 2214156321Sdamienrt2661_get_rf(int rev) 2215156321Sdamien{ 2216156321Sdamien switch (rev) { 2217156321Sdamien case RT2661_RF_5225: return "RT5225"; 2218156321Sdamien case RT2661_RF_5325: return "RT5325 (MIMO XR)"; 2219156321Sdamien case RT2661_RF_2527: return "RT2527"; 2220156321Sdamien case RT2661_RF_2529: return "RT2529 (MIMO XR)"; 2221156321Sdamien default: return "unknown"; 2222156321Sdamien } 2223156321Sdamien} 2224156321Sdamien 2225156321Sdamienstatic void 2226178354Ssamrt2661_read_eeprom(struct rt2661_softc *sc, struct ieee80211com *ic) 2227156321Sdamien{ 2228156321Sdamien uint16_t val; 2229156321Sdamien int i; 2230156321Sdamien 2231156321Sdamien /* read MAC address */ 2232156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01); 2233156321Sdamien ic->ic_myaddr[0] = val & 0xff; 2234156321Sdamien ic->ic_myaddr[1] = val >> 8; 2235156321Sdamien 2236156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23); 2237156321Sdamien ic->ic_myaddr[2] = val & 0xff; 2238156321Sdamien ic->ic_myaddr[3] = val >> 8; 2239156321Sdamien 2240156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45); 2241156321Sdamien ic->ic_myaddr[4] = val & 0xff; 2242156321Sdamien ic->ic_myaddr[5] = val >> 8; 2243156321Sdamien 2244156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA); 2245156321Sdamien /* XXX: test if different from 0xffff? */ 2246156321Sdamien sc->rf_rev = (val >> 11) & 0x1f; 2247156321Sdamien sc->hw_radio = (val >> 10) & 0x1; 2248156321Sdamien sc->rx_ant = (val >> 4) & 0x3; 2249156321Sdamien sc->tx_ant = (val >> 2) & 0x3; 2250156321Sdamien sc->nb_ant = val & 0x3; 2251156321Sdamien 2252178354Ssam DPRINTF(sc, "RF revision=%d\n", sc->rf_rev); 2253156321Sdamien 2254156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2); 2255156321Sdamien sc->ext_5ghz_lna = (val >> 6) & 0x1; 2256156321Sdamien sc->ext_2ghz_lna = (val >> 4) & 0x1; 2257156321Sdamien 2258178354Ssam DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n", 2259178354Ssam sc->ext_2ghz_lna, sc->ext_5ghz_lna); 2260156321Sdamien 2261156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET); 2262156321Sdamien if ((val & 0xff) != 0xff) 2263156321Sdamien sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */ 2264156321Sdamien 2265170530Ssam /* Only [-10, 10] is valid */ 2266170530Ssam if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10) 2267170530Ssam sc->rssi_2ghz_corr = 0; 2268170530Ssam 2269156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET); 2270156321Sdamien if ((val & 0xff) != 0xff) 2271156321Sdamien sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */ 2272156321Sdamien 2273170530Ssam /* Only [-10, 10] is valid */ 2274170530Ssam if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10) 2275170530Ssam sc->rssi_5ghz_corr = 0; 2276170530Ssam 2277156321Sdamien /* adjust RSSI correction for external low-noise amplifier */ 2278156321Sdamien if (sc->ext_2ghz_lna) 2279156321Sdamien sc->rssi_2ghz_corr -= 14; 2280156321Sdamien if (sc->ext_5ghz_lna) 2281156321Sdamien sc->rssi_5ghz_corr -= 14; 2282156321Sdamien 2283178354Ssam DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n", 2284178354Ssam sc->rssi_2ghz_corr, sc->rssi_5ghz_corr); 2285156321Sdamien 2286156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET); 2287156321Sdamien if ((val >> 8) != 0xff) 2288156321Sdamien sc->rfprog = (val >> 8) & 0x3; 2289156321Sdamien if ((val & 0xff) != 0xff) 2290156321Sdamien sc->rffreq = val & 0xff; 2291156321Sdamien 2292178354Ssam DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq); 2293156321Sdamien 2294156321Sdamien /* read Tx power for all a/b/g channels */ 2295156321Sdamien for (i = 0; i < 19; i++) { 2296156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i); 2297156321Sdamien sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */ 2298178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2299178354Ssam rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]); 2300156321Sdamien sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */ 2301178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2302178354Ssam rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]); 2303156321Sdamien } 2304156321Sdamien 2305156321Sdamien /* read vendor-specific BBP values */ 2306156321Sdamien for (i = 0; i < 16; i++) { 2307156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i); 2308156321Sdamien if (val == 0 || val == 0xffff) 2309156321Sdamien continue; /* skip invalid entries */ 2310156321Sdamien sc->bbp_prom[i].reg = val >> 8; 2311156321Sdamien sc->bbp_prom[i].val = val & 0xff; 2312178354Ssam DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg, 2313178354Ssam sc->bbp_prom[i].val); 2314156321Sdamien } 2315156321Sdamien} 2316156321Sdamien 2317156321Sdamienstatic int 2318156321Sdamienrt2661_bbp_init(struct rt2661_softc *sc) 2319156321Sdamien{ 2320156321Sdamien#define N(a) (sizeof (a) / sizeof ((a)[0])) 2321156321Sdamien int i, ntries; 2322156321Sdamien uint8_t val; 2323156321Sdamien 2324156321Sdamien /* wait for BBP to be ready */ 2325156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 2326156321Sdamien val = rt2661_bbp_read(sc, 0); 2327156321Sdamien if (val != 0 && val != 0xff) 2328156321Sdamien break; 2329156321Sdamien DELAY(100); 2330156321Sdamien } 2331156321Sdamien if (ntries == 100) { 2332156321Sdamien device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2333156321Sdamien return EIO; 2334156321Sdamien } 2335156321Sdamien 2336156321Sdamien /* initialize BBP registers to default values */ 2337156321Sdamien for (i = 0; i < N(rt2661_def_bbp); i++) { 2338156321Sdamien rt2661_bbp_write(sc, rt2661_def_bbp[i].reg, 2339156321Sdamien rt2661_def_bbp[i].val); 2340156321Sdamien } 2341156321Sdamien 2342156321Sdamien /* write vendor-specific BBP values (from EEPROM) */ 2343156321Sdamien for (i = 0; i < 16; i++) { 2344156321Sdamien if (sc->bbp_prom[i].reg == 0) 2345156321Sdamien continue; 2346156321Sdamien rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2347156321Sdamien } 2348156321Sdamien 2349156321Sdamien return 0; 2350156321Sdamien#undef N 2351156321Sdamien} 2352156321Sdamien 2353156321Sdamienstatic void 2354178354Ssamrt2661_init_locked(struct rt2661_softc *sc) 2355156321Sdamien{ 2356156321Sdamien#define N(a) (sizeof (a) / sizeof ((a)[0])) 2357178354Ssam struct ifnet *ifp = sc->sc_ifp; 2358178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2359156321Sdamien uint32_t tmp, sta[3]; 2360178354Ssam int i, error, ntries; 2361156321Sdamien 2362178354Ssam RAL_LOCK_ASSERT(sc); 2363156975Sdamien 2364178354Ssam if ((sc->sc_flags & RAL_FW_LOADED) == 0) { 2365178354Ssam error = rt2661_load_microcode(sc); 2366178354Ssam if (error != 0) { 2367178354Ssam if_printf(ifp, 2368178354Ssam "%s: could not load 8051 microcode, error %d\n", 2369178354Ssam __func__, error); 2370178354Ssam return; 2371178354Ssam } 2372178354Ssam sc->sc_flags |= RAL_FW_LOADED; 2373178354Ssam } 2374178354Ssam 2375170530Ssam rt2661_stop_locked(sc); 2376156321Sdamien 2377156321Sdamien /* initialize Tx rings */ 2378156321Sdamien RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); 2379156321Sdamien RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); 2380156321Sdamien RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); 2381156321Sdamien RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); 2382156321Sdamien 2383156321Sdamien /* initialize Mgt ring */ 2384156321Sdamien RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); 2385156321Sdamien 2386156321Sdamien /* initialize Rx ring */ 2387156321Sdamien RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); 2388156321Sdamien 2389156321Sdamien /* initialize Tx rings sizes */ 2390156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR0, 2391156321Sdamien RT2661_TX_RING_COUNT << 24 | 2392156321Sdamien RT2661_TX_RING_COUNT << 16 | 2393156321Sdamien RT2661_TX_RING_COUNT << 8 | 2394156321Sdamien RT2661_TX_RING_COUNT); 2395156321Sdamien 2396156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR1, 2397156321Sdamien RT2661_TX_DESC_WSIZE << 16 | 2398156321Sdamien RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */ 2399156321Sdamien RT2661_MGT_RING_COUNT); 2400156321Sdamien 2401156321Sdamien /* initialize Rx rings */ 2402156321Sdamien RAL_WRITE(sc, RT2661_RX_RING_CSR, 2403156321Sdamien RT2661_RX_DESC_BACK << 16 | 2404156321Sdamien RT2661_RX_DESC_WSIZE << 8 | 2405156321Sdamien RT2661_RX_RING_COUNT); 2406156321Sdamien 2407156321Sdamien /* XXX: some magic here */ 2408156321Sdamien RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); 2409156321Sdamien 2410156321Sdamien /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */ 2411156321Sdamien RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); 2412156321Sdamien 2413156321Sdamien /* load base address of Rx ring */ 2414156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); 2415156321Sdamien 2416156321Sdamien /* initialize MAC registers to default values */ 2417156321Sdamien for (i = 0; i < N(rt2661_def_mac); i++) 2418156321Sdamien RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); 2419156321Sdamien 2420156321Sdamien IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp)); 2421156321Sdamien rt2661_set_macaddr(sc, ic->ic_myaddr); 2422156321Sdamien 2423156321Sdamien /* set host ready */ 2424156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2425156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2426156321Sdamien 2427156321Sdamien /* wait for BBP/RF to wakeup */ 2428156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 2429156321Sdamien if (RAL_READ(sc, RT2661_MAC_CSR12) & 8) 2430156321Sdamien break; 2431156321Sdamien DELAY(1000); 2432156321Sdamien } 2433156321Sdamien if (ntries == 1000) { 2434156321Sdamien printf("timeout waiting for BBP/RF to wakeup\n"); 2435170530Ssam rt2661_stop_locked(sc); 2436156321Sdamien return; 2437156321Sdamien } 2438156321Sdamien 2439156321Sdamien if (rt2661_bbp_init(sc) != 0) { 2440170530Ssam rt2661_stop_locked(sc); 2441156321Sdamien return; 2442156321Sdamien } 2443156321Sdamien 2444156321Sdamien /* select default channel */ 2445156321Sdamien sc->sc_curchan = ic->ic_curchan; 2446156321Sdamien rt2661_select_band(sc, sc->sc_curchan); 2447156321Sdamien rt2661_select_antenna(sc); 2448156321Sdamien rt2661_set_chan(sc, sc->sc_curchan); 2449156321Sdamien 2450156321Sdamien /* update Rx filter */ 2451156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff; 2452156321Sdamien 2453156321Sdamien tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR; 2454156321Sdamien if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2455156321Sdamien tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR | 2456156321Sdamien RT2661_DROP_ACKCTS; 2457156321Sdamien if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2458156321Sdamien tmp |= RT2661_DROP_TODS; 2459156321Sdamien if (!(ifp->if_flags & IFF_PROMISC)) 2460156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2461156321Sdamien } 2462156321Sdamien 2463156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2464156321Sdamien 2465156321Sdamien /* clear STA registers */ 2466156321Sdamien RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta)); 2467156321Sdamien 2468156321Sdamien /* initialize ASIC */ 2469156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 4); 2470156321Sdamien 2471156321Sdamien /* clear any pending interrupt */ 2472156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2473156321Sdamien 2474156321Sdamien /* enable interrupts */ 2475156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 2476156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 2477156321Sdamien 2478156321Sdamien /* kick Rx */ 2479156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); 2480156321Sdamien 2481156321Sdamien ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2482156321Sdamien ifp->if_drv_flags |= IFF_DRV_RUNNING; 2483156321Sdamien 2484178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 2485156975Sdamien#undef N 2486156321Sdamien} 2487156321Sdamien 2488178354Ssamstatic void 2489178354Ssamrt2661_init(void *priv) 2490156321Sdamien{ 2491156321Sdamien struct rt2661_softc *sc = priv; 2492178354Ssam struct ifnet *ifp = sc->sc_ifp; 2493178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2494170530Ssam 2495170530Ssam RAL_LOCK(sc); 2496178354Ssam rt2661_init_locked(sc); 2497170530Ssam RAL_UNLOCK(sc); 2498178354Ssam 2499178931Sthompsa if (ifp->if_drv_flags & IFF_DRV_RUNNING) 2500178931Sthompsa ieee80211_start_all(ic); /* start all vap's */ 2501170530Ssam} 2502170530Ssam 2503170530Ssamvoid 2504170530Ssamrt2661_stop_locked(struct rt2661_softc *sc) 2505170530Ssam{ 2506178354Ssam struct ifnet *ifp = sc->sc_ifp; 2507156321Sdamien uint32_t tmp; 2508170530Ssam volatile int *flags = &sc->sc_flags; 2509156321Sdamien 2510178354Ssam while (*flags & RAL_INPUT_RUNNING) 2511170530Ssam msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10); 2512156321Sdamien 2513178354Ssam callout_stop(&sc->watchdog_ch); 2514178354Ssam sc->sc_tx_timer = 0; 2515178354Ssam 2516170530Ssam if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 2517170530Ssam ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2518178354Ssam 2519170530Ssam /* abort Tx (for all 5 Tx rings) */ 2520170530Ssam RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); 2521170530Ssam 2522170530Ssam /* disable Rx (value remains after reset!) */ 2523170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2524170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2525170530Ssam 2526170530Ssam /* reset ASIC */ 2527170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2528170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2529170530Ssam 2530170530Ssam /* disable interrupts */ 2531170530Ssam RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff); 2532170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 2533170530Ssam 2534170530Ssam /* clear any pending interrupt */ 2535170530Ssam RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2536170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); 2537170530Ssam 2538170530Ssam /* reset Tx and Rx rings */ 2539170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[0]); 2540170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[1]); 2541170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[2]); 2542170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[3]); 2543170530Ssam rt2661_reset_tx_ring(sc, &sc->mgtq); 2544170530Ssam rt2661_reset_rx_ring(sc, &sc->rxq); 2545170530Ssam } 2546156321Sdamien} 2547156321Sdamien 2548178354Ssamvoid 2549178354Ssamrt2661_stop(void *priv) 2550178354Ssam{ 2551178354Ssam struct rt2661_softc *sc = priv; 2552178354Ssam 2553178354Ssam RAL_LOCK(sc); 2554178354Ssam rt2661_stop_locked(sc); 2555178354Ssam RAL_UNLOCK(sc); 2556178354Ssam} 2557178354Ssam 2558156321Sdamienstatic int 2559178354Ssamrt2661_load_microcode(struct rt2661_softc *sc) 2560156321Sdamien{ 2561178354Ssam struct ifnet *ifp = sc->sc_ifp; 2562178354Ssam const struct firmware *fp; 2563178354Ssam const char *imagename; 2564178354Ssam int ntries, error; 2565156321Sdamien 2566178354Ssam RAL_LOCK_ASSERT(sc); 2567178354Ssam 2568178354Ssam switch (sc->sc_id) { 2569178354Ssam case 0x0301: imagename = "rt2561sfw"; break; 2570178354Ssam case 0x0302: imagename = "rt2561fw"; break; 2571178354Ssam case 0x0401: imagename = "rt2661fw"; break; 2572178354Ssam default: 2573178354Ssam if_printf(ifp, "%s: unexpected pci device id 0x%x, " 2574178354Ssam "don't know how to retrieve firmware\n", 2575178354Ssam __func__, sc->sc_id); 2576178354Ssam return EINVAL; 2577178354Ssam } 2578178354Ssam RAL_UNLOCK(sc); 2579178354Ssam fp = firmware_get(imagename); 2580178354Ssam RAL_LOCK(sc); 2581178354Ssam if (fp == NULL) { 2582178354Ssam if_printf(ifp, "%s: unable to retrieve firmware image %s\n", 2583178354Ssam __func__, imagename); 2584178354Ssam return EINVAL; 2585178354Ssam } 2586178354Ssam 2587178354Ssam /* 2588178354Ssam * Load 8051 microcode into NIC. 2589178354Ssam */ 2590156321Sdamien /* reset 8051 */ 2591156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2592156321Sdamien 2593156321Sdamien /* cancel any pending Host to MCU command */ 2594156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); 2595156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 2596156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); 2597156321Sdamien 2598156321Sdamien /* write 8051's microcode */ 2599156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); 2600178354Ssam RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize); 2601156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2602156321Sdamien 2603156321Sdamien /* kick 8051's ass */ 2604156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); 2605156321Sdamien 2606156321Sdamien /* wait for 8051 to initialize */ 2607156321Sdamien for (ntries = 0; ntries < 500; ntries++) { 2608156321Sdamien if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY) 2609156321Sdamien break; 2610156321Sdamien DELAY(100); 2611156321Sdamien } 2612156321Sdamien if (ntries == 500) { 2613178354Ssam if_printf(ifp, "%s: timeout waiting for MCU to initialize\n", 2614178354Ssam __func__); 2615178354Ssam error = EIO; 2616178354Ssam } else 2617178354Ssam error = 0; 2618178354Ssam 2619178354Ssam firmware_put(fp, FIRMWARE_UNLOAD); 2620178354Ssam return error; 2621156321Sdamien} 2622156321Sdamien 2623156321Sdamien#ifdef notyet 2624156321Sdamien/* 2625156321Sdamien * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and 2626156321Sdamien * false CCA count. This function is called periodically (every seconds) when 2627156321Sdamien * in the RUN state. Values taken from the reference driver. 2628156321Sdamien */ 2629156321Sdamienstatic void 2630156321Sdamienrt2661_rx_tune(struct rt2661_softc *sc) 2631156321Sdamien{ 2632156321Sdamien uint8_t bbp17; 2633156321Sdamien uint16_t cca; 2634156321Sdamien int lo, hi, dbm; 2635156321Sdamien 2636156321Sdamien /* 2637156321Sdamien * Tuning range depends on operating band and on the presence of an 2638156321Sdamien * external low-noise amplifier. 2639156321Sdamien */ 2640156321Sdamien lo = 0x20; 2641156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan)) 2642156321Sdamien lo += 0x08; 2643156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) || 2644156321Sdamien (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna)) 2645156321Sdamien lo += 0x10; 2646156321Sdamien hi = lo + 0x20; 2647156321Sdamien 2648156321Sdamien /* retrieve false CCA count since last call (clear on read) */ 2649156321Sdamien cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff; 2650156321Sdamien 2651156321Sdamien if (dbm >= -35) { 2652156321Sdamien bbp17 = 0x60; 2653156321Sdamien } else if (dbm >= -58) { 2654156321Sdamien bbp17 = hi; 2655156321Sdamien } else if (dbm >= -66) { 2656156321Sdamien bbp17 = lo + 0x10; 2657156321Sdamien } else if (dbm >= -74) { 2658156321Sdamien bbp17 = lo + 0x08; 2659156321Sdamien } else { 2660156321Sdamien /* RSSI < -74dBm, tune using false CCA count */ 2661156321Sdamien 2662156321Sdamien bbp17 = sc->bbp17; /* current value */ 2663156321Sdamien 2664156321Sdamien hi -= 2 * (-74 - dbm); 2665156321Sdamien if (hi < lo) 2666156321Sdamien hi = lo; 2667156321Sdamien 2668156321Sdamien if (bbp17 > hi) { 2669156321Sdamien bbp17 = hi; 2670156321Sdamien 2671156321Sdamien } else if (cca > 512) { 2672156321Sdamien if (++bbp17 > hi) 2673156321Sdamien bbp17 = hi; 2674156321Sdamien } else if (cca < 100) { 2675156321Sdamien if (--bbp17 < lo) 2676156321Sdamien bbp17 = lo; 2677156321Sdamien } 2678156321Sdamien } 2679156321Sdamien 2680156321Sdamien if (bbp17 != sc->bbp17) { 2681156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 2682156321Sdamien sc->bbp17 = bbp17; 2683156321Sdamien } 2684156321Sdamien} 2685156321Sdamien 2686156321Sdamien/* 2687156321Sdamien * Enter/Leave radar detection mode. 2688156321Sdamien * This is for 802.11h additional regulatory domains. 2689156321Sdamien */ 2690156321Sdamienstatic void 2691156321Sdamienrt2661_radar_start(struct rt2661_softc *sc) 2692156321Sdamien{ 2693156321Sdamien uint32_t tmp; 2694156321Sdamien 2695156321Sdamien /* disable Rx */ 2696156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2697156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2698156321Sdamien 2699156321Sdamien rt2661_bbp_write(sc, 82, 0x20); 2700156321Sdamien rt2661_bbp_write(sc, 83, 0x00); 2701156321Sdamien rt2661_bbp_write(sc, 84, 0x40); 2702156321Sdamien 2703156321Sdamien /* save current BBP registers values */ 2704156321Sdamien sc->bbp18 = rt2661_bbp_read(sc, 18); 2705156321Sdamien sc->bbp21 = rt2661_bbp_read(sc, 21); 2706156321Sdamien sc->bbp22 = rt2661_bbp_read(sc, 22); 2707156321Sdamien sc->bbp16 = rt2661_bbp_read(sc, 16); 2708156321Sdamien sc->bbp17 = rt2661_bbp_read(sc, 17); 2709156321Sdamien sc->bbp64 = rt2661_bbp_read(sc, 64); 2710156321Sdamien 2711156321Sdamien rt2661_bbp_write(sc, 18, 0xff); 2712156321Sdamien rt2661_bbp_write(sc, 21, 0x3f); 2713156321Sdamien rt2661_bbp_write(sc, 22, 0x3f); 2714156321Sdamien rt2661_bbp_write(sc, 16, 0xbd); 2715156321Sdamien rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34); 2716156321Sdamien rt2661_bbp_write(sc, 64, 0x21); 2717156321Sdamien 2718156321Sdamien /* restore Rx filter */ 2719156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2720156321Sdamien} 2721156321Sdamien 2722156321Sdamienstatic int 2723156321Sdamienrt2661_radar_stop(struct rt2661_softc *sc) 2724156321Sdamien{ 2725156321Sdamien uint8_t bbp66; 2726156321Sdamien 2727156321Sdamien /* read radar detection result */ 2728156321Sdamien bbp66 = rt2661_bbp_read(sc, 66); 2729156321Sdamien 2730156321Sdamien /* restore BBP registers values */ 2731156321Sdamien rt2661_bbp_write(sc, 16, sc->bbp16); 2732156321Sdamien rt2661_bbp_write(sc, 17, sc->bbp17); 2733156321Sdamien rt2661_bbp_write(sc, 18, sc->bbp18); 2734156321Sdamien rt2661_bbp_write(sc, 21, sc->bbp21); 2735156321Sdamien rt2661_bbp_write(sc, 22, sc->bbp22); 2736156321Sdamien rt2661_bbp_write(sc, 64, sc->bbp64); 2737156321Sdamien 2738156321Sdamien return bbp66 == 1; 2739156321Sdamien} 2740156321Sdamien#endif 2741156321Sdamien 2742156321Sdamienstatic int 2743178354Ssamrt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap) 2744156321Sdamien{ 2745178354Ssam struct ieee80211com *ic = vap->iv_ic; 2746156321Sdamien struct ieee80211_beacon_offsets bo; 2747156321Sdamien struct rt2661_tx_desc desc; 2748156321Sdamien struct mbuf *m0; 2749156321Sdamien int rate; 2750156321Sdamien 2751178354Ssam m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo); 2752156321Sdamien if (m0 == NULL) { 2753156321Sdamien device_printf(sc->sc_dev, "could not allocate beacon frame\n"); 2754156321Sdamien return ENOBUFS; 2755156321Sdamien } 2756156321Sdamien 2757156321Sdamien /* send beacons at the lowest available rate */ 2758178354Ssam rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2; 2759156321Sdamien 2760156321Sdamien rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ, 2761156321Sdamien m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT); 2762156321Sdamien 2763156321Sdamien /* copy the first 24 bytes of Tx descriptor into NIC memory */ 2764156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24); 2765156321Sdamien 2766156321Sdamien /* copy beacon header and payload into NIC memory */ 2767156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24, 2768156321Sdamien mtod(m0, uint8_t *), m0->m_pkthdr.len); 2769156321Sdamien 2770156321Sdamien m_freem(m0); 2771156321Sdamien 2772156321Sdamien return 0; 2773156321Sdamien} 2774156321Sdamien 2775156321Sdamien/* 2776156321Sdamien * Enable TSF synchronization and tell h/w to start sending beacons for IBSS 2777156321Sdamien * and HostAP operating modes. 2778156321Sdamien */ 2779156321Sdamienstatic void 2780156321Sdamienrt2661_enable_tsf_sync(struct rt2661_softc *sc) 2781156321Sdamien{ 2782178354Ssam struct ifnet *ifp = sc->sc_ifp; 2783178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2784178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2785156321Sdamien uint32_t tmp; 2786156321Sdamien 2787178354Ssam if (vap->iv_opmode != IEEE80211_M_STA) { 2788156321Sdamien /* 2789156321Sdamien * Change default 16ms TBTT adjustment to 8ms. 2790156321Sdamien * Must be done before enabling beacon generation. 2791156321Sdamien */ 2792156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); 2793156321Sdamien } 2794156321Sdamien 2795156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000; 2796156321Sdamien 2797156321Sdamien /* set beacon interval (in 1/16ms unit) */ 2798178354Ssam tmp |= vap->iv_bss->ni_intval * 16; 2799156321Sdamien 2800156321Sdamien tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT; 2801178354Ssam if (vap->iv_opmode == IEEE80211_M_STA) 2802156321Sdamien tmp |= RT2661_TSF_MODE(1); 2803156321Sdamien else 2804156321Sdamien tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON; 2805156321Sdamien 2806156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); 2807156321Sdamien} 2808156321Sdamien 2809156321Sdamien/* 2810156321Sdamien * Retrieve the "Received Signal Strength Indicator" from the raw values 2811156321Sdamien * contained in Rx descriptors. The computation depends on which band the 2812156321Sdamien * frame was received. Correction values taken from the reference driver. 2813156321Sdamien */ 2814156321Sdamienstatic int 2815156321Sdamienrt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw) 2816156321Sdamien{ 2817156321Sdamien int lna, agc, rssi; 2818156321Sdamien 2819156321Sdamien lna = (raw >> 5) & 0x3; 2820156321Sdamien agc = raw & 0x1f; 2821156321Sdamien 2822170530Ssam if (lna == 0) { 2823170530Ssam /* 2824170530Ssam * No mapping available. 2825170530Ssam * 2826170530Ssam * NB: Since RSSI is relative to noise floor, -1 is 2827170530Ssam * adequate for caller to know error happened. 2828170530Ssam */ 2829170530Ssam return -1; 2830170530Ssam } 2831156321Sdamien 2832170530Ssam rssi = (2 * agc) - RT2661_NOISE_FLOOR; 2833170530Ssam 2834156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) { 2835156321Sdamien rssi += sc->rssi_2ghz_corr; 2836156321Sdamien 2837156321Sdamien if (lna == 1) 2838156321Sdamien rssi -= 64; 2839156321Sdamien else if (lna == 2) 2840156321Sdamien rssi -= 74; 2841156321Sdamien else if (lna == 3) 2842156321Sdamien rssi -= 90; 2843156321Sdamien } else { 2844156321Sdamien rssi += sc->rssi_5ghz_corr; 2845156321Sdamien 2846156321Sdamien if (lna == 1) 2847156321Sdamien rssi -= 64; 2848156321Sdamien else if (lna == 2) 2849156321Sdamien rssi -= 86; 2850156321Sdamien else if (lna == 3) 2851156321Sdamien rssi -= 100; 2852156321Sdamien } 2853156321Sdamien return rssi; 2854156321Sdamien} 2855170530Ssam 2856170530Ssamstatic void 2857170530Ssamrt2661_scan_start(struct ieee80211com *ic) 2858170530Ssam{ 2859170530Ssam struct ifnet *ifp = ic->ic_ifp; 2860170530Ssam struct rt2661_softc *sc = ifp->if_softc; 2861170530Ssam uint32_t tmp; 2862170530Ssam 2863170530Ssam /* abort TSF synchronization */ 2864170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 2865170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff); 2866170530Ssam rt2661_set_bssid(sc, ifp->if_broadcastaddr); 2867170530Ssam} 2868170530Ssam 2869170530Ssamstatic void 2870170530Ssamrt2661_scan_end(struct ieee80211com *ic) 2871170530Ssam{ 2872170530Ssam struct ifnet *ifp = ic->ic_ifp; 2873170530Ssam struct rt2661_softc *sc = ifp->if_softc; 2874178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2875170530Ssam 2876170530Ssam rt2661_enable_tsf_sync(sc); 2877170530Ssam /* XXX keep local copy */ 2878178354Ssam rt2661_set_bssid(sc, vap->iv_bss->ni_bssid); 2879170530Ssam} 2880170530Ssam 2881170530Ssamstatic void 2882170530Ssamrt2661_set_channel(struct ieee80211com *ic) 2883170530Ssam{ 2884170530Ssam struct ifnet *ifp = ic->ic_ifp; 2885170530Ssam struct rt2661_softc *sc = ifp->if_softc; 2886170530Ssam 2887170530Ssam RAL_LOCK(sc); 2888170530Ssam rt2661_set_chan(sc, ic->ic_curchan); 2889178354Ssam 2890178354Ssam sc->sc_txtap.wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2891178354Ssam sc->sc_txtap.wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2892178354Ssam sc->sc_rxtap.wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 2893178354Ssam sc->sc_rxtap.wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 2894170530Ssam RAL_UNLOCK(sc); 2895170530Ssam 2896170530Ssam} 2897