1156321Sdamien/* $FreeBSD$ */ 2156321Sdamien 3156321Sdamien/*- 4156321Sdamien * Copyright (c) 2006 5156321Sdamien * Damien Bergamini <damien.bergamini@free.fr> 6156321Sdamien * 7156321Sdamien * Permission to use, copy, modify, and distribute this software for any 8156321Sdamien * purpose with or without fee is hereby granted, provided that the above 9156321Sdamien * copyright notice and this permission notice appear in all copies. 10156321Sdamien * 11156321Sdamien * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12156321Sdamien * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13156321Sdamien * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14156321Sdamien * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15156321Sdamien * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16156321Sdamien * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17156321Sdamien * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18156321Sdamien */ 19156321Sdamien 20156321Sdamien#include <sys/cdefs.h> 21156321Sdamien__FBSDID("$FreeBSD$"); 22156321Sdamien 23156321Sdamien/*- 24156321Sdamien * Ralink Technology RT2561, RT2561S and RT2661 chipset driver 25156321Sdamien * http://www.ralinktech.com/ 26156321Sdamien */ 27156321Sdamien 28156321Sdamien#include <sys/param.h> 29156321Sdamien#include <sys/sysctl.h> 30156321Sdamien#include <sys/sockio.h> 31156321Sdamien#include <sys/mbuf.h> 32156321Sdamien#include <sys/kernel.h> 33156321Sdamien#include <sys/socket.h> 34156321Sdamien#include <sys/systm.h> 35156321Sdamien#include <sys/malloc.h> 36164982Skevlo#include <sys/lock.h> 37164982Skevlo#include <sys/mutex.h> 38156321Sdamien#include <sys/module.h> 39156321Sdamien#include <sys/bus.h> 40156321Sdamien#include <sys/endian.h> 41178354Ssam#include <sys/firmware.h> 42156321Sdamien 43156321Sdamien#include <machine/bus.h> 44156321Sdamien#include <machine/resource.h> 45156321Sdamien#include <sys/rman.h> 46156321Sdamien 47156321Sdamien#include <net/bpf.h> 48156321Sdamien#include <net/if.h> 49156321Sdamien#include <net/if_arp.h> 50156321Sdamien#include <net/ethernet.h> 51156321Sdamien#include <net/if_dl.h> 52156321Sdamien#include <net/if_media.h> 53156321Sdamien#include <net/if_types.h> 54156321Sdamien 55156321Sdamien#include <net80211/ieee80211_var.h> 56156321Sdamien#include <net80211/ieee80211_radiotap.h> 57170530Ssam#include <net80211/ieee80211_regdomain.h> 58206358Srpaulo#include <net80211/ieee80211_ratectl.h> 59156321Sdamien 60156321Sdamien#include <netinet/in.h> 61156321Sdamien#include <netinet/in_systm.h> 62156321Sdamien#include <netinet/in_var.h> 63156321Sdamien#include <netinet/ip.h> 64156321Sdamien#include <netinet/if_ether.h> 65156321Sdamien 66156327Ssilby#include <dev/ral/rt2661reg.h> 67156327Ssilby#include <dev/ral/rt2661var.h> 68156321Sdamien 69178354Ssam#define RAL_DEBUG 70156321Sdamien#ifdef RAL_DEBUG 71178354Ssam#define DPRINTF(sc, fmt, ...) do { \ 72178354Ssam if (sc->sc_debug > 0) \ 73178354Ssam printf(fmt, __VA_ARGS__); \ 74178354Ssam} while (0) 75178354Ssam#define DPRINTFN(sc, n, fmt, ...) do { \ 76178354Ssam if (sc->sc_debug >= (n)) \ 77178354Ssam printf(fmt, __VA_ARGS__); \ 78178354Ssam} while (0) 79156321Sdamien#else 80178354Ssam#define DPRINTF(sc, fmt, ...) 81178354Ssam#define DPRINTFN(sc, n, fmt, ...) 82156321Sdamien#endif 83156321Sdamien 84178354Ssamstatic struct ieee80211vap *rt2661_vap_create(struct ieee80211com *, 85234753Sdim const char [IFNAMSIZ], int, enum ieee80211_opmode, 86234753Sdim int, const uint8_t [IEEE80211_ADDR_LEN], 87234753Sdim const uint8_t [IEEE80211_ADDR_LEN]); 88178354Ssamstatic void rt2661_vap_delete(struct ieee80211vap *); 89156321Sdamienstatic void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int, 90156321Sdamien int); 91156321Sdamienstatic int rt2661_alloc_tx_ring(struct rt2661_softc *, 92156321Sdamien struct rt2661_tx_ring *, int); 93156321Sdamienstatic void rt2661_reset_tx_ring(struct rt2661_softc *, 94156321Sdamien struct rt2661_tx_ring *); 95156321Sdamienstatic void rt2661_free_tx_ring(struct rt2661_softc *, 96156321Sdamien struct rt2661_tx_ring *); 97156321Sdamienstatic int rt2661_alloc_rx_ring(struct rt2661_softc *, 98156321Sdamien struct rt2661_rx_ring *, int); 99156321Sdamienstatic void rt2661_reset_rx_ring(struct rt2661_softc *, 100156321Sdamien struct rt2661_rx_ring *); 101156321Sdamienstatic void rt2661_free_rx_ring(struct rt2661_softc *, 102156321Sdamien struct rt2661_rx_ring *); 103178354Ssamstatic int rt2661_newstate(struct ieee80211vap *, 104156321Sdamien enum ieee80211_state, int); 105156321Sdamienstatic uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t); 106156321Sdamienstatic void rt2661_rx_intr(struct rt2661_softc *); 107156321Sdamienstatic void rt2661_tx_intr(struct rt2661_softc *); 108156321Sdamienstatic void rt2661_tx_dma_intr(struct rt2661_softc *, 109156321Sdamien struct rt2661_tx_ring *); 110156321Sdamienstatic void rt2661_mcu_beacon_expire(struct rt2661_softc *); 111156321Sdamienstatic void rt2661_mcu_wakeup(struct rt2661_softc *); 112156321Sdamienstatic void rt2661_mcu_cmd_intr(struct rt2661_softc *); 113170530Ssamstatic void rt2661_scan_start(struct ieee80211com *); 114170530Ssamstatic void rt2661_scan_end(struct ieee80211com *); 115170530Ssamstatic void rt2661_set_channel(struct ieee80211com *); 116156321Sdamienstatic void rt2661_setup_tx_desc(struct rt2661_softc *, 117156321Sdamien struct rt2661_tx_desc *, uint32_t, uint16_t, int, 118156321Sdamien int, const bus_dma_segment_t *, int, int); 119156321Sdamienstatic int rt2661_tx_data(struct rt2661_softc *, struct mbuf *, 120156321Sdamien struct ieee80211_node *, int); 121156321Sdamienstatic int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *, 122156321Sdamien struct ieee80211_node *); 123178354Ssamstatic void rt2661_start_locked(struct ifnet *); 124156321Sdamienstatic void rt2661_start(struct ifnet *); 125178354Ssamstatic int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *, 126178354Ssam const struct ieee80211_bpf_params *); 127165352Sbmsstatic void rt2661_watchdog(void *); 128156321Sdamienstatic int rt2661_ioctl(struct ifnet *, u_long, caddr_t); 129156321Sdamienstatic void rt2661_bbp_write(struct rt2661_softc *, uint8_t, 130156321Sdamien uint8_t); 131156321Sdamienstatic uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t); 132156321Sdamienstatic void rt2661_rf_write(struct rt2661_softc *, uint8_t, 133156321Sdamien uint32_t); 134156321Sdamienstatic int rt2661_tx_cmd(struct rt2661_softc *, uint8_t, 135156321Sdamien uint16_t); 136156321Sdamienstatic void rt2661_select_antenna(struct rt2661_softc *); 137156321Sdamienstatic void rt2661_enable_mrr(struct rt2661_softc *); 138156321Sdamienstatic void rt2661_set_txpreamble(struct rt2661_softc *); 139156321Sdamienstatic void rt2661_set_basicrates(struct rt2661_softc *, 140156321Sdamien const struct ieee80211_rateset *); 141156321Sdamienstatic void rt2661_select_band(struct rt2661_softc *, 142156321Sdamien struct ieee80211_channel *); 143156321Sdamienstatic void rt2661_set_chan(struct rt2661_softc *, 144156321Sdamien struct ieee80211_channel *); 145156321Sdamienstatic void rt2661_set_bssid(struct rt2661_softc *, 146156321Sdamien const uint8_t *); 147156321Sdamienstatic void rt2661_set_macaddr(struct rt2661_softc *, 148156321Sdamien const uint8_t *); 149178354Ssamstatic void rt2661_update_promisc(struct ifnet *); 150156321Sdamienstatic int rt2661_wme_update(struct ieee80211com *) __unused; 151156321Sdamienstatic void rt2661_update_slot(struct ifnet *); 152156321Sdamienstatic const char *rt2661_get_rf(int); 153178354Ssamstatic void rt2661_read_eeprom(struct rt2661_softc *, 154190526Ssam uint8_t macaddr[IEEE80211_ADDR_LEN]); 155156321Sdamienstatic int rt2661_bbp_init(struct rt2661_softc *); 156178354Ssamstatic void rt2661_init_locked(struct rt2661_softc *); 157156321Sdamienstatic void rt2661_init(void *); 158178354Ssamstatic void rt2661_stop_locked(struct rt2661_softc *); 159156321Sdamienstatic void rt2661_stop(void *); 160178354Ssamstatic int rt2661_load_microcode(struct rt2661_softc *); 161156321Sdamien#ifdef notyet 162156321Sdamienstatic void rt2661_rx_tune(struct rt2661_softc *); 163156321Sdamienstatic void rt2661_radar_start(struct rt2661_softc *); 164156321Sdamienstatic int rt2661_radar_stop(struct rt2661_softc *); 165156321Sdamien#endif 166178354Ssamstatic int rt2661_prepare_beacon(struct rt2661_softc *, 167178354Ssam struct ieee80211vap *); 168156321Sdamienstatic void rt2661_enable_tsf_sync(struct rt2661_softc *); 169192468Ssamstatic void rt2661_enable_tsf(struct rt2661_softc *); 170156321Sdamienstatic int rt2661_get_rssi(struct rt2661_softc *, uint8_t); 171156321Sdamien 172156321Sdamienstatic const struct { 173156321Sdamien uint32_t reg; 174156321Sdamien uint32_t val; 175156321Sdamien} rt2661_def_mac[] = { 176156321Sdamien RT2661_DEF_MAC 177156321Sdamien}; 178156321Sdamien 179156321Sdamienstatic const struct { 180156321Sdamien uint8_t reg; 181156321Sdamien uint8_t val; 182156321Sdamien} rt2661_def_bbp[] = { 183156321Sdamien RT2661_DEF_BBP 184156321Sdamien}; 185156321Sdamien 186156321Sdamienstatic const struct rfprog { 187156321Sdamien uint8_t chan; 188156321Sdamien uint32_t r1, r2, r3, r4; 189156321Sdamien} rt2661_rf5225_1[] = { 190156321Sdamien RT2661_RF5225_1 191156321Sdamien}, rt2661_rf5225_2[] = { 192156321Sdamien RT2661_RF5225_2 193156321Sdamien}; 194156321Sdamien 195156321Sdamienint 196156321Sdamienrt2661_attach(device_t dev, int id) 197156321Sdamien{ 198156321Sdamien struct rt2661_softc *sc = device_get_softc(dev); 199178354Ssam struct ieee80211com *ic; 200156321Sdamien struct ifnet *ifp; 201156321Sdamien uint32_t val; 202178354Ssam int error, ac, ntries; 203178354Ssam uint8_t bands; 204190526Ssam uint8_t macaddr[IEEE80211_ADDR_LEN]; 205156321Sdamien 206178354Ssam sc->sc_id = id; 207156321Sdamien sc->sc_dev = dev; 208156321Sdamien 209178354Ssam ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 210178354Ssam if (ifp == NULL) { 211178354Ssam device_printf(sc->sc_dev, "can not if_alloc()\n"); 212178354Ssam return ENOMEM; 213178354Ssam } 214178354Ssam ic = ifp->if_l2com; 215178354Ssam 216156321Sdamien mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 217156321Sdamien MTX_DEF | MTX_RECURSE); 218156321Sdamien 219165352Sbms callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); 220156321Sdamien 221156321Sdamien /* wait for NIC to initialize */ 222156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 223156321Sdamien if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0) 224156321Sdamien break; 225156321Sdamien DELAY(1000); 226156321Sdamien } 227156321Sdamien if (ntries == 1000) { 228156321Sdamien device_printf(sc->sc_dev, 229156321Sdamien "timeout waiting for NIC to initialize\n"); 230156321Sdamien error = EIO; 231156321Sdamien goto fail1; 232156321Sdamien } 233156321Sdamien 234156321Sdamien /* retrieve RF rev. no and various other things from EEPROM */ 235190526Ssam rt2661_read_eeprom(sc, macaddr); 236156321Sdamien 237156321Sdamien device_printf(dev, "MAC/BBP RT%X, RF %s\n", val, 238156321Sdamien rt2661_get_rf(sc->rf_rev)); 239156321Sdamien 240156321Sdamien /* 241156321Sdamien * Allocate Tx and Rx rings. 242156321Sdamien */ 243156321Sdamien for (ac = 0; ac < 4; ac++) { 244156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->txq[ac], 245156321Sdamien RT2661_TX_RING_COUNT); 246156321Sdamien if (error != 0) { 247156321Sdamien device_printf(sc->sc_dev, 248156321Sdamien "could not allocate Tx ring %d\n", ac); 249156321Sdamien goto fail2; 250156321Sdamien } 251156321Sdamien } 252156321Sdamien 253156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT); 254156321Sdamien if (error != 0) { 255156321Sdamien device_printf(sc->sc_dev, "could not allocate Mgt ring\n"); 256156321Sdamien goto fail2; 257156321Sdamien } 258156321Sdamien 259156321Sdamien error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT); 260156321Sdamien if (error != 0) { 261156321Sdamien device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 262156321Sdamien goto fail3; 263156321Sdamien } 264156321Sdamien 265156321Sdamien ifp->if_softc = sc; 266156321Sdamien if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 267156321Sdamien ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 268156321Sdamien ifp->if_init = rt2661_init; 269156321Sdamien ifp->if_ioctl = rt2661_ioctl; 270156321Sdamien ifp->if_start = rt2661_start; 271207554Ssobomax IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 272207554Ssobomax ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 273156321Sdamien IFQ_SET_READY(&ifp->if_snd); 274156321Sdamien 275156321Sdamien ic->ic_ifp = ifp; 276178354Ssam ic->ic_opmode = IEEE80211_M_STA; 277156321Sdamien ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 278156321Sdamien 279156321Sdamien /* set device capabilities */ 280156321Sdamien ic->ic_caps = 281178957Ssam IEEE80211_C_STA /* station mode */ 282178957Ssam | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 283178354Ssam | IEEE80211_C_HOSTAP /* hostap mode */ 284178354Ssam | IEEE80211_C_MONITOR /* monitor mode */ 285178354Ssam | IEEE80211_C_AHDEMO /* adhoc demo mode */ 286178354Ssam | IEEE80211_C_WDS /* 4-address traffic works */ 287195618Srpaulo | IEEE80211_C_MBSS /* mesh point link mode */ 288178354Ssam | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 289178354Ssam | IEEE80211_C_SHSLOT /* short slot time supported */ 290178354Ssam | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 291178354Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 292156407Sdamien#ifdef notyet 293178354Ssam | IEEE80211_C_TXFRAG /* handle tx frags */ 294178354Ssam | IEEE80211_C_WME /* 802.11e */ 295156407Sdamien#endif 296178354Ssam ; 297156321Sdamien 298170530Ssam bands = 0; 299170530Ssam setbit(&bands, IEEE80211_MODE_11B); 300170530Ssam setbit(&bands, IEEE80211_MODE_11G); 301170530Ssam if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) 302170530Ssam setbit(&bands, IEEE80211_MODE_11A); 303178354Ssam ieee80211_init_channels(ic, NULL, &bands); 304156321Sdamien 305190526Ssam ieee80211_ifattach(ic, macaddr); 306178354Ssam#if 0 307178354Ssam ic->ic_wme.wme_update = rt2661_wme_update; 308178354Ssam#endif 309170530Ssam ic->ic_scan_start = rt2661_scan_start; 310170530Ssam ic->ic_scan_end = rt2661_scan_end; 311170530Ssam ic->ic_set_channel = rt2661_set_channel; 312156321Sdamien ic->ic_updateslot = rt2661_update_slot; 313178354Ssam ic->ic_update_promisc = rt2661_update_promisc; 314178354Ssam ic->ic_raw_xmit = rt2661_raw_xmit; 315156321Sdamien 316178354Ssam ic->ic_vap_create = rt2661_vap_create; 317178354Ssam ic->ic_vap_delete = rt2661_vap_delete; 318156321Sdamien 319192468Ssam ieee80211_radiotap_attach(ic, 320192468Ssam &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 321192468Ssam RT2661_TX_RADIOTAP_PRESENT, 322192468Ssam &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 323192468Ssam RT2661_RX_RADIOTAP_PRESENT); 324178354Ssam 325178354Ssam#ifdef RAL_DEBUG 326156321Sdamien SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 327178354Ssam SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 328178354Ssam "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 329178354Ssam#endif 330156321Sdamien if (bootverbose) 331156321Sdamien ieee80211_announce(ic); 332156321Sdamien 333156321Sdamien return 0; 334156321Sdamien 335156321Sdamienfail3: rt2661_free_tx_ring(sc, &sc->mgtq); 336156321Sdamienfail2: while (--ac >= 0) 337156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[ac]); 338156321Sdamienfail1: mtx_destroy(&sc->sc_mtx); 339178354Ssam if_free(ifp); 340156321Sdamien return error; 341156321Sdamien} 342156321Sdamien 343156321Sdamienint 344156321Sdamienrt2661_detach(void *xsc) 345156321Sdamien{ 346156321Sdamien struct rt2661_softc *sc = xsc; 347178354Ssam struct ifnet *ifp = sc->sc_ifp; 348178354Ssam struct ieee80211com *ic = ifp->if_l2com; 349170530Ssam 350178038Ssam RAL_LOCK(sc); 351178038Ssam rt2661_stop_locked(sc); 352178038Ssam RAL_UNLOCK(sc); 353156321Sdamien 354156321Sdamien ieee80211_ifdetach(ic); 355156321Sdamien 356156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[0]); 357156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[1]); 358156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[2]); 359156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[3]); 360156321Sdamien rt2661_free_tx_ring(sc, &sc->mgtq); 361156321Sdamien rt2661_free_rx_ring(sc, &sc->rxq); 362156321Sdamien 363156321Sdamien if_free(ifp); 364156321Sdamien 365156321Sdamien mtx_destroy(&sc->sc_mtx); 366156321Sdamien 367156321Sdamien return 0; 368156321Sdamien} 369156321Sdamien 370178354Ssamstatic struct ieee80211vap * 371234753Sdimrt2661_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 372234753Sdim enum ieee80211_opmode opmode, int flags, 373234753Sdim const uint8_t bssid[IEEE80211_ADDR_LEN], 374234753Sdim const uint8_t mac[IEEE80211_ADDR_LEN]) 375178354Ssam{ 376178354Ssam struct ifnet *ifp = ic->ic_ifp; 377178354Ssam struct rt2661_vap *rvp; 378178354Ssam struct ieee80211vap *vap; 379178354Ssam 380178354Ssam switch (opmode) { 381178354Ssam case IEEE80211_M_STA: 382178354Ssam case IEEE80211_M_IBSS: 383178354Ssam case IEEE80211_M_AHDEMO: 384178354Ssam case IEEE80211_M_MONITOR: 385178354Ssam case IEEE80211_M_HOSTAP: 386195618Srpaulo case IEEE80211_M_MBSS: 387195618Srpaulo /* XXXRP: TBD */ 388178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 389178354Ssam if_printf(ifp, "only 1 vap supported\n"); 390178354Ssam return NULL; 391178354Ssam } 392178354Ssam if (opmode == IEEE80211_M_STA) 393178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 394178354Ssam break; 395178354Ssam case IEEE80211_M_WDS: 396178354Ssam if (TAILQ_EMPTY(&ic->ic_vaps) || 397178354Ssam ic->ic_opmode != IEEE80211_M_HOSTAP) { 398178354Ssam if_printf(ifp, "wds only supported in ap mode\n"); 399178354Ssam return NULL; 400178354Ssam } 401178354Ssam /* 402178354Ssam * Silently remove any request for a unique 403178354Ssam * bssid; WDS vap's always share the local 404178354Ssam * mac address. 405178354Ssam */ 406178354Ssam flags &= ~IEEE80211_CLONE_BSSID; 407178354Ssam break; 408178354Ssam default: 409178354Ssam if_printf(ifp, "unknown opmode %d\n", opmode); 410178354Ssam return NULL; 411178354Ssam } 412178354Ssam rvp = (struct rt2661_vap *) malloc(sizeof(struct rt2661_vap), 413178354Ssam M_80211_VAP, M_NOWAIT | M_ZERO); 414178354Ssam if (rvp == NULL) 415178354Ssam return NULL; 416178354Ssam vap = &rvp->ral_vap; 417178354Ssam ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 418178354Ssam 419178354Ssam /* override state transition machine */ 420178354Ssam rvp->ral_newstate = vap->iv_newstate; 421178354Ssam vap->iv_newstate = rt2661_newstate; 422178354Ssam#if 0 423178354Ssam vap->iv_update_beacon = rt2661_beacon_update; 424178354Ssam#endif 425178354Ssam 426206358Srpaulo ieee80211_ratectl_init(vap); 427178354Ssam /* complete setup */ 428178354Ssam ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status); 429178354Ssam if (TAILQ_FIRST(&ic->ic_vaps) == vap) 430178354Ssam ic->ic_opmode = opmode; 431178354Ssam return vap; 432178354Ssam} 433178354Ssam 434178354Ssamstatic void 435178354Ssamrt2661_vap_delete(struct ieee80211vap *vap) 436178354Ssam{ 437178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 438178354Ssam 439206358Srpaulo ieee80211_ratectl_deinit(vap); 440178354Ssam ieee80211_vap_detach(vap); 441178354Ssam free(rvp, M_80211_VAP); 442178354Ssam} 443178354Ssam 444156321Sdamienvoid 445156321Sdamienrt2661_shutdown(void *xsc) 446156321Sdamien{ 447156321Sdamien struct rt2661_softc *sc = xsc; 448156321Sdamien 449156321Sdamien rt2661_stop(sc); 450156321Sdamien} 451156321Sdamien 452156321Sdamienvoid 453156321Sdamienrt2661_suspend(void *xsc) 454156321Sdamien{ 455156321Sdamien struct rt2661_softc *sc = xsc; 456156321Sdamien 457156321Sdamien rt2661_stop(sc); 458156321Sdamien} 459156321Sdamien 460156321Sdamienvoid 461156321Sdamienrt2661_resume(void *xsc) 462156321Sdamien{ 463156321Sdamien struct rt2661_softc *sc = xsc; 464178354Ssam struct ifnet *ifp = sc->sc_ifp; 465156321Sdamien 466178354Ssam if (ifp->if_flags & IFF_UP) 467178354Ssam rt2661_init(sc); 468156321Sdamien} 469156321Sdamien 470156321Sdamienstatic void 471156321Sdamienrt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 472156321Sdamien{ 473156321Sdamien if (error != 0) 474156321Sdamien return; 475156321Sdamien 476156321Sdamien KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 477156321Sdamien 478156321Sdamien *(bus_addr_t *)arg = segs[0].ds_addr; 479156321Sdamien} 480156321Sdamien 481156321Sdamienstatic int 482156321Sdamienrt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring, 483156321Sdamien int count) 484156321Sdamien{ 485156321Sdamien int i, error; 486156321Sdamien 487156321Sdamien ring->count = count; 488156321Sdamien ring->queued = 0; 489156321Sdamien ring->cur = ring->next = ring->stat = 0; 490156321Sdamien 491171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 492171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 493171535Skevlo count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE, 494171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 495156321Sdamien if (error != 0) { 496156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 497156321Sdamien goto fail; 498156321Sdamien } 499156321Sdamien 500156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 501156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 502156321Sdamien if (error != 0) { 503156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 504156321Sdamien goto fail; 505156321Sdamien } 506156321Sdamien 507156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 508156321Sdamien count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 509156321Sdamien 0); 510156321Sdamien if (error != 0) { 511156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 512156321Sdamien goto fail; 513156321Sdamien } 514156321Sdamien 515156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF, 516156321Sdamien M_NOWAIT | M_ZERO); 517156321Sdamien if (ring->data == NULL) { 518156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 519156321Sdamien error = ENOMEM; 520156321Sdamien goto fail; 521156321Sdamien } 522156321Sdamien 523171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 524171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 525171535Skevlo RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 526156321Sdamien if (error != 0) { 527156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 528156321Sdamien goto fail; 529156321Sdamien } 530156321Sdamien 531156321Sdamien for (i = 0; i < count; i++) { 532156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, 533156321Sdamien &ring->data[i].map); 534156321Sdamien if (error != 0) { 535156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 536156321Sdamien goto fail; 537156321Sdamien } 538156321Sdamien } 539156321Sdamien 540156321Sdamien return 0; 541156321Sdamien 542156321Sdamienfail: rt2661_free_tx_ring(sc, ring); 543156321Sdamien return error; 544156321Sdamien} 545156321Sdamien 546156321Sdamienstatic void 547156321Sdamienrt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 548156321Sdamien{ 549156321Sdamien struct rt2661_tx_desc *desc; 550156321Sdamien struct rt2661_tx_data *data; 551156321Sdamien int i; 552156321Sdamien 553156321Sdamien for (i = 0; i < ring->count; i++) { 554156321Sdamien desc = &ring->desc[i]; 555156321Sdamien data = &ring->data[i]; 556156321Sdamien 557156321Sdamien if (data->m != NULL) { 558156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 559156321Sdamien BUS_DMASYNC_POSTWRITE); 560156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 561156321Sdamien m_freem(data->m); 562156321Sdamien data->m = NULL; 563156321Sdamien } 564156321Sdamien 565156321Sdamien if (data->ni != NULL) { 566156321Sdamien ieee80211_free_node(data->ni); 567156321Sdamien data->ni = NULL; 568156321Sdamien } 569156321Sdamien 570156321Sdamien desc->flags = 0; 571156321Sdamien } 572156321Sdamien 573156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 574156321Sdamien 575156321Sdamien ring->queued = 0; 576156321Sdamien ring->cur = ring->next = ring->stat = 0; 577156321Sdamien} 578156321Sdamien 579156321Sdamienstatic void 580156321Sdamienrt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 581156321Sdamien{ 582156321Sdamien struct rt2661_tx_data *data; 583156321Sdamien int i; 584156321Sdamien 585156321Sdamien if (ring->desc != NULL) { 586156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 587156321Sdamien BUS_DMASYNC_POSTWRITE); 588156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 589156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 590156321Sdamien } 591156321Sdamien 592156321Sdamien if (ring->desc_dmat != NULL) 593156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 594156321Sdamien 595156321Sdamien if (ring->data != NULL) { 596156321Sdamien for (i = 0; i < ring->count; i++) { 597156321Sdamien data = &ring->data[i]; 598156321Sdamien 599156321Sdamien if (data->m != NULL) { 600156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 601156321Sdamien BUS_DMASYNC_POSTWRITE); 602156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 603156321Sdamien m_freem(data->m); 604156321Sdamien } 605156321Sdamien 606156321Sdamien if (data->ni != NULL) 607156321Sdamien ieee80211_free_node(data->ni); 608156321Sdamien 609156321Sdamien if (data->map != NULL) 610156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 611156321Sdamien } 612156321Sdamien 613156321Sdamien free(ring->data, M_DEVBUF); 614156321Sdamien } 615156321Sdamien 616156321Sdamien if (ring->data_dmat != NULL) 617156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 618156321Sdamien} 619156321Sdamien 620156321Sdamienstatic int 621156321Sdamienrt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring, 622156321Sdamien int count) 623156321Sdamien{ 624156321Sdamien struct rt2661_rx_desc *desc; 625156321Sdamien struct rt2661_rx_data *data; 626156321Sdamien bus_addr_t physaddr; 627156321Sdamien int i, error; 628156321Sdamien 629156321Sdamien ring->count = count; 630156321Sdamien ring->cur = ring->next = 0; 631156321Sdamien 632171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 633171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 634171535Skevlo count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE, 635171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 636156321Sdamien if (error != 0) { 637156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 638156321Sdamien goto fail; 639156321Sdamien } 640156321Sdamien 641156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 642156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 643156321Sdamien if (error != 0) { 644156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 645156321Sdamien goto fail; 646156321Sdamien } 647156321Sdamien 648156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 649156321Sdamien count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 650156321Sdamien 0); 651156321Sdamien if (error != 0) { 652156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 653156321Sdamien goto fail; 654156321Sdamien } 655156321Sdamien 656156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF, 657156321Sdamien M_NOWAIT | M_ZERO); 658156321Sdamien if (ring->data == NULL) { 659156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 660156321Sdamien error = ENOMEM; 661156321Sdamien goto fail; 662156321Sdamien } 663156321Sdamien 664156321Sdamien /* 665156321Sdamien * Pre-allocate Rx buffers and populate Rx ring. 666156321Sdamien */ 667171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 668171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 669171535Skevlo 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 670156321Sdamien if (error != 0) { 671156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 672156321Sdamien goto fail; 673156321Sdamien } 674156321Sdamien 675156321Sdamien for (i = 0; i < count; i++) { 676156321Sdamien desc = &sc->rxq.desc[i]; 677156321Sdamien data = &sc->rxq.data[i]; 678156321Sdamien 679156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 680156321Sdamien if (error != 0) { 681156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 682156321Sdamien goto fail; 683156321Sdamien } 684156321Sdamien 685248078Smarius data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 686156321Sdamien if (data->m == NULL) { 687156321Sdamien device_printf(sc->sc_dev, 688156321Sdamien "could not allocate rx mbuf\n"); 689156321Sdamien error = ENOMEM; 690156321Sdamien goto fail; 691156321Sdamien } 692156321Sdamien 693156321Sdamien error = bus_dmamap_load(ring->data_dmat, data->map, 694156321Sdamien mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr, 695156321Sdamien &physaddr, 0); 696156321Sdamien if (error != 0) { 697156321Sdamien device_printf(sc->sc_dev, 698156321Sdamien "could not load rx buf DMA map"); 699156321Sdamien goto fail; 700156321Sdamien } 701156321Sdamien 702156321Sdamien desc->flags = htole32(RT2661_RX_BUSY); 703156321Sdamien desc->physaddr = htole32(physaddr); 704156321Sdamien } 705156321Sdamien 706156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 707156321Sdamien 708156321Sdamien return 0; 709156321Sdamien 710156321Sdamienfail: rt2661_free_rx_ring(sc, ring); 711156321Sdamien return error; 712156321Sdamien} 713156321Sdamien 714156321Sdamienstatic void 715156321Sdamienrt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 716156321Sdamien{ 717156321Sdamien int i; 718156321Sdamien 719156321Sdamien for (i = 0; i < ring->count; i++) 720156321Sdamien ring->desc[i].flags = htole32(RT2661_RX_BUSY); 721156321Sdamien 722156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 723156321Sdamien 724156321Sdamien ring->cur = ring->next = 0; 725156321Sdamien} 726156321Sdamien 727156321Sdamienstatic void 728156321Sdamienrt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 729156321Sdamien{ 730156321Sdamien struct rt2661_rx_data *data; 731156321Sdamien int i; 732156321Sdamien 733156321Sdamien if (ring->desc != NULL) { 734156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 735156321Sdamien BUS_DMASYNC_POSTWRITE); 736156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 737156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 738156321Sdamien } 739156321Sdamien 740156321Sdamien if (ring->desc_dmat != NULL) 741156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 742156321Sdamien 743156321Sdamien if (ring->data != NULL) { 744156321Sdamien for (i = 0; i < ring->count; i++) { 745156321Sdamien data = &ring->data[i]; 746156321Sdamien 747156321Sdamien if (data->m != NULL) { 748156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 749156321Sdamien BUS_DMASYNC_POSTREAD); 750156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 751156321Sdamien m_freem(data->m); 752156321Sdamien } 753156321Sdamien 754156321Sdamien if (data->map != NULL) 755156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 756156321Sdamien } 757156321Sdamien 758156321Sdamien free(ring->data, M_DEVBUF); 759156321Sdamien } 760156321Sdamien 761156321Sdamien if (ring->data_dmat != NULL) 762156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 763156321Sdamien} 764156321Sdamien 765156321Sdamienstatic int 766178354Ssamrt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 767156321Sdamien{ 768178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 769178354Ssam struct ieee80211com *ic = vap->iv_ic; 770156321Sdamien struct rt2661_softc *sc = ic->ic_ifp->if_softc; 771178354Ssam int error; 772156321Sdamien 773178354Ssam if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 774178354Ssam uint32_t tmp; 775156321Sdamien 776178354Ssam /* abort TSF synchronization */ 777178354Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 778178354Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); 779178354Ssam } 780156321Sdamien 781178354Ssam error = rvp->ral_newstate(vap, nstate, arg); 782156321Sdamien 783178354Ssam if (error == 0 && nstate == IEEE80211_S_RUN) { 784178354Ssam struct ieee80211_node *ni = vap->iv_bss; 785178354Ssam 786178354Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) { 787156321Sdamien rt2661_enable_mrr(sc); 788156321Sdamien rt2661_set_txpreamble(sc); 789156321Sdamien rt2661_set_basicrates(sc, &ni->ni_rates); 790156321Sdamien rt2661_set_bssid(sc, ni->ni_bssid); 791156321Sdamien } 792156321Sdamien 793178354Ssam if (vap->iv_opmode == IEEE80211_M_HOSTAP || 794195618Srpaulo vap->iv_opmode == IEEE80211_M_IBSS || 795195618Srpaulo vap->iv_opmode == IEEE80211_M_MBSS) { 796178354Ssam error = rt2661_prepare_beacon(sc, vap); 797178354Ssam if (error != 0) 798178354Ssam return error; 799156321Sdamien } 800184345Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) 801156321Sdamien rt2661_enable_tsf_sync(sc); 802192468Ssam else 803192468Ssam rt2661_enable_tsf(sc); 804178354Ssam } 805178354Ssam return error; 806156321Sdamien} 807156321Sdamien 808156321Sdamien/* 809156321Sdamien * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 810156321Sdamien * 93C66). 811156321Sdamien */ 812156321Sdamienstatic uint16_t 813156321Sdamienrt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr) 814156321Sdamien{ 815156321Sdamien uint32_t tmp; 816156321Sdamien uint16_t val; 817156321Sdamien int n; 818156321Sdamien 819156321Sdamien /* clock C once before the first command */ 820156321Sdamien RT2661_EEPROM_CTL(sc, 0); 821156321Sdamien 822156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 823156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 824156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 825156321Sdamien 826156321Sdamien /* write start bit (1) */ 827156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 828156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 829156321Sdamien 830156321Sdamien /* write READ opcode (10) */ 831156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 832156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 833156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 834156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 835156321Sdamien 836156321Sdamien /* write address (A5-A0 or A7-A0) */ 837156321Sdamien n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7; 838156321Sdamien for (; n >= 0; n--) { 839156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 840156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D)); 841156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 842156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C); 843156321Sdamien } 844156321Sdamien 845156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 846156321Sdamien 847156321Sdamien /* read data Q15-Q0 */ 848156321Sdamien val = 0; 849156321Sdamien for (n = 15; n >= 0; n--) { 850156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 851156321Sdamien tmp = RAL_READ(sc, RT2661_E2PROM_CSR); 852156321Sdamien val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n; 853156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 854156321Sdamien } 855156321Sdamien 856156321Sdamien RT2661_EEPROM_CTL(sc, 0); 857156321Sdamien 858156321Sdamien /* clear Chip Select and clock C */ 859156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 860156321Sdamien RT2661_EEPROM_CTL(sc, 0); 861156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_C); 862156321Sdamien 863156321Sdamien return val; 864156321Sdamien} 865156321Sdamien 866156321Sdamienstatic void 867156321Sdamienrt2661_tx_intr(struct rt2661_softc *sc) 868156321Sdamien{ 869178354Ssam struct ifnet *ifp = sc->sc_ifp; 870156321Sdamien struct rt2661_tx_ring *txq; 871156321Sdamien struct rt2661_tx_data *data; 872156321Sdamien uint32_t val; 873156321Sdamien int qid, retrycnt; 874206358Srpaulo struct ieee80211vap *vap; 875156321Sdamien 876156321Sdamien for (;;) { 877170530Ssam struct ieee80211_node *ni; 878170530Ssam struct mbuf *m; 879170530Ssam 880156321Sdamien val = RAL_READ(sc, RT2661_STA_CSR4); 881156321Sdamien if (!(val & RT2661_TX_STAT_VALID)) 882156321Sdamien break; 883156321Sdamien 884156321Sdamien /* retrieve the queue in which this frame was sent */ 885156321Sdamien qid = RT2661_TX_QID(val); 886156321Sdamien txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq; 887156321Sdamien 888156321Sdamien /* retrieve rate control algorithm context */ 889156321Sdamien data = &txq->data[txq->stat]; 890170530Ssam m = data->m; 891170530Ssam data->m = NULL; 892170530Ssam ni = data->ni; 893170530Ssam data->ni = NULL; 894156321Sdamien 895159301Sfjoe /* if no frame has been sent, ignore */ 896170530Ssam if (ni == NULL) 897159301Sfjoe continue; 898206371Srpaulo else 899206371Srpaulo vap = ni->ni_vap; 900159301Sfjoe 901156321Sdamien switch (RT2661_TX_RESULT(val)) { 902156321Sdamien case RT2661_TX_SUCCESS: 903156321Sdamien retrycnt = RT2661_TX_RETRYCNT(val); 904156321Sdamien 905178354Ssam DPRINTFN(sc, 10, "data frame sent successfully after " 906178354Ssam "%d retries\n", retrycnt); 907178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 908206358Srpaulo ieee80211_ratectl_tx_complete(vap, ni, 909206358Srpaulo IEEE80211_RATECTL_TX_SUCCESS, 910206358Srpaulo &retrycnt, NULL); 911156321Sdamien ifp->if_opackets++; 912156321Sdamien break; 913156321Sdamien 914156321Sdamien case RT2661_TX_RETRY_FAIL: 915178354Ssam retrycnt = RT2661_TX_RETRYCNT(val); 916178354Ssam 917178354Ssam DPRINTFN(sc, 9, "%s\n", 918178354Ssam "sending data frame failed (too much retries)"); 919178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 920206358Srpaulo ieee80211_ratectl_tx_complete(vap, ni, 921206358Srpaulo IEEE80211_RATECTL_TX_FAILURE, 922206358Srpaulo &retrycnt, NULL); 923156321Sdamien ifp->if_oerrors++; 924156321Sdamien break; 925156321Sdamien 926156321Sdamien default: 927156321Sdamien /* other failure */ 928156321Sdamien device_printf(sc->sc_dev, 929156321Sdamien "sending data frame failed 0x%08x\n", val); 930156321Sdamien ifp->if_oerrors++; 931156321Sdamien } 932156321Sdamien 933178354Ssam DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat); 934156321Sdamien 935156321Sdamien txq->queued--; 936156321Sdamien if (++txq->stat >= txq->count) /* faster than % count */ 937156321Sdamien txq->stat = 0; 938170530Ssam 939170530Ssam if (m->m_flags & M_TXCB) 940170530Ssam ieee80211_process_callback(ni, m, 941170530Ssam RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS); 942170530Ssam m_freem(m); 943170530Ssam ieee80211_free_node(ni); 944156321Sdamien } 945156321Sdamien 946156321Sdamien sc->sc_tx_timer = 0; 947156321Sdamien ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 948178354Ssam 949178354Ssam rt2661_start_locked(ifp); 950156321Sdamien} 951156321Sdamien 952156321Sdamienstatic void 953156321Sdamienrt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq) 954156321Sdamien{ 955156321Sdamien struct rt2661_tx_desc *desc; 956156321Sdamien struct rt2661_tx_data *data; 957156321Sdamien 958156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD); 959156321Sdamien 960156321Sdamien for (;;) { 961156321Sdamien desc = &txq->desc[txq->next]; 962156321Sdamien data = &txq->data[txq->next]; 963156321Sdamien 964156321Sdamien if ((le32toh(desc->flags) & RT2661_TX_BUSY) || 965156321Sdamien !(le32toh(desc->flags) & RT2661_TX_VALID)) 966156321Sdamien break; 967156321Sdamien 968156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, 969156321Sdamien BUS_DMASYNC_POSTWRITE); 970156321Sdamien bus_dmamap_unload(txq->data_dmat, data->map); 971156321Sdamien 972156321Sdamien /* descriptor is no longer valid */ 973156321Sdamien desc->flags &= ~htole32(RT2661_TX_VALID); 974156321Sdamien 975178354Ssam DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next); 976156321Sdamien 977156321Sdamien if (++txq->next >= txq->count) /* faster than % count */ 978156321Sdamien txq->next = 0; 979156321Sdamien } 980156321Sdamien 981156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 982156321Sdamien} 983156321Sdamien 984156321Sdamienstatic void 985156321Sdamienrt2661_rx_intr(struct rt2661_softc *sc) 986156321Sdamien{ 987178354Ssam struct ifnet *ifp = sc->sc_ifp; 988178354Ssam struct ieee80211com *ic = ifp->if_l2com; 989156321Sdamien struct rt2661_rx_desc *desc; 990156321Sdamien struct rt2661_rx_data *data; 991156321Sdamien bus_addr_t physaddr; 992156321Sdamien struct ieee80211_frame *wh; 993156321Sdamien struct ieee80211_node *ni; 994156321Sdamien struct mbuf *mnew, *m; 995156321Sdamien int error; 996156321Sdamien 997156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 998156321Sdamien BUS_DMASYNC_POSTREAD); 999156321Sdamien 1000156321Sdamien for (;;) { 1001192468Ssam int8_t rssi, nf; 1002170530Ssam 1003156321Sdamien desc = &sc->rxq.desc[sc->rxq.cur]; 1004156321Sdamien data = &sc->rxq.data[sc->rxq.cur]; 1005156321Sdamien 1006156321Sdamien if (le32toh(desc->flags) & RT2661_RX_BUSY) 1007156321Sdamien break; 1008156321Sdamien 1009156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) || 1010156321Sdamien (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) { 1011156321Sdamien /* 1012156321Sdamien * This should not happen since we did not request 1013156321Sdamien * to receive those frames when we filled TXRX_CSR0. 1014156321Sdamien */ 1015178354Ssam DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 1016178354Ssam le32toh(desc->flags)); 1017156321Sdamien ifp->if_ierrors++; 1018156321Sdamien goto skip; 1019156321Sdamien } 1020156321Sdamien 1021156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) { 1022156321Sdamien ifp->if_ierrors++; 1023156321Sdamien goto skip; 1024156321Sdamien } 1025156321Sdamien 1026156321Sdamien /* 1027156321Sdamien * Try to allocate a new mbuf for this ring element and load it 1028156321Sdamien * before processing the current mbuf. If the ring element 1029156321Sdamien * cannot be loaded, drop the received packet and reuse the old 1030156321Sdamien * mbuf. In the unlikely case that the old mbuf can't be 1031156321Sdamien * reloaded either, explicitly panic. 1032156321Sdamien */ 1033248078Smarius mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1034156321Sdamien if (mnew == NULL) { 1035156321Sdamien ifp->if_ierrors++; 1036156321Sdamien goto skip; 1037156321Sdamien } 1038156321Sdamien 1039156321Sdamien bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1040156321Sdamien BUS_DMASYNC_POSTREAD); 1041156321Sdamien bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1042156321Sdamien 1043156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1044156321Sdamien mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr, 1045156321Sdamien &physaddr, 0); 1046156321Sdamien if (error != 0) { 1047156321Sdamien m_freem(mnew); 1048156321Sdamien 1049156321Sdamien /* try to reload the old mbuf */ 1050156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1051156321Sdamien mtod(data->m, void *), MCLBYTES, 1052156321Sdamien rt2661_dma_map_addr, &physaddr, 0); 1053156321Sdamien if (error != 0) { 1054156321Sdamien /* very unlikely that it will fail... */ 1055156321Sdamien panic("%s: could not load old rx mbuf", 1056156321Sdamien device_get_name(sc->sc_dev)); 1057156321Sdamien } 1058156321Sdamien ifp->if_ierrors++; 1059156321Sdamien goto skip; 1060156321Sdamien } 1061156321Sdamien 1062156321Sdamien /* 1063156321Sdamien * New mbuf successfully loaded, update Rx ring and continue 1064156321Sdamien * processing. 1065156321Sdamien */ 1066156321Sdamien m = data->m; 1067156321Sdamien data->m = mnew; 1068156321Sdamien desc->physaddr = htole32(physaddr); 1069156321Sdamien 1070156321Sdamien /* finalize mbuf */ 1071156321Sdamien m->m_pkthdr.rcvif = ifp; 1072156321Sdamien m->m_pkthdr.len = m->m_len = 1073156321Sdamien (le32toh(desc->flags) >> 16) & 0xfff; 1074156321Sdamien 1075170530Ssam rssi = rt2661_get_rssi(sc, desc->rssi); 1076192468Ssam /* Error happened during RSSI conversion. */ 1077192468Ssam if (rssi < 0) 1078192468Ssam rssi = -30; /* XXX ignored by net80211 */ 1079192468Ssam nf = RT2661_NOISE_FLOOR; 1080170530Ssam 1081192468Ssam if (ieee80211_radiotap_active(ic)) { 1082156321Sdamien struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap; 1083156321Sdamien uint32_t tsf_lo, tsf_hi; 1084156321Sdamien 1085156321Sdamien /* get timestamp (low and high 32 bits) */ 1086156321Sdamien tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13); 1087156321Sdamien tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12); 1088156321Sdamien 1089156321Sdamien tap->wr_tsf = 1090156321Sdamien htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1091156321Sdamien tap->wr_flags = 0; 1092178354Ssam tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1093178958Ssam (desc->flags & htole32(RT2661_RX_OFDM)) ? 1094178958Ssam IEEE80211_T_OFDM : IEEE80211_T_CCK); 1095192468Ssam tap->wr_antsignal = nf + rssi; 1096192468Ssam tap->wr_antnoise = nf; 1097156321Sdamien } 1098170530Ssam sc->sc_flags |= RAL_INPUT_RUNNING; 1099170530Ssam RAL_UNLOCK(sc); 1100156321Sdamien wh = mtod(m, struct ieee80211_frame *); 1101178354Ssam 1102178354Ssam /* send the frame to the 802.11 layer */ 1103156321Sdamien ni = ieee80211_find_rxnode(ic, 1104156321Sdamien (struct ieee80211_frame_min *)wh); 1105178354Ssam if (ni != NULL) { 1106192468Ssam (void) ieee80211_input(ni, m, rssi, nf); 1107178354Ssam ieee80211_free_node(ni); 1108178354Ssam } else 1109192468Ssam (void) ieee80211_input_all(ic, m, rssi, nf); 1110170530Ssam 1111170530Ssam RAL_LOCK(sc); 1112170530Ssam sc->sc_flags &= ~RAL_INPUT_RUNNING; 1113156321Sdamien 1114156321Sdamienskip: desc->flags |= htole32(RT2661_RX_BUSY); 1115156321Sdamien 1116178354Ssam DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur); 1117156321Sdamien 1118156321Sdamien sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT; 1119156321Sdamien } 1120156321Sdamien 1121156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1122156321Sdamien BUS_DMASYNC_PREWRITE); 1123156321Sdamien} 1124156321Sdamien 1125156321Sdamien/* ARGSUSED */ 1126156321Sdamienstatic void 1127156321Sdamienrt2661_mcu_beacon_expire(struct rt2661_softc *sc) 1128156321Sdamien{ 1129156321Sdamien /* do nothing */ 1130156321Sdamien} 1131156321Sdamien 1132156321Sdamienstatic void 1133156321Sdamienrt2661_mcu_wakeup(struct rt2661_softc *sc) 1134156321Sdamien{ 1135156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); 1136156321Sdamien 1137156321Sdamien RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); 1138156321Sdamien RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); 1139156321Sdamien RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); 1140156321Sdamien 1141156321Sdamien /* send wakeup command to MCU */ 1142156321Sdamien rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0); 1143156321Sdamien} 1144156321Sdamien 1145156321Sdamienstatic void 1146156321Sdamienrt2661_mcu_cmd_intr(struct rt2661_softc *sc) 1147156321Sdamien{ 1148156321Sdamien RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR); 1149156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 1150156321Sdamien} 1151156321Sdamien 1152156321Sdamienvoid 1153156321Sdamienrt2661_intr(void *arg) 1154156321Sdamien{ 1155156321Sdamien struct rt2661_softc *sc = arg; 1156156975Sdamien struct ifnet *ifp = sc->sc_ifp; 1157156321Sdamien uint32_t r1, r2; 1158156321Sdamien 1159156321Sdamien RAL_LOCK(sc); 1160156321Sdamien 1161156321Sdamien /* disable MAC and MCU interrupts */ 1162156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); 1163156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 1164156321Sdamien 1165156975Sdamien /* don't re-enable interrupts if we're shutting down */ 1166156975Sdamien if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1167156975Sdamien RAL_UNLOCK(sc); 1168156975Sdamien return; 1169156975Sdamien } 1170156975Sdamien 1171156321Sdamien r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR); 1172156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); 1173156321Sdamien 1174156321Sdamien r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR); 1175156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); 1176156321Sdamien 1177156321Sdamien if (r1 & RT2661_MGT_DONE) 1178156321Sdamien rt2661_tx_dma_intr(sc, &sc->mgtq); 1179156321Sdamien 1180156321Sdamien if (r1 & RT2661_RX_DONE) 1181156321Sdamien rt2661_rx_intr(sc); 1182156321Sdamien 1183156321Sdamien if (r1 & RT2661_TX0_DMA_DONE) 1184156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[0]); 1185156321Sdamien 1186156321Sdamien if (r1 & RT2661_TX1_DMA_DONE) 1187156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[1]); 1188156321Sdamien 1189156321Sdamien if (r1 & RT2661_TX2_DMA_DONE) 1190156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[2]); 1191156321Sdamien 1192156321Sdamien if (r1 & RT2661_TX3_DMA_DONE) 1193156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[3]); 1194156321Sdamien 1195156321Sdamien if (r1 & RT2661_TX_DONE) 1196156321Sdamien rt2661_tx_intr(sc); 1197156321Sdamien 1198156321Sdamien if (r2 & RT2661_MCU_CMD_DONE) 1199156321Sdamien rt2661_mcu_cmd_intr(sc); 1200156321Sdamien 1201156321Sdamien if (r2 & RT2661_MCU_BEACON_EXPIRE) 1202156321Sdamien rt2661_mcu_beacon_expire(sc); 1203156321Sdamien 1204156321Sdamien if (r2 & RT2661_MCU_WAKEUP) 1205156321Sdamien rt2661_mcu_wakeup(sc); 1206156321Sdamien 1207156321Sdamien /* re-enable MAC and MCU interrupts */ 1208156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 1209156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 1210156321Sdamien 1211156321Sdamien RAL_UNLOCK(sc); 1212156321Sdamien} 1213156321Sdamien 1214178958Ssamstatic uint8_t 1215178958Ssamrt2661_plcp_signal(int rate) 1216178958Ssam{ 1217178958Ssam switch (rate) { 1218178958Ssam /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1219178958Ssam case 12: return 0xb; 1220178958Ssam case 18: return 0xf; 1221178958Ssam case 24: return 0xa; 1222178958Ssam case 36: return 0xe; 1223178958Ssam case 48: return 0x9; 1224178958Ssam case 72: return 0xd; 1225178958Ssam case 96: return 0x8; 1226178958Ssam case 108: return 0xc; 1227178958Ssam 1228178958Ssam /* CCK rates (NB: not IEEE std, device-specific) */ 1229178958Ssam case 2: return 0x0; 1230178958Ssam case 4: return 0x1; 1231178958Ssam case 11: return 0x2; 1232178958Ssam case 22: return 0x3; 1233178958Ssam } 1234178958Ssam return 0xff; /* XXX unsupported/unknown rate */ 1235178958Ssam} 1236178958Ssam 1237156321Sdamienstatic void 1238156321Sdamienrt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc, 1239156321Sdamien uint32_t flags, uint16_t xflags, int len, int rate, 1240156321Sdamien const bus_dma_segment_t *segs, int nsegs, int ac) 1241156321Sdamien{ 1242178354Ssam struct ifnet *ifp = sc->sc_ifp; 1243178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1244156321Sdamien uint16_t plcp_length; 1245156321Sdamien int i, remainder; 1246156321Sdamien 1247156321Sdamien desc->flags = htole32(flags); 1248156321Sdamien desc->flags |= htole32(len << 16); 1249156321Sdamien desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID); 1250156321Sdamien 1251156321Sdamien desc->xflags = htole16(xflags); 1252156321Sdamien desc->xflags |= htole16(nsegs << 13); 1253156321Sdamien 1254156321Sdamien desc->wme = htole16( 1255156321Sdamien RT2661_QID(ac) | 1256156321Sdamien RT2661_AIFSN(2) | 1257156321Sdamien RT2661_LOGCWMIN(4) | 1258156321Sdamien RT2661_LOGCWMAX(10)); 1259156321Sdamien 1260156321Sdamien /* 1261156321Sdamien * Remember in which queue this frame was sent. This field is driver 1262156321Sdamien * private data only. It will be made available by the NIC in STA_CSR4 1263156321Sdamien * on Tx interrupts. 1264156321Sdamien */ 1265156321Sdamien desc->qid = ac; 1266156321Sdamien 1267156321Sdamien /* setup PLCP fields */ 1268178958Ssam desc->plcp_signal = rt2661_plcp_signal(rate); 1269156321Sdamien desc->plcp_service = 4; 1270156321Sdamien 1271156321Sdamien len += IEEE80211_CRC_LEN; 1272190532Ssam if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1273156321Sdamien desc->flags |= htole32(RT2661_TX_OFDM); 1274156321Sdamien 1275156321Sdamien plcp_length = len & 0xfff; 1276156321Sdamien desc->plcp_length_hi = plcp_length >> 6; 1277156321Sdamien desc->plcp_length_lo = plcp_length & 0x3f; 1278156321Sdamien } else { 1279156321Sdamien plcp_length = (16 * len + rate - 1) / rate; 1280156321Sdamien if (rate == 22) { 1281156321Sdamien remainder = (16 * len) % 22; 1282156321Sdamien if (remainder != 0 && remainder < 7) 1283156321Sdamien desc->plcp_service |= RT2661_PLCP_LENGEXT; 1284156321Sdamien } 1285156321Sdamien desc->plcp_length_hi = plcp_length >> 8; 1286156321Sdamien desc->plcp_length_lo = plcp_length & 0xff; 1287156321Sdamien 1288156321Sdamien if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1289156321Sdamien desc->plcp_signal |= 0x08; 1290156321Sdamien } 1291156321Sdamien 1292156321Sdamien /* RT2x61 supports scatter with up to 5 segments */ 1293156321Sdamien for (i = 0; i < nsegs; i++) { 1294156321Sdamien desc->addr[i] = htole32(segs[i].ds_addr); 1295156321Sdamien desc->len [i] = htole16(segs[i].ds_len); 1296156321Sdamien } 1297156321Sdamien} 1298156321Sdamien 1299156321Sdamienstatic int 1300156321Sdamienrt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0, 1301156321Sdamien struct ieee80211_node *ni) 1302156321Sdamien{ 1303178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1304178354Ssam struct ieee80211com *ic = ni->ni_ic; 1305156321Sdamien struct rt2661_tx_desc *desc; 1306156321Sdamien struct rt2661_tx_data *data; 1307156321Sdamien struct ieee80211_frame *wh; 1308173386Skevlo struct ieee80211_key *k; 1309156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1310156321Sdamien uint16_t dur; 1311156321Sdamien uint32_t flags = 0; /* XXX HWSEQ */ 1312156321Sdamien int nsegs, rate, error; 1313156321Sdamien 1314156321Sdamien desc = &sc->mgtq.desc[sc->mgtq.cur]; 1315156321Sdamien data = &sc->mgtq.data[sc->mgtq.cur]; 1316156321Sdamien 1317178354Ssam rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1318156321Sdamien 1319173386Skevlo wh = mtod(m0, struct ieee80211_frame *); 1320173386Skevlo 1321173386Skevlo if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1322178354Ssam k = ieee80211_crypto_encap(ni, m0); 1323173386Skevlo if (k == NULL) { 1324173386Skevlo m_freem(m0); 1325173386Skevlo return ENOBUFS; 1326173386Skevlo } 1327173386Skevlo } 1328173386Skevlo 1329156321Sdamien error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0, 1330156321Sdamien segs, &nsegs, 0); 1331156321Sdamien if (error != 0) { 1332156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1333156321Sdamien error); 1334156321Sdamien m_freem(m0); 1335156321Sdamien return error; 1336156321Sdamien } 1337156321Sdamien 1338192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1339156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1340156321Sdamien 1341156321Sdamien tap->wt_flags = 0; 1342156321Sdamien tap->wt_rate = rate; 1343156321Sdamien 1344192468Ssam ieee80211_radiotap_tx(vap, m0); 1345156321Sdamien } 1346156321Sdamien 1347156321Sdamien data->m = m0; 1348156321Sdamien data->ni = ni; 1349178354Ssam /* management frames are not taken into account for amrr */ 1350178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1351156321Sdamien 1352156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1353156321Sdamien 1354156321Sdamien if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1355156321Sdamien flags |= RT2661_TX_NEED_ACK; 1356156321Sdamien 1357190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, 1358178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1359156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1360156321Sdamien 1361156321Sdamien /* tell hardware to add timestamp in probe responses */ 1362156321Sdamien if ((wh->i_fc[0] & 1363156321Sdamien (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1364156321Sdamien (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1365156321Sdamien flags |= RT2661_TX_TIMESTAMP; 1366156321Sdamien } 1367156321Sdamien 1368156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */, 1369156321Sdamien m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT); 1370156321Sdamien 1371156321Sdamien bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1372156321Sdamien bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map, 1373156321Sdamien BUS_DMASYNC_PREWRITE); 1374156321Sdamien 1375178354Ssam DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1376178354Ssam m0->m_pkthdr.len, sc->mgtq.cur, rate); 1377156321Sdamien 1378156321Sdamien /* kick mgt */ 1379156321Sdamien sc->mgtq.queued++; 1380156321Sdamien sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT; 1381156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); 1382156321Sdamien 1383156321Sdamien return 0; 1384156321Sdamien} 1385156321Sdamien 1386178354Ssamstatic int 1387178354Ssamrt2661_sendprot(struct rt2661_softc *sc, int ac, 1388178354Ssam const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1389156321Sdamien{ 1390178354Ssam struct ieee80211com *ic = ni->ni_ic; 1391178354Ssam struct rt2661_tx_ring *txq = &sc->txq[ac]; 1392178354Ssam const struct ieee80211_frame *wh; 1393178354Ssam struct rt2661_tx_desc *desc; 1394178354Ssam struct rt2661_tx_data *data; 1395178354Ssam struct mbuf *mprot; 1396178354Ssam int protrate, ackrate, pktlen, flags, isshort, error; 1397178354Ssam uint16_t dur; 1398178354Ssam bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1399178354Ssam int nsegs; 1400156321Sdamien 1401178354Ssam KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1402178354Ssam ("protection %d", prot)); 1403178354Ssam 1404178354Ssam wh = mtod(m, const struct ieee80211_frame *); 1405178354Ssam pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1406178354Ssam 1407190532Ssam protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1408190532Ssam ackrate = ieee80211_ack_rate(ic->ic_rt, rate); 1409178354Ssam 1410178354Ssam isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1411190532Ssam dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1412190532Ssam + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1413178354Ssam flags = RT2661_TX_MORE_FRAG; 1414178354Ssam if (prot == IEEE80211_PROT_RTSCTS) { 1415178354Ssam /* NB: CTS is the same size as an ACK */ 1416190532Ssam dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1417178354Ssam flags |= RT2661_TX_NEED_ACK; 1418178354Ssam mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1419178354Ssam } else { 1420178354Ssam mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1421156321Sdamien } 1422178354Ssam if (mprot == NULL) { 1423178354Ssam /* XXX stat + msg */ 1424178354Ssam return ENOBUFS; 1425178354Ssam } 1426156321Sdamien 1427178354Ssam data = &txq->data[txq->cur]; 1428178354Ssam desc = &txq->desc[txq->cur]; 1429156321Sdamien 1430178354Ssam error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs, 1431178354Ssam &nsegs, 0); 1432178354Ssam if (error != 0) { 1433178354Ssam device_printf(sc->sc_dev, 1434178354Ssam "could not map mbuf (error %d)\n", error); 1435178354Ssam m_freem(mprot); 1436178354Ssam return error; 1437178354Ssam } 1438156321Sdamien 1439178354Ssam data->m = mprot; 1440178354Ssam data->ni = ieee80211_ref_node(ni); 1441178354Ssam /* ctl frames are not taken into account for amrr */ 1442178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1443156321Sdamien 1444178354Ssam rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len, 1445178354Ssam protrate, segs, 1, ac); 1446178354Ssam 1447178354Ssam bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1448178354Ssam bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1449178354Ssam 1450178354Ssam txq->queued++; 1451178354Ssam txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1452178354Ssam 1453178354Ssam return 0; 1454156321Sdamien} 1455156321Sdamien 1456156321Sdamienstatic int 1457156321Sdamienrt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0, 1458156321Sdamien struct ieee80211_node *ni, int ac) 1459156321Sdamien{ 1460178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1461178354Ssam struct ifnet *ifp = sc->sc_ifp; 1462178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1463156321Sdamien struct rt2661_tx_ring *txq = &sc->txq[ac]; 1464156321Sdamien struct rt2661_tx_desc *desc; 1465156321Sdamien struct rt2661_tx_data *data; 1466156321Sdamien struct ieee80211_frame *wh; 1467178354Ssam const struct ieee80211_txparam *tp; 1468156321Sdamien struct ieee80211_key *k; 1469156321Sdamien const struct chanAccParams *cap; 1470156321Sdamien struct mbuf *mnew; 1471156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1472156321Sdamien uint16_t dur; 1473178354Ssam uint32_t flags; 1474156321Sdamien int error, nsegs, rate, noack = 0; 1475156321Sdamien 1476156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1477156321Sdamien 1478178354Ssam tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1479178354Ssam if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1480178354Ssam rate = tp->mcastrate; 1481178354Ssam } else if (m0->m_flags & M_EAPOL) { 1482178354Ssam rate = tp->mgmtrate; 1483178354Ssam } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1484178354Ssam rate = tp->ucastrate; 1485156321Sdamien } else { 1486206358Srpaulo (void) ieee80211_ratectl_rate(ni, NULL, 0); 1487178354Ssam rate = ni->ni_txrate; 1488156321Sdamien } 1489156321Sdamien rate &= IEEE80211_RATE_VAL; 1490156321Sdamien 1491156321Sdamien if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) { 1492156321Sdamien cap = &ic->ic_wme.wme_chanParams; 1493156321Sdamien noack = cap->cap_wmeParams[ac].wmep_noackPolicy; 1494156321Sdamien } 1495156321Sdamien 1496156321Sdamien if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1497178354Ssam k = ieee80211_crypto_encap(ni, m0); 1498156321Sdamien if (k == NULL) { 1499156321Sdamien m_freem(m0); 1500156321Sdamien return ENOBUFS; 1501156321Sdamien } 1502156321Sdamien 1503156321Sdamien /* packet header may have moved, reset our local pointer */ 1504156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1505156321Sdamien } 1506156321Sdamien 1507178354Ssam flags = 0; 1508178354Ssam if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1509178354Ssam int prot = IEEE80211_PROT_NONE; 1510178354Ssam if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1511178354Ssam prot = IEEE80211_PROT_RTSCTS; 1512178354Ssam else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1513190532Ssam ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1514178354Ssam prot = ic->ic_protmode; 1515178354Ssam if (prot != IEEE80211_PROT_NONE) { 1516178354Ssam error = rt2661_sendprot(sc, ac, m0, ni, prot, rate); 1517178354Ssam if (error) { 1518178354Ssam m_freem(m0); 1519178354Ssam return error; 1520178354Ssam } 1521178354Ssam flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS; 1522156321Sdamien } 1523156321Sdamien } 1524156321Sdamien 1525156321Sdamien data = &txq->data[txq->cur]; 1526156321Sdamien desc = &txq->desc[txq->cur]; 1527156321Sdamien 1528156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs, 1529156321Sdamien &nsegs, 0); 1530156321Sdamien if (error != 0 && error != EFBIG) { 1531156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1532156321Sdamien error); 1533156321Sdamien m_freem(m0); 1534156321Sdamien return error; 1535156321Sdamien } 1536156321Sdamien if (error != 0) { 1537248078Smarius mnew = m_defrag(m0, M_NOWAIT); 1538156321Sdamien if (mnew == NULL) { 1539156321Sdamien device_printf(sc->sc_dev, 1540156321Sdamien "could not defragment mbuf\n"); 1541156321Sdamien m_freem(m0); 1542156321Sdamien return ENOBUFS; 1543156321Sdamien } 1544156321Sdamien m0 = mnew; 1545156321Sdamien 1546156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, 1547156321Sdamien segs, &nsegs, 0); 1548156321Sdamien if (error != 0) { 1549156321Sdamien device_printf(sc->sc_dev, 1550156321Sdamien "could not map mbuf (error %d)\n", error); 1551156321Sdamien m_freem(m0); 1552156321Sdamien return error; 1553156321Sdamien } 1554156321Sdamien 1555156321Sdamien /* packet header have moved, reset our local pointer */ 1556156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1557156321Sdamien } 1558156321Sdamien 1559192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1560156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1561156321Sdamien 1562156321Sdamien tap->wt_flags = 0; 1563156321Sdamien tap->wt_rate = rate; 1564156321Sdamien 1565192468Ssam ieee80211_radiotap_tx(vap, m0); 1566156321Sdamien } 1567156321Sdamien 1568156321Sdamien data->m = m0; 1569156321Sdamien data->ni = ni; 1570156321Sdamien 1571156321Sdamien /* remember link conditions for rate adaptation algorithm */ 1572178354Ssam if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1573178354Ssam data->rix = ni->ni_txrate; 1574178354Ssam /* XXX probably need last rssi value and not avg */ 1575178354Ssam data->rssi = ic->ic_node_getrssi(ni); 1576156321Sdamien } else 1577178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1578156321Sdamien 1579156321Sdamien if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1580156321Sdamien flags |= RT2661_TX_NEED_ACK; 1581156321Sdamien 1582190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, 1583178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1584156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1585156321Sdamien } 1586156321Sdamien 1587156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs, 1588156321Sdamien nsegs, ac); 1589156321Sdamien 1590156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1591156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1592156321Sdamien 1593178354Ssam DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1594178354Ssam m0->m_pkthdr.len, txq->cur, rate); 1595156321Sdamien 1596156321Sdamien /* kick Tx */ 1597156321Sdamien txq->queued++; 1598156321Sdamien txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1599156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac); 1600156321Sdamien 1601156321Sdamien return 0; 1602156321Sdamien} 1603156321Sdamien 1604156321Sdamienstatic void 1605178354Ssamrt2661_start_locked(struct ifnet *ifp) 1606156321Sdamien{ 1607156321Sdamien struct rt2661_softc *sc = ifp->if_softc; 1608178354Ssam struct mbuf *m; 1609156321Sdamien struct ieee80211_node *ni; 1610156321Sdamien int ac; 1611156321Sdamien 1612178354Ssam RAL_LOCK_ASSERT(sc); 1613156321Sdamien 1614156975Sdamien /* prevent management frames from being sent if we're not ready */ 1615178354Ssam if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) || sc->sc_invalid) 1616156975Sdamien return; 1617156975Sdamien 1618156321Sdamien for (;;) { 1619178354Ssam IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1620178354Ssam if (m == NULL) 1621178354Ssam break; 1622156321Sdamien 1623178354Ssam ac = M_WME_GETAC(m); 1624178354Ssam if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) { 1625178354Ssam /* there is no place left in this ring */ 1626178354Ssam IFQ_DRV_PREPEND(&ifp->if_snd, m); 1627178354Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1628178354Ssam break; 1629178354Ssam } 1630178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1631178354Ssam if (rt2661_tx_data(sc, m, ni, ac) != 0) { 1632178354Ssam ieee80211_free_node(ni); 1633178354Ssam ifp->if_oerrors++; 1634178354Ssam break; 1635178354Ssam } 1636156321Sdamien 1637178354Ssam sc->sc_tx_timer = 5; 1638178354Ssam } 1639178354Ssam} 1640156321Sdamien 1641178354Ssamstatic void 1642178354Ssamrt2661_start(struct ifnet *ifp) 1643178354Ssam{ 1644178354Ssam struct rt2661_softc *sc = ifp->if_softc; 1645156321Sdamien 1646178354Ssam RAL_LOCK(sc); 1647178354Ssam rt2661_start_locked(ifp); 1648178354Ssam RAL_UNLOCK(sc); 1649178354Ssam} 1650156321Sdamien 1651178354Ssamstatic int 1652178354Ssamrt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1653178354Ssam const struct ieee80211_bpf_params *params) 1654178354Ssam{ 1655178354Ssam struct ieee80211com *ic = ni->ni_ic; 1656178354Ssam struct ifnet *ifp = ic->ic_ifp; 1657178354Ssam struct rt2661_softc *sc = ifp->if_softc; 1658156321Sdamien 1659178354Ssam RAL_LOCK(sc); 1660156321Sdamien 1661178354Ssam /* prevent management frames from being sent if we're not ready */ 1662178354Ssam if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1663178354Ssam RAL_UNLOCK(sc); 1664178354Ssam m_freem(m); 1665178354Ssam ieee80211_free_node(ni); 1666178354Ssam return ENETDOWN; 1667178354Ssam } 1668178354Ssam if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) { 1669178354Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1670178354Ssam RAL_UNLOCK(sc); 1671178354Ssam m_freem(m); 1672178354Ssam ieee80211_free_node(ni); 1673178354Ssam return ENOBUFS; /* XXX */ 1674178354Ssam } 1675156321Sdamien 1676178354Ssam ifp->if_opackets++; 1677156321Sdamien 1678178354Ssam /* 1679178354Ssam * Legacy path; interpret frame contents to decide 1680178354Ssam * precisely how to send the frame. 1681178354Ssam * XXX raw path 1682178354Ssam */ 1683178354Ssam if (rt2661_tx_mgt(sc, m, ni) != 0) 1684178354Ssam goto bad; 1685178354Ssam sc->sc_tx_timer = 5; 1686156321Sdamien 1687178354Ssam RAL_UNLOCK(sc); 1688156321Sdamien 1689178354Ssam return 0; 1690178354Ssambad: 1691178354Ssam ifp->if_oerrors++; 1692178354Ssam ieee80211_free_node(ni); 1693156321Sdamien RAL_UNLOCK(sc); 1694178354Ssam return EIO; /* XXX */ 1695156321Sdamien} 1696156321Sdamien 1697156321Sdamienstatic void 1698165352Sbmsrt2661_watchdog(void *arg) 1699156321Sdamien{ 1700165352Sbms struct rt2661_softc *sc = (struct rt2661_softc *)arg; 1701178354Ssam struct ifnet *ifp = sc->sc_ifp; 1702156321Sdamien 1703178354Ssam RAL_LOCK_ASSERT(sc); 1704156321Sdamien 1705178354Ssam KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running")); 1706156321Sdamien 1707178354Ssam if (sc->sc_invalid) /* card ejected */ 1708178354Ssam return; 1709156321Sdamien 1710178354Ssam if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1711178354Ssam if_printf(ifp, "device timeout\n"); 1712178354Ssam rt2661_init_locked(sc); 1713178354Ssam ifp->if_oerrors++; 1714178354Ssam /* NB: callout is reset in rt2661_init() */ 1715178354Ssam return; 1716178354Ssam } 1717178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 1718156321Sdamien} 1719156321Sdamien 1720156321Sdamienstatic int 1721156321Sdamienrt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1722156321Sdamien{ 1723156321Sdamien struct rt2661_softc *sc = ifp->if_softc; 1724178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1725178354Ssam struct ifreq *ifr = (struct ifreq *) data; 1726178354Ssam int error = 0, startall = 0; 1727156321Sdamien 1728156321Sdamien switch (cmd) { 1729156321Sdamien case SIOCSIFFLAGS: 1730178704Sthompsa RAL_LOCK(sc); 1731156321Sdamien if (ifp->if_flags & IFF_UP) { 1732178354Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1733178354Ssam rt2661_init_locked(sc); 1734178354Ssam startall = 1; 1735178354Ssam } else 1736178354Ssam rt2661_update_promisc(ifp); 1737156321Sdamien } else { 1738156321Sdamien if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1739178354Ssam rt2661_stop_locked(sc); 1740156321Sdamien } 1741178704Sthompsa RAL_UNLOCK(sc); 1742178704Sthompsa if (startall) 1743178704Sthompsa ieee80211_start_all(ic); 1744156321Sdamien break; 1745178354Ssam case SIOCGIFMEDIA: 1746178354Ssam error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1747178354Ssam break; 1748178704Sthompsa case SIOCGIFADDR: 1749178354Ssam error = ether_ioctl(ifp, cmd, data); 1750178354Ssam break; 1751178704Sthompsa default: 1752178704Sthompsa error = EINVAL; 1753178704Sthompsa break; 1754156321Sdamien } 1755156321Sdamien return error; 1756156321Sdamien} 1757156321Sdamien 1758156321Sdamienstatic void 1759156321Sdamienrt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val) 1760156321Sdamien{ 1761156321Sdamien uint32_t tmp; 1762156321Sdamien int ntries; 1763156321Sdamien 1764156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1765156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1766156321Sdamien break; 1767156321Sdamien DELAY(1); 1768156321Sdamien } 1769156321Sdamien if (ntries == 100) { 1770156321Sdamien device_printf(sc->sc_dev, "could not write to BBP\n"); 1771156321Sdamien return; 1772156321Sdamien } 1773156321Sdamien 1774156321Sdamien tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val; 1775156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); 1776156321Sdamien 1777178354Ssam DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1778156321Sdamien} 1779156321Sdamien 1780156321Sdamienstatic uint8_t 1781156321Sdamienrt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg) 1782156321Sdamien{ 1783156321Sdamien uint32_t val; 1784156321Sdamien int ntries; 1785156321Sdamien 1786156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1787156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1788156321Sdamien break; 1789156321Sdamien DELAY(1); 1790156321Sdamien } 1791156321Sdamien if (ntries == 100) { 1792156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1793156321Sdamien return 0; 1794156321Sdamien } 1795156321Sdamien 1796156321Sdamien val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8; 1797156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, val); 1798156321Sdamien 1799156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1800156321Sdamien val = RAL_READ(sc, RT2661_PHY_CSR3); 1801156321Sdamien if (!(val & RT2661_BBP_BUSY)) 1802156321Sdamien return val & 0xff; 1803156321Sdamien DELAY(1); 1804156321Sdamien } 1805156321Sdamien 1806156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1807156321Sdamien return 0; 1808156321Sdamien} 1809156321Sdamien 1810156321Sdamienstatic void 1811156321Sdamienrt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val) 1812156321Sdamien{ 1813156321Sdamien uint32_t tmp; 1814156321Sdamien int ntries; 1815156321Sdamien 1816156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1817156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY)) 1818156321Sdamien break; 1819156321Sdamien DELAY(1); 1820156321Sdamien } 1821156321Sdamien if (ntries == 100) { 1822156321Sdamien device_printf(sc->sc_dev, "could not write to RF\n"); 1823156321Sdamien return; 1824156321Sdamien } 1825156321Sdamien 1826156321Sdamien tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 | 1827156321Sdamien (reg & 3); 1828156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); 1829156321Sdamien 1830156321Sdamien /* remember last written value in sc */ 1831156321Sdamien sc->rf_regs[reg] = val; 1832156321Sdamien 1833178354Ssam DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff); 1834156321Sdamien} 1835156321Sdamien 1836156321Sdamienstatic int 1837156321Sdamienrt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg) 1838156321Sdamien{ 1839156321Sdamien if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) 1840156321Sdamien return EIO; /* there is already a command pending */ 1841156321Sdamien 1842156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 1843156321Sdamien RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg); 1844156321Sdamien 1845156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); 1846156321Sdamien 1847156321Sdamien return 0; 1848156321Sdamien} 1849156321Sdamien 1850156321Sdamienstatic void 1851156321Sdamienrt2661_select_antenna(struct rt2661_softc *sc) 1852156321Sdamien{ 1853156321Sdamien uint8_t bbp4, bbp77; 1854156321Sdamien uint32_t tmp; 1855156321Sdamien 1856156321Sdamien bbp4 = rt2661_bbp_read(sc, 4); 1857156321Sdamien bbp77 = rt2661_bbp_read(sc, 77); 1858156321Sdamien 1859156321Sdamien /* TBD */ 1860156321Sdamien 1861156321Sdamien /* make sure Rx is disabled before switching antenna */ 1862156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 1863156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 1864156321Sdamien 1865156321Sdamien rt2661_bbp_write(sc, 4, bbp4); 1866156321Sdamien rt2661_bbp_write(sc, 77, bbp77); 1867156321Sdamien 1868156321Sdamien /* restore Rx filter */ 1869156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 1870156321Sdamien} 1871156321Sdamien 1872156321Sdamien/* 1873156321Sdamien * Enable multi-rate retries for frames sent at OFDM rates. 1874156321Sdamien * In 802.11b/g mode, allow fallback to CCK rates. 1875156321Sdamien */ 1876156321Sdamienstatic void 1877156321Sdamienrt2661_enable_mrr(struct rt2661_softc *sc) 1878156321Sdamien{ 1879178354Ssam struct ifnet *ifp = sc->sc_ifp; 1880178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1881156321Sdamien uint32_t tmp; 1882156321Sdamien 1883156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1884156321Sdamien 1885156321Sdamien tmp &= ~RT2661_MRR_CCK_FALLBACK; 1886178354Ssam if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 1887156321Sdamien tmp |= RT2661_MRR_CCK_FALLBACK; 1888156321Sdamien tmp |= RT2661_MRR_ENABLED; 1889156321Sdamien 1890156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1891156321Sdamien} 1892156321Sdamien 1893156321Sdamienstatic void 1894156321Sdamienrt2661_set_txpreamble(struct rt2661_softc *sc) 1895156321Sdamien{ 1896178354Ssam struct ifnet *ifp = sc->sc_ifp; 1897178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1898156321Sdamien uint32_t tmp; 1899156321Sdamien 1900156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1901156321Sdamien 1902156321Sdamien tmp &= ~RT2661_SHORT_PREAMBLE; 1903178354Ssam if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1904156321Sdamien tmp |= RT2661_SHORT_PREAMBLE; 1905156321Sdamien 1906156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1907156321Sdamien} 1908156321Sdamien 1909156321Sdamienstatic void 1910156321Sdamienrt2661_set_basicrates(struct rt2661_softc *sc, 1911156321Sdamien const struct ieee80211_rateset *rs) 1912156321Sdamien{ 1913156321Sdamien#define RV(r) ((r) & IEEE80211_RATE_VAL) 1914178354Ssam struct ifnet *ifp = sc->sc_ifp; 1915178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1916156321Sdamien uint32_t mask = 0; 1917156321Sdamien uint8_t rate; 1918220502Sbschmidt int i; 1919156321Sdamien 1920156321Sdamien for (i = 0; i < rs->rs_nrates; i++) { 1921156321Sdamien rate = rs->rs_rates[i]; 1922156321Sdamien 1923156321Sdamien if (!(rate & IEEE80211_RATE_BASIC)) 1924156321Sdamien continue; 1925156321Sdamien 1926220502Sbschmidt mask |= 1 << ic->ic_rt->rateCodeToIndex[RV(rate)]; 1927156321Sdamien } 1928156321Sdamien 1929156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); 1930156321Sdamien 1931178354Ssam DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 1932156321Sdamien#undef RV 1933156321Sdamien} 1934156321Sdamien 1935156321Sdamien/* 1936156321Sdamien * Reprogram MAC/BBP to switch to a new band. Values taken from the reference 1937156321Sdamien * driver. 1938156321Sdamien */ 1939156321Sdamienstatic void 1940156321Sdamienrt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c) 1941156321Sdamien{ 1942156321Sdamien uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104; 1943156321Sdamien uint32_t tmp; 1944156321Sdamien 1945156321Sdamien /* update all BBP registers that depend on the band */ 1946156321Sdamien bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c; 1947156321Sdamien bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48; 1948156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) { 1949156321Sdamien bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c; 1950156321Sdamien bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10; 1951156321Sdamien } 1952156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1953156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1954156321Sdamien bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10; 1955156321Sdamien } 1956156321Sdamien 1957156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 1958156321Sdamien rt2661_bbp_write(sc, 96, bbp96); 1959156321Sdamien rt2661_bbp_write(sc, 104, bbp104); 1960156321Sdamien 1961156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1962156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1963156321Sdamien rt2661_bbp_write(sc, 75, 0x80); 1964156321Sdamien rt2661_bbp_write(sc, 86, 0x80); 1965156321Sdamien rt2661_bbp_write(sc, 88, 0x80); 1966156321Sdamien } 1967156321Sdamien 1968156321Sdamien rt2661_bbp_write(sc, 35, bbp35); 1969156321Sdamien rt2661_bbp_write(sc, 97, bbp97); 1970156321Sdamien rt2661_bbp_write(sc, 98, bbp98); 1971156321Sdamien 1972156321Sdamien tmp = RAL_READ(sc, RT2661_PHY_CSR0); 1973156321Sdamien tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ); 1974156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(c)) 1975156321Sdamien tmp |= RT2661_PA_PE_2GHZ; 1976156321Sdamien else 1977156321Sdamien tmp |= RT2661_PA_PE_5GHZ; 1978156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); 1979156321Sdamien} 1980156321Sdamien 1981156321Sdamienstatic void 1982156321Sdamienrt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c) 1983156321Sdamien{ 1984178354Ssam struct ifnet *ifp = sc->sc_ifp; 1985178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1986156321Sdamien const struct rfprog *rfprog; 1987156321Sdamien uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT; 1988156321Sdamien int8_t power; 1989156321Sdamien u_int i, chan; 1990156321Sdamien 1991156321Sdamien chan = ieee80211_chan2ieee(ic, c); 1992178354Ssam KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 1993156321Sdamien 1994156321Sdamien /* select the appropriate RF settings based on what EEPROM says */ 1995156321Sdamien rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2; 1996156321Sdamien 1997156321Sdamien /* find the settings for this channel (we know it exists) */ 1998156321Sdamien for (i = 0; rfprog[i].chan != chan; i++); 1999156321Sdamien 2000156321Sdamien power = sc->txpow[i]; 2001156321Sdamien if (power < 0) { 2002156321Sdamien bbp94 += power; 2003156321Sdamien power = 0; 2004156321Sdamien } else if (power > 31) { 2005156321Sdamien bbp94 += power - 31; 2006156321Sdamien power = 31; 2007156321Sdamien } 2008156321Sdamien 2009156321Sdamien /* 2010156321Sdamien * If we are switching from the 2GHz band to the 5GHz band or 2011156321Sdamien * vice-versa, BBP registers need to be reprogrammed. 2012156321Sdamien */ 2013156321Sdamien if (c->ic_flags != sc->sc_curchan->ic_flags) { 2014156321Sdamien rt2661_select_band(sc, c); 2015156321Sdamien rt2661_select_antenna(sc); 2016156321Sdamien } 2017156321Sdamien sc->sc_curchan = c; 2018156321Sdamien 2019156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2020156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2021156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2022156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2023156321Sdamien 2024156321Sdamien DELAY(200); 2025156321Sdamien 2026156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2027156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2028156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1); 2029156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2030156321Sdamien 2031156321Sdamien DELAY(200); 2032156321Sdamien 2033156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2034156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2035156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2036156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2037156321Sdamien 2038156321Sdamien /* enable smart mode for MIMO-capable RFs */ 2039156321Sdamien bbp3 = rt2661_bbp_read(sc, 3); 2040156321Sdamien 2041156321Sdamien bbp3 &= ~RT2661_SMART_MODE; 2042156321Sdamien if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529) 2043156321Sdamien bbp3 |= RT2661_SMART_MODE; 2044156321Sdamien 2045156321Sdamien rt2661_bbp_write(sc, 3, bbp3); 2046156321Sdamien 2047156321Sdamien if (bbp94 != RT2661_BBPR94_DEFAULT) 2048156321Sdamien rt2661_bbp_write(sc, 94, bbp94); 2049156321Sdamien 2050156321Sdamien /* 5GHz radio needs a 1ms delay here */ 2051156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) 2052156321Sdamien DELAY(1000); 2053156321Sdamien} 2054156321Sdamien 2055156321Sdamienstatic void 2056156321Sdamienrt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid) 2057156321Sdamien{ 2058156321Sdamien uint32_t tmp; 2059156321Sdamien 2060156321Sdamien tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2061156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); 2062156321Sdamien 2063156321Sdamien tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16; 2064156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); 2065156321Sdamien} 2066156321Sdamien 2067156321Sdamienstatic void 2068156321Sdamienrt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) 2069156321Sdamien{ 2070156321Sdamien uint32_t tmp; 2071156321Sdamien 2072156321Sdamien tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2073156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); 2074156321Sdamien 2075156321Sdamien tmp = addr[4] | addr[5] << 8; 2076156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); 2077156321Sdamien} 2078156321Sdamien 2079156321Sdamienstatic void 2080178354Ssamrt2661_update_promisc(struct ifnet *ifp) 2081156321Sdamien{ 2082178354Ssam struct rt2661_softc *sc = ifp->if_softc; 2083156321Sdamien uint32_t tmp; 2084156321Sdamien 2085156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2086156321Sdamien 2087156321Sdamien tmp &= ~RT2661_DROP_NOT_TO_ME; 2088156321Sdamien if (!(ifp->if_flags & IFF_PROMISC)) 2089156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2090156321Sdamien 2091156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2092156321Sdamien 2093178354Ssam DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2094178354Ssam "entering" : "leaving"); 2095156321Sdamien} 2096156321Sdamien 2097156321Sdamien/* 2098156321Sdamien * Update QoS (802.11e) settings for each h/w Tx ring. 2099156321Sdamien */ 2100156321Sdamienstatic int 2101156321Sdamienrt2661_wme_update(struct ieee80211com *ic) 2102156321Sdamien{ 2103156321Sdamien struct rt2661_softc *sc = ic->ic_ifp->if_softc; 2104156321Sdamien const struct wmeParams *wmep; 2105156321Sdamien 2106156321Sdamien wmep = ic->ic_wme.wme_chanParams.cap_wmeParams; 2107156321Sdamien 2108156321Sdamien /* XXX: not sure about shifts. */ 2109156321Sdamien /* XXX: the reference driver plays with AC_VI settings too. */ 2110156321Sdamien 2111156321Sdamien /* update TxOp */ 2112156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR0, 2113156321Sdamien wmep[WME_AC_BE].wmep_txopLimit << 16 | 2114156321Sdamien wmep[WME_AC_BK].wmep_txopLimit); 2115156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR1, 2116156321Sdamien wmep[WME_AC_VI].wmep_txopLimit << 16 | 2117156321Sdamien wmep[WME_AC_VO].wmep_txopLimit); 2118156321Sdamien 2119156321Sdamien /* update CWmin */ 2120156321Sdamien RAL_WRITE(sc, RT2661_CWMIN_CSR, 2121156321Sdamien wmep[WME_AC_BE].wmep_logcwmin << 12 | 2122156321Sdamien wmep[WME_AC_BK].wmep_logcwmin << 8 | 2123156321Sdamien wmep[WME_AC_VI].wmep_logcwmin << 4 | 2124156321Sdamien wmep[WME_AC_VO].wmep_logcwmin); 2125156321Sdamien 2126156321Sdamien /* update CWmax */ 2127156321Sdamien RAL_WRITE(sc, RT2661_CWMAX_CSR, 2128156321Sdamien wmep[WME_AC_BE].wmep_logcwmax << 12 | 2129156321Sdamien wmep[WME_AC_BK].wmep_logcwmax << 8 | 2130156321Sdamien wmep[WME_AC_VI].wmep_logcwmax << 4 | 2131156321Sdamien wmep[WME_AC_VO].wmep_logcwmax); 2132156321Sdamien 2133156321Sdamien /* update Aifsn */ 2134156321Sdamien RAL_WRITE(sc, RT2661_AIFSN_CSR, 2135156321Sdamien wmep[WME_AC_BE].wmep_aifsn << 12 | 2136156321Sdamien wmep[WME_AC_BK].wmep_aifsn << 8 | 2137156321Sdamien wmep[WME_AC_VI].wmep_aifsn << 4 | 2138156321Sdamien wmep[WME_AC_VO].wmep_aifsn); 2139156321Sdamien 2140156321Sdamien return 0; 2141156321Sdamien} 2142156321Sdamien 2143156321Sdamienstatic void 2144156321Sdamienrt2661_update_slot(struct ifnet *ifp) 2145156321Sdamien{ 2146156321Sdamien struct rt2661_softc *sc = ifp->if_softc; 2147178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2148156321Sdamien uint8_t slottime; 2149156321Sdamien uint32_t tmp; 2150156321Sdamien 2151156321Sdamien slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2152156321Sdamien 2153156321Sdamien tmp = RAL_READ(sc, RT2661_MAC_CSR9); 2154156321Sdamien tmp = (tmp & ~0xff) | slottime; 2155156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); 2156156321Sdamien} 2157156321Sdamien 2158156321Sdamienstatic const char * 2159156321Sdamienrt2661_get_rf(int rev) 2160156321Sdamien{ 2161156321Sdamien switch (rev) { 2162156321Sdamien case RT2661_RF_5225: return "RT5225"; 2163156321Sdamien case RT2661_RF_5325: return "RT5325 (MIMO XR)"; 2164156321Sdamien case RT2661_RF_2527: return "RT2527"; 2165156321Sdamien case RT2661_RF_2529: return "RT2529 (MIMO XR)"; 2166156321Sdamien default: return "unknown"; 2167156321Sdamien } 2168156321Sdamien} 2169156321Sdamien 2170156321Sdamienstatic void 2171190526Ssamrt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN]) 2172156321Sdamien{ 2173156321Sdamien uint16_t val; 2174156321Sdamien int i; 2175156321Sdamien 2176156321Sdamien /* read MAC address */ 2177156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01); 2178190526Ssam macaddr[0] = val & 0xff; 2179190526Ssam macaddr[1] = val >> 8; 2180156321Sdamien 2181156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23); 2182190526Ssam macaddr[2] = val & 0xff; 2183190526Ssam macaddr[3] = val >> 8; 2184156321Sdamien 2185156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45); 2186190526Ssam macaddr[4] = val & 0xff; 2187190526Ssam macaddr[5] = val >> 8; 2188156321Sdamien 2189156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA); 2190156321Sdamien /* XXX: test if different from 0xffff? */ 2191156321Sdamien sc->rf_rev = (val >> 11) & 0x1f; 2192156321Sdamien sc->hw_radio = (val >> 10) & 0x1; 2193156321Sdamien sc->rx_ant = (val >> 4) & 0x3; 2194156321Sdamien sc->tx_ant = (val >> 2) & 0x3; 2195156321Sdamien sc->nb_ant = val & 0x3; 2196156321Sdamien 2197178354Ssam DPRINTF(sc, "RF revision=%d\n", sc->rf_rev); 2198156321Sdamien 2199156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2); 2200156321Sdamien sc->ext_5ghz_lna = (val >> 6) & 0x1; 2201156321Sdamien sc->ext_2ghz_lna = (val >> 4) & 0x1; 2202156321Sdamien 2203178354Ssam DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n", 2204178354Ssam sc->ext_2ghz_lna, sc->ext_5ghz_lna); 2205156321Sdamien 2206156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET); 2207156321Sdamien if ((val & 0xff) != 0xff) 2208156321Sdamien sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */ 2209156321Sdamien 2210170530Ssam /* Only [-10, 10] is valid */ 2211170530Ssam if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10) 2212170530Ssam sc->rssi_2ghz_corr = 0; 2213170530Ssam 2214156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET); 2215156321Sdamien if ((val & 0xff) != 0xff) 2216156321Sdamien sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */ 2217156321Sdamien 2218170530Ssam /* Only [-10, 10] is valid */ 2219170530Ssam if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10) 2220170530Ssam sc->rssi_5ghz_corr = 0; 2221170530Ssam 2222156321Sdamien /* adjust RSSI correction for external low-noise amplifier */ 2223156321Sdamien if (sc->ext_2ghz_lna) 2224156321Sdamien sc->rssi_2ghz_corr -= 14; 2225156321Sdamien if (sc->ext_5ghz_lna) 2226156321Sdamien sc->rssi_5ghz_corr -= 14; 2227156321Sdamien 2228178354Ssam DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n", 2229178354Ssam sc->rssi_2ghz_corr, sc->rssi_5ghz_corr); 2230156321Sdamien 2231156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET); 2232156321Sdamien if ((val >> 8) != 0xff) 2233156321Sdamien sc->rfprog = (val >> 8) & 0x3; 2234156321Sdamien if ((val & 0xff) != 0xff) 2235156321Sdamien sc->rffreq = val & 0xff; 2236156321Sdamien 2237178354Ssam DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq); 2238156321Sdamien 2239156321Sdamien /* read Tx power for all a/b/g channels */ 2240156321Sdamien for (i = 0; i < 19; i++) { 2241156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i); 2242156321Sdamien sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */ 2243178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2244178354Ssam rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]); 2245156321Sdamien sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */ 2246178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2247178354Ssam rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]); 2248156321Sdamien } 2249156321Sdamien 2250156321Sdamien /* read vendor-specific BBP values */ 2251156321Sdamien for (i = 0; i < 16; i++) { 2252156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i); 2253156321Sdamien if (val == 0 || val == 0xffff) 2254156321Sdamien continue; /* skip invalid entries */ 2255156321Sdamien sc->bbp_prom[i].reg = val >> 8; 2256156321Sdamien sc->bbp_prom[i].val = val & 0xff; 2257178354Ssam DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg, 2258178354Ssam sc->bbp_prom[i].val); 2259156321Sdamien } 2260156321Sdamien} 2261156321Sdamien 2262156321Sdamienstatic int 2263156321Sdamienrt2661_bbp_init(struct rt2661_softc *sc) 2264156321Sdamien{ 2265156321Sdamien#define N(a) (sizeof (a) / sizeof ((a)[0])) 2266156321Sdamien int i, ntries; 2267156321Sdamien uint8_t val; 2268156321Sdamien 2269156321Sdamien /* wait for BBP to be ready */ 2270156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 2271156321Sdamien val = rt2661_bbp_read(sc, 0); 2272156321Sdamien if (val != 0 && val != 0xff) 2273156321Sdamien break; 2274156321Sdamien DELAY(100); 2275156321Sdamien } 2276156321Sdamien if (ntries == 100) { 2277156321Sdamien device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2278156321Sdamien return EIO; 2279156321Sdamien } 2280156321Sdamien 2281156321Sdamien /* initialize BBP registers to default values */ 2282156321Sdamien for (i = 0; i < N(rt2661_def_bbp); i++) { 2283156321Sdamien rt2661_bbp_write(sc, rt2661_def_bbp[i].reg, 2284156321Sdamien rt2661_def_bbp[i].val); 2285156321Sdamien } 2286156321Sdamien 2287156321Sdamien /* write vendor-specific BBP values (from EEPROM) */ 2288156321Sdamien for (i = 0; i < 16; i++) { 2289156321Sdamien if (sc->bbp_prom[i].reg == 0) 2290156321Sdamien continue; 2291156321Sdamien rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2292156321Sdamien } 2293156321Sdamien 2294156321Sdamien return 0; 2295156321Sdamien#undef N 2296156321Sdamien} 2297156321Sdamien 2298156321Sdamienstatic void 2299178354Ssamrt2661_init_locked(struct rt2661_softc *sc) 2300156321Sdamien{ 2301156321Sdamien#define N(a) (sizeof (a) / sizeof ((a)[0])) 2302178354Ssam struct ifnet *ifp = sc->sc_ifp; 2303178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2304156321Sdamien uint32_t tmp, sta[3]; 2305178354Ssam int i, error, ntries; 2306156321Sdamien 2307178354Ssam RAL_LOCK_ASSERT(sc); 2308156975Sdamien 2309178354Ssam if ((sc->sc_flags & RAL_FW_LOADED) == 0) { 2310178354Ssam error = rt2661_load_microcode(sc); 2311178354Ssam if (error != 0) { 2312178354Ssam if_printf(ifp, 2313178354Ssam "%s: could not load 8051 microcode, error %d\n", 2314178354Ssam __func__, error); 2315178354Ssam return; 2316178354Ssam } 2317178354Ssam sc->sc_flags |= RAL_FW_LOADED; 2318178354Ssam } 2319178354Ssam 2320170530Ssam rt2661_stop_locked(sc); 2321156321Sdamien 2322156321Sdamien /* initialize Tx rings */ 2323156321Sdamien RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); 2324156321Sdamien RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); 2325156321Sdamien RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); 2326156321Sdamien RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); 2327156321Sdamien 2328156321Sdamien /* initialize Mgt ring */ 2329156321Sdamien RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); 2330156321Sdamien 2331156321Sdamien /* initialize Rx ring */ 2332156321Sdamien RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); 2333156321Sdamien 2334156321Sdamien /* initialize Tx rings sizes */ 2335156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR0, 2336156321Sdamien RT2661_TX_RING_COUNT << 24 | 2337156321Sdamien RT2661_TX_RING_COUNT << 16 | 2338156321Sdamien RT2661_TX_RING_COUNT << 8 | 2339156321Sdamien RT2661_TX_RING_COUNT); 2340156321Sdamien 2341156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR1, 2342156321Sdamien RT2661_TX_DESC_WSIZE << 16 | 2343156321Sdamien RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */ 2344156321Sdamien RT2661_MGT_RING_COUNT); 2345156321Sdamien 2346156321Sdamien /* initialize Rx rings */ 2347156321Sdamien RAL_WRITE(sc, RT2661_RX_RING_CSR, 2348156321Sdamien RT2661_RX_DESC_BACK << 16 | 2349156321Sdamien RT2661_RX_DESC_WSIZE << 8 | 2350156321Sdamien RT2661_RX_RING_COUNT); 2351156321Sdamien 2352156321Sdamien /* XXX: some magic here */ 2353156321Sdamien RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); 2354156321Sdamien 2355156321Sdamien /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */ 2356156321Sdamien RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); 2357156321Sdamien 2358156321Sdamien /* load base address of Rx ring */ 2359156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); 2360156321Sdamien 2361156321Sdamien /* initialize MAC registers to default values */ 2362156321Sdamien for (i = 0; i < N(rt2661_def_mac); i++) 2363156321Sdamien RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); 2364156321Sdamien 2365190526Ssam rt2661_set_macaddr(sc, IF_LLADDR(ifp)); 2366156321Sdamien 2367156321Sdamien /* set host ready */ 2368156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2369156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2370156321Sdamien 2371156321Sdamien /* wait for BBP/RF to wakeup */ 2372156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 2373156321Sdamien if (RAL_READ(sc, RT2661_MAC_CSR12) & 8) 2374156321Sdamien break; 2375156321Sdamien DELAY(1000); 2376156321Sdamien } 2377156321Sdamien if (ntries == 1000) { 2378156321Sdamien printf("timeout waiting for BBP/RF to wakeup\n"); 2379170530Ssam rt2661_stop_locked(sc); 2380156321Sdamien return; 2381156321Sdamien } 2382156321Sdamien 2383156321Sdamien if (rt2661_bbp_init(sc) != 0) { 2384170530Ssam rt2661_stop_locked(sc); 2385156321Sdamien return; 2386156321Sdamien } 2387156321Sdamien 2388156321Sdamien /* select default channel */ 2389156321Sdamien sc->sc_curchan = ic->ic_curchan; 2390156321Sdamien rt2661_select_band(sc, sc->sc_curchan); 2391156321Sdamien rt2661_select_antenna(sc); 2392156321Sdamien rt2661_set_chan(sc, sc->sc_curchan); 2393156321Sdamien 2394156321Sdamien /* update Rx filter */ 2395156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff; 2396156321Sdamien 2397156321Sdamien tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR; 2398156321Sdamien if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2399156321Sdamien tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR | 2400156321Sdamien RT2661_DROP_ACKCTS; 2401195618Srpaulo if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2402195618Srpaulo ic->ic_opmode != IEEE80211_M_MBSS) 2403156321Sdamien tmp |= RT2661_DROP_TODS; 2404156321Sdamien if (!(ifp->if_flags & IFF_PROMISC)) 2405156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2406156321Sdamien } 2407156321Sdamien 2408156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2409156321Sdamien 2410156321Sdamien /* clear STA registers */ 2411156321Sdamien RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta)); 2412156321Sdamien 2413156321Sdamien /* initialize ASIC */ 2414156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 4); 2415156321Sdamien 2416156321Sdamien /* clear any pending interrupt */ 2417156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2418156321Sdamien 2419156321Sdamien /* enable interrupts */ 2420156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 2421156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 2422156321Sdamien 2423156321Sdamien /* kick Rx */ 2424156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); 2425156321Sdamien 2426156321Sdamien ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2427156321Sdamien ifp->if_drv_flags |= IFF_DRV_RUNNING; 2428156321Sdamien 2429178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 2430156975Sdamien#undef N 2431156321Sdamien} 2432156321Sdamien 2433178354Ssamstatic void 2434178354Ssamrt2661_init(void *priv) 2435156321Sdamien{ 2436156321Sdamien struct rt2661_softc *sc = priv; 2437178354Ssam struct ifnet *ifp = sc->sc_ifp; 2438178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2439170530Ssam 2440170530Ssam RAL_LOCK(sc); 2441178354Ssam rt2661_init_locked(sc); 2442170530Ssam RAL_UNLOCK(sc); 2443178354Ssam 2444178931Sthompsa if (ifp->if_drv_flags & IFF_DRV_RUNNING) 2445178931Sthompsa ieee80211_start_all(ic); /* start all vap's */ 2446170530Ssam} 2447170530Ssam 2448170530Ssamvoid 2449170530Ssamrt2661_stop_locked(struct rt2661_softc *sc) 2450170530Ssam{ 2451178354Ssam struct ifnet *ifp = sc->sc_ifp; 2452156321Sdamien uint32_t tmp; 2453170530Ssam volatile int *flags = &sc->sc_flags; 2454156321Sdamien 2455178354Ssam while (*flags & RAL_INPUT_RUNNING) 2456170530Ssam msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10); 2457156321Sdamien 2458178354Ssam callout_stop(&sc->watchdog_ch); 2459178354Ssam sc->sc_tx_timer = 0; 2460178354Ssam 2461170530Ssam if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 2462170530Ssam ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2463178354Ssam 2464170530Ssam /* abort Tx (for all 5 Tx rings) */ 2465170530Ssam RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); 2466170530Ssam 2467170530Ssam /* disable Rx (value remains after reset!) */ 2468170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2469170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2470170530Ssam 2471170530Ssam /* reset ASIC */ 2472170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2473170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2474170530Ssam 2475170530Ssam /* disable interrupts */ 2476170530Ssam RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff); 2477170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 2478170530Ssam 2479170530Ssam /* clear any pending interrupt */ 2480170530Ssam RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2481170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); 2482170530Ssam 2483170530Ssam /* reset Tx and Rx rings */ 2484170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[0]); 2485170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[1]); 2486170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[2]); 2487170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[3]); 2488170530Ssam rt2661_reset_tx_ring(sc, &sc->mgtq); 2489170530Ssam rt2661_reset_rx_ring(sc, &sc->rxq); 2490170530Ssam } 2491156321Sdamien} 2492156321Sdamien 2493178354Ssamvoid 2494178354Ssamrt2661_stop(void *priv) 2495178354Ssam{ 2496178354Ssam struct rt2661_softc *sc = priv; 2497178354Ssam 2498178354Ssam RAL_LOCK(sc); 2499178354Ssam rt2661_stop_locked(sc); 2500178354Ssam RAL_UNLOCK(sc); 2501178354Ssam} 2502178354Ssam 2503156321Sdamienstatic int 2504178354Ssamrt2661_load_microcode(struct rt2661_softc *sc) 2505156321Sdamien{ 2506178354Ssam struct ifnet *ifp = sc->sc_ifp; 2507178354Ssam const struct firmware *fp; 2508178354Ssam const char *imagename; 2509178354Ssam int ntries, error; 2510156321Sdamien 2511178354Ssam RAL_LOCK_ASSERT(sc); 2512178354Ssam 2513178354Ssam switch (sc->sc_id) { 2514178354Ssam case 0x0301: imagename = "rt2561sfw"; break; 2515178354Ssam case 0x0302: imagename = "rt2561fw"; break; 2516178354Ssam case 0x0401: imagename = "rt2661fw"; break; 2517178354Ssam default: 2518178354Ssam if_printf(ifp, "%s: unexpected pci device id 0x%x, " 2519178354Ssam "don't know how to retrieve firmware\n", 2520178354Ssam __func__, sc->sc_id); 2521178354Ssam return EINVAL; 2522178354Ssam } 2523178354Ssam RAL_UNLOCK(sc); 2524178354Ssam fp = firmware_get(imagename); 2525178354Ssam RAL_LOCK(sc); 2526178354Ssam if (fp == NULL) { 2527178354Ssam if_printf(ifp, "%s: unable to retrieve firmware image %s\n", 2528178354Ssam __func__, imagename); 2529178354Ssam return EINVAL; 2530178354Ssam } 2531178354Ssam 2532178354Ssam /* 2533178354Ssam * Load 8051 microcode into NIC. 2534178354Ssam */ 2535156321Sdamien /* reset 8051 */ 2536156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2537156321Sdamien 2538156321Sdamien /* cancel any pending Host to MCU command */ 2539156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); 2540156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 2541156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); 2542156321Sdamien 2543156321Sdamien /* write 8051's microcode */ 2544156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); 2545178354Ssam RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize); 2546156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2547156321Sdamien 2548156321Sdamien /* kick 8051's ass */ 2549156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); 2550156321Sdamien 2551156321Sdamien /* wait for 8051 to initialize */ 2552156321Sdamien for (ntries = 0; ntries < 500; ntries++) { 2553156321Sdamien if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY) 2554156321Sdamien break; 2555156321Sdamien DELAY(100); 2556156321Sdamien } 2557156321Sdamien if (ntries == 500) { 2558178354Ssam if_printf(ifp, "%s: timeout waiting for MCU to initialize\n", 2559178354Ssam __func__); 2560178354Ssam error = EIO; 2561178354Ssam } else 2562178354Ssam error = 0; 2563178354Ssam 2564178354Ssam firmware_put(fp, FIRMWARE_UNLOAD); 2565178354Ssam return error; 2566156321Sdamien} 2567156321Sdamien 2568156321Sdamien#ifdef notyet 2569156321Sdamien/* 2570156321Sdamien * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and 2571156321Sdamien * false CCA count. This function is called periodically (every seconds) when 2572156321Sdamien * in the RUN state. Values taken from the reference driver. 2573156321Sdamien */ 2574156321Sdamienstatic void 2575156321Sdamienrt2661_rx_tune(struct rt2661_softc *sc) 2576156321Sdamien{ 2577156321Sdamien uint8_t bbp17; 2578156321Sdamien uint16_t cca; 2579156321Sdamien int lo, hi, dbm; 2580156321Sdamien 2581156321Sdamien /* 2582156321Sdamien * Tuning range depends on operating band and on the presence of an 2583156321Sdamien * external low-noise amplifier. 2584156321Sdamien */ 2585156321Sdamien lo = 0x20; 2586156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan)) 2587156321Sdamien lo += 0x08; 2588156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) || 2589156321Sdamien (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna)) 2590156321Sdamien lo += 0x10; 2591156321Sdamien hi = lo + 0x20; 2592156321Sdamien 2593156321Sdamien /* retrieve false CCA count since last call (clear on read) */ 2594156321Sdamien cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff; 2595156321Sdamien 2596156321Sdamien if (dbm >= -35) { 2597156321Sdamien bbp17 = 0x60; 2598156321Sdamien } else if (dbm >= -58) { 2599156321Sdamien bbp17 = hi; 2600156321Sdamien } else if (dbm >= -66) { 2601156321Sdamien bbp17 = lo + 0x10; 2602156321Sdamien } else if (dbm >= -74) { 2603156321Sdamien bbp17 = lo + 0x08; 2604156321Sdamien } else { 2605156321Sdamien /* RSSI < -74dBm, tune using false CCA count */ 2606156321Sdamien 2607156321Sdamien bbp17 = sc->bbp17; /* current value */ 2608156321Sdamien 2609156321Sdamien hi -= 2 * (-74 - dbm); 2610156321Sdamien if (hi < lo) 2611156321Sdamien hi = lo; 2612156321Sdamien 2613156321Sdamien if (bbp17 > hi) { 2614156321Sdamien bbp17 = hi; 2615156321Sdamien 2616156321Sdamien } else if (cca > 512) { 2617156321Sdamien if (++bbp17 > hi) 2618156321Sdamien bbp17 = hi; 2619156321Sdamien } else if (cca < 100) { 2620156321Sdamien if (--bbp17 < lo) 2621156321Sdamien bbp17 = lo; 2622156321Sdamien } 2623156321Sdamien } 2624156321Sdamien 2625156321Sdamien if (bbp17 != sc->bbp17) { 2626156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 2627156321Sdamien sc->bbp17 = bbp17; 2628156321Sdamien } 2629156321Sdamien} 2630156321Sdamien 2631156321Sdamien/* 2632156321Sdamien * Enter/Leave radar detection mode. 2633156321Sdamien * This is for 802.11h additional regulatory domains. 2634156321Sdamien */ 2635156321Sdamienstatic void 2636156321Sdamienrt2661_radar_start(struct rt2661_softc *sc) 2637156321Sdamien{ 2638156321Sdamien uint32_t tmp; 2639156321Sdamien 2640156321Sdamien /* disable Rx */ 2641156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2642156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2643156321Sdamien 2644156321Sdamien rt2661_bbp_write(sc, 82, 0x20); 2645156321Sdamien rt2661_bbp_write(sc, 83, 0x00); 2646156321Sdamien rt2661_bbp_write(sc, 84, 0x40); 2647156321Sdamien 2648156321Sdamien /* save current BBP registers values */ 2649156321Sdamien sc->bbp18 = rt2661_bbp_read(sc, 18); 2650156321Sdamien sc->bbp21 = rt2661_bbp_read(sc, 21); 2651156321Sdamien sc->bbp22 = rt2661_bbp_read(sc, 22); 2652156321Sdamien sc->bbp16 = rt2661_bbp_read(sc, 16); 2653156321Sdamien sc->bbp17 = rt2661_bbp_read(sc, 17); 2654156321Sdamien sc->bbp64 = rt2661_bbp_read(sc, 64); 2655156321Sdamien 2656156321Sdamien rt2661_bbp_write(sc, 18, 0xff); 2657156321Sdamien rt2661_bbp_write(sc, 21, 0x3f); 2658156321Sdamien rt2661_bbp_write(sc, 22, 0x3f); 2659156321Sdamien rt2661_bbp_write(sc, 16, 0xbd); 2660156321Sdamien rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34); 2661156321Sdamien rt2661_bbp_write(sc, 64, 0x21); 2662156321Sdamien 2663156321Sdamien /* restore Rx filter */ 2664156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2665156321Sdamien} 2666156321Sdamien 2667156321Sdamienstatic int 2668156321Sdamienrt2661_radar_stop(struct rt2661_softc *sc) 2669156321Sdamien{ 2670156321Sdamien uint8_t bbp66; 2671156321Sdamien 2672156321Sdamien /* read radar detection result */ 2673156321Sdamien bbp66 = rt2661_bbp_read(sc, 66); 2674156321Sdamien 2675156321Sdamien /* restore BBP registers values */ 2676156321Sdamien rt2661_bbp_write(sc, 16, sc->bbp16); 2677156321Sdamien rt2661_bbp_write(sc, 17, sc->bbp17); 2678156321Sdamien rt2661_bbp_write(sc, 18, sc->bbp18); 2679156321Sdamien rt2661_bbp_write(sc, 21, sc->bbp21); 2680156321Sdamien rt2661_bbp_write(sc, 22, sc->bbp22); 2681156321Sdamien rt2661_bbp_write(sc, 64, sc->bbp64); 2682156321Sdamien 2683156321Sdamien return bbp66 == 1; 2684156321Sdamien} 2685156321Sdamien#endif 2686156321Sdamien 2687156321Sdamienstatic int 2688178354Ssamrt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap) 2689156321Sdamien{ 2690178354Ssam struct ieee80211com *ic = vap->iv_ic; 2691156321Sdamien struct ieee80211_beacon_offsets bo; 2692156321Sdamien struct rt2661_tx_desc desc; 2693156321Sdamien struct mbuf *m0; 2694156321Sdamien int rate; 2695156321Sdamien 2696178354Ssam m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo); 2697156321Sdamien if (m0 == NULL) { 2698156321Sdamien device_printf(sc->sc_dev, "could not allocate beacon frame\n"); 2699156321Sdamien return ENOBUFS; 2700156321Sdamien } 2701156321Sdamien 2702156321Sdamien /* send beacons at the lowest available rate */ 2703178354Ssam rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2; 2704156321Sdamien 2705156321Sdamien rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ, 2706156321Sdamien m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT); 2707156321Sdamien 2708156321Sdamien /* copy the first 24 bytes of Tx descriptor into NIC memory */ 2709156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24); 2710156321Sdamien 2711156321Sdamien /* copy beacon header and payload into NIC memory */ 2712156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24, 2713156321Sdamien mtod(m0, uint8_t *), m0->m_pkthdr.len); 2714156321Sdamien 2715156321Sdamien m_freem(m0); 2716156321Sdamien 2717156321Sdamien return 0; 2718156321Sdamien} 2719156321Sdamien 2720156321Sdamien/* 2721156321Sdamien * Enable TSF synchronization and tell h/w to start sending beacons for IBSS 2722156321Sdamien * and HostAP operating modes. 2723156321Sdamien */ 2724156321Sdamienstatic void 2725156321Sdamienrt2661_enable_tsf_sync(struct rt2661_softc *sc) 2726156321Sdamien{ 2727178354Ssam struct ifnet *ifp = sc->sc_ifp; 2728178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2729178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2730156321Sdamien uint32_t tmp; 2731156321Sdamien 2732178354Ssam if (vap->iv_opmode != IEEE80211_M_STA) { 2733156321Sdamien /* 2734156321Sdamien * Change default 16ms TBTT adjustment to 8ms. 2735156321Sdamien * Must be done before enabling beacon generation. 2736156321Sdamien */ 2737156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); 2738156321Sdamien } 2739156321Sdamien 2740156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000; 2741156321Sdamien 2742156321Sdamien /* set beacon interval (in 1/16ms unit) */ 2743178354Ssam tmp |= vap->iv_bss->ni_intval * 16; 2744156321Sdamien 2745156321Sdamien tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT; 2746178354Ssam if (vap->iv_opmode == IEEE80211_M_STA) 2747156321Sdamien tmp |= RT2661_TSF_MODE(1); 2748156321Sdamien else 2749156321Sdamien tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON; 2750156321Sdamien 2751156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); 2752156321Sdamien} 2753156321Sdamien 2754192468Ssamstatic void 2755192468Ssamrt2661_enable_tsf(struct rt2661_softc *sc) 2756192468Ssam{ 2757192468Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, 2758192468Ssam (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000) 2759192468Ssam | RT2661_TSF_TICKING | RT2661_TSF_MODE(2)); 2760192468Ssam} 2761192468Ssam 2762156321Sdamien/* 2763156321Sdamien * Retrieve the "Received Signal Strength Indicator" from the raw values 2764156321Sdamien * contained in Rx descriptors. The computation depends on which band the 2765156321Sdamien * frame was received. Correction values taken from the reference driver. 2766156321Sdamien */ 2767156321Sdamienstatic int 2768156321Sdamienrt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw) 2769156321Sdamien{ 2770156321Sdamien int lna, agc, rssi; 2771156321Sdamien 2772156321Sdamien lna = (raw >> 5) & 0x3; 2773156321Sdamien agc = raw & 0x1f; 2774156321Sdamien 2775170530Ssam if (lna == 0) { 2776170530Ssam /* 2777170530Ssam * No mapping available. 2778170530Ssam * 2779170530Ssam * NB: Since RSSI is relative to noise floor, -1 is 2780170530Ssam * adequate for caller to know error happened. 2781170530Ssam */ 2782170530Ssam return -1; 2783170530Ssam } 2784156321Sdamien 2785170530Ssam rssi = (2 * agc) - RT2661_NOISE_FLOOR; 2786170530Ssam 2787156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) { 2788156321Sdamien rssi += sc->rssi_2ghz_corr; 2789156321Sdamien 2790156321Sdamien if (lna == 1) 2791156321Sdamien rssi -= 64; 2792156321Sdamien else if (lna == 2) 2793156321Sdamien rssi -= 74; 2794156321Sdamien else if (lna == 3) 2795156321Sdamien rssi -= 90; 2796156321Sdamien } else { 2797156321Sdamien rssi += sc->rssi_5ghz_corr; 2798156321Sdamien 2799156321Sdamien if (lna == 1) 2800156321Sdamien rssi -= 64; 2801156321Sdamien else if (lna == 2) 2802156321Sdamien rssi -= 86; 2803156321Sdamien else if (lna == 3) 2804156321Sdamien rssi -= 100; 2805156321Sdamien } 2806156321Sdamien return rssi; 2807156321Sdamien} 2808170530Ssam 2809170530Ssamstatic void 2810170530Ssamrt2661_scan_start(struct ieee80211com *ic) 2811170530Ssam{ 2812170530Ssam struct ifnet *ifp = ic->ic_ifp; 2813170530Ssam struct rt2661_softc *sc = ifp->if_softc; 2814170530Ssam uint32_t tmp; 2815170530Ssam 2816170530Ssam /* abort TSF synchronization */ 2817170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 2818170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff); 2819170530Ssam rt2661_set_bssid(sc, ifp->if_broadcastaddr); 2820170530Ssam} 2821170530Ssam 2822170530Ssamstatic void 2823170530Ssamrt2661_scan_end(struct ieee80211com *ic) 2824170530Ssam{ 2825170530Ssam struct ifnet *ifp = ic->ic_ifp; 2826170530Ssam struct rt2661_softc *sc = ifp->if_softc; 2827178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2828170530Ssam 2829170530Ssam rt2661_enable_tsf_sync(sc); 2830170530Ssam /* XXX keep local copy */ 2831178354Ssam rt2661_set_bssid(sc, vap->iv_bss->ni_bssid); 2832170530Ssam} 2833170530Ssam 2834170530Ssamstatic void 2835170530Ssamrt2661_set_channel(struct ieee80211com *ic) 2836170530Ssam{ 2837170530Ssam struct ifnet *ifp = ic->ic_ifp; 2838170530Ssam struct rt2661_softc *sc = ifp->if_softc; 2839170530Ssam 2840170530Ssam RAL_LOCK(sc); 2841170530Ssam rt2661_set_chan(sc, ic->ic_curchan); 2842170530Ssam RAL_UNLOCK(sc); 2843170530Ssam 2844170530Ssam} 2845