169783Smsmith/*- 269783Smsmith * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 369783Smsmith * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 469783Smsmith * Copyright (c) 2000 BSDi 569783Smsmith * All rights reserved. 669783Smsmith * 769783Smsmith * Redistribution and use in source and binary forms, with or without 869783Smsmith * modification, are permitted provided that the following conditions 969783Smsmith * are met: 1069783Smsmith * 1. Redistributions of source code must retain the above copyright 1169783Smsmith * notice, this list of conditions and the following disclaimer. 1269783Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1369783Smsmith * notice, this list of conditions and the following disclaimer in the 1469783Smsmith * documentation and/or other materials provided with the distribution. 1569783Smsmith * 3. The name of the author may not be used to endorse or promote products 1669783Smsmith * derived from this software without specific prior written permission. 1769783Smsmith * 1869783Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1969783Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2069783Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2169783Smsmith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2269783Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2369783Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2469783Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2569783Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2669783Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2769783Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2869783Smsmith * SUCH DAMAGE. 2969783Smsmith */ 3069783Smsmith 31119418Sobrien#include <sys/cdefs.h> 32119418Sobrien__FBSDID("$FreeBSD$"); 33119418Sobrien 3469783Smsmith/* 3569783Smsmith * PCI:PCI bridge support. 3669783Smsmith */ 3769783Smsmith 3869783Smsmith#include <sys/param.h> 39221393Sjhb#include <sys/bus.h> 4069783Smsmith#include <sys/kernel.h> 41221393Sjhb#include <sys/malloc.h> 42129876Sphk#include <sys/module.h> 43107546Simp#include <sys/rman.h> 44106844Smdodd#include <sys/sysctl.h> 45221393Sjhb#include <sys/systm.h> 4669783Smsmith 47119285Simp#include <dev/pci/pcivar.h> 48119285Simp#include <dev/pci/pcireg.h> 49211430Sjhb#include <dev/pci/pci_private.h> 50119285Simp#include <dev/pci/pcib_private.h> 5169783Smsmith 5269783Smsmith#include "pcib_if.h" 5369783Smsmith 5469783Smsmithstatic int pcib_probe(device_t dev); 55200341Sjkimstatic int pcib_suspend(device_t dev); 56200341Sjkimstatic int pcib_resume(device_t dev); 57211430Sjhbstatic int pcib_power_for_sleep(device_t pcib, device_t dev, 58211430Sjhb int *pstate); 5969783Smsmith 6069783Smsmithstatic device_method_t pcib_methods[] = { 6169783Smsmith /* Device interface */ 6269783Smsmith DEVMETHOD(device_probe, pcib_probe), 6369783Smsmith DEVMETHOD(device_attach, pcib_attach), 64145661Simp DEVMETHOD(device_detach, bus_generic_detach), 6569783Smsmith DEVMETHOD(device_shutdown, bus_generic_shutdown), 66200341Sjkim DEVMETHOD(device_suspend, pcib_suspend), 67200341Sjkim DEVMETHOD(device_resume, pcib_resume), 6869783Smsmith 6969783Smsmith /* Bus interface */ 7069783Smsmith DEVMETHOD(bus_read_ivar, pcib_read_ivar), 7169783Smsmith DEVMETHOD(bus_write_ivar, pcib_write_ivar), 7269783Smsmith DEVMETHOD(bus_alloc_resource, pcib_alloc_resource), 73221393Sjhb#ifdef NEW_PCIB 74221393Sjhb DEVMETHOD(bus_adjust_resource, pcib_adjust_resource), 75221393Sjhb DEVMETHOD(bus_release_resource, pcib_release_resource), 76221393Sjhb#else 77221324Sjhb DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), 7869783Smsmith DEVMETHOD(bus_release_resource, bus_generic_release_resource), 79221393Sjhb#endif 8069783Smsmith DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 8169783Smsmith DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 8269783Smsmith DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 8369783Smsmith DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 8469783Smsmith 8569783Smsmith /* pcib interface */ 8669783Smsmith DEVMETHOD(pcib_maxslots, pcib_maxslots), 8769783Smsmith DEVMETHOD(pcib_read_config, pcib_read_config), 8869783Smsmith DEVMETHOD(pcib_write_config, pcib_write_config), 8969783Smsmith DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt), 90164264Sjhb DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi), 91164264Sjhb DEVMETHOD(pcib_release_msi, pcib_release_msi), 92164264Sjhb DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix), 93164264Sjhb DEVMETHOD(pcib_release_msix, pcib_release_msix), 94169221Sjhb DEVMETHOD(pcib_map_msi, pcib_map_msi), 95211430Sjhb DEVMETHOD(pcib_power_for_sleep, pcib_power_for_sleep), 9669783Smsmith 97229093Shselasky DEVMETHOD_END 9869783Smsmith}; 9969783Smsmith 100154079Sjhbstatic devclass_t pcib_devclass; 10169783Smsmith 102154079SjhbDEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc)); 103253273SmariusDRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, NULL, NULL); 10469783Smsmith 105221393Sjhb#ifdef NEW_PCIB 106262225SjhbSYSCTL_DECL(_hw_pci); 107221393Sjhb 108262225Sjhbstatic int pci_clear_pcib; 109262225SjhbTUNABLE_INT("hw.pci.clear_pcib", &pci_clear_pcib); 110262225SjhbSYSCTL_INT(_hw_pci, OID_AUTO, clear_pcib, CTLFLAG_RDTUN, &pci_clear_pcib, 0, 111262225Sjhb "Clear firmware-assigned resources for PCI-PCI bridge I/O windows."); 112262225Sjhb 113221393Sjhb/* 114221393Sjhb * Is a resource from a child device sub-allocated from one of our 115221393Sjhb * resource managers? 116221393Sjhb */ 117221393Sjhbstatic int 118221393Sjhbpcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r) 119221393Sjhb{ 120221393Sjhb 121221393Sjhb switch (type) { 122221393Sjhb case SYS_RES_IOPORT: 123221393Sjhb return (rman_is_region_manager(r, &sc->io.rman)); 124221393Sjhb case SYS_RES_MEMORY: 125221393Sjhb /* Prefetchable resources may live in either memory rman. */ 126221393Sjhb if (rman_get_flags(r) & RF_PREFETCHABLE && 127221393Sjhb rman_is_region_manager(r, &sc->pmem.rman)) 128221393Sjhb return (1); 129221393Sjhb return (rman_is_region_manager(r, &sc->mem.rman)); 130221393Sjhb } 131221393Sjhb return (0); 132221393Sjhb} 133221393Sjhb 134221393Sjhbstatic int 135221393Sjhbpcib_is_window_open(struct pcib_window *pw) 136221393Sjhb{ 137221393Sjhb 138221393Sjhb return (pw->valid && pw->base < pw->limit); 139221393Sjhb} 140221393Sjhb 141221393Sjhb/* 142221393Sjhb * XXX: If RF_ACTIVE did not also imply allocating a bus space tag and 143221393Sjhb * handle for the resource, we could pass RF_ACTIVE up to the PCI bus 144221393Sjhb * when allocating the resource windows and rely on the PCI bus driver 145221393Sjhb * to do this for us. 146221393Sjhb */ 147221393Sjhbstatic void 148221393Sjhbpcib_activate_window(struct pcib_softc *sc, int type) 149221393Sjhb{ 150221393Sjhb 151221393Sjhb PCI_ENABLE_IO(device_get_parent(sc->dev), sc->dev, type); 152221393Sjhb} 153221393Sjhb 154221393Sjhbstatic void 155221393Sjhbpcib_write_windows(struct pcib_softc *sc, int mask) 156221393Sjhb{ 157221393Sjhb device_t dev; 158221393Sjhb uint32_t val; 159221393Sjhb 160221393Sjhb dev = sc->dev; 161221393Sjhb if (sc->io.valid && mask & WIN_IO) { 162221393Sjhb val = pci_read_config(dev, PCIR_IOBASEL_1, 1); 163221393Sjhb if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 164221393Sjhb pci_write_config(dev, PCIR_IOBASEH_1, 165221393Sjhb sc->io.base >> 16, 2); 166221393Sjhb pci_write_config(dev, PCIR_IOLIMITH_1, 167221393Sjhb sc->io.limit >> 16, 2); 168221393Sjhb } 169221393Sjhb pci_write_config(dev, PCIR_IOBASEL_1, sc->io.base >> 8, 1); 170221393Sjhb pci_write_config(dev, PCIR_IOLIMITL_1, sc->io.limit >> 8, 1); 171221393Sjhb } 172221393Sjhb 173221393Sjhb if (mask & WIN_MEM) { 174221393Sjhb pci_write_config(dev, PCIR_MEMBASE_1, sc->mem.base >> 16, 2); 175221393Sjhb pci_write_config(dev, PCIR_MEMLIMIT_1, sc->mem.limit >> 16, 2); 176221393Sjhb } 177221393Sjhb 178221393Sjhb if (sc->pmem.valid && mask & WIN_PMEM) { 179221393Sjhb val = pci_read_config(dev, PCIR_PMBASEL_1, 2); 180221393Sjhb if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) { 181221393Sjhb pci_write_config(dev, PCIR_PMBASEH_1, 182221393Sjhb sc->pmem.base >> 32, 4); 183221393Sjhb pci_write_config(dev, PCIR_PMLIMITH_1, 184221393Sjhb sc->pmem.limit >> 32, 4); 185221393Sjhb } 186221393Sjhb pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2); 187221393Sjhb pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2); 188221393Sjhb } 189221393Sjhb} 190221393Sjhb 191256272Sjhb/* 192256272Sjhb * This is used to reject I/O port allocations that conflict with an 193256272Sjhb * ISA alias range. 194256272Sjhb */ 195256272Sjhbstatic int 196256272Sjhbpcib_is_isa_range(struct pcib_softc *sc, u_long start, u_long end, u_long count) 197256272Sjhb{ 198256272Sjhb u_long next_alias; 199256272Sjhb 200256272Sjhb if (!(sc->bridgectl & PCIB_BCR_ISA_ENABLE)) 201256272Sjhb return (0); 202256272Sjhb 203256272Sjhb /* Only check fixed ranges for overlap. */ 204256272Sjhb if (start + count - 1 != end) 205256272Sjhb return (0); 206256272Sjhb 207256272Sjhb /* ISA aliases are only in the lower 64KB of I/O space. */ 208256272Sjhb if (start >= 65536) 209256272Sjhb return (0); 210256272Sjhb 211256272Sjhb /* Check for overlap with 0x000 - 0x0ff as a special case. */ 212256272Sjhb if (start < 0x100) 213256272Sjhb goto alias; 214256272Sjhb 215256272Sjhb /* 216256272Sjhb * If the start address is an alias, the range is an alias. 217256272Sjhb * Otherwise, compute the start of the next alias range and 218256272Sjhb * check if it is before the end of the candidate range. 219256272Sjhb */ 220256272Sjhb if ((start & 0x300) != 0) 221256272Sjhb goto alias; 222256272Sjhb next_alias = (start & ~0x3fful) | 0x100; 223256272Sjhb if (next_alias <= end) 224256272Sjhb goto alias; 225256272Sjhb return (0); 226256272Sjhb 227256272Sjhbalias: 228256272Sjhb if (bootverbose) 229256272Sjhb device_printf(sc->dev, 230256272Sjhb "I/O range %#lx-%#lx overlaps with an ISA alias\n", start, 231256272Sjhb end); 232256272Sjhb return (1); 233256272Sjhb} 234256272Sjhb 235221393Sjhbstatic void 236256272Sjhbpcib_add_window_resources(struct pcib_window *w, struct resource **res, 237256272Sjhb int count) 238256272Sjhb{ 239256272Sjhb struct resource **newarray; 240256272Sjhb int error, i; 241256272Sjhb 242256272Sjhb newarray = malloc(sizeof(struct resource *) * (w->count + count), 243256272Sjhb M_DEVBUF, M_WAITOK); 244256272Sjhb if (w->res != NULL) 245256272Sjhb bcopy(w->res, newarray, sizeof(struct resource *) * w->count); 246256272Sjhb bcopy(res, newarray + w->count, sizeof(struct resource *) * count); 247256272Sjhb free(w->res, M_DEVBUF); 248256272Sjhb w->res = newarray; 249256272Sjhb w->count += count; 250256272Sjhb 251256272Sjhb for (i = 0; i < count; i++) { 252256272Sjhb error = rman_manage_region(&w->rman, rman_get_start(res[i]), 253256272Sjhb rman_get_end(res[i])); 254256272Sjhb if (error) 255256272Sjhb panic("Failed to add resource to rman"); 256256272Sjhb } 257256272Sjhb} 258256272Sjhb 259256272Sjhbtypedef void (nonisa_callback)(u_long start, u_long end, void *arg); 260256272Sjhb 261256272Sjhbstatic void 262256272Sjhbpcib_walk_nonisa_ranges(u_long start, u_long end, nonisa_callback *cb, 263256272Sjhb void *arg) 264256272Sjhb{ 265256272Sjhb u_long next_end; 266256272Sjhb 267256272Sjhb /* 268256272Sjhb * If start is within an ISA alias range, move up to the start 269256272Sjhb * of the next non-alias range. As a special case, addresses 270256272Sjhb * in the range 0x000 - 0x0ff should also be skipped since 271256272Sjhb * those are used for various system I/O devices in ISA 272256272Sjhb * systems. 273256272Sjhb */ 274256272Sjhb if (start <= 65535) { 275256272Sjhb if (start < 0x100 || (start & 0x300) != 0) { 276256272Sjhb start &= ~0x3ff; 277256272Sjhb start += 0x400; 278256272Sjhb } 279256272Sjhb } 280256272Sjhb 281256272Sjhb /* ISA aliases are only in the lower 64KB of I/O space. */ 282256272Sjhb while (start <= MIN(end, 65535)) { 283256272Sjhb next_end = MIN(start | 0xff, end); 284256272Sjhb cb(start, next_end, arg); 285256272Sjhb start += 0x400; 286256272Sjhb } 287256272Sjhb 288256272Sjhb if (start <= end) 289256272Sjhb cb(start, end, arg); 290256272Sjhb} 291256272Sjhb 292256272Sjhbstatic void 293256272Sjhbcount_ranges(u_long start, u_long end, void *arg) 294256272Sjhb{ 295256272Sjhb int *countp; 296256272Sjhb 297256272Sjhb countp = arg; 298256272Sjhb (*countp)++; 299256272Sjhb} 300256272Sjhb 301256272Sjhbstruct alloc_state { 302256272Sjhb struct resource **res; 303256272Sjhb struct pcib_softc *sc; 304256272Sjhb int count, error; 305256272Sjhb}; 306256272Sjhb 307256272Sjhbstatic void 308256272Sjhballoc_ranges(u_long start, u_long end, void *arg) 309256272Sjhb{ 310256272Sjhb struct alloc_state *as; 311256272Sjhb struct pcib_window *w; 312256272Sjhb int rid; 313256272Sjhb 314256272Sjhb as = arg; 315256272Sjhb if (as->error != 0) 316256272Sjhb return; 317256272Sjhb 318256272Sjhb w = &as->sc->io; 319256272Sjhb rid = w->reg; 320256272Sjhb if (bootverbose) 321256272Sjhb device_printf(as->sc->dev, 322256272Sjhb "allocating non-ISA range %#lx-%#lx\n", start, end); 323256272Sjhb as->res[as->count] = bus_alloc_resource(as->sc->dev, SYS_RES_IOPORT, 324256272Sjhb &rid, start, end, end - start + 1, 0); 325256272Sjhb if (as->res[as->count] == NULL) 326256272Sjhb as->error = ENXIO; 327256272Sjhb else 328256272Sjhb as->count++; 329256272Sjhb} 330256272Sjhb 331256272Sjhbstatic int 332256272Sjhbpcib_alloc_nonisa_ranges(struct pcib_softc *sc, u_long start, u_long end) 333256272Sjhb{ 334256272Sjhb struct alloc_state as; 335256272Sjhb int i, new_count; 336256272Sjhb 337256272Sjhb /* First, see how many ranges we need. */ 338256272Sjhb new_count = 0; 339256272Sjhb pcib_walk_nonisa_ranges(start, end, count_ranges, &new_count); 340256272Sjhb 341256272Sjhb /* Second, allocate the ranges. */ 342256272Sjhb as.res = malloc(sizeof(struct resource *) * new_count, M_DEVBUF, 343256272Sjhb M_WAITOK); 344256272Sjhb as.sc = sc; 345256272Sjhb as.count = 0; 346256272Sjhb as.error = 0; 347256272Sjhb pcib_walk_nonisa_ranges(start, end, alloc_ranges, &as); 348256272Sjhb if (as.error != 0) { 349256272Sjhb for (i = 0; i < as.count; i++) 350256272Sjhb bus_release_resource(sc->dev, SYS_RES_IOPORT, 351256272Sjhb sc->io.reg, as.res[i]); 352256272Sjhb free(as.res, M_DEVBUF); 353256272Sjhb return (as.error); 354256272Sjhb } 355256272Sjhb KASSERT(as.count == new_count, ("%s: count mismatch", __func__)); 356256272Sjhb 357256272Sjhb /* Third, add the ranges to the window. */ 358256272Sjhb pcib_add_window_resources(&sc->io, as.res, as.count); 359256272Sjhb free(as.res, M_DEVBUF); 360256272Sjhb return (0); 361256272Sjhb} 362256272Sjhb 363256272Sjhbstatic void 364221393Sjhbpcib_alloc_window(struct pcib_softc *sc, struct pcib_window *w, int type, 365221393Sjhb int flags, pci_addr_t max_address) 366221393Sjhb{ 367256272Sjhb struct resource *res; 368221393Sjhb char buf[64]; 369221393Sjhb int error, rid; 370221393Sjhb 371221393Sjhb if (max_address != (u_long)max_address) 372221393Sjhb max_address = ~0ul; 373221393Sjhb w->rman.rm_start = 0; 374221393Sjhb w->rman.rm_end = max_address; 375221393Sjhb w->rman.rm_type = RMAN_ARRAY; 376221393Sjhb snprintf(buf, sizeof(buf), "%s %s window", 377221393Sjhb device_get_nameunit(sc->dev), w->name); 378221393Sjhb w->rman.rm_descr = strdup(buf, M_DEVBUF); 379221393Sjhb error = rman_init(&w->rman); 380221393Sjhb if (error) 381221393Sjhb panic("Failed to initialize %s %s rman", 382221393Sjhb device_get_nameunit(sc->dev), w->name); 383221393Sjhb 384221393Sjhb if (!pcib_is_window_open(w)) 385221393Sjhb return; 386221393Sjhb 387221393Sjhb if (w->base > max_address || w->limit > max_address) { 388221393Sjhb device_printf(sc->dev, 389221393Sjhb "initial %s window has too many bits, ignoring\n", w->name); 390221393Sjhb return; 391221393Sjhb } 392256272Sjhb if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE) 393256272Sjhb (void)pcib_alloc_nonisa_ranges(sc, w->base, w->limit); 394256272Sjhb else { 395256272Sjhb rid = w->reg; 396256272Sjhb res = bus_alloc_resource(sc->dev, type, &rid, w->base, w->limit, 397256272Sjhb w->limit - w->base + 1, flags); 398256272Sjhb if (res != NULL) 399256272Sjhb pcib_add_window_resources(w, &res, 1); 400256272Sjhb } 401221393Sjhb if (w->res == NULL) { 402221393Sjhb device_printf(sc->dev, 403221393Sjhb "failed to allocate initial %s window: %#jx-%#jx\n", 404221393Sjhb w->name, (uintmax_t)w->base, (uintmax_t)w->limit); 405221393Sjhb w->base = max_address; 406221393Sjhb w->limit = 0; 407221393Sjhb pcib_write_windows(sc, w->mask); 408221393Sjhb return; 409221393Sjhb } 410221393Sjhb pcib_activate_window(sc, type); 411221393Sjhb} 412221393Sjhb 413221393Sjhb/* 414221393Sjhb * Initialize I/O windows. 415221393Sjhb */ 416221393Sjhbstatic void 417221393Sjhbpcib_probe_windows(struct pcib_softc *sc) 418221393Sjhb{ 419221393Sjhb pci_addr_t max; 420221393Sjhb device_t dev; 421221393Sjhb uint32_t val; 422221393Sjhb 423221393Sjhb dev = sc->dev; 424221393Sjhb 425262225Sjhb if (pci_clear_pcib) { 426262225Sjhb pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1); 427262225Sjhb pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2); 428262225Sjhb pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1); 429262225Sjhb pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2); 430262225Sjhb pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2); 431262225Sjhb pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2); 432262225Sjhb pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2); 433262225Sjhb pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4); 434262225Sjhb pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2); 435262225Sjhb pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4); 436262225Sjhb } 437262225Sjhb 438221393Sjhb /* Determine if the I/O port window is implemented. */ 439221393Sjhb val = pci_read_config(dev, PCIR_IOBASEL_1, 1); 440221393Sjhb if (val == 0) { 441221393Sjhb /* 442221393Sjhb * If 'val' is zero, then only 16-bits of I/O space 443221393Sjhb * are supported. 444221393Sjhb */ 445221393Sjhb pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1); 446221393Sjhb if (pci_read_config(dev, PCIR_IOBASEL_1, 1) != 0) { 447221393Sjhb sc->io.valid = 1; 448221393Sjhb pci_write_config(dev, PCIR_IOBASEL_1, 0, 1); 449221393Sjhb } 450221393Sjhb } else 451221393Sjhb sc->io.valid = 1; 452221393Sjhb 453221393Sjhb /* Read the existing I/O port window. */ 454221393Sjhb if (sc->io.valid) { 455221393Sjhb sc->io.reg = PCIR_IOBASEL_1; 456221393Sjhb sc->io.step = 12; 457221393Sjhb sc->io.mask = WIN_IO; 458221393Sjhb sc->io.name = "I/O port"; 459221393Sjhb if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 460221393Sjhb sc->io.base = PCI_PPBIOBASE( 461221393Sjhb pci_read_config(dev, PCIR_IOBASEH_1, 2), val); 462221393Sjhb sc->io.limit = PCI_PPBIOLIMIT( 463221393Sjhb pci_read_config(dev, PCIR_IOLIMITH_1, 2), 464221393Sjhb pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 465221393Sjhb max = 0xffffffff; 466221393Sjhb } else { 467221393Sjhb sc->io.base = PCI_PPBIOBASE(0, val); 468221393Sjhb sc->io.limit = PCI_PPBIOLIMIT(0, 469221393Sjhb pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 470221393Sjhb max = 0xffff; 471221393Sjhb } 472221393Sjhb pcib_alloc_window(sc, &sc->io, SYS_RES_IOPORT, 0, max); 473221393Sjhb } 474221393Sjhb 475221393Sjhb /* Read the existing memory window. */ 476221393Sjhb sc->mem.valid = 1; 477221393Sjhb sc->mem.reg = PCIR_MEMBASE_1; 478221393Sjhb sc->mem.step = 20; 479221393Sjhb sc->mem.mask = WIN_MEM; 480221393Sjhb sc->mem.name = "memory"; 481221393Sjhb sc->mem.base = PCI_PPBMEMBASE(0, 482221393Sjhb pci_read_config(dev, PCIR_MEMBASE_1, 2)); 483221393Sjhb sc->mem.limit = PCI_PPBMEMLIMIT(0, 484221393Sjhb pci_read_config(dev, PCIR_MEMLIMIT_1, 2)); 485221393Sjhb pcib_alloc_window(sc, &sc->mem, SYS_RES_MEMORY, 0, 0xffffffff); 486221393Sjhb 487221393Sjhb /* Determine if the prefetchable memory window is implemented. */ 488221393Sjhb val = pci_read_config(dev, PCIR_PMBASEL_1, 2); 489221393Sjhb if (val == 0) { 490221393Sjhb /* 491221393Sjhb * If 'val' is zero, then only 32-bits of memory space 492221393Sjhb * are supported. 493221393Sjhb */ 494221393Sjhb pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2); 495221393Sjhb if (pci_read_config(dev, PCIR_PMBASEL_1, 2) != 0) { 496221393Sjhb sc->pmem.valid = 1; 497221393Sjhb pci_write_config(dev, PCIR_PMBASEL_1, 0, 2); 498221393Sjhb } 499221393Sjhb } else 500221393Sjhb sc->pmem.valid = 1; 501221393Sjhb 502221393Sjhb /* Read the existing prefetchable memory window. */ 503221393Sjhb if (sc->pmem.valid) { 504221393Sjhb sc->pmem.reg = PCIR_PMBASEL_1; 505221393Sjhb sc->pmem.step = 20; 506221393Sjhb sc->pmem.mask = WIN_PMEM; 507221393Sjhb sc->pmem.name = "prefetch"; 508221393Sjhb if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) { 509221393Sjhb sc->pmem.base = PCI_PPBMEMBASE( 510221393Sjhb pci_read_config(dev, PCIR_PMBASEH_1, 4), val); 511221393Sjhb sc->pmem.limit = PCI_PPBMEMLIMIT( 512221393Sjhb pci_read_config(dev, PCIR_PMLIMITH_1, 4), 513221393Sjhb pci_read_config(dev, PCIR_PMLIMITL_1, 2)); 514221393Sjhb max = 0xffffffffffffffff; 515221393Sjhb } else { 516221393Sjhb sc->pmem.base = PCI_PPBMEMBASE(0, val); 517221393Sjhb sc->pmem.limit = PCI_PPBMEMLIMIT(0, 518221393Sjhb pci_read_config(dev, PCIR_PMLIMITL_1, 2)); 519221393Sjhb max = 0xffffffff; 520221393Sjhb } 521221393Sjhb pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY, 522221393Sjhb RF_PREFETCHABLE, max); 523221393Sjhb } 524221393Sjhb} 525221393Sjhb 526221393Sjhb#else 527221393Sjhb 528221393Sjhb/* 529163805Simp * Is the prefetch window open (eg, can we allocate memory in it?) 530163805Simp */ 531163805Simpstatic int 532163805Simppcib_is_prefetch_open(struct pcib_softc *sc) 533163805Simp{ 534163805Simp return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit); 535163805Simp} 536163805Simp 537163805Simp/* 538163805Simp * Is the nonprefetch window open (eg, can we allocate memory in it?) 539163805Simp */ 540163805Simpstatic int 541163805Simppcib_is_nonprefetch_open(struct pcib_softc *sc) 542163805Simp{ 543163805Simp return (sc->membase > 0 && sc->membase < sc->memlimit); 544163805Simp} 545163805Simp 546163805Simp/* 547163805Simp * Is the io window open (eg, can we allocate ports in it?) 548163805Simp */ 549163805Simpstatic int 550163805Simppcib_is_io_open(struct pcib_softc *sc) 551163805Simp{ 552163805Simp return (sc->iobase > 0 && sc->iobase < sc->iolimit); 553163805Simp} 554163805Simp 555163805Simp/* 556200341Sjkim * Get current I/O decode. 557200341Sjkim */ 558200341Sjkimstatic void 559200341Sjkimpcib_get_io_decode(struct pcib_softc *sc) 560200341Sjkim{ 561200341Sjkim device_t dev; 562200341Sjkim uint32_t iolow; 563200341Sjkim 564200341Sjkim dev = sc->dev; 565200341Sjkim 566200341Sjkim iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1); 567200341Sjkim if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) 568200341Sjkim sc->iobase = PCI_PPBIOBASE( 569200341Sjkim pci_read_config(dev, PCIR_IOBASEH_1, 2), iolow); 570200341Sjkim else 571200341Sjkim sc->iobase = PCI_PPBIOBASE(0, iolow); 572200341Sjkim 573200341Sjkim iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1); 574200341Sjkim if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) 575200341Sjkim sc->iolimit = PCI_PPBIOLIMIT( 576200341Sjkim pci_read_config(dev, PCIR_IOLIMITH_1, 2), iolow); 577200341Sjkim else 578200341Sjkim sc->iolimit = PCI_PPBIOLIMIT(0, iolow); 579200341Sjkim} 580200341Sjkim 581200341Sjkim/* 582200341Sjkim * Get current memory decode. 583200341Sjkim */ 584200341Sjkimstatic void 585200341Sjkimpcib_get_mem_decode(struct pcib_softc *sc) 586200341Sjkim{ 587200341Sjkim device_t dev; 588200341Sjkim pci_addr_t pmemlow; 589200341Sjkim 590200341Sjkim dev = sc->dev; 591200341Sjkim 592200341Sjkim sc->membase = PCI_PPBMEMBASE(0, 593200341Sjkim pci_read_config(dev, PCIR_MEMBASE_1, 2)); 594200341Sjkim sc->memlimit = PCI_PPBMEMLIMIT(0, 595200341Sjkim pci_read_config(dev, PCIR_MEMLIMIT_1, 2)); 596200341Sjkim 597200341Sjkim pmemlow = pci_read_config(dev, PCIR_PMBASEL_1, 2); 598200341Sjkim if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64) 599200341Sjkim sc->pmembase = PCI_PPBMEMBASE( 600200341Sjkim pci_read_config(dev, PCIR_PMBASEH_1, 4), pmemlow); 601200341Sjkim else 602200341Sjkim sc->pmembase = PCI_PPBMEMBASE(0, pmemlow); 603200341Sjkim 604200341Sjkim pmemlow = pci_read_config(dev, PCIR_PMLIMITL_1, 2); 605200341Sjkim if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64) 606200341Sjkim sc->pmemlimit = PCI_PPBMEMLIMIT( 607200341Sjkim pci_read_config(dev, PCIR_PMLIMITH_1, 4), pmemlow); 608200341Sjkim else 609200341Sjkim sc->pmemlimit = PCI_PPBMEMLIMIT(0, pmemlow); 610200341Sjkim} 611200341Sjkim 612200341Sjkim/* 613200341Sjkim * Restore previous I/O decode. 614200341Sjkim */ 615200341Sjkimstatic void 616200341Sjkimpcib_set_io_decode(struct pcib_softc *sc) 617200341Sjkim{ 618200341Sjkim device_t dev; 619200341Sjkim uint32_t iohi; 620200341Sjkim 621200341Sjkim dev = sc->dev; 622200341Sjkim 623200341Sjkim iohi = sc->iobase >> 16; 624200341Sjkim if (iohi > 0) 625200341Sjkim pci_write_config(dev, PCIR_IOBASEH_1, iohi, 2); 626200341Sjkim pci_write_config(dev, PCIR_IOBASEL_1, sc->iobase >> 8, 1); 627200341Sjkim 628200341Sjkim iohi = sc->iolimit >> 16; 629200341Sjkim if (iohi > 0) 630200341Sjkim pci_write_config(dev, PCIR_IOLIMITH_1, iohi, 2); 631200341Sjkim pci_write_config(dev, PCIR_IOLIMITL_1, sc->iolimit >> 8, 1); 632200341Sjkim} 633200341Sjkim 634200341Sjkim/* 635200341Sjkim * Restore previous memory decode. 636200341Sjkim */ 637200341Sjkimstatic void 638200341Sjkimpcib_set_mem_decode(struct pcib_softc *sc) 639200341Sjkim{ 640200341Sjkim device_t dev; 641200341Sjkim pci_addr_t pmemhi; 642200341Sjkim 643200341Sjkim dev = sc->dev; 644200341Sjkim 645200341Sjkim pci_write_config(dev, PCIR_MEMBASE_1, sc->membase >> 16, 2); 646200341Sjkim pci_write_config(dev, PCIR_MEMLIMIT_1, sc->memlimit >> 16, 2); 647200341Sjkim 648200341Sjkim pmemhi = sc->pmembase >> 32; 649200341Sjkim if (pmemhi > 0) 650200341Sjkim pci_write_config(dev, PCIR_PMBASEH_1, pmemhi, 4); 651200341Sjkim pci_write_config(dev, PCIR_PMBASEL_1, sc->pmembase >> 16, 2); 652200341Sjkim 653200341Sjkim pmemhi = sc->pmemlimit >> 32; 654200341Sjkim if (pmemhi > 0) 655200341Sjkim pci_write_config(dev, PCIR_PMLIMITH_1, pmemhi, 4); 656200341Sjkim pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmemlimit >> 16, 2); 657200341Sjkim} 658221393Sjhb#endif 659200341Sjkim 660200341Sjkim/* 661200341Sjkim * Get current bridge configuration. 662200341Sjkim */ 663200341Sjkimstatic void 664200341Sjkimpcib_cfg_save(struct pcib_softc *sc) 665200341Sjkim{ 666200341Sjkim device_t dev; 667200341Sjkim 668200341Sjkim dev = sc->dev; 669200341Sjkim 670200341Sjkim sc->command = pci_read_config(dev, PCIR_COMMAND, 2); 671200341Sjkim sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1); 672200341Sjkim sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1); 673200341Sjkim sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 674200341Sjkim sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2); 675200341Sjkim sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1); 676221393Sjhb#ifndef NEW_PCIB 677200341Sjkim if (sc->command & PCIM_CMD_PORTEN) 678200341Sjkim pcib_get_io_decode(sc); 679200341Sjkim if (sc->command & PCIM_CMD_MEMEN) 680200341Sjkim pcib_get_mem_decode(sc); 681221393Sjhb#endif 682200341Sjkim} 683200341Sjkim 684200341Sjkim/* 685200341Sjkim * Restore previous bridge configuration. 686200341Sjkim */ 687200341Sjkimstatic void 688200341Sjkimpcib_cfg_restore(struct pcib_softc *sc) 689200341Sjkim{ 690200341Sjkim device_t dev; 691200341Sjkim 692200341Sjkim dev = sc->dev; 693200341Sjkim 694200341Sjkim pci_write_config(dev, PCIR_COMMAND, sc->command, 2); 695200341Sjkim pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1); 696200341Sjkim pci_write_config(dev, PCIR_SECBUS_1, sc->secbus, 1); 697200341Sjkim pci_write_config(dev, PCIR_SUBBUS_1, sc->subbus, 1); 698200341Sjkim pci_write_config(dev, PCIR_BRIDGECTL_1, sc->bridgectl, 2); 699200341Sjkim pci_write_config(dev, PCIR_SECLAT_1, sc->seclat, 1); 700221393Sjhb#ifdef NEW_PCIB 701221393Sjhb pcib_write_windows(sc, WIN_IO | WIN_MEM | WIN_PMEM); 702221393Sjhb#else 703200341Sjkim if (sc->command & PCIM_CMD_PORTEN) 704200341Sjkim pcib_set_io_decode(sc); 705200341Sjkim if (sc->command & PCIM_CMD_MEMEN) 706200341Sjkim pcib_set_mem_decode(sc); 707221393Sjhb#endif 708200341Sjkim} 709200341Sjkim 710200341Sjkim/* 71169783Smsmith * Generic device interface 71269783Smsmith */ 71369783Smsmithstatic int 71469783Smsmithpcib_probe(device_t dev) 71569783Smsmith{ 71669783Smsmith if ((pci_get_class(dev) == PCIC_BRIDGE) && 71769783Smsmith (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) { 71869783Smsmith device_set_desc(dev, "PCI-PCI bridge"); 71969783Smsmith return(-10000); 72069783Smsmith } 72169783Smsmith return(ENXIO); 72269783Smsmith} 72369783Smsmith 724102441Sjhbvoid 725102441Sjhbpcib_attach_common(device_t dev) 72669783Smsmith{ 72769783Smsmith struct pcib_softc *sc; 728181789Simp struct sysctl_ctx_list *sctx; 729181789Simp struct sysctl_oid *soid; 730256272Sjhb int comma; 73169783Smsmith 73269783Smsmith sc = device_get_softc(dev); 73369783Smsmith sc->dev = dev; 73469783Smsmith 73569908Smsmith /* 73669908Smsmith * Get current bridge configuration. 73769908Smsmith */ 738200341Sjkim sc->domain = pci_get_domain(dev); 739200341Sjkim sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2); 740200341Sjkim pcib_cfg_save(sc); 74169783Smsmith 74269908Smsmith /* 743181789Simp * Setup sysctl reporting nodes 744181789Simp */ 745181789Simp sctx = device_get_sysctl_ctx(dev); 746181789Simp soid = device_get_sysctl_tree(dev); 747181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain", 748182706Simp CTLFLAG_RD, &sc->domain, 0, "Domain number"); 749181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus", 750182706Simp CTLFLAG_RD, &sc->pribus, 0, "Primary bus number"); 751181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus", 752182706Simp CTLFLAG_RD, &sc->secbus, 0, "Secondary bus number"); 753181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus", 754182706Simp CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number"); 755181789Simp 756181789Simp /* 75769908Smsmith * Quirk handling. 75869908Smsmith */ 75969908Smsmith switch (pci_get_devid(dev)) { 760124365Simp case 0x12258086: /* Intel 82454KX/GX (Orion) */ 76169908Smsmith { 762119266Simp uint8_t supbus; 76369908Smsmith 76469908Smsmith supbus = pci_read_config(dev, 0x41, 1); 76569908Smsmith if (supbus != 0xff) { 76669908Smsmith sc->secbus = supbus + 1; 76769908Smsmith sc->subbus = supbus + 1; 76869908Smsmith } 769124365Simp break; 77069908Smsmith } 771124365Simp 772124365Simp /* 773124365Simp * The i82380FB mobile docking controller is a PCI-PCI bridge, 774124365Simp * and it is a subtractive bridge. However, the ProgIf is wrong 775124365Simp * so the normal setting of PCIB_SUBTRACTIVE bit doesn't 776124365Simp * happen. There's also a Toshiba bridge that behaves this 777124365Simp * way. 778124365Simp */ 779124365Simp case 0x124b8086: /* Intel 82380FB Mobile */ 780124365Simp case 0x060513d7: /* Toshiba ???? */ 781124365Simp sc->flags |= PCIB_SUBTRACTIVE; 78269908Smsmith break; 783149521Sjkim 784149521Sjkim /* Compaq R3000 BIOS sets wrong subordinate bus number. */ 785149521Sjkim case 0x00dd10de: 786149521Sjkim { 787149521Sjkim char *cp; 788149521Sjkim 789157949Sjkim if ((cp = getenv("smbios.planar.maker")) == NULL) 790149521Sjkim break; 791157949Sjkim if (strncmp(cp, "Compal", 6) != 0) { 792157949Sjkim freeenv(cp); 793149521Sjkim break; 794157949Sjkim } 795157949Sjkim freeenv(cp); 796157949Sjkim if ((cp = getenv("smbios.planar.product")) == NULL) 797157949Sjkim break; 798157949Sjkim if (strncmp(cp, "08A0", 4) != 0) { 799157949Sjkim freeenv(cp); 800157949Sjkim break; 801157949Sjkim } 802157949Sjkim freeenv(cp); 803149521Sjkim if (sc->subbus < 0xa) { 804149521Sjkim pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1); 805149521Sjkim sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 806149521Sjkim } 807149521Sjkim break; 808149521Sjkim } 80969908Smsmith } 81069908Smsmith 811165995Sjhb if (pci_msi_device_blacklisted(dev)) 812165995Sjhb sc->flags |= PCIB_DISABLE_MSI; 813165995Sjhb 814253273Smarius if (pci_msix_device_blacklisted(dev)) 815253273Smarius sc->flags |= PCIB_DISABLE_MSIX; 816253273Smarius 817124365Simp /* 818124365Simp * Intel 815, 845 and other chipsets say they are PCI-PCI bridges, 819124365Simp * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM, 820124365Simp * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese. 821124365Simp * This means they act as if they were subtractively decoding 822124365Simp * bridges and pass all transactions. Mark them and real ProgIf 1 823124365Simp * parts as subtractive. 824124365Simp */ 825124365Simp if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 || 826168157Sjhb pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE) 827124365Simp sc->flags |= PCIB_SUBTRACTIVE; 828221393Sjhb 829221393Sjhb#ifdef NEW_PCIB 830221393Sjhb pcib_probe_windows(sc); 831221393Sjhb#endif 83269783Smsmith if (bootverbose) { 833172394Smarius device_printf(dev, " domain %d\n", sc->domain); 83469783Smsmith device_printf(dev, " secondary bus %d\n", sc->secbus); 83569783Smsmith device_printf(dev, " subordinate bus %d\n", sc->subbus); 836221393Sjhb#ifdef NEW_PCIB 837221393Sjhb if (pcib_is_window_open(&sc->io)) 838221393Sjhb device_printf(dev, " I/O decode 0x%jx-0x%jx\n", 839221393Sjhb (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit); 840221393Sjhb if (pcib_is_window_open(&sc->mem)) 841221393Sjhb device_printf(dev, " memory decode 0x%jx-0x%jx\n", 842221393Sjhb (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit); 843221393Sjhb if (pcib_is_window_open(&sc->pmem)) 844221393Sjhb device_printf(dev, " prefetched decode 0x%jx-0x%jx\n", 845221393Sjhb (uintmax_t)sc->pmem.base, (uintmax_t)sc->pmem.limit); 846221393Sjhb#else 847221393Sjhb if (pcib_is_io_open(sc)) 848221393Sjhb device_printf(dev, " I/O decode 0x%x-0x%x\n", 849221393Sjhb sc->iobase, sc->iolimit); 850163805Simp if (pcib_is_nonprefetch_open(sc)) 851163805Simp device_printf(dev, " memory decode 0x%jx-0x%jx\n", 852163805Simp (uintmax_t)sc->membase, (uintmax_t)sc->memlimit); 853163805Simp if (pcib_is_prefetch_open(sc)) 854163805Simp device_printf(dev, " prefetched decode 0x%jx-0x%jx\n", 855163805Simp (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit); 856221393Sjhb#endif 857256272Sjhb if (sc->bridgectl & (PCIB_BCR_ISA_ENABLE | PCIB_BCR_VGA_ENABLE) || 858256272Sjhb sc->flags & PCIB_SUBTRACTIVE) { 859256272Sjhb device_printf(dev, " special decode "); 860256272Sjhb comma = 0; 861256272Sjhb if (sc->bridgectl & PCIB_BCR_ISA_ENABLE) { 862256272Sjhb printf("ISA"); 863256272Sjhb comma = 1; 864256272Sjhb } 865256272Sjhb if (sc->bridgectl & PCIB_BCR_VGA_ENABLE) { 866256272Sjhb printf("%sVGA", comma ? ", " : ""); 867256272Sjhb comma = 1; 868256272Sjhb } 869256272Sjhb if (sc->flags & PCIB_SUBTRACTIVE) 870256272Sjhb printf("%ssubtractive", comma ? ", " : ""); 871256272Sjhb printf("\n"); 872256272Sjhb } 87369783Smsmith } 87469783Smsmith 87569783Smsmith /* 87669783Smsmith * XXX If the secondary bus number is zero, we should assign a bus number 877181798Simp * since the BIOS hasn't, then initialise the bridge. A simple 878181798Simp * bus_alloc_resource with the a couple of busses seems like the right 879181798Simp * approach, but we don't know what busses the BIOS might have already 880181798Simp * assigned to other bridges on this bus that probe later than we do. 881181798Simp * 882181798Simp * If the subordinate bus number is less than the secondary bus number, 88369783Smsmith * we should pick a better value. One sensible alternative would be to 88469783Smsmith * pick 255; the only tradeoff here is that configuration transactions 885181798Simp * would be more widely routed than absolutely necessary. We could 886181798Simp * then do a walk of the tree later and fix it. 88769783Smsmith */ 888239917Sjhb 889239917Sjhb /* 890239917Sjhb * Always enable busmastering on bridges so that transactions 891239917Sjhb * initiated on the secondary bus are passed through to the 892239917Sjhb * primary bus. 893239917Sjhb */ 894239917Sjhb pci_enable_busmaster(dev); 895102441Sjhb} 89669783Smsmith 897103042Sjhbint 898102441Sjhbpcib_attach(device_t dev) 899102441Sjhb{ 900102441Sjhb struct pcib_softc *sc; 901102441Sjhb device_t child; 902102441Sjhb 903102441Sjhb pcib_attach_common(dev); 904102441Sjhb sc = device_get_softc(dev); 90569783Smsmith if (sc->secbus != 0) { 906103016Sjhb child = device_add_child(dev, "pci", sc->secbus); 90769783Smsmith if (child != NULL) 90869783Smsmith return(bus_generic_attach(dev)); 909181798Simp } 91069783Smsmith 91169783Smsmith /* no secondary bus; we should have fixed this */ 91269783Smsmith return(0); 91369783Smsmith} 91469783Smsmith 915102441Sjhbint 916200341Sjkimpcib_suspend(device_t dev) 917200341Sjkim{ 918211430Sjhb device_t pcib; 919200341Sjkim int dstate, error; 920200341Sjkim 921200341Sjkim pcib_cfg_save(device_get_softc(dev)); 922200341Sjkim error = bus_generic_suspend(dev); 923214110Sjkim if (error == 0 && pci_do_power_suspend) { 924211430Sjhb dstate = PCI_POWERSTATE_D3; 925211430Sjhb pcib = device_get_parent(device_get_parent(dev)); 926211430Sjhb if (PCIB_POWER_FOR_SLEEP(pcib, dev, &dstate) == 0) 927200341Sjkim pci_set_powerstate(dev, dstate); 928200341Sjkim } 929200341Sjkim return (error); 930200341Sjkim} 931200341Sjkim 932200341Sjkimint 933200341Sjkimpcib_resume(device_t dev) 934200341Sjkim{ 935211430Sjhb device_t pcib; 936200341Sjkim 937200341Sjkim if (pci_do_power_resume) { 938211430Sjhb pcib = device_get_parent(device_get_parent(dev)); 939211430Sjhb if (PCIB_POWER_FOR_SLEEP(pcib, dev, NULL) == 0) 940200341Sjkim pci_set_powerstate(dev, PCI_POWERSTATE_D0); 941200341Sjkim } 942200341Sjkim pcib_cfg_restore(device_get_softc(dev)); 943200341Sjkim return (bus_generic_resume(dev)); 944200341Sjkim} 945200341Sjkim 946200341Sjkimint 94769783Smsmithpcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 94869783Smsmith{ 94969783Smsmith struct pcib_softc *sc = device_get_softc(dev); 95069783Smsmith 95169783Smsmith switch (which) { 952172394Smarius case PCIB_IVAR_DOMAIN: 953172394Smarius *result = sc->domain; 954172394Smarius return(0); 95569783Smsmith case PCIB_IVAR_BUS: 95669783Smsmith *result = sc->secbus; 95769783Smsmith return(0); 95869783Smsmith } 95969783Smsmith return(ENOENT); 96069783Smsmith} 96169783Smsmith 962102441Sjhbint 96369783Smsmithpcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 96469783Smsmith{ 96569783Smsmith struct pcib_softc *sc = device_get_softc(dev); 96669783Smsmith 96769783Smsmith switch (which) { 968172394Smarius case PCIB_IVAR_DOMAIN: 969172394Smarius return(EINVAL); 97069783Smsmith case PCIB_IVAR_BUS: 97169783Smsmith sc->secbus = value; 972172394Smarius return(0); 97369783Smsmith } 97469783Smsmith return(ENOENT); 97569783Smsmith} 97669783Smsmith 977221393Sjhb#ifdef NEW_PCIB 97869783Smsmith/* 979221393Sjhb * Attempt to allocate a resource from the existing resources assigned 980221393Sjhb * to a window. 981221393Sjhb */ 982221393Sjhbstatic struct resource * 983221393Sjhbpcib_suballoc_resource(struct pcib_softc *sc, struct pcib_window *w, 984221393Sjhb device_t child, int type, int *rid, u_long start, u_long end, u_long count, 985221393Sjhb u_int flags) 986221393Sjhb{ 987221393Sjhb struct resource *res; 988221393Sjhb 989221393Sjhb if (!pcib_is_window_open(w)) 990221393Sjhb return (NULL); 991221393Sjhb 992221393Sjhb res = rman_reserve_resource(&w->rman, start, end, count, 993221393Sjhb flags & ~RF_ACTIVE, child); 994221393Sjhb if (res == NULL) 995221393Sjhb return (NULL); 996221393Sjhb 997221393Sjhb if (bootverbose) 998221393Sjhb device_printf(sc->dev, 999221393Sjhb "allocated %s range (%#lx-%#lx) for rid %x of %s\n", 1000221393Sjhb w->name, rman_get_start(res), rman_get_end(res), *rid, 1001221393Sjhb pcib_child_name(child)); 1002221393Sjhb rman_set_rid(res, *rid); 1003221393Sjhb 1004221393Sjhb /* 1005221393Sjhb * If the resource should be active, pass that request up the 1006221393Sjhb * tree. This assumes the parent drivers can handle 1007221393Sjhb * activating sub-allocated resources. 1008221393Sjhb */ 1009221393Sjhb if (flags & RF_ACTIVE) { 1010221393Sjhb if (bus_activate_resource(child, type, *rid, res) != 0) { 1011221393Sjhb rman_release_resource(res); 1012221393Sjhb return (NULL); 1013221393Sjhb } 1014221393Sjhb } 1015221393Sjhb 1016221393Sjhb return (res); 1017221393Sjhb} 1018221393Sjhb 1019256272Sjhb/* Allocate a fresh resource range for an unconfigured window. */ 1020256272Sjhbstatic int 1021256272Sjhbpcib_alloc_new_window(struct pcib_softc *sc, struct pcib_window *w, int type, 1022256272Sjhb u_long start, u_long end, u_long count, u_int flags) 1023256272Sjhb{ 1024256272Sjhb struct resource *res; 1025256272Sjhb u_long base, limit, wmask; 1026256272Sjhb int rid; 1027256272Sjhb 1028256272Sjhb /* 1029256272Sjhb * If this is an I/O window on a bridge with ISA enable set 1030256272Sjhb * and the start address is below 64k, then try to allocate an 1031256272Sjhb * initial window of 0x1000 bytes long starting at address 1032256272Sjhb * 0xf000 and walking down. Note that if the original request 1033256272Sjhb * was larger than the non-aliased range size of 0x100 our 1034256272Sjhb * caller would have raised the start address up to 64k 1035256272Sjhb * already. 1036256272Sjhb */ 1037256272Sjhb if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE && 1038256272Sjhb start < 65536) { 1039256272Sjhb for (base = 0xf000; (long)base >= 0; base -= 0x1000) { 1040256272Sjhb limit = base + 0xfff; 1041256272Sjhb 1042256272Sjhb /* 1043256272Sjhb * Skip ranges that wouldn't work for the 1044256272Sjhb * original request. Note that the actual 1045256272Sjhb * window that overlaps are the non-alias 1046256272Sjhb * ranges within [base, limit], so this isn't 1047256272Sjhb * quite a simple comparison. 1048256272Sjhb */ 1049256272Sjhb if (start + count > limit - 0x400) 1050256272Sjhb continue; 1051256272Sjhb if (base == 0) { 1052256272Sjhb /* 1053256272Sjhb * The first open region for the window at 1054256272Sjhb * 0 is 0x400-0x4ff. 1055256272Sjhb */ 1056256272Sjhb if (end - count + 1 < 0x400) 1057256272Sjhb continue; 1058256272Sjhb } else { 1059256272Sjhb if (end - count + 1 < base) 1060256272Sjhb continue; 1061256272Sjhb } 1062256272Sjhb 1063256272Sjhb if (pcib_alloc_nonisa_ranges(sc, base, limit) == 0) { 1064256272Sjhb w->base = base; 1065256272Sjhb w->limit = limit; 1066256272Sjhb return (0); 1067256272Sjhb } 1068256272Sjhb } 1069256272Sjhb return (ENOSPC); 1070256272Sjhb } 1071256272Sjhb 1072256272Sjhb wmask = (1ul << w->step) - 1; 1073256272Sjhb if (RF_ALIGNMENT(flags) < w->step) { 1074256272Sjhb flags &= ~RF_ALIGNMENT_MASK; 1075256272Sjhb flags |= RF_ALIGNMENT_LOG2(w->step); 1076256272Sjhb } 1077256272Sjhb start &= ~wmask; 1078256272Sjhb end |= wmask; 1079256272Sjhb count = roundup2(count, 1ul << w->step); 1080256272Sjhb rid = w->reg; 1081256272Sjhb res = bus_alloc_resource(sc->dev, type, &rid, start, end, count, 1082256272Sjhb flags & ~RF_ACTIVE); 1083256272Sjhb if (res == NULL) 1084256272Sjhb return (ENOSPC); 1085256272Sjhb pcib_add_window_resources(w, &res, 1); 1086256272Sjhb pcib_activate_window(sc, type); 1087256272Sjhb w->base = rman_get_start(res); 1088256272Sjhb w->limit = rman_get_end(res); 1089256272Sjhb return (0); 1090256272Sjhb} 1091256272Sjhb 1092256272Sjhb/* Try to expand an existing window to the requested base and limit. */ 1093256272Sjhbstatic int 1094256272Sjhbpcib_expand_window(struct pcib_softc *sc, struct pcib_window *w, int type, 1095256272Sjhb u_long base, u_long limit) 1096256272Sjhb{ 1097256272Sjhb struct resource *res; 1098256272Sjhb int error, i, force_64k_base; 1099256272Sjhb 1100256272Sjhb KASSERT(base <= w->base && limit >= w->limit, 1101256272Sjhb ("attempting to shrink window")); 1102256272Sjhb 1103256272Sjhb /* 1104256272Sjhb * XXX: pcib_grow_window() doesn't try to do this anyway and 1105256272Sjhb * the error handling for all the edge cases would be tedious. 1106256272Sjhb */ 1107256272Sjhb KASSERT(limit == w->limit || base == w->base, 1108256272Sjhb ("attempting to grow both ends of a window")); 1109256272Sjhb 1110256272Sjhb /* 1111256272Sjhb * Yet more special handling for requests to expand an I/O 1112256272Sjhb * window behind an ISA-enabled bridge. Since I/O windows 1113256272Sjhb * have to grow in 0x1000 increments and the end of the 0xffff 1114256272Sjhb * range is an alias, growing a window below 64k will always 1115256272Sjhb * result in allocating new resources and never adjusting an 1116256272Sjhb * existing resource. 1117256272Sjhb */ 1118256272Sjhb if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE && 1119256272Sjhb (limit <= 65535 || (base <= 65535 && base != w->base))) { 1120256272Sjhb KASSERT(limit == w->limit || limit <= 65535, 1121256272Sjhb ("attempting to grow both ends across 64k ISA alias")); 1122256272Sjhb 1123256272Sjhb if (base != w->base) 1124256272Sjhb error = pcib_alloc_nonisa_ranges(sc, base, w->base - 1); 1125256272Sjhb else 1126256272Sjhb error = pcib_alloc_nonisa_ranges(sc, w->limit + 1, 1127256272Sjhb limit); 1128256272Sjhb if (error == 0) { 1129256272Sjhb w->base = base; 1130256272Sjhb w->limit = limit; 1131256272Sjhb } 1132256272Sjhb return (error); 1133256272Sjhb } 1134256272Sjhb 1135256272Sjhb /* 1136256272Sjhb * Find the existing resource to adjust. Usually there is only one, 1137256272Sjhb * but for an ISA-enabled bridge we might be growing the I/O window 1138256272Sjhb * above 64k and need to find the existing resource that maps all 1139256272Sjhb * of the area above 64k. 1140256272Sjhb */ 1141256272Sjhb for (i = 0; i < w->count; i++) { 1142256272Sjhb if (rman_get_end(w->res[i]) == w->limit) 1143256272Sjhb break; 1144256272Sjhb } 1145256272Sjhb KASSERT(i != w->count, ("did not find existing resource")); 1146256272Sjhb res = w->res[i]; 1147256272Sjhb 1148256272Sjhb /* 1149256272Sjhb * Usually the resource we found should match the window's 1150256272Sjhb * existing range. The one exception is the ISA-enabled case 1151256272Sjhb * mentioned above in which case the resource should start at 1152256272Sjhb * 64k. 1153256272Sjhb */ 1154256272Sjhb if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE && 1155256272Sjhb w->base <= 65535) { 1156256272Sjhb KASSERT(rman_get_start(res) == 65536, 1157256272Sjhb ("existing resource mismatch")); 1158256272Sjhb force_64k_base = 1; 1159256272Sjhb } else { 1160256272Sjhb KASSERT(w->base == rman_get_start(res), 1161256272Sjhb ("existing resource mismatch")); 1162256272Sjhb force_64k_base = 0; 1163256272Sjhb } 1164256272Sjhb 1165256272Sjhb error = bus_adjust_resource(sc->dev, type, res, force_64k_base ? 1166256272Sjhb rman_get_start(res) : base, limit); 1167256272Sjhb if (error) 1168256272Sjhb return (error); 1169256272Sjhb 1170256272Sjhb /* Add the newly allocated region to the resource manager. */ 1171256272Sjhb if (w->base != base) { 1172256272Sjhb error = rman_manage_region(&w->rman, base, w->base - 1); 1173256272Sjhb w->base = base; 1174256272Sjhb } else { 1175256272Sjhb error = rman_manage_region(&w->rman, w->limit + 1, limit); 1176256272Sjhb w->limit = limit; 1177256272Sjhb } 1178256272Sjhb if (error) { 1179256272Sjhb if (bootverbose) 1180256272Sjhb device_printf(sc->dev, 1181256272Sjhb "failed to expand %s resource manager\n", w->name); 1182256272Sjhb (void)bus_adjust_resource(sc->dev, type, res, force_64k_base ? 1183256272Sjhb rman_get_start(res) : w->base, w->limit); 1184256272Sjhb } 1185256272Sjhb return (error); 1186256272Sjhb} 1187256272Sjhb 1188221393Sjhb/* 1189221393Sjhb * Attempt to grow a window to make room for a given resource request. 1190221393Sjhb */ 1191221393Sjhbstatic int 1192221393Sjhbpcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type, 1193221393Sjhb u_long start, u_long end, u_long count, u_int flags) 1194221393Sjhb{ 1195237797Sjhb u_long align, start_free, end_free, front, back, wmask; 1196256272Sjhb int error; 1197221393Sjhb 1198221393Sjhb /* 1199221393Sjhb * Clamp the desired resource range to the maximum address 1200221393Sjhb * this window supports. Reject impossible requests. 1201256272Sjhb * 1202256272Sjhb * For I/O port requests behind a bridge with the ISA enable 1203256272Sjhb * bit set, force large allocations to start above 64k. 1204221393Sjhb */ 1205221393Sjhb if (!w->valid) 1206221393Sjhb return (EINVAL); 1207256272Sjhb if (sc->bridgectl & PCIB_BCR_ISA_ENABLE && count > 0x100 && 1208256272Sjhb start < 65536) 1209256272Sjhb start = 65536; 1210221393Sjhb if (end > w->rman.rm_end) 1211221393Sjhb end = w->rman.rm_end; 1212221393Sjhb if (start + count - 1 > end || start + count < start) 1213221393Sjhb return (EINVAL); 1214237797Sjhb wmask = (1ul << w->step) - 1; 1215221393Sjhb 1216221393Sjhb /* 1217221393Sjhb * If there is no resource at all, just try to allocate enough 1218221393Sjhb * aligned space for this resource. 1219221393Sjhb */ 1220221393Sjhb if (w->res == NULL) { 1221256272Sjhb error = pcib_alloc_new_window(sc, w, type, start, end, count, 1222256272Sjhb flags); 1223256272Sjhb if (error) { 1224221393Sjhb if (bootverbose) 1225221393Sjhb device_printf(sc->dev, 1226221393Sjhb "failed to allocate initial %s window (%#lx-%#lx,%#lx)\n", 1227221393Sjhb w->name, start, end, count); 1228256272Sjhb return (error); 1229221393Sjhb } 1230221393Sjhb if (bootverbose) 1231221393Sjhb device_printf(sc->dev, 1232256272Sjhb "allocated initial %s window of %#jx-%#jx\n", 1233256272Sjhb w->name, (uintmax_t)w->base, (uintmax_t)w->limit); 1234221393Sjhb goto updatewin; 1235221393Sjhb } 1236221393Sjhb 1237221393Sjhb /* 1238221393Sjhb * See if growing the window would help. Compute the minimum 1239221393Sjhb * amount of address space needed on both the front and back 1240221393Sjhb * ends of the existing window to satisfy the allocation. 1241221393Sjhb * 1242221393Sjhb * For each end, build a candidate region adjusting for the 1243221393Sjhb * required alignment, etc. If there is a free region at the 1244221393Sjhb * edge of the window, grow from the inner edge of the free 1245221393Sjhb * region. Otherwise grow from the window boundary. 1246221393Sjhb * 1247256272Sjhb * Growing an I/O window below 64k for a bridge with the ISA 1248256272Sjhb * enable bit doesn't require any special magic as the step 1249256272Sjhb * size of an I/O window (1k) always includes multiple 1250256272Sjhb * non-alias ranges when it is grown in either direction. 1251256272Sjhb * 1252221393Sjhb * XXX: Special case: if w->res is completely empty and the 1253221393Sjhb * request size is larger than w->res, we should find the 1254221393Sjhb * optimal aligned buffer containing w->res and allocate that. 1255221393Sjhb */ 1256221393Sjhb if (bootverbose) 1257221393Sjhb device_printf(sc->dev, 1258221393Sjhb "attempting to grow %s window for (%#lx-%#lx,%#lx)\n", 1259221393Sjhb w->name, start, end, count); 1260221393Sjhb align = 1ul << RF_ALIGNMENT(flags); 1261256272Sjhb if (start < w->base) { 1262221393Sjhb if (rman_first_free_region(&w->rman, &start_free, &end_free) != 1263256272Sjhb 0 || start_free != w->base) 1264256272Sjhb end_free = w->base; 1265221393Sjhb if (end_free > end) 1266237797Sjhb end_free = end + 1; 1267221393Sjhb 1268221393Sjhb /* Move end_free down until it is properly aligned. */ 1269221393Sjhb end_free &= ~(align - 1); 1270222930Sjhb end_free--; 1271222930Sjhb front = end_free - (count - 1); 1272221393Sjhb 1273221393Sjhb /* 1274221393Sjhb * The resource would now be allocated at (front, 1275221393Sjhb * end_free). Ensure that fits in the (start, end) 1276221393Sjhb * bounds. end_free is checked above. If 'front' is 1277221393Sjhb * ok, ensure it is properly aligned for this window. 1278221393Sjhb * Also check for underflow. 1279221393Sjhb */ 1280221393Sjhb if (front >= start && front <= end_free) { 1281221393Sjhb if (bootverbose) 1282221393Sjhb printf("\tfront candidate range: %#lx-%#lx\n", 1283221393Sjhb front, end_free); 1284237797Sjhb front &= ~wmask; 1285256272Sjhb front = w->base - front; 1286221393Sjhb } else 1287221393Sjhb front = 0; 1288221393Sjhb } else 1289221393Sjhb front = 0; 1290256272Sjhb if (end > w->limit) { 1291221393Sjhb if (rman_last_free_region(&w->rman, &start_free, &end_free) != 1292256272Sjhb 0 || end_free != w->limit) 1293256272Sjhb start_free = w->limit + 1; 1294221393Sjhb if (start_free < start) 1295221393Sjhb start_free = start; 1296221393Sjhb 1297221393Sjhb /* Move start_free up until it is properly aligned. */ 1298221393Sjhb start_free = roundup2(start_free, align); 1299222930Sjhb back = start_free + count - 1; 1300221393Sjhb 1301221393Sjhb /* 1302221393Sjhb * The resource would now be allocated at (start_free, 1303221393Sjhb * back). Ensure that fits in the (start, end) 1304221393Sjhb * bounds. start_free is checked above. If 'back' is 1305221393Sjhb * ok, ensure it is properly aligned for this window. 1306221393Sjhb * Also check for overflow. 1307221393Sjhb */ 1308221393Sjhb if (back <= end && start_free <= back) { 1309221393Sjhb if (bootverbose) 1310221393Sjhb printf("\tback candidate range: %#lx-%#lx\n", 1311221393Sjhb start_free, back); 1312237797Sjhb back |= wmask; 1313256272Sjhb back -= w->limit; 1314221393Sjhb } else 1315221393Sjhb back = 0; 1316221393Sjhb } else 1317221393Sjhb back = 0; 1318221393Sjhb 1319221393Sjhb /* 1320221393Sjhb * Try to allocate the smallest needed region first. 1321221393Sjhb * If that fails, fall back to the other region. 1322221393Sjhb */ 1323221393Sjhb error = ENOSPC; 1324221393Sjhb while (front != 0 || back != 0) { 1325221393Sjhb if (front != 0 && (front <= back || back == 0)) { 1326256272Sjhb error = pcib_expand_window(sc, w, type, w->base - front, 1327256272Sjhb w->limit); 1328221393Sjhb if (error == 0) 1329221393Sjhb break; 1330221393Sjhb front = 0; 1331221393Sjhb } else { 1332256272Sjhb error = pcib_expand_window(sc, w, type, w->base, 1333256272Sjhb w->limit + back); 1334221393Sjhb if (error == 0) 1335221393Sjhb break; 1336221393Sjhb back = 0; 1337221393Sjhb } 1338221393Sjhb } 1339221393Sjhb 1340221393Sjhb if (error) 1341221393Sjhb return (error); 1342221393Sjhb if (bootverbose) 1343256272Sjhb device_printf(sc->dev, "grew %s window to %#jx-%#jx\n", 1344256272Sjhb w->name, (uintmax_t)w->base, (uintmax_t)w->limit); 1345221393Sjhb 1346221393Sjhbupdatewin: 1347256272Sjhb /* Write the new window. */ 1348237797Sjhb KASSERT((w->base & wmask) == 0, ("start address is not aligned")); 1349237797Sjhb KASSERT((w->limit & wmask) == wmask, ("end address is not aligned")); 1350221393Sjhb pcib_write_windows(sc, w->mask); 1351221393Sjhb return (0); 1352221393Sjhb} 1353221393Sjhb 1354221393Sjhb/* 135569783Smsmith * We have to trap resource allocation requests and ensure that the bridge 135669783Smsmith * is set up to, or capable of handling them. 135769783Smsmith */ 1358102441Sjhbstruct resource * 1359221393Sjhbpcib_alloc_resource(device_t dev, device_t child, int type, int *rid, 1360221393Sjhb u_long start, u_long end, u_long count, u_int flags) 1361221393Sjhb{ 1362221393Sjhb struct pcib_softc *sc; 1363221393Sjhb struct resource *r; 1364221393Sjhb 1365221393Sjhb sc = device_get_softc(dev); 1366221393Sjhb 1367221393Sjhb /* 1368221393Sjhb * VGA resources are decoded iff the VGA enable bit is set in 1369221393Sjhb * the bridge control register. VGA resources do not fall into 1370221393Sjhb * the resource windows and are passed up to the parent. 1371221393Sjhb */ 1372221393Sjhb if ((type == SYS_RES_IOPORT && pci_is_vga_ioport_range(start, end)) || 1373221393Sjhb (type == SYS_RES_MEMORY && pci_is_vga_memory_range(start, end))) { 1374221393Sjhb if (sc->bridgectl & PCIB_BCR_VGA_ENABLE) 1375221393Sjhb return (bus_generic_alloc_resource(dev, child, type, 1376221393Sjhb rid, start, end, count, flags)); 1377221393Sjhb else 1378221393Sjhb return (NULL); 1379221393Sjhb } 1380221393Sjhb 1381221393Sjhb switch (type) { 1382221393Sjhb case SYS_RES_IOPORT: 1383256272Sjhb if (pcib_is_isa_range(sc, start, end, count)) 1384256272Sjhb return (NULL); 1385221393Sjhb r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start, 1386221393Sjhb end, count, flags); 1387237797Sjhb if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0) 1388221393Sjhb break; 1389221393Sjhb if (pcib_grow_window(sc, &sc->io, type, start, end, count, 1390221393Sjhb flags) == 0) 1391221393Sjhb r = pcib_suballoc_resource(sc, &sc->io, child, type, 1392221393Sjhb rid, start, end, count, flags); 1393221393Sjhb break; 1394221393Sjhb case SYS_RES_MEMORY: 1395221393Sjhb /* 1396221393Sjhb * For prefetchable resources, prefer the prefetchable 1397221393Sjhb * memory window, but fall back to the regular memory 1398221393Sjhb * window if that fails. Try both windows before 1399221393Sjhb * attempting to grow a window in case the firmware 1400221393Sjhb * has used a range in the regular memory window to 1401221393Sjhb * map a prefetchable BAR. 1402221393Sjhb */ 1403221393Sjhb if (flags & RF_PREFETCHABLE) { 1404221393Sjhb r = pcib_suballoc_resource(sc, &sc->pmem, child, type, 1405221393Sjhb rid, start, end, count, flags); 1406221393Sjhb if (r != NULL) 1407221393Sjhb break; 1408221393Sjhb } 1409221393Sjhb r = pcib_suballoc_resource(sc, &sc->mem, child, type, rid, 1410221393Sjhb start, end, count, flags); 1411237797Sjhb if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0) 1412221393Sjhb break; 1413221393Sjhb if (flags & RF_PREFETCHABLE) { 1414221393Sjhb if (pcib_grow_window(sc, &sc->pmem, type, start, end, 1415221393Sjhb count, flags) == 0) { 1416221393Sjhb r = pcib_suballoc_resource(sc, &sc->pmem, child, 1417221393Sjhb type, rid, start, end, count, flags); 1418221393Sjhb if (r != NULL) 1419221393Sjhb break; 1420221393Sjhb } 1421221393Sjhb } 1422221393Sjhb if (pcib_grow_window(sc, &sc->mem, type, start, end, count, 1423221393Sjhb flags & ~RF_PREFETCHABLE) == 0) 1424221393Sjhb r = pcib_suballoc_resource(sc, &sc->mem, child, type, 1425221393Sjhb rid, start, end, count, flags); 1426221393Sjhb break; 1427221393Sjhb default: 1428221393Sjhb return (bus_generic_alloc_resource(dev, child, type, rid, 1429221393Sjhb start, end, count, flags)); 1430221393Sjhb } 1431221393Sjhb 1432221393Sjhb /* 1433221393Sjhb * If attempts to suballocate from the window fail but this is a 1434221393Sjhb * subtractive bridge, pass the request up the tree. 1435221393Sjhb */ 1436221393Sjhb if (sc->flags & PCIB_SUBTRACTIVE && r == NULL) 1437221393Sjhb return (bus_generic_alloc_resource(dev, child, type, rid, 1438221393Sjhb start, end, count, flags)); 1439221393Sjhb return (r); 1440221393Sjhb} 1441221393Sjhb 1442221393Sjhbint 1443221393Sjhbpcib_adjust_resource(device_t bus, device_t child, int type, struct resource *r, 1444221393Sjhb u_long start, u_long end) 1445221393Sjhb{ 1446221393Sjhb struct pcib_softc *sc; 1447221393Sjhb 1448221393Sjhb sc = device_get_softc(bus); 1449221393Sjhb if (pcib_is_resource_managed(sc, type, r)) 1450221393Sjhb return (rman_adjust_resource(r, start, end)); 1451221393Sjhb return (bus_generic_adjust_resource(bus, child, type, r, start, end)); 1452221393Sjhb} 1453221393Sjhb 1454221393Sjhbint 1455221393Sjhbpcib_release_resource(device_t dev, device_t child, int type, int rid, 1456221393Sjhb struct resource *r) 1457221393Sjhb{ 1458221393Sjhb struct pcib_softc *sc; 1459221393Sjhb int error; 1460221393Sjhb 1461221393Sjhb sc = device_get_softc(dev); 1462221393Sjhb if (pcib_is_resource_managed(sc, type, r)) { 1463221393Sjhb if (rman_get_flags(r) & RF_ACTIVE) { 1464221393Sjhb error = bus_deactivate_resource(child, type, rid, r); 1465221393Sjhb if (error) 1466221393Sjhb return (error); 1467221393Sjhb } 1468221393Sjhb return (rman_release_resource(r)); 1469221393Sjhb } 1470221393Sjhb return (bus_generic_release_resource(dev, child, type, rid, r)); 1471221393Sjhb} 1472221393Sjhb#else 1473221393Sjhb/* 1474221393Sjhb * We have to trap resource allocation requests and ensure that the bridge 1475221393Sjhb * is set up to, or capable of handling them. 1476221393Sjhb */ 1477221393Sjhbstruct resource * 147869783Smsmithpcib_alloc_resource(device_t dev, device_t child, int type, int *rid, 1479142051Simp u_long start, u_long end, u_long count, u_int flags) 148069783Smsmith{ 1481124365Simp struct pcib_softc *sc = device_get_softc(dev); 1482164130Sjhb const char *name, *suffix; 1483124365Simp int ok; 148469783Smsmith 148569783Smsmith /* 148669783Smsmith * Fail the allocation for this range if it's not supported. 148769783Smsmith */ 1488164130Sjhb name = device_get_nameunit(child); 1489164130Sjhb if (name == NULL) { 1490164130Sjhb name = ""; 1491164130Sjhb suffix = ""; 1492164130Sjhb } else 1493164130Sjhb suffix = " "; 149469783Smsmith switch (type) { 149569783Smsmith case SYS_RES_IOPORT: 1496107546Simp ok = 0; 1497124365Simp if (!pcib_is_io_open(sc)) 1498124365Simp break; 1499124365Simp ok = (start >= sc->iobase && end <= sc->iolimit); 1500145652Smarcel 1501145652Smarcel /* 1502145652Smarcel * Make sure we allow access to VGA I/O addresses when the 1503145652Smarcel * bridge has the "VGA Enable" bit set. 1504145652Smarcel */ 1505145652Smarcel if (!ok && pci_is_vga_ioport_range(start, end)) 1506145652Smarcel ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0; 1507145652Smarcel 1508124365Simp if ((sc->flags & PCIB_SUBTRACTIVE) == 0) { 1509124365Simp if (!ok) { 1510124365Simp if (start < sc->iobase) 1511124365Simp start = sc->iobase; 1512124365Simp if (end > sc->iolimit) 1513124365Simp end = sc->iolimit; 1514142051Simp if (start < end) 1515142051Simp ok = 1; 1516124365Simp } 1517106844Smdodd } else { 1518124365Simp ok = 1; 1519189844Simp#if 0 1520189792Simp /* 1521189792Simp * If we overlap with the subtractive range, then 1522189792Simp * pick the upper range to use. 1523189792Simp */ 1524189792Simp if (start < sc->iolimit && end > sc->iobase) 1525189792Simp start = sc->iolimit + 1; 1526189844Simp#endif 1527106844Smdodd } 1528124365Simp if (end < start) { 1529142051Simp device_printf(dev, "ioport: end (%lx) < start (%lx)\n", 1530142051Simp end, start); 1531124365Simp start = 0; 1532124365Simp end = 0; 1533124365Simp ok = 0; 1534124365Simp } 1535124365Simp if (!ok) { 1536164130Sjhb device_printf(dev, "%s%srequested unsupported I/O " 1537124365Simp "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n", 1538164130Sjhb name, suffix, start, end, sc->iobase, sc->iolimit); 1539124365Simp return (NULL); 1540124365Simp } 1541124365Simp if (bootverbose) 1542142051Simp device_printf(dev, 1543164130Sjhb "%s%srequested I/O range 0x%lx-0x%lx: in range\n", 1544164130Sjhb name, suffix, start, end); 1545124365Simp break; 154669783Smsmith 154769783Smsmith case SYS_RES_MEMORY: 1548107546Simp ok = 0; 1549107546Simp if (pcib_is_nonprefetch_open(sc)) 1550124365Simp ok = ok || (start >= sc->membase && end <= sc->memlimit); 1551107546Simp if (pcib_is_prefetch_open(sc)) 1552124365Simp ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit); 1553145652Smarcel 1554145652Smarcel /* 1555145652Smarcel * Make sure we allow access to VGA memory addresses when the 1556145652Smarcel * bridge has the "VGA Enable" bit set. 1557145652Smarcel */ 1558145652Smarcel if (!ok && pci_is_vga_memory_range(start, end)) 1559145652Smarcel ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0; 1560145652Smarcel 1561124365Simp if ((sc->flags & PCIB_SUBTRACTIVE) == 0) { 1562124365Simp if (!ok) { 1563124365Simp ok = 1; 1564124365Simp if (flags & RF_PREFETCHABLE) { 1565124365Simp if (pcib_is_prefetch_open(sc)) { 1566124365Simp if (start < sc->pmembase) 1567124365Simp start = sc->pmembase; 1568124365Simp if (end > sc->pmemlimit) 1569124365Simp end = sc->pmemlimit; 1570124365Simp } else { 1571124365Simp ok = 0; 1572124365Simp } 1573124365Simp } else { /* non-prefetchable */ 1574124365Simp if (pcib_is_nonprefetch_open(sc)) { 1575124365Simp if (start < sc->membase) 1576124365Simp start = sc->membase; 1577124365Simp if (end > sc->memlimit) 1578124365Simp end = sc->memlimit; 1579124365Simp } else { 1580124365Simp ok = 0; 1581124365Simp } 1582124365Simp } 1583107546Simp } 1584107546Simp } else if (!ok) { 1585124365Simp ok = 1; /* subtractive bridge: always ok */ 1586189844Simp#if 0 1587124365Simp if (pcib_is_nonprefetch_open(sc)) { 1588189792Simp if (start < sc->memlimit && end > sc->membase) 1589189792Simp start = sc->memlimit + 1; 1590124365Simp } 1591124365Simp if (pcib_is_prefetch_open(sc)) { 1592189792Simp if (start < sc->pmemlimit && end > sc->pmembase) 1593189792Simp start = sc->pmemlimit + 1; 1594124365Simp } 1595189844Simp#endif 1596106844Smdodd } 1597124365Simp if (end < start) { 1598142051Simp device_printf(dev, "memory: end (%lx) < start (%lx)\n", 1599142051Simp end, start); 1600124365Simp start = 0; 1601124365Simp end = 0; 1602124365Simp ok = 0; 1603124365Simp } 1604124365Simp if (!ok && bootverbose) 1605124365Simp device_printf(dev, 1606164130Sjhb "%s%srequested unsupported memory range %#lx-%#lx " 1607163805Simp "(decoding %#jx-%#jx, %#jx-%#jx)\n", 1608164130Sjhb name, suffix, start, end, 1609163805Simp (uintmax_t)sc->membase, (uintmax_t)sc->memlimit, 1610163805Simp (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit); 1611124365Simp if (!ok) 1612124365Simp return (NULL); 1613124365Simp if (bootverbose) 1614164130Sjhb device_printf(dev,"%s%srequested memory range " 1615142051Simp "0x%lx-0x%lx: good\n", 1616164130Sjhb name, suffix, start, end); 1617124365Simp break; 161869908Smsmith 161969783Smsmith default: 1620124365Simp break; 162169783Smsmith } 1622124365Simp /* 1623124365Simp * Bridge is OK decoding this resource, so pass it up. 1624124365Simp */ 1625142051Simp return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 1626142051Simp count, flags)); 162769783Smsmith} 1628221393Sjhb#endif 162969783Smsmith 163069783Smsmith/* 163169783Smsmith * PCIB interface. 163269783Smsmith */ 1633102441Sjhbint 163469783Smsmithpcib_maxslots(device_t dev) 163569783Smsmith{ 163669908Smsmith return(PCI_SLOTMAX); 163769783Smsmith} 163869783Smsmith 163969783Smsmith/* 164069783Smsmith * Since we are a child of a PCI bus, its parent must support the pcib interface. 164169783Smsmith */ 1642119266Simpuint32_t 1643189792Simppcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width) 164469783Smsmith{ 164569783Smsmith return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width)); 164669783Smsmith} 164769783Smsmith 1648102441Sjhbvoid 1649189792Simppcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width) 165069783Smsmith{ 165169783Smsmith PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width); 165269783Smsmith} 165369783Smsmith 165469783Smsmith/* 165569783Smsmith * Route an interrupt across a PCI bridge. 165669783Smsmith */ 1657109229Sbennoint 165869783Smsmithpcib_route_interrupt(device_t pcib, device_t dev, int pin) 165969783Smsmith{ 166069783Smsmith device_t bus; 166169783Smsmith int parent_intpin; 166269783Smsmith int intnum; 166369783Smsmith 166469783Smsmith /* 166569783Smsmith * 166669783Smsmith * The PCI standard defines a swizzle of the child-side device/intpin to 166769783Smsmith * the parent-side intpin as follows. 166869783Smsmith * 166969783Smsmith * device = device on child bus 167069783Smsmith * child_intpin = intpin on child bus slot (0-3) 167169783Smsmith * parent_intpin = intpin on parent bus slot (0-3) 167269783Smsmith * 167369783Smsmith * parent_intpin = (device + child_intpin) % 4 167469783Smsmith */ 1675115234Sticso parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4; 167669783Smsmith 167769783Smsmith /* 167869783Smsmith * Our parent is a PCI bus. Its parent must export the pcib interface 167969783Smsmith * which includes the ability to route interrupts. 168069783Smsmith */ 168169783Smsmith bus = device_get_parent(pcib); 168269783Smsmith intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1); 1683131398Sjhb if (PCI_INTERRUPT_VALID(intnum) && bootverbose) { 1684102977Sjhb device_printf(pcib, "slot %d INT%c is routed to irq %d\n", 1685102977Sjhb pci_get_slot(dev), 'A' + pin - 1, intnum); 168690554Smsmith } 168769783Smsmith return(intnum); 168869783Smsmith} 1689107172Sjhb 1690169221Sjhb/* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */ 1691164264Sjhbint 1692164264Sjhbpcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs) 1693164264Sjhb{ 1694169902Sgallatin struct pcib_softc *sc = device_get_softc(pcib); 1695164264Sjhb device_t bus; 1696164264Sjhb 1697165995Sjhb if (sc->flags & PCIB_DISABLE_MSI) 1698165995Sjhb return (ENXIO); 1699164264Sjhb bus = device_get_parent(pcib); 1700164264Sjhb return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount, 1701164264Sjhb irqs)); 1702164264Sjhb} 1703164264Sjhb 1704169221Sjhb/* Pass request to release MSI/MSI-X messages up to the parent bridge. */ 1705164264Sjhbint 1706164264Sjhbpcib_release_msi(device_t pcib, device_t dev, int count, int *irqs) 1707164264Sjhb{ 1708164264Sjhb device_t bus; 1709164264Sjhb 1710164264Sjhb bus = device_get_parent(pcib); 1711164264Sjhb return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs)); 1712164264Sjhb} 1713164264Sjhb 1714164264Sjhb/* Pass request to alloc an MSI-X message up to the parent bridge. */ 1715164264Sjhbint 1716169221Sjhbpcib_alloc_msix(device_t pcib, device_t dev, int *irq) 1717164264Sjhb{ 1718169902Sgallatin struct pcib_softc *sc = device_get_softc(pcib); 1719164264Sjhb device_t bus; 1720164264Sjhb 1721253273Smarius if (sc->flags & PCIB_DISABLE_MSIX) 1722165995Sjhb return (ENXIO); 1723164264Sjhb bus = device_get_parent(pcib); 1724169221Sjhb return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq)); 1725164264Sjhb} 1726164264Sjhb 1727169221Sjhb/* Pass request to release an MSI-X message up to the parent bridge. */ 1728166176Sjhbint 1729169221Sjhbpcib_release_msix(device_t pcib, device_t dev, int irq) 1730166176Sjhb{ 1731166176Sjhb device_t bus; 1732166176Sjhb 1733166176Sjhb bus = device_get_parent(pcib); 1734169221Sjhb return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq)); 1735166176Sjhb} 1736166176Sjhb 1737169221Sjhb/* Pass request to map MSI/MSI-X message up to parent bridge. */ 1738164264Sjhbint 1739169221Sjhbpcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, 1740169221Sjhb uint32_t *data) 1741164264Sjhb{ 1742164264Sjhb device_t bus; 1743180753Sluoqi int error; 1744164264Sjhb 1745164264Sjhb bus = device_get_parent(pcib); 1746180753Sluoqi error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data); 1747180753Sluoqi if (error) 1748180753Sluoqi return (error); 1749180753Sluoqi 1750180753Sluoqi pci_ht_map_msi(pcib, *addr); 1751180753Sluoqi return (0); 1752164264Sjhb} 1753164264Sjhb 1754211430Sjhb/* Pass request for device power state up to parent bridge. */ 1755211430Sjhbint 1756211430Sjhbpcib_power_for_sleep(device_t pcib, device_t dev, int *pstate) 1757211430Sjhb{ 1758211430Sjhb device_t bus; 1759211430Sjhb 1760211430Sjhb bus = device_get_parent(pcib); 1761211430Sjhb return (PCIB_POWER_FOR_SLEEP(bus, dev, pstate)); 1762211430Sjhb} 1763