if_nfereg.h revision 159953
1/* $OpenBSD: if_nfereg.h,v 1.18 2006/05/01 15:59:31 brad Exp $ */ 2 3/*- 4 * Copyright (c) 2005 Jonathan Gray <jsg@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19#define NFE_PCI_BA 0x10 20 21#define NFE_RX_RING_COUNT 128 22#define NFE_TX_RING_COUNT 256 23 24#define NFE_JBYTES (ETHER_MAX_LEN_JUMBO + ETHER_ALIGN) 25#define NFE_JPOOL_COUNT (NFE_RX_RING_COUNT + 64) 26#define NFE_JPOOL_SIZE (NFE_JPOOL_COUNT * NFE_JBYTES) 27 28#define NFE_MAX_SCATTER (NFE_TX_RING_COUNT - 2) 29 30#define NFE_IRQ_STATUS 0x000 31#define NFE_IRQ_MASK 0x004 32#define NFE_SETUP_R6 0x008 33#define NFE_IMTIMER 0x00c 34#define NFE_MISC1 0x080 35#define NFE_TX_CTL 0x084 36#define NFE_TX_STATUS 0x088 37#define NFE_RXFILTER 0x08c 38#define NFE_RXBUFSZ 0x090 39#define NFE_RX_CTL 0x094 40#define NFE_RX_STATUS 0x098 41#define NFE_RNDSEED 0x09c 42#define NFE_SETUP_R1 0x0a0 43#define NFE_SETUP_R2 0x0a4 44#define NFE_MACADDR_HI 0x0a8 45#define NFE_MACADDR_LO 0x0ac 46#define NFE_MULTIADDR_HI 0x0b0 47#define NFE_MULTIADDR_LO 0x0b4 48#define NFE_MULTIMASK_HI 0x0b8 49#define NFE_MULTIMASK_LO 0x0bc 50#define NFE_PHY_IFACE 0x0c0 51#define NFE_TX_RING_ADDR_LO 0x100 52#define NFE_RX_RING_ADDR_LO 0x104 53#define NFE_RING_SIZE 0x108 54#define NFE_TX_UNK 0x10c 55#define NFE_LINKSPEED 0x110 56#define NFE_SETUP_R5 0x130 57#define NFE_SETUP_R3 0x13C 58#define NFE_SETUP_R7 0x140 59#define NFE_RXTX_CTL 0x144 60#define NFE_TX_RING_ADDR_HI 0x148 61#define NFE_RX_RING_ADDR_HI 0x14c 62#define NFE_PHY_STATUS 0x180 63#define NFE_SETUP_R4 0x184 64#define NFE_STATUS 0x188 65#define NFE_PHY_SPEED 0x18c 66#define NFE_PHY_CTL 0x190 67#define NFE_PHY_DATA 0x194 68#define NFE_WOL_CTL 0x200 69#define NFE_PATTERN_CRC 0x204 70#define NFE_PATTERN_MASK 0x208 71#define NFE_PWR_CAP 0x268 72#define NFE_PWR_STATE 0x26c 73#define NFE_VTAG_CTL 0x300 74 75#define NFE_PHY_ERROR 0x00001 76#define NFE_PHY_WRITE 0x00400 77#define NFE_PHY_BUSY 0x08000 78#define NFE_PHYADD_SHIFT 5 79 80#define NFE_STATUS_MAGIC 0x140000 81 82#define NFE_R1_MAGIC 0x16070f 83#define NFE_R2_MAGIC 0x16 84#define NFE_R4_MAGIC 0x08 85#define NFE_R6_MAGIC 0x03 86#define NFE_WOL_MAGIC 0x7770 87#define NFE_RX_START 0x01 88#define NFE_TX_START 0x01 89 90#define NFE_IRQ_RXERR 0x0001 91#define NFE_IRQ_RX 0x0002 92#define NFE_IRQ_RX_NOBUF 0x0004 93#define NFE_IRQ_TXERR 0x0008 94#define NFE_IRQ_TX_DONE 0x0010 95#define NFE_IRQ_TIMER 0x0020 96#define NFE_IRQ_LINK 0x0040 97#define NFE_IRQ_TXERR2 0x0080 98#define NFE_IRQ_TX1 0x0100 99 100#define NFE_IRQ_WANTED \ 101 (NFE_IRQ_RXERR | NFE_IRQ_RX_NOBUF | NFE_IRQ_RX | \ 102 NFE_IRQ_TXERR | NFE_IRQ_TXERR2 | NFE_IRQ_TX_DONE | \ 103 NFE_IRQ_LINK) 104 105#define NFE_RXTX_KICKTX 0x0001 106#define NFE_RXTX_BIT1 0x0002 107#define NFE_RXTX_BIT2 0x0004 108#define NFE_RXTX_RESET 0x0010 109#define NFE_RXTX_VTAG_STRIP 0x0040 110#define NFE_RXTX_VTAG_INSERT 0x0080 111#define NFE_RXTX_RXCSUM 0x0400 112#define NFE_RXTX_V2MAGIC 0x2100 113#define NFE_RXTX_V3MAGIC 0x2200 114#define NFE_RXFILTER_MAGIC 0x007f0008 115#define NFE_U2M (1 << 5) 116#define NFE_PROMISC (1 << 7) 117 118/* default interrupt moderation timer of 128us */ 119#define NFE_IM_DEFAULT ((128 * 100) / 1024) 120 121#define NFE_VTAG_ENABLE (1 << 13) 122 123#define NFE_PWR_VALID (1 << 8) 124#define NFE_PWR_WAKEUP (1 << 15) 125 126#define NFE_MEDIA_SET 0x10000 127#define NFE_MEDIA_1000T 0x00032 128#define NFE_MEDIA_100TX 0x00064 129#define NFE_MEDIA_10T 0x003e8 130 131#define NFE_PHY_100TX (1 << 0) 132#define NFE_PHY_1000T (1 << 1) 133#define NFE_PHY_HDX (1 << 8) 134 135#define NFE_MISC1_MAGIC 0x003b0f3c 136#define NFE_MISC1_HDX (1 << 1) 137 138#define NFE_SEED_MASK 0x0003ff00 139#define NFE_SEED_10T 0x00007f00 140#define NFE_SEED_100TX 0x00002d00 141#define NFE_SEED_1000T 0x00007400 142 143/* Rx/Tx descriptor */ 144struct nfe_desc32 { 145 uint32_t physaddr; 146 uint16_t length; 147 uint16_t flags; 148#define NFE_RX_FIXME_V1 0x6004 149#define NFE_RX_VALID_V1 (1 << 0) 150#define NFE_TX_ERROR_V1 0x7808 151#define NFE_TX_LASTFRAG_V1 (1 << 0) 152} __packed; 153 154#define NFE_V1_TXERR "\020" \ 155 "\14TXERROR\13UNDERFLOW\12LATECOLLISION\11LOSTCARRIER\10DEFERRED" \ 156 "\08FORCEDINT\03RETRY\00LASTPACKET" 157 158/* V2 Rx/Tx descriptor */ 159struct nfe_desc64 { 160 uint32_t physaddr[2]; 161 uint32_t vtag; 162#define NFE_RX_VTAG (1 << 16) 163#define NFE_TX_VTAG (1 << 18) 164 uint16_t length; 165 uint16_t flags; 166#define NFE_RX_FIXME_V2 0x4300 167#define NFE_RX_VALID_V2 (1 << 13) 168#define NFE_TX_ERROR_V2 0x5c04 169#define NFE_TX_LASTFRAG_V2 (1 << 13) 170} __packed; 171 172#define NFE_V2_TXERR "\020" \ 173 "\14FORCEDINT\13LASTPACKET\12UNDERFLOW\10LOSTCARRIER\09DEFERRED\02RETRY" 174 175/* flags common to V1/V2 descriptors */ 176#define NFE_RX_CSUMOK 0x1c00 177#define NFE_RX_ERROR (1 << 14) 178#define NFE_RX_READY (1 << 15) 179#define NFE_TX_TCP_CSUM (1 << 10) 180#define NFE_TX_IP_CSUM (1 << 11) 181#define NFE_TX_VALID (1 << 15) 182 183#define NFE_READ(sc, reg) \ 184 bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, (reg)) 185 186#define NFE_WRITE(sc, reg, val) \ 187 bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (reg), (val)) 188