1231650Sluigi/* 2262153Sluigi * Copyright (C) 2011-2014 Universita` di Pisa. All rights reserved. 3231650Sluigi * 4231650Sluigi * Redistribution and use in source and binary forms, with or without 5231650Sluigi * modification, are permitted provided that the following conditions 6231650Sluigi * are met: 7231650Sluigi * 1. Redistributions of source code must retain the above copyright 8231650Sluigi * notice, this list of conditions and the following disclaimer. 9231650Sluigi * 2. Redistributions in binary form must reproduce the above copyright 10231650Sluigi * notice, this list of conditions and the following disclaimer in the 11231650Sluigi * documentation and/or other materials provided with the distribution. 12231650Sluigi * 13231650Sluigi * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14231650Sluigi * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15231650Sluigi * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16231650Sluigi * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17231650Sluigi * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18231650Sluigi * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19231650Sluigi * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20231650Sluigi * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21231650Sluigi * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22231650Sluigi * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23231650Sluigi * SUCH DAMAGE. 24231650Sluigi */ 25231650Sluigi 26231650Sluigi/* 27231650Sluigi * $FreeBSD$ 28231650Sluigi * 29235549Sluigi * Netmap support for igb, partly contributed by Ahmed Kooli 30235549Sluigi * For details on netmap support please see ixgbe_netmap.h 31231650Sluigi */ 32231650Sluigi 33235549Sluigi 34231650Sluigi#include <net/netmap.h> 35231650Sluigi#include <sys/selinfo.h> 36231650Sluigi#include <vm/vm.h> 37231650Sluigi#include <vm/pmap.h> /* vtophys ? */ 38231650Sluigi#include <dev/netmap/netmap_kern.h> 39231650Sluigi 40262153Sluigi/* 41262153Sluigi * Adaptation to different versions of the driver. 42262153Sluigi */ 43231650Sluigi 44262153Sluigi#ifndef IGB_MEDIA_RESET 45262153Sluigi/* at the same time as IGB_MEDIA_RESET was defined, the 46262153Sluigi * tx buffer descriptor was renamed, so use this to revert 47262153Sluigi * back to the old name. 48262153Sluigi */ 49262153Sluigi#define igb_tx_buf igb_tx_buffer 50262153Sluigi#endif 51262153Sluigi 52262153Sluigi 53231650Sluigi/* 54262153Sluigi * Register/unregister. We are already under netmap lock. 55231650Sluigi */ 56231650Sluigistatic int 57262153Sluigiigb_netmap_reg(struct netmap_adapter *na, int onoff) 58231650Sluigi{ 59262153Sluigi struct ifnet *ifp = na->ifp; 60231650Sluigi struct adapter *adapter = ifp->if_softc; 61231650Sluigi 62262153Sluigi IGB_CORE_LOCK(adapter); 63231650Sluigi igb_disable_intr(adapter); 64231650Sluigi 65231650Sluigi /* Tell the stack that the interface is no longer active */ 66231650Sluigi ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 67231650Sluigi 68262153Sluigi /* enable or disable flags and callbacks in na and ifp */ 69231650Sluigi if (onoff) { 70262153Sluigi nm_set_native_flags(na); 71231650Sluigi } else { 72262153Sluigi nm_clear_native_flags(na); 73231650Sluigi } 74262153Sluigi igb_init_locked(adapter); /* also enable intr */ 75262153Sluigi IGB_CORE_UNLOCK(adapter); 76262153Sluigi return (ifp->if_drv_flags & IFF_DRV_RUNNING ? 0 : 1); 77231650Sluigi} 78231650Sluigi 79231650Sluigi 80231650Sluigi/* 81231650Sluigi * Reconcile kernel and user view of the transmit ring. 82231650Sluigi */ 83231650Sluigistatic int 84262153Sluigiigb_netmap_txsync(struct netmap_adapter *na, u_int ring_nr, int flags) 85231650Sluigi{ 86262153Sluigi struct ifnet *ifp = na->ifp; 87231650Sluigi struct netmap_kring *kring = &na->tx_rings[ring_nr]; 88231650Sluigi struct netmap_ring *ring = kring->ring; 89262153Sluigi u_int nm_i; /* index into the netmap ring */ 90262153Sluigi u_int nic_i; /* index into the NIC ring */ 91262153Sluigi u_int n; 92262153Sluigi u_int const lim = kring->nkr_num_slots - 1; 93262153Sluigi u_int const head = kring->rhead; 94231650Sluigi /* generate an interrupt approximately every half ring */ 95246355Sluigi u_int report_frequency = kring->nkr_num_slots >> 1; 96231650Sluigi 97262153Sluigi /* device-specific */ 98262153Sluigi struct adapter *adapter = ifp->if_softc; 99262153Sluigi struct tx_ring *txr = &adapter->tx_rings[ring_nr]; 100262153Sluigi /* 82575 needs the queue index added */ 101262153Sluigi u32 olinfo_status = 102262153Sluigi (adapter->hw.mac.type == e1000_82575) ? (txr->me << 4) : 0; 103231650Sluigi 104231650Sluigi bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map, 105262153Sluigi BUS_DMASYNC_POSTREAD); 106231650Sluigi 107262153Sluigi /* 108262153Sluigi * First part: process new packets to send. 109235549Sluigi */ 110231650Sluigi 111262153Sluigi nm_i = kring->nr_hwcur; 112262153Sluigi if (nm_i != head) { /* we have new packets to send */ 113262153Sluigi nic_i = netmap_idx_k2n(kring, nm_i); 114262153Sluigi for (n = 0; nm_i != head; n++) { 115262153Sluigi struct netmap_slot *slot = &ring->slot[nm_i]; 116262153Sluigi u_int len = slot->len; 117235549Sluigi uint64_t paddr; 118235549Sluigi void *addr = PNMB(slot, &paddr); 119231650Sluigi 120262153Sluigi /* device-specific */ 121262153Sluigi union e1000_adv_tx_desc *curr = 122262153Sluigi (union e1000_adv_tx_desc *)&txr->tx_base[nic_i]; 123262153Sluigi struct igb_tx_buf *txbuf = &txr->tx_buffers[nic_i]; 124262153Sluigi int flags = (slot->flags & NS_REPORT || 125262153Sluigi nic_i == 0 || nic_i == report_frequency) ? 126262153Sluigi E1000_ADVTXD_DCMD_RS : 0; 127231650Sluigi 128262153Sluigi NM_CHECK_ADDR_LEN(addr, len); 129262153Sluigi 130235549Sluigi if (slot->flags & NS_BUF_CHANGED) { 131235549Sluigi /* buffer has changed, reload map */ 132235549Sluigi netmap_reload_map(txr->txtag, txbuf->map, addr); 133235549Sluigi } 134262153Sluigi slot->flags &= ~(NS_REPORT | NS_BUF_CHANGED); 135262153Sluigi 136262153Sluigi /* Fill the slot in the NIC ring. */ 137231650Sluigi curr->read.buffer_addr = htole64(paddr); 138235549Sluigi // XXX check olinfo and cmd_type_len 139231650Sluigi curr->read.olinfo_status = 140231650Sluigi htole32(olinfo_status | 141231650Sluigi (len<< E1000_ADVTXD_PAYLEN_SHIFT)); 142231650Sluigi curr->read.cmd_type_len = 143231650Sluigi htole32(len | E1000_ADVTXD_DTYP_DATA | 144262153Sluigi E1000_ADVTXD_DCMD_IFCS | 145262153Sluigi E1000_ADVTXD_DCMD_DEXT | 146262153Sluigi E1000_ADVTXD_DCMD_EOP | flags); 147231650Sluigi 148262153Sluigi /* make sure changes to the buffer are synced */ 149231650Sluigi bus_dmamap_sync(txr->txtag, txbuf->map, 150231650Sluigi BUS_DMASYNC_PREWRITE); 151262153Sluigi 152262153Sluigi nm_i = nm_next(nm_i, lim); 153262153Sluigi nic_i = nm_next(nic_i, lim); 154231650Sluigi } 155262153Sluigi kring->nr_hwcur = head; 156231650Sluigi 157231650Sluigi /* Set the watchdog XXX ? */ 158231650Sluigi txr->queue_status = IGB_QUEUE_WORKING; 159231650Sluigi txr->watchdog_time = ticks; 160231650Sluigi 161262153Sluigi /* synchronize the NIC ring */ 162231650Sluigi bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map, 163262153Sluigi BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 164231650Sluigi 165262153Sluigi /* (re)start the tx unit up to slot nic_i (excluded) */ 166262153Sluigi E1000_WRITE_REG(&adapter->hw, E1000_TDT(txr->me), nic_i); 167231650Sluigi } 168235549Sluigi 169262153Sluigi /* 170262153Sluigi * Second part: reclaim buffers for completed transmissions. 171262153Sluigi */ 172262153Sluigi if (flags & NAF_FORCE_RECLAIM || nm_kr_txempty(kring)) { 173235549Sluigi /* record completed transmissions using TDH */ 174262153Sluigi nic_i = E1000_READ_REG(&adapter->hw, E1000_TDH(ring_nr)); 175262153Sluigi if (nic_i >= kring->nkr_num_slots) { /* XXX can it happen ? */ 176262153Sluigi D("TDH wrap %d", nic_i); 177262153Sluigi nic_i -= kring->nkr_num_slots; 178235549Sluigi } 179262153Sluigi txr->next_to_clean = nic_i; 180262153Sluigi kring->nr_hwtail = nm_prev(netmap_idx_n2k(kring, nic_i), lim); 181231650Sluigi } 182235549Sluigi 183262153Sluigi nm_txsync_finalize(kring); 184262153Sluigi 185231650Sluigi return 0; 186231650Sluigi} 187231650Sluigi 188231650Sluigi 189231650Sluigi/* 190231650Sluigi * Reconcile kernel and user view of the receive ring. 191231650Sluigi */ 192231650Sluigistatic int 193262153Sluigiigb_netmap_rxsync(struct netmap_adapter *na, u_int ring_nr, int flags) 194231650Sluigi{ 195262153Sluigi struct ifnet *ifp = na->ifp; 196231650Sluigi struct netmap_kring *kring = &na->rx_rings[ring_nr]; 197231650Sluigi struct netmap_ring *ring = kring->ring; 198262153Sluigi u_int nm_i; /* index into the netmap ring */ 199262153Sluigi u_int nic_i; /* index into the NIC ring */ 200262153Sluigi u_int n; 201262153Sluigi u_int const lim = kring->nkr_num_slots - 1; 202262153Sluigi u_int const head = nm_rxsync_prologue(kring); 203257768Sluigi int force_update = (flags & NAF_FORCE_READ) || kring->nr_kflags & NKR_PENDINTR; 204231650Sluigi 205262153Sluigi /* device-specific */ 206262153Sluigi struct adapter *adapter = ifp->if_softc; 207262153Sluigi struct rx_ring *rxr = &adapter->rx_rings[ring_nr]; 208262153Sluigi 209262153Sluigi if (head > lim) 210231650Sluigi return netmap_ring_reinit(kring); 211231650Sluigi 212235549Sluigi /* XXX check sync modes */ 213231650Sluigi bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, 214262153Sluigi BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 215231650Sluigi 216235549Sluigi /* 217262153Sluigi * First part: import newly received packets. 218235549Sluigi */ 219235549Sluigi if (netmap_no_pendintr || force_update) { 220246355Sluigi uint16_t slot_flags = kring->nkr_slot_flags; 221246355Sluigi 222262153Sluigi nic_i = rxr->next_to_check; 223262153Sluigi nm_i = netmap_idx_n2k(kring, nic_i); 224262153Sluigi 225235549Sluigi for (n = 0; ; n++) { 226262153Sluigi union e1000_adv_rx_desc *curr = &rxr->rx_base[nic_i]; 227235549Sluigi uint32_t staterr = le32toh(curr->wb.upper.status_error); 228231650Sluigi 229235549Sluigi if ((staterr & E1000_RXD_STAT_DD) == 0) 230235549Sluigi break; 231262153Sluigi ring->slot[nm_i].len = le16toh(curr->wb.upper.length); 232262153Sluigi ring->slot[nm_i].flags = slot_flags; 233235549Sluigi bus_dmamap_sync(rxr->ptag, 234262153Sluigi rxr->rx_buffers[nic_i].pmap, BUS_DMASYNC_POSTREAD); 235262153Sluigi nm_i = nm_next(nm_i, lim); 236262153Sluigi nic_i = nm_next(nic_i, lim); 237235549Sluigi } 238235549Sluigi if (n) { /* update the state variables */ 239262153Sluigi rxr->next_to_check = nic_i; 240262153Sluigi kring->nr_hwtail = nm_i; 241235549Sluigi } 242235549Sluigi kring->nr_kflags &= ~NKR_PENDINTR; 243231650Sluigi } 244235549Sluigi 245262153Sluigi /* 246262153Sluigi * Second part: skip past packets that userspace has released. 247262153Sluigi */ 248262153Sluigi nm_i = kring->nr_hwcur; 249262153Sluigi if (nm_i != head) { 250262153Sluigi nic_i = netmap_idx_k2n(kring, nm_i); 251262153Sluigi for (n = 0; nm_i != head; n++) { 252262153Sluigi struct netmap_slot *slot = &ring->slot[nm_i]; 253231650Sluigi uint64_t paddr; 254231650Sluigi void *addr = PNMB(slot, &paddr); 255231650Sluigi 256262153Sluigi union e1000_adv_rx_desc *curr = &rxr->rx_base[nic_i]; 257262153Sluigi struct igb_rx_buf *rxbuf = &rxr->rx_buffers[nic_i]; 258231650Sluigi 259262153Sluigi if (addr == netmap_buffer_base) /* bad buf */ 260262153Sluigi goto ring_reset; 261262153Sluigi 262231650Sluigi if (slot->flags & NS_BUF_CHANGED) { 263262153Sluigi /* buffer has changed, reload map */ 264231650Sluigi netmap_reload_map(rxr->ptag, rxbuf->pmap, addr); 265231650Sluigi slot->flags &= ~NS_BUF_CHANGED; 266231650Sluigi } 267262153Sluigi curr->wb.upper.status_error = 0; 268235549Sluigi curr->read.pkt_addr = htole64(paddr); 269231650Sluigi bus_dmamap_sync(rxr->ptag, rxbuf->pmap, 270262153Sluigi BUS_DMASYNC_PREREAD); 271262153Sluigi nm_i = nm_next(nm_i, lim); 272262153Sluigi nic_i = nm_next(nic_i, lim); 273231650Sluigi } 274262153Sluigi kring->nr_hwcur = head; 275262153Sluigi 276231650Sluigi bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, 277262153Sluigi BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 278235549Sluigi /* 279235549Sluigi * IMPORTANT: we must leave one free slot in the ring, 280262153Sluigi * so move nic_i back by one unit 281231650Sluigi */ 282262153Sluigi nic_i = nm_prev(nic_i, lim); 283262153Sluigi E1000_WRITE_REG(&adapter->hw, E1000_RDT(rxr->me), nic_i); 284231650Sluigi } 285262153Sluigi 286262153Sluigi /* tell userspace that there might be new packets */ 287262153Sluigi nm_rxsync_finalize(kring); 288262153Sluigi 289231650Sluigi return 0; 290262153Sluigi 291262153Sluigiring_reset: 292262153Sluigi return netmap_ring_reinit(kring); 293231650Sluigi} 294235549Sluigi 295235549Sluigi 296235549Sluigistatic void 297235549Sluigiigb_netmap_attach(struct adapter *adapter) 298235549Sluigi{ 299235549Sluigi struct netmap_adapter na; 300235549Sluigi 301235549Sluigi bzero(&na, sizeof(na)); 302235549Sluigi 303235549Sluigi na.ifp = adapter->ifp; 304257768Sluigi na.na_flags = NAF_BDG_MAYSLEEP; 305235549Sluigi na.num_tx_desc = adapter->num_tx_desc; 306235549Sluigi na.num_rx_desc = adapter->num_rx_desc; 307235549Sluigi na.nm_txsync = igb_netmap_txsync; 308235549Sluigi na.nm_rxsync = igb_netmap_rxsync; 309235549Sluigi na.nm_register = igb_netmap_reg; 310262153Sluigi na.num_tx_rings = na.num_rx_rings = adapter->num_queues; 311262153Sluigi netmap_attach(&na); 312262153Sluigi} 313262153Sluigi 314235549Sluigi/* end of file */ 315