1155852Sgallatin/******************************************************************************* 2155852Sgallatin 3247795SgallatinCopyright (c) 2006-2013, Myricom Inc. 4155852SgallatinAll rights reserved. 5155852Sgallatin 6155852SgallatinRedistribution and use in source and binary forms, with or without 7155852Sgallatinmodification, are permitted provided that the following conditions are met: 8155852Sgallatin 9155852Sgallatin 1. Redistributions of source code must retain the above copyright notice, 10155852Sgallatin this list of conditions and the following disclaimer. 11155852Sgallatin 12171405Sgallatin 2. Neither the name of the Myricom Inc, nor the names of its 13155852Sgallatin contributors may be used to endorse or promote products derived from 14155852Sgallatin this software without specific prior written permission. 15155852Sgallatin 16155852SgallatinTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17155852SgallatinAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18155852SgallatinIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19155852SgallatinARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20155852SgallatinLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21155852SgallatinCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22155852SgallatinSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23155852SgallatinINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24155852SgallatinCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25155852SgallatinARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26155852SgallatinPOSSIBILITY OF SUCH DAMAGE. 27155852Sgallatin 28155852Sgallatin$FreeBSD$ 29155852Sgallatin 30155852Sgallatin***************************************************************************/ 31155852Sgallatin 32159571Sgallatin#define MXGE_ETH_STOPPED 0 33159571Sgallatin#define MXGE_ETH_STOPPING 1 34159571Sgallatin#define MXGE_ETH_STARTING 2 35159571Sgallatin#define MXGE_ETH_RUNNING 3 36159571Sgallatin#define MXGE_ETH_OPEN_FAILED 4 37155852Sgallatin 38159571Sgallatin#define MXGE_FW_OFFSET 1024*1024 39159571Sgallatin#define MXGE_EEPROM_STRINGS_SIZE 256 40169871Sgallatin#define MXGE_MAX_SEND_DESC 128 41155852Sgallatin 42181964Sgallatin#if ((__FreeBSD_version > 800000 && __FreeBSD_version < 800005) \ 43181964Sgallatin || __FreeBSD_version < 700111) 44175579Sgallatin#define MXGE_VIRT_JUMBOS 1 45175579Sgallatin#else 46175579Sgallatin#define MXGE_VIRT_JUMBOS 0 47175579Sgallatin#endif 48175579Sgallatin 49193311Sgallatin#if (__FreeBSD_version > 800082) 50193311Sgallatin#define IFNET_BUF_RING 1 51193311Sgallatin#endif 52193311Sgallatin 53176261Sgallatin#ifndef VLAN_CAPABILITIES 54176261Sgallatin#define VLAN_CAPABILITIES(ifp) 55176261Sgallatin#define mxge_vlans_active(sc) (sc)->ifp->if_nvlans 56176261Sgallatin#else 57176261Sgallatin#define mxge_vlans_active(sc) (sc)->ifp->if_vlantrunk 58176261Sgallatin#endif 59176261Sgallatin 60176261Sgallatin#ifndef VLAN_TAG_VALUE 61176261Sgallatin#define MXGE_NEW_VLAN_API 62176261Sgallatin#endif 63176261Sgallatin 64176261Sgallatin#ifndef IFCAP_LRO 65176261Sgallatin#define IFCAP_LRO 0 66176261Sgallatin#endif 67176261Sgallatin 68176261Sgallatin#ifndef IFCAP_TSO 69176261Sgallatin#define IFCAP_TSO 0 70176261Sgallatin#endif 71176261Sgallatin 72176261Sgallatin#ifndef IFCAP_TSO4 73176261Sgallatin#define IFCAP_TSO4 0 74176261Sgallatin#endif 75176261Sgallatin 76247320Sgallatin#ifndef IFCAP_TSO6 77247320Sgallatin#define IFCAP_TSO6 0 78247320Sgallatin#endif 79247320Sgallatin 80247320Sgallatin#ifndef IFCAP_TXCSUM_IPV6 81247320Sgallatin#define IFCAP_TXCSUM_IPV6 0 82247320Sgallatin#endif 83247320Sgallatin 84247320Sgallatin#ifndef IFCAP_RXCSUM_IPV6 85247320Sgallatin#define IFCAP_RXCSUM_IPV6 0 86247320Sgallatin#endif 87247320Sgallatin 88176261Sgallatin#ifndef CSUM_TSO 89176261Sgallatin#define CSUM_TSO 0 90176261Sgallatin#endif 91176261Sgallatin 92247320Sgallatin#ifndef CSUM_TCP_IPV6 93247320Sgallatin#define CSUM_TCP_IPV6 0 94247320Sgallatin#endif 95176261Sgallatin 96247320Sgallatin#ifndef CSUM_UDP_IPV6 97247320Sgallatin#define CSUM_UDP_IPV6 0 98247320Sgallatin#endif 99247320Sgallatin 100247320Sgallatin#ifndef CSUM_DELAY_DATA_IPV6 101247320Sgallatin#define CSUM_DELAY_DATA_IPV6 0 102247320Sgallatin#endif 103247320Sgallatin 104155852Sgallatintypedef struct { 105155852Sgallatin void *addr; 106155852Sgallatin bus_addr_t bus_addr; 107155852Sgallatin bus_dma_tag_t dmat; 108155852Sgallatin bus_dmamap_t map; 109159571Sgallatin} mxge_dma_t; 110155852Sgallatin 111155852Sgallatin 112159612Sgallatintypedef struct { 113159612Sgallatin mcp_slot_t *entry; 114159612Sgallatin mxge_dma_t dma; 115159612Sgallatin int cnt; 116159612Sgallatin int idx; 117169871Sgallatin int mask; 118159612Sgallatin} mxge_rx_done_t; 119155852Sgallatin 120155852Sgallatintypedef struct 121155852Sgallatin{ 122155852Sgallatin uint32_t data0; 123155852Sgallatin uint32_t data1; 124155852Sgallatin uint32_t data2; 125159571Sgallatin} mxge_cmd_t; 126155852Sgallatin 127159612Sgallatinstruct mxge_rx_buffer_state { 128155852Sgallatin struct mbuf *m; 129155852Sgallatin bus_dmamap_t map; 130155852Sgallatin}; 131155852Sgallatin 132159612Sgallatinstruct mxge_tx_buffer_state { 133159612Sgallatin struct mbuf *m; 134159612Sgallatin bus_dmamap_t map; 135159612Sgallatin int flag; 136159612Sgallatin}; 137159612Sgallatin 138155852Sgallatintypedef struct 139155852Sgallatin{ 140155852Sgallatin volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */ 141155852Sgallatin mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */ 142159612Sgallatin struct mxge_rx_buffer_state *info; 143155852Sgallatin bus_dma_tag_t dmat; 144155852Sgallatin bus_dmamap_t extra_map; 145155852Sgallatin int cnt; 146169840Sgallatin int nbufs; 147169840Sgallatin int cl_size; 148155852Sgallatin int alloc_fail; 149155852Sgallatin int mask; /* number of rx slots -1 */ 150193250Sgallatin int mlen; 151175365Sgallatin} mxge_rx_ring_t; 152155852Sgallatin 153155852Sgallatintypedef struct 154155852Sgallatin{ 155175365Sgallatin struct mtx mtx; 156191567Sgallatin#ifdef IFNET_BUF_RING 157191562Sgallatin struct buf_ring *br; 158191562Sgallatin#endif 159155852Sgallatin volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */ 160191562Sgallatin volatile uint32_t *send_go; /* doorbell for sendq */ 161191562Sgallatin volatile uint32_t *send_stop; /* doorbell for sendq */ 162155852Sgallatin mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */ 163155852Sgallatin char *req_bytes; 164162322Sgallatin bus_dma_segment_t *seg_list; 165159612Sgallatin struct mxge_tx_buffer_state *info; 166155852Sgallatin bus_dma_tag_t dmat; 167155852Sgallatin int req; /* transmits submitted */ 168155852Sgallatin int mask; /* number of transmit slots -1 */ 169155852Sgallatin int done; /* transmits completed */ 170159612Sgallatin int pkt_done; /* packets completed */ 171169871Sgallatin int max_desc; /* max descriptors per xmit */ 172191562Sgallatin int queue_active; /* fw currently polling this queue*/ 173191562Sgallatin int activate; 174191562Sgallatin int deactivate; 175166345Sgallatin int stall; /* #times hw queue exhausted */ 176166345Sgallatin int wake; /* #times irq re-enabled xmit */ 177166373Sgallatin int watchdog_req; /* cache of req */ 178166373Sgallatin int watchdog_done; /* cache of done */ 179171917Sgallatin int watchdog_rx_pause; /* cache of pause rq recvd */ 180175365Sgallatin int defrag; 181175365Sgallatin char mtx_name[16]; 182175365Sgallatin} mxge_tx_ring_t; 183155852Sgallatin 184175365Sgallatinstruct mxge_softc; 185175365Sgallatintypedef struct mxge_softc mxge_softc_t; 186175365Sgallatin 187175365Sgallatinstruct mxge_slice_state { 188175365Sgallatin mxge_softc_t *sc; 189175365Sgallatin mxge_tx_ring_t tx; /* transmit ring */ 190175365Sgallatin mxge_rx_ring_t rx_small; 191175365Sgallatin mxge_rx_ring_t rx_big; 192159612Sgallatin mxge_rx_done_t rx_done; 193159612Sgallatin mcp_irq_data_t *fw_stats; 194175365Sgallatin volatile uint32_t *irq_claim; 195175365Sgallatin u_long ipackets; 196191562Sgallatin u_long opackets; 197194751Sgallatin u_long obytes; 198194751Sgallatin u_long omcasts; 199191562Sgallatin u_long oerrors; 200191562Sgallatin int if_drv_flags; 201247472Sgallatin struct lro_ctrl lc; 202175365Sgallatin mxge_dma_t fw_stats_dma; 203175365Sgallatin struct sysctl_oid *sysctl_tree; 204175365Sgallatin struct sysctl_ctx_list sysctl_ctx; 205175365Sgallatin char scratch[256]; 206175365Sgallatin}; 207175365Sgallatin 208175365Sgallatinstruct mxge_softc { 209175365Sgallatin struct ifnet* ifp; 210175365Sgallatin struct mxge_slice_state *ss; 211175365Sgallatin int tx_boundary; /* boundary transmits cannot cross*/ 212169840Sgallatin int lro_cnt; 213175365Sgallatin bus_dma_tag_t parent_dmat; 214175365Sgallatin volatile uint8_t *sram; 215155852Sgallatin int sram_size; 216159612Sgallatin volatile uint32_t *irq_deassert; 217155852Sgallatin mcp_cmd_response_t *cmd; 218159571Sgallatin mxge_dma_t cmd_dma; 219159571Sgallatin mxge_dma_t zeropad_dma; 220155852Sgallatin struct pci_dev *pdev; 221176281Sgallatin int legacy_irq; 222155852Sgallatin int link_state; 223155852Sgallatin unsigned int rdma_tags_available; 224155852Sgallatin int intr_coal_delay; 225159612Sgallatin volatile uint32_t *intr_coal_delay_ptr; 226155852Sgallatin int wc; 227166370Sgallatin struct mtx cmd_mtx; 228166370Sgallatin struct mtx driver_mtx; 229155852Sgallatin int wake_queue; 230155852Sgallatin int stop_queue; 231155852Sgallatin int down_cnt; 232155852Sgallatin int watchdog_resets; 233175365Sgallatin int watchdog_countdown; 234155852Sgallatin int pause; 235155852Sgallatin struct resource *mem_res; 236155852Sgallatin struct resource *irq_res; 237175365Sgallatin struct resource **msix_irq_res; 238175365Sgallatin struct resource *msix_table_res; 239175365Sgallatin struct resource *msix_pba_res; 240155852Sgallatin void *ih; 241175365Sgallatin void **msix_ih; 242155852Sgallatin char *fw_name; 243159571Sgallatin char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE]; 244155852Sgallatin char fw_version[128]; 245166875Sgallatin int fw_ver_major; 246166875Sgallatin int fw_ver_minor; 247166875Sgallatin int fw_ver_tiny; 248166875Sgallatin int adopted_rx_filter_bug; 249155852Sgallatin device_t dev; 250155852Sgallatin struct ifmedia media; 251159612Sgallatin int read_dma; 252159612Sgallatin int write_dma; 253159612Sgallatin int read_write_dma; 254162328Sgallatin int fw_multicast_support; 255164513Sgallatin int link_width; 256169840Sgallatin int max_mtu; 257197391Sgallatin int throttle; 258169871Sgallatin int tx_defrag; 259171917Sgallatin int media_flags; 260171917Sgallatin int need_media_probe; 261175365Sgallatin int num_slices; 262175365Sgallatin int rx_ring_size; 263194909Sgallatin int dying; 264206662Sgallatin int connector; 265206662Sgallatin int current_media; 266247320Sgallatin int max_tso6_hlen; 267166370Sgallatin mxge_dma_t dmabench_dma; 268166373Sgallatin struct callout co_hdl; 269198250Sgallatin struct taskqueue *tq; 270198250Sgallatin struct task watchdog_task; 271175365Sgallatin struct sysctl_oid *slice_sysctl_tree; 272175365Sgallatin struct sysctl_ctx_list slice_sysctl_ctx; 273159612Sgallatin char *mac_addr_string; 274169871Sgallatin uint8_t mac_addr[6]; /* eeprom mac address */ 275197645Sgallatin uint16_t pectl; /* save PCIe CTL state */ 276159612Sgallatin char product_code_string[64]; 277159612Sgallatin char serial_number_string[64]; 278166370Sgallatin char cmd_mtx_name[16]; 279166370Sgallatin char driver_mtx_name[16]; 280175365Sgallatin}; 281155852Sgallatin 282159571Sgallatin#define MXGE_PCI_VENDOR_MYRICOM 0x14c1 283159571Sgallatin#define MXGE_PCI_DEVICE_Z8E 0x0008 284172162Sgallatin#define MXGE_PCI_DEVICE_Z8E_9 0x0009 285188736Sgallatin#define MXGE_PCI_REV_Z8E 0 286188736Sgallatin#define MXGE_PCI_REV_Z8ES 1 287171917Sgallatin#define MXGE_XFP_COMPLIANCE_BYTE 131 288188736Sgallatin#define MXGE_SFP_COMPLIANCE_BYTE 3 289197391Sgallatin#define MXGE_MIN_THROTTLE 416 290197391Sgallatin#define MXGE_MAX_THROTTLE 4096 291155852Sgallatin 292206662Sgallatin/* Types of connectors on NICs supported by this driver */ 293206662Sgallatin#define MXGE_CX4 0 294206662Sgallatin#define MXGE_XFP 1 295206662Sgallatin#define MXGE_SFP 2 296206662Sgallatin#define MXGE_QRF 3 297206662Sgallatin 298159571Sgallatin#define MXGE_HIGHPART_TO_U32(X) \ 299155852Sgallatin(sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0) 300159571Sgallatin#define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X)) 301155852Sgallatin 302171917Sgallatinstruct mxge_media_type 303171917Sgallatin{ 304171917Sgallatin int flag; 305171917Sgallatin uint8_t bitmask; 306171917Sgallatin char *name; 307171917Sgallatin}; 308155852Sgallatin 309247320Sgallatinstruct mxge_pkt_info { 310247320Sgallatin int ip_off; 311247320Sgallatin int ip_hlen; 312247320Sgallatin struct ip *ip; 313247320Sgallatin struct ip6_hdr *ip6; 314247320Sgallatin struct tcphdr *tcp; 315247320Sgallatin}; 316247320Sgallatin 317247320Sgallatin 318155852Sgallatin/* implement our own memory barriers, since bus_space_barrier 319155852Sgallatin cannot handle write-combining regions */ 320155852Sgallatin 321185162Skmacy#if __FreeBSD_version < 800053 322185162Skmacy 323155852Sgallatin#if defined (__GNUC__) 324155852Sgallatin #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__ 325185255Sgallatin #define wmb() __asm__ __volatile__ ("sfence;": : :"memory") 326155852Sgallatin #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9 327185255Sgallatin #define wmb() __asm__ __volatile__ ("membar #MemIssue": : :"memory") 328155852Sgallatin #elif #cpu(sparc) || defined sparc || defined __sparc__ 329185255Sgallatin #define wmb() __asm__ __volatile__ ("stbar;": : :"memory") 330155852Sgallatin #else 331185255Sgallatin #define wmb() /* XXX just to make this compile */ 332155852Sgallatin #endif 333155852Sgallatin#else 334155852Sgallatin #error "unknown compiler" 335155852Sgallatin#endif 336155852Sgallatin 337185162Skmacy#endif 338185162Skmacy 339155852Sgallatinstatic inline void 340159571Sgallatinmxge_pio_copy(volatile void *to_v, void *from_v, size_t size) 341155852Sgallatin{ 342155852Sgallatin register volatile uintptr_t *to; 343155852Sgallatin volatile uintptr_t *from; 344155852Sgallatin size_t i; 345155852Sgallatin 346155852Sgallatin to = (volatile uintptr_t *) to_v; 347155852Sgallatin from = from_v; 348155852Sgallatin for (i = (size / sizeof (uintptr_t)); i; i--) { 349155852Sgallatin *to = *from; 350155852Sgallatin to++; 351155852Sgallatin from++; 352155852Sgallatin } 353155852Sgallatin 354155852Sgallatin} 355155852Sgallatin 356175365Sgallatinvoid mxge_lro_flush(struct mxge_slice_state *ss, struct lro_entry *lro); 357175365Sgallatinint mxge_lro_rx(struct mxge_slice_state *ss, struct mbuf *m_head, 358175365Sgallatin uint32_t csum); 359169840Sgallatin 360155852Sgallatin 361169840Sgallatin 362155852Sgallatin/* 363155852Sgallatin This file uses Myri10GE driver indentation. 364155852Sgallatin 365155852Sgallatin Local Variables: 366155852Sgallatin c-file-style:"linux" 367155852Sgallatin tab-width:8 368155852Sgallatin End: 369155852Sgallatin*/ 370