1207536Smav/*-
2207536Smav * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
3207536Smav * All rights reserved.
4207536Smav *
5207536Smav * Redistribution and use in source and binary forms, with or without
6207536Smav * modification, are permitted provided that the following conditions
7207536Smav * are met:
8207536Smav * 1. Redistributions of source code must retain the above copyright
9207536Smav *    notice, this list of conditions and the following disclaimer,
10207536Smav *    without modification, immediately at the beginning of the file.
11207536Smav * 2. Redistributions in binary form must reproduce the above copyright
12207536Smav *    notice, this list of conditions and the following disclaimer in the
13207536Smav *    documentation and/or other materials provided with the distribution.
14207536Smav *
15207536Smav * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16207536Smav * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17207536Smav * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18207536Smav * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19207536Smav * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20207536Smav * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21207536Smav * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22207536Smav * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23207536Smav * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24207536Smav * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25207536Smav */
26207536Smav
27207536Smav#include <sys/cdefs.h>
28207536Smav__FBSDID("$FreeBSD$");
29207536Smav
30207536Smav#include <sys/param.h>
31207536Smav#include <sys/module.h>
32207536Smav#include <sys/systm.h>
33207536Smav#include <sys/kernel.h>
34207536Smav#include <sys/bus.h>
35207536Smav#include <sys/endian.h>
36207536Smav#include <sys/malloc.h>
37207536Smav#include <sys/lock.h>
38207536Smav#include <sys/mutex.h>
39207536Smav#include <vm/uma.h>
40207536Smav#include <machine/stdarg.h>
41207536Smav#include <machine/resource.h>
42207536Smav#include <machine/bus.h>
43207536Smav#include <sys/rman.h>
44207536Smav#include <dev/pci/pcivar.h>
45207536Smav#include <dev/pci/pcireg.h>
46207536Smav#include "mvs.h"
47207536Smav
48207536Smav/* local prototypes */
49207536Smavstatic int mvs_setup_interrupt(device_t dev);
50207536Smavstatic void mvs_intr(void *data);
51207536Smavstatic int mvs_suspend(device_t dev);
52207536Smavstatic int mvs_resume(device_t dev);
53207536Smavstatic int mvs_ctlr_setup(device_t dev);
54207536Smav
55207536Smavstatic struct {
56207536Smav	uint32_t	id;
57207536Smav	uint8_t		rev;
58207536Smav	const char	*name;
59207536Smav	int		ports;
60207536Smav	int		quirks;
61207536Smav} mvs_ids[] = {
62207536Smav	{0x504011ab, 0x00, "Marvell 88SX5040",	4,	MVS_Q_GENI},
63207536Smav	{0x504111ab, 0x00, "Marvell 88SX5041",	4,	MVS_Q_GENI},
64207536Smav	{0x508011ab, 0x00, "Marvell 88SX5080",	8,	MVS_Q_GENI},
65207536Smav	{0x508111ab, 0x00, "Marvell 88SX5081",	8,	MVS_Q_GENI},
66207536Smav	{0x604011ab, 0x00, "Marvell 88SX6040",	4,	MVS_Q_GENII},
67207536Smav	{0x604111ab, 0x00, "Marvell 88SX6041",	4,	MVS_Q_GENII},
68207536Smav	{0x604211ab, 0x00, "Marvell 88SX6042",	4,	MVS_Q_GENIIE},
69207536Smav	{0x608011ab, 0x00, "Marvell 88SX6080",	8,	MVS_Q_GENII},
70207536Smav	{0x608111ab, 0x00, "Marvell 88SX6081",	8,	MVS_Q_GENII},
71207536Smav	{0x704211ab, 0x00, "Marvell 88SX7042",	4,	MVS_Q_GENIIE|MVS_Q_CT},
72207536Smav	{0x02419005, 0x00, "Adaptec 1420SA",	4,	MVS_Q_GENII},
73207536Smav	{0x02439005, 0x00, "Adaptec 1430SA",	4,	MVS_Q_GENIIE|MVS_Q_CT},
74207536Smav	{0x00000000, 0x00, NULL,	0,	0}
75207536Smav};
76207536Smav
77207536Smavstatic int
78207536Smavmvs_probe(device_t dev)
79207536Smav{
80207536Smav	char buf[64];
81207536Smav	int i;
82207536Smav	uint32_t devid = pci_get_devid(dev);
83207536Smav	uint8_t revid = pci_get_revid(dev);
84207536Smav
85207536Smav	for (i = 0; mvs_ids[i].id != 0; i++) {
86207536Smav		if (mvs_ids[i].id == devid &&
87207536Smav		    mvs_ids[i].rev <= revid) {
88207536Smav			snprintf(buf, sizeof(buf), "%s SATA controller",
89207536Smav			    mvs_ids[i].name);
90207536Smav			device_set_desc_copy(dev, buf);
91207536Smav			return (BUS_PROBE_VENDOR);
92207536Smav		}
93207536Smav	}
94207536Smav	return (ENXIO);
95207536Smav}
96207536Smav
97207536Smavstatic int
98207536Smavmvs_attach(device_t dev)
99207536Smav{
100207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
101207536Smav	device_t child;
102207536Smav	int	error, unit, i;
103207536Smav	uint32_t devid = pci_get_devid(dev);
104207536Smav	uint8_t revid = pci_get_revid(dev);
105207536Smav
106207536Smav	ctlr->dev = dev;
107207536Smav	i = 0;
108207536Smav	while (mvs_ids[i].id != 0 &&
109207536Smav	    (mvs_ids[i].id != devid ||
110207536Smav	     mvs_ids[i].rev > revid))
111207536Smav		i++;
112207536Smav	ctlr->channels = mvs_ids[i].ports;
113207536Smav	ctlr->quirks = mvs_ids[i].quirks;
114207536Smav	resource_int_value(device_get_name(dev),
115207536Smav	    device_get_unit(dev), "ccc", &ctlr->ccc);
116207536Smav	ctlr->cccc = 8;
117207536Smav	resource_int_value(device_get_name(dev),
118207536Smav	    device_get_unit(dev), "cccc", &ctlr->cccc);
119207536Smav	if (ctlr->ccc == 0 || ctlr->cccc == 0) {
120207536Smav		ctlr->ccc = 0;
121207536Smav		ctlr->cccc = 0;
122207536Smav	}
123207536Smav	if (ctlr->ccc > 100000)
124207536Smav		ctlr->ccc = 100000;
125207536Smav	device_printf(dev,
126207536Smav	    "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n",
127207536Smav	    ((ctlr->quirks & MVS_Q_GENI) ? "I" :
128207536Smav	     ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")),
129207536Smav	    ctlr->channels,
130207536Smav	    ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"),
131207536Smav	    ((ctlr->quirks & MVS_Q_GENI) ?
132207536Smav	    "not supported" : "supported"),
133207536Smav	    ((ctlr->quirks & MVS_Q_GENIIE) ?
134207536Smav	    " with FBS" : ""));
135207536Smav	mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF);
136207536Smav	/* We should have a memory BAR(0). */
137207536Smav	ctlr->r_rid = PCIR_BAR(0);
138207536Smav	if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
139207536Smav	    &ctlr->r_rid, RF_ACTIVE)))
140207536Smav		return ENXIO;
141207536Smav	/* Setup our own memory management for channels. */
142208414Smav	ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem);
143208414Smav	ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem);
144207536Smav	ctlr->sc_iomem.rm_type = RMAN_ARRAY;
145207536Smav	ctlr->sc_iomem.rm_descr = "I/O memory addresses";
146207536Smav	if ((error = rman_init(&ctlr->sc_iomem)) != 0) {
147207536Smav		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
148207536Smav		return (error);
149207536Smav	}
150207536Smav	if ((error = rman_manage_region(&ctlr->sc_iomem,
151207536Smav	    rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) {
152207536Smav		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
153207536Smav		rman_fini(&ctlr->sc_iomem);
154207536Smav		return (error);
155207536Smav	}
156207536Smav	pci_enable_busmaster(dev);
157207536Smav	mvs_ctlr_setup(dev);
158207536Smav	/* Setup interrupts. */
159207536Smav	if (mvs_setup_interrupt(dev)) {
160207536Smav		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
161207536Smav		rman_fini(&ctlr->sc_iomem);
162207536Smav		return ENXIO;
163207536Smav	}
164207536Smav	/* Attach all channels on this controller */
165207536Smav	for (unit = 0; unit < ctlr->channels; unit++) {
166207536Smav		child = device_add_child(dev, "mvsch", -1);
167207536Smav		if (child == NULL)
168207536Smav			device_printf(dev, "failed to add channel device\n");
169207536Smav		else
170207536Smav			device_set_ivars(child, (void *)(intptr_t)unit);
171207536Smav	}
172207536Smav	bus_generic_attach(dev);
173207536Smav	return 0;
174207536Smav}
175207536Smav
176207536Smavstatic int
177207536Smavmvs_detach(device_t dev)
178207536Smav{
179207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
180207536Smav
181207536Smav	/* Detach & delete all children */
182229118Shselasky	device_delete_children(dev);
183229118Shselasky
184207536Smav	/* Free interrupt. */
185207536Smav	if (ctlr->irq.r_irq) {
186207536Smav		bus_teardown_intr(dev, ctlr->irq.r_irq,
187207536Smav		    ctlr->irq.handle);
188207536Smav		bus_release_resource(dev, SYS_RES_IRQ,
189207536Smav		    ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
190207536Smav	}
191207536Smav	pci_release_msi(dev);
192207536Smav	/* Free memory. */
193207536Smav	rman_fini(&ctlr->sc_iomem);
194207536Smav	if (ctlr->r_mem)
195207536Smav		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
196207536Smav	mtx_destroy(&ctlr->mtx);
197207536Smav	return (0);
198207536Smav}
199207536Smav
200207536Smavstatic int
201207536Smavmvs_ctlr_setup(device_t dev)
202207536Smav{
203207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
204207536Smav	int i, ccc = ctlr->ccc, cccc = ctlr->cccc, ccim = 0;
205207536Smav
206207536Smav	/* Mask chip interrupts */
207207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_MIM, 0x00000000);
208207536Smav	/* Mask PCI interrupts */
209207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_PCIIM, 0x00000000);
210207536Smav	/* Clear PCI interrupts */
211207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_PCIIC, 0x00000000);
212207536Smav	if (ccc && bootverbose) {
213207536Smav		device_printf(dev,
214207536Smav		    "CCC with %dus/%dcmd enabled\n",
215207536Smav		    ctlr->ccc, ctlr->cccc);
216207536Smav	}
217207536Smav	ccc *= 150;
218207536Smav	/* Configure chip-global CCC */
219207536Smav	if (ctlr->channels > 4 && (ctlr->quirks & MVS_Q_GENI) == 0) {
220207536Smav		ATA_OUTL(ctlr->r_mem, CHIP_ICT, cccc);
221207536Smav		ATA_OUTL(ctlr->r_mem, CHIP_ITT, ccc);
222207536Smav		ATA_OUTL(ctlr->r_mem, CHIP_ICC, ~CHIP_ICC_ALL_PORTS);
223207536Smav		if (ccc)
224207536Smav			ccim |= IC_ALL_PORTS_COAL_DONE;
225207536Smav		ccc = 0;
226207536Smav		cccc = 0;
227207536Smav	}
228207536Smav	for (i = 0; i < ctlr->channels / 4; i++) {
229207536Smav		/* Configure per-HC CCC */
230207536Smav		ATA_OUTL(ctlr->r_mem, HC_BASE(i) + HC_ICT, cccc);
231207536Smav		ATA_OUTL(ctlr->r_mem, HC_BASE(i) + HC_ITT, ccc);
232207536Smav		if (ccc)
233207536Smav			ccim |= (IC_HC0_COAL_DONE << (i * IC_HC_SHIFT));
234207536Smav		/* Clear HC interrupts */
235207536Smav		ATA_OUTL(ctlr->r_mem, HC_BASE(i) + HC_IC, 0x00000000);
236207536Smav	}
237207536Smav	/* Enable chip interrupts */
238207536Smav	ctlr->gmim = (ccim ? ccim : (IC_DONE_HC0 | IC_DONE_HC1)) |
239207536Smav	     IC_ERR_HC0 | IC_ERR_HC1;
240207536Smav	ctlr->mim = ctlr->gmim | ctlr->pmim;
241207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_MIM, ctlr->mim);
242207536Smav	/* Enable PCI interrupts */
243207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_PCIIM, 0x007fffff);
244207536Smav	return (0);
245207536Smav}
246207536Smav
247207536Smavstatic void
248207536Smavmvs_edma(device_t dev, device_t child, int mode)
249207536Smav{
250207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
251207536Smav	int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
252207536Smav	int bit = IC_DONE_IRQ << (unit * 2 + unit / 4) ;
253207536Smav
254207536Smav	if (ctlr->ccc == 0)
255207536Smav		return;
256207536Smav	/* CCC is not working for non-EDMA mode. Unmask device interrupts. */
257207536Smav	mtx_lock(&ctlr->mtx);
258207536Smav	if (mode == MVS_EDMA_OFF)
259207536Smav		ctlr->pmim |= bit;
260207536Smav	else
261207536Smav		ctlr->pmim &= ~bit;
262207536Smav	ctlr->mim = ctlr->gmim | ctlr->pmim;
263207536Smav	if (!ctlr->msia)
264207536Smav		ATA_OUTL(ctlr->r_mem, CHIP_MIM, ctlr->mim);
265207536Smav	mtx_unlock(&ctlr->mtx);
266207536Smav}
267207536Smav
268207536Smavstatic int
269207536Smavmvs_suspend(device_t dev)
270207536Smav{
271207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
272207536Smav
273207536Smav	bus_generic_suspend(dev);
274207536Smav	/* Mask chip interrupts */
275207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_MIM, 0x00000000);
276207536Smav	/* Mask PCI interrupts */
277207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_PCIIM, 0x00000000);
278207536Smav	return 0;
279207536Smav}
280207536Smav
281207536Smavstatic int
282207536Smavmvs_resume(device_t dev)
283207536Smav{
284207536Smav
285207536Smav	mvs_ctlr_setup(dev);
286207536Smav	return (bus_generic_resume(dev));
287207536Smav}
288207536Smav
289207536Smavstatic int
290207536Smavmvs_setup_interrupt(device_t dev)
291207536Smav{
292207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
293207536Smav	int msi = 0;
294207536Smav
295207536Smav	/* Process hints. */
296207536Smav	resource_int_value(device_get_name(dev),
297207536Smav	    device_get_unit(dev), "msi", &msi);
298207536Smav	if (msi < 0)
299207536Smav		msi = 0;
300207536Smav	else if (msi > 0)
301207536Smav		msi = min(1, pci_msi_count(dev));
302207536Smav	/* Allocate MSI if needed/present. */
303207536Smav	if (msi && pci_alloc_msi(dev, &msi) != 0)
304207536Smav		msi = 0;
305207536Smav	ctlr->msi = msi;
306207536Smav	/* Allocate all IRQs. */
307207536Smav	ctlr->irq.r_irq_rid = msi ? 1 : 0;
308207536Smav	if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
309207536Smav	    &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) {
310207536Smav		device_printf(dev, "unable to map interrupt\n");
311207536Smav		return (ENXIO);
312207536Smav	}
313207536Smav	if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL,
314207536Smav	    mvs_intr, ctlr, &ctlr->irq.handle))) {
315207536Smav		device_printf(dev, "unable to setup interrupt\n");
316207536Smav		bus_release_resource(dev, SYS_RES_IRQ,
317207536Smav		    ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
318207536Smav		ctlr->irq.r_irq = 0;
319207536Smav		return (ENXIO);
320207536Smav	}
321207536Smav	return (0);
322207536Smav}
323207536Smav
324207536Smav/*
325207536Smav * Common case interrupt handler.
326207536Smav */
327207536Smavstatic void
328207536Smavmvs_intr(void *data)
329207536Smav{
330207536Smav	struct mvs_controller *ctlr = data;
331207536Smav	struct mvs_intr_arg arg;
332207536Smav	void (*function)(void *);
333207536Smav	int p;
334207536Smav	u_int32_t ic, aic;
335207536Smav
336207536Smav	ic = ATA_INL(ctlr->r_mem, CHIP_MIC);
337207536Smav	if (ctlr->msi) {
338207536Smav		/* We have to to mask MSI during processing. */
339207536Smav		mtx_lock(&ctlr->mtx);
340207536Smav		ATA_OUTL(ctlr->r_mem, CHIP_MIM, 0);
341207536Smav		ctlr->msia = 1; /* Deny MIM update during processing. */
342207536Smav		mtx_unlock(&ctlr->mtx);
343207536Smav	} else if (ic == 0)
344207536Smav		return;
345207536Smav	/* Acknowledge all-ports CCC interrupt. */
346207536Smav	if (ic & IC_ALL_PORTS_COAL_DONE)
347207536Smav		ATA_OUTL(ctlr->r_mem, CHIP_ICC, ~CHIP_ICC_ALL_PORTS);
348207536Smav	for (p = 0; p < ctlr->channels; p++) {
349207536Smav		if ((p & 3) == 0) {
350207536Smav			if (p != 0)
351207536Smav				ic >>= 1;
352207536Smav			if ((ic & IC_HC0) == 0) {
353207536Smav				p += 3;
354207536Smav				ic >>= 8;
355207536Smav				continue;
356207536Smav			}
357207536Smav			/* Acknowledge interrupts of this HC. */
358207536Smav			aic = 0;
359207536Smav			if (ic & (IC_DONE_IRQ << 0))
360207536Smav				aic |= HC_IC_DONE(0) | HC_IC_DEV(0);
361207536Smav			if (ic & (IC_DONE_IRQ << 2))
362207536Smav				aic |= HC_IC_DONE(1) | HC_IC_DEV(1);
363207536Smav			if (ic & (IC_DONE_IRQ << 4))
364207536Smav				aic |= HC_IC_DONE(2) | HC_IC_DEV(2);
365207536Smav			if (ic & (IC_DONE_IRQ << 6))
366207536Smav				aic |= HC_IC_DONE(3) | HC_IC_DEV(3);
367207536Smav			if (ic & IC_HC0_COAL_DONE)
368207536Smav				aic |= HC_IC_COAL;
369207536Smav			ATA_OUTL(ctlr->r_mem, HC_BASE(p == 4) + HC_IC, ~aic);
370207536Smav		}
371207536Smav		/* Call per-port interrupt handler. */
372207536Smav		arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ);
373207536Smav		if ((arg.cause != 0) &&
374207536Smav		    (function = ctlr->interrupt[p].function)) {
375207536Smav			arg.arg = ctlr->interrupt[p].argument;
376207536Smav			function(&arg);
377207536Smav		}
378207536Smav		ic >>= 2;
379207536Smav	}
380207536Smav	if (ctlr->msi) {
381207536Smav		/* Unmasking MSI triggers next interrupt, if needed. */
382207536Smav		mtx_lock(&ctlr->mtx);
383207536Smav		ctlr->msia = 0;	/* Allow MIM update. */
384207536Smav		ATA_OUTL(ctlr->r_mem, CHIP_MIM, ctlr->mim);
385207536Smav		mtx_unlock(&ctlr->mtx);
386207536Smav	}
387207536Smav}
388207536Smav
389207536Smavstatic struct resource *
390207536Smavmvs_alloc_resource(device_t dev, device_t child, int type, int *rid,
391207536Smav		       u_long start, u_long end, u_long count, u_int flags)
392207536Smav{
393207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
394207536Smav	int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
395207536Smav	struct resource *res = NULL;
396207536Smav	int offset = HC_BASE(unit >> 2) + PORT_BASE(unit & 0x03);
397207536Smav	long st;
398207536Smav
399207536Smav	switch (type) {
400207536Smav	case SYS_RES_MEMORY:
401207536Smav		st = rman_get_start(ctlr->r_mem);
402207536Smav		res = rman_reserve_resource(&ctlr->sc_iomem, st + offset,
403207536Smav		    st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child);
404207536Smav		if (res) {
405207536Smav			bus_space_handle_t bsh;
406207536Smav			bus_space_tag_t bst;
407207536Smav			bsh = rman_get_bushandle(ctlr->r_mem);
408207536Smav			bst = rman_get_bustag(ctlr->r_mem);
409207536Smav			bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh);
410207536Smav			rman_set_bushandle(res, bsh);
411207536Smav			rman_set_bustag(res, bst);
412207536Smav		}
413207536Smav		break;
414207536Smav	case SYS_RES_IRQ:
415207536Smav		if (*rid == ATA_IRQ_RID)
416207536Smav			res = ctlr->irq.r_irq;
417207536Smav		break;
418207536Smav	}
419207536Smav	return (res);
420207536Smav}
421207536Smav
422207536Smavstatic int
423207536Smavmvs_release_resource(device_t dev, device_t child, int type, int rid,
424207536Smav			 struct resource *r)
425207536Smav{
426207536Smav
427207536Smav	switch (type) {
428207536Smav	case SYS_RES_MEMORY:
429207536Smav		rman_release_resource(r);
430207536Smav		return (0);
431207536Smav	case SYS_RES_IRQ:
432207536Smav		if (rid != ATA_IRQ_RID)
433207536Smav			return ENOENT;
434207536Smav		return (0);
435207536Smav	}
436207536Smav	return (EINVAL);
437207536Smav}
438207536Smav
439207536Smavstatic int
440207536Smavmvs_setup_intr(device_t dev, device_t child, struct resource *irq,
441207536Smav		   int flags, driver_filter_t *filter, driver_intr_t *function,
442207536Smav		   void *argument, void **cookiep)
443207536Smav{
444207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
445207536Smav	int unit = (intptr_t)device_get_ivars(child);
446207536Smav
447207536Smav	if (filter != NULL) {
448207536Smav		printf("mvs.c: we cannot use a filter here\n");
449207536Smav		return (EINVAL);
450207536Smav	}
451207536Smav	ctlr->interrupt[unit].function = function;
452207536Smav	ctlr->interrupt[unit].argument = argument;
453207536Smav	return (0);
454207536Smav}
455207536Smav
456207536Smavstatic int
457207536Smavmvs_teardown_intr(device_t dev, device_t child, struct resource *irq,
458207536Smav		      void *cookie)
459207536Smav{
460207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
461207536Smav	int unit = (intptr_t)device_get_ivars(child);
462207536Smav
463207536Smav	ctlr->interrupt[unit].function = NULL;
464207536Smav	ctlr->interrupt[unit].argument = NULL;
465207536Smav	return (0);
466207536Smav}
467207536Smav
468207536Smavstatic int
469207536Smavmvs_print_child(device_t dev, device_t child)
470207536Smav{
471207536Smav	int retval;
472207536Smav
473207536Smav	retval = bus_print_child_header(dev, child);
474207536Smav	retval += printf(" at channel %d",
475207536Smav	    (int)(intptr_t)device_get_ivars(child));
476207536Smav	retval += bus_print_child_footer(dev, child);
477207536Smav
478207536Smav	return (retval);
479207536Smav}
480207536Smav
481208410Smavstatic int
482208410Smavmvs_child_location_str(device_t dev, device_t child, char *buf,
483208410Smav    size_t buflen)
484208410Smav{
485208410Smav
486208410Smav	snprintf(buf, buflen, "channel=%d",
487208410Smav	    (int)(intptr_t)device_get_ivars(child));
488208410Smav	return (0);
489208410Smav}
490208410Smav
491258213Smavstatic bus_dma_tag_t
492258213Smavmvs_get_dma_tag(device_t bus, device_t child)
493258213Smav{
494258213Smav
495258213Smav	return (bus_get_dma_tag(bus));
496258213Smav}
497258213Smav
498207536Smavstatic device_method_t mvs_methods[] = {
499207536Smav	DEVMETHOD(device_probe,     mvs_probe),
500207536Smav	DEVMETHOD(device_attach,    mvs_attach),
501207536Smav	DEVMETHOD(device_detach,    mvs_detach),
502207536Smav	DEVMETHOD(device_suspend,   mvs_suspend),
503207536Smav	DEVMETHOD(device_resume,    mvs_resume),
504207536Smav	DEVMETHOD(bus_print_child,  mvs_print_child),
505207536Smav	DEVMETHOD(bus_alloc_resource,       mvs_alloc_resource),
506207536Smav	DEVMETHOD(bus_release_resource,     mvs_release_resource),
507207536Smav	DEVMETHOD(bus_setup_intr,   mvs_setup_intr),
508207536Smav	DEVMETHOD(bus_teardown_intr,mvs_teardown_intr),
509208410Smav	DEVMETHOD(bus_child_location_str, mvs_child_location_str),
510258213Smav	DEVMETHOD(bus_get_dma_tag,  mvs_get_dma_tag),
511207536Smav	DEVMETHOD(mvs_edma,         mvs_edma),
512207536Smav	{ 0, 0 }
513207536Smav};
514207536Smavstatic driver_t mvs_driver = {
515207536Smav        "mvs",
516207536Smav        mvs_methods,
517207536Smav        sizeof(struct mvs_controller)
518207536Smav};
519207536SmavDRIVER_MODULE(mvs, pci, mvs_driver, mvs_devclass, 0, 0);
520207536SmavMODULE_VERSION(mvs, 1);
521207536SmavMODULE_DEPEND(mvs, cam, 1, 1, 1);
522207536Smav
523