mpt.c revision 227230
1168561Sthompsa/*- 2168561Sthompsa * Generic routines for LSI Fusion adapters. 3168561Sthompsa * FreeBSD Version. 4168561Sthompsa * 5168561Sthompsa * Copyright (c) 2000, 2001 by Greg Ansley 6168561Sthompsa * 7168561Sthompsa * Redistribution and use in source and binary forms, with or without 8168561Sthompsa * modification, are permitted provided that the following conditions 9168561Sthompsa * are met: 10168561Sthompsa * 1. Redistributions of source code must retain the above copyright 11168561Sthompsa * notice immediately at the beginning of the file, without modification, 12168561Sthompsa * this list of conditions, and the following disclaimer. 13168561Sthompsa * 2. The name of the author may not be used to endorse or promote products 14168561Sthompsa * derived from this software without specific prior written permission. 15168561Sthompsa * 16168561Sthompsa * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17168561Sthompsa * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18168561Sthompsa * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19168561Sthompsa * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20168561Sthompsa * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21168561Sthompsa * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22168561Sthompsa * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23168561Sthompsa * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24168561Sthompsa * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25168561Sthompsa * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26168561Sthompsa * SUCH DAMAGE. 27168561Sthompsa */ 28168561Sthompsa/*- 29168561Sthompsa * Copyright (c) 2002, 2006 by Matthew Jacob 30168561Sthompsa * All rights reserved. 31168561Sthompsa * 32168561Sthompsa * Redistribution and use in source and binary forms, with or without 33168561Sthompsa * modification, are permitted provided that the following conditions are 34168561Sthompsa * met: 35168561Sthompsa * 1. Redistributions of source code must retain the above copyright 36168561Sthompsa * notice, this list of conditions and the following disclaimer. 37168561Sthompsa * 2. Redistributions in binary form must reproduce at minimum a disclaimer 38168561Sthompsa * substantially similar to the "NO WARRANTY" disclaimer below 39168561Sthompsa * ("Disclaimer") and any redistribution must be conditioned upon including 40168561Sthompsa * a substantially similar Disclaimer requirement for further binary 41169569Sthompsa * redistribution. 42169569Sthompsa * 3. Neither the names of the above listed copyright holders nor the names 43169569Sthompsa * of any contributors may be used to endorse or promote products derived 44168561Sthompsa * from this software without specific prior written permission. 45168561Sthompsa * 46168561Sthompsa * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 47168561Sthompsa * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 48168561Sthompsa * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 49168561Sthompsa * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 50168561Sthompsa * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51168793Sthompsa * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52168561Sthompsa * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53168561Sthompsa * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54168561Sthompsa * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55168561Sthompsa * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 56168561Sthompsa * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57168561Sthompsa * 58168561Sthompsa * Support from Chris Ellsworth in order to make SAS adapters work 59168561Sthompsa * is gratefully acknowledged. 60168561Sthompsa * 61168561Sthompsa * 62168561Sthompsa * Support from LSI-Logic has also gone a great deal toward making this a 63168561Sthompsa * workable subsystem and is gratefully acknowledged. 64168561Sthompsa */ 65168561Sthompsa/*- 66168561Sthompsa * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 67168561Sthompsa * Copyright (c) 2005, WHEEL Sp. z o.o. 68168561Sthompsa * Copyright (c) 2004, 2005 Justin T. Gibbs 69168561Sthompsa * All rights reserved. 70168561Sthompsa * 71168561Sthompsa * Redistribution and use in source and binary forms, with or without 72168561Sthompsa * modification, are permitted provided that the following conditions are 73168561Sthompsa * met: 74168561Sthompsa * 1. Redistributions of source code must retain the above copyright 75168561Sthompsa * notice, this list of conditions and the following disclaimer. 76168561Sthompsa * 2. Redistributions in binary form must reproduce at minimum a disclaimer 77168561Sthompsa * substantially similar to the "NO WARRANTY" disclaimer below 78169739Sthompsa * ("Disclaimer") and any redistribution must be conditioned upon including 79169739Sthompsa * a substantially similar Disclaimer requirement for further binary 80168561Sthompsa * redistribution. 81168561Sthompsa * 3. Neither the names of the above listed copyright holders nor the names 82168561Sthompsa * of any contributors may be used to endorse or promote products derived 83168561Sthompsa * from this software without specific prior written permission. 84169739Sthompsa * 85169739Sthompsa * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 86168561Sthompsa * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87168561Sthompsa * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88168561Sthompsa * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 89168561Sthompsa * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 90169739Sthompsa * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 91169739Sthompsa * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 92168561Sthompsa * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 93168561Sthompsa * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 94168561Sthompsa * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 95168561Sthompsa * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 96168561Sthompsa */ 97168561Sthompsa 98168561Sthompsa#include <sys/cdefs.h> 99168561Sthompsa__FBSDID("$FreeBSD: stable/9/sys/dev/mpt/mpt.c 227230 2011-11-06 17:25:22Z marius $"); 100168561Sthompsa 101168561Sthompsa#include <dev/mpt/mpt.h> 102168561Sthompsa#include <dev/mpt/mpt_cam.h> /* XXX For static handler registration */ 103168561Sthompsa#include <dev/mpt/mpt_raid.h> /* XXX For static handler registration */ 104168561Sthompsa 105168561Sthompsa#include <dev/mpt/mpilib/mpi.h> 106168561Sthompsa#include <dev/mpt/mpilib/mpi_ioc.h> 107168561Sthompsa#include <dev/mpt/mpilib/mpi_fc.h> 108168561Sthompsa#include <dev/mpt/mpilib/mpi_targ.h> 109168561Sthompsa 110168561Sthompsa#include <sys/sysctl.h> 111168561Sthompsa 112168561Sthompsa#define MPT_MAX_TRYS 3 113168561Sthompsa#define MPT_MAX_WAIT 300000 114168561Sthompsa 115168561Sthompsastatic int maxwait_ack = 0; 116168561Sthompsastatic int maxwait_int = 0; 117168561Sthompsastatic int maxwait_state = 0; 118168561Sthompsa 119168561Sthompsastatic TAILQ_HEAD(, mpt_softc) mpt_tailq = TAILQ_HEAD_INITIALIZER(mpt_tailq); 120168561Sthompsampt_reply_handler_t *mpt_reply_handlers[MPT_NUM_REPLY_HANDLERS]; 121169569Sthompsa 122169569Sthompsastatic mpt_reply_handler_t mpt_default_reply_handler; 123169569Sthompsastatic mpt_reply_handler_t mpt_config_reply_handler; 124168561Sthompsastatic mpt_reply_handler_t mpt_handshake_reply_handler; 125168561Sthompsastatic mpt_reply_handler_t mpt_event_reply_handler; 126168561Sthompsastatic void mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 127168561Sthompsa MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context); 128168561Sthompsastatic int mpt_send_event_request(struct mpt_softc *mpt, int onoff); 129168561Sthompsastatic int mpt_soft_reset(struct mpt_softc *mpt); 130168561Sthompsastatic void mpt_hard_reset(struct mpt_softc *mpt); 131168561Sthompsastatic int mpt_dma_buf_alloc(struct mpt_softc *mpt); 132168561Sthompsastatic void mpt_dma_buf_free(struct mpt_softc *mpt); 133168561Sthompsastatic int mpt_configure_ioc(struct mpt_softc *mpt, int, int); 134168561Sthompsastatic int mpt_enable_ioc(struct mpt_softc *mpt, int); 135168561Sthompsa 136168561Sthompsa/************************* Personality Module Support *************************/ 137168561Sthompsa/* 138168561Sthompsa * We include one extra entry that is guaranteed to be NULL 139168561Sthompsa * to simplify our itterator. 140168561Sthompsa */ 141168561Sthompsastatic struct mpt_personality *mpt_personalities[MPT_MAX_PERSONALITIES + 1]; 142168561Sthompsastatic __inline struct mpt_personality* 143168561Sthompsa mpt_pers_find(struct mpt_softc *, u_int); 144168561Sthompsastatic __inline struct mpt_personality* 145168561Sthompsa mpt_pers_find_reverse(struct mpt_softc *, u_int); 146168561Sthompsa 147168561Sthompsastatic __inline struct mpt_personality * 148168561Sthompsampt_pers_find(struct mpt_softc *mpt, u_int start_at) 149168561Sthompsa{ 150168561Sthompsa KASSERT(start_at <= MPT_MAX_PERSONALITIES, 151168561Sthompsa ("mpt_pers_find: starting position out of range\n")); 152168561Sthompsa 153168561Sthompsa while (start_at < MPT_MAX_PERSONALITIES 154168561Sthompsa && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 155168561Sthompsa start_at++; 156168561Sthompsa } 157168561Sthompsa return (mpt_personalities[start_at]); 158168561Sthompsa} 159168561Sthompsa 160168561Sthompsa/* 161168561Sthompsa * Used infrequently, so no need to optimize like a forward 162168561Sthompsa * traversal where we use the MAX+1 is guaranteed to be NULL 163168561Sthompsa * trick. 164168561Sthompsa */ 165168561Sthompsastatic __inline struct mpt_personality * 166168561Sthompsampt_pers_find_reverse(struct mpt_softc *mpt, u_int start_at) 167168561Sthompsa{ 168168561Sthompsa while (start_at < MPT_MAX_PERSONALITIES 169169739Sthompsa && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 170168561Sthompsa start_at--; 171168561Sthompsa } 172168561Sthompsa if (start_at < MPT_MAX_PERSONALITIES) 173168561Sthompsa return (mpt_personalities[start_at]); 174168561Sthompsa return (NULL); 175168561Sthompsa} 176168561Sthompsa 177168561Sthompsa#define MPT_PERS_FOREACH(mpt, pers) \ 178168561Sthompsa for (pers = mpt_pers_find(mpt, /*start_at*/0); \ 179168561Sthompsa pers != NULL; \ 180168561Sthompsa pers = mpt_pers_find(mpt, /*start_at*/pers->id+1)) 181168561Sthompsa 182168561Sthompsa#define MPT_PERS_FOREACH_REVERSE(mpt, pers) \ 183168561Sthompsa for (pers = mpt_pers_find_reverse(mpt, MPT_MAX_PERSONALITIES-1);\ 184168561Sthompsa pers != NULL; \ 185168561Sthompsa pers = mpt_pers_find_reverse(mpt, /*start_at*/pers->id-1)) 186168561Sthompsa 187168561Sthompsastatic mpt_load_handler_t mpt_stdload; 188168561Sthompsastatic mpt_probe_handler_t mpt_stdprobe; 189168561Sthompsastatic mpt_attach_handler_t mpt_stdattach; 190168561Sthompsastatic mpt_enable_handler_t mpt_stdenable; 191168561Sthompsastatic mpt_ready_handler_t mpt_stdready; 192168561Sthompsastatic mpt_event_handler_t mpt_stdevent; 193168561Sthompsastatic mpt_reset_handler_t mpt_stdreset; 194168561Sthompsastatic mpt_shutdown_handler_t mpt_stdshutdown; 195168561Sthompsastatic mpt_detach_handler_t mpt_stddetach; 196168561Sthompsastatic mpt_unload_handler_t mpt_stdunload; 197168561Sthompsastatic struct mpt_personality mpt_default_personality = 198168561Sthompsa{ 199168561Sthompsa .load = mpt_stdload, 200168561Sthompsa .probe = mpt_stdprobe, 201168561Sthompsa .attach = mpt_stdattach, 202168561Sthompsa .enable = mpt_stdenable, 203168561Sthompsa .ready = mpt_stdready, 204168561Sthompsa .event = mpt_stdevent, 205168561Sthompsa .reset = mpt_stdreset, 206168561Sthompsa .shutdown = mpt_stdshutdown, 207168561Sthompsa .detach = mpt_stddetach, 208168561Sthompsa .unload = mpt_stdunload 209168561Sthompsa}; 210168561Sthompsa 211168561Sthompsastatic mpt_load_handler_t mpt_core_load; 212168561Sthompsastatic mpt_attach_handler_t mpt_core_attach; 213168561Sthompsastatic mpt_enable_handler_t mpt_core_enable; 214168561Sthompsastatic mpt_reset_handler_t mpt_core_ioc_reset; 215168561Sthompsastatic mpt_event_handler_t mpt_core_event; 216169569Sthompsastatic mpt_shutdown_handler_t mpt_core_shutdown; 217169569Sthompsastatic mpt_shutdown_handler_t mpt_core_detach; 218169569Sthompsastatic mpt_unload_handler_t mpt_core_unload; 219170599Sthompsastatic struct mpt_personality mpt_core_personality = 220170599Sthompsa{ 221169569Sthompsa .name = "mpt_core", 222169569Sthompsa .load = mpt_core_load, 223169569Sthompsa// .attach = mpt_core_attach, 224169569Sthompsa// .enable = mpt_core_enable, 225169569Sthompsa .event = mpt_core_event, 226169569Sthompsa .reset = mpt_core_ioc_reset, 227169569Sthompsa .shutdown = mpt_core_shutdown, 228169569Sthompsa .detach = mpt_core_detach, 229169569Sthompsa .unload = mpt_core_unload, 230169569Sthompsa}; 231169569Sthompsa 232169569Sthompsa/* 233169569Sthompsa * Manual declaration so that DECLARE_MPT_PERSONALITY doesn't need 234169569Sthompsa * ordering information. We want the core to always register FIRST. 235169569Sthompsa * other modules are set to SI_ORDER_SECOND. 236169569Sthompsa */ 237169569Sthompsastatic moduledata_t mpt_core_mod = { 238169569Sthompsa "mpt_core", mpt_modevent, &mpt_core_personality 239169569Sthompsa}; 240169569SthompsaDECLARE_MODULE(mpt_core, mpt_core_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST); 241169569SthompsaMODULE_VERSION(mpt_core, 1); 242169569Sthompsa 243169569Sthompsa#define MPT_PERS_ATTACHED(pers, mpt) ((mpt)->mpt_pers_mask & (0x1 << pers->id)) 244169569Sthompsa 245169569Sthompsaint 246169569Sthompsampt_modevent(module_t mod, int type, void *data) 247169569Sthompsa{ 248169569Sthompsa struct mpt_personality *pers; 249169569Sthompsa int error; 250170599Sthompsa 251169569Sthompsa pers = (struct mpt_personality *)data; 252169569Sthompsa 253169569Sthompsa error = 0; 254169569Sthompsa switch (type) { 255169569Sthompsa case MOD_LOAD: 256169569Sthompsa { 257169569Sthompsa mpt_load_handler_t **def_handler; 258169569Sthompsa mpt_load_handler_t **pers_handler; 259169569Sthompsa int i; 260169569Sthompsa 261169569Sthompsa for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 262169569Sthompsa if (mpt_personalities[i] == NULL) 263169569Sthompsa break; 264169569Sthompsa } 265168561Sthompsa if (i >= MPT_MAX_PERSONALITIES) { 266169569Sthompsa error = ENOMEM; 267168561Sthompsa break; 268169569Sthompsa } 269169569Sthompsa pers->id = i; 270168561Sthompsa mpt_personalities[i] = pers; 271168793Sthompsa 272168561Sthompsa /* Install standard/noop handlers for any NULL entries. */ 273168561Sthompsa def_handler = MPT_PERS_FIRST_HANDLER(&mpt_default_personality); 274168561Sthompsa pers_handler = MPT_PERS_FIRST_HANDLER(pers); 275170599Sthompsa while (pers_handler <= MPT_PERS_LAST_HANDLER(pers)) { 276168561Sthompsa if (*pers_handler == NULL) 277168561Sthompsa *pers_handler = *def_handler; 278168561Sthompsa pers_handler++; 279168561Sthompsa def_handler++; 280168561Sthompsa } 281168561Sthompsa 282168561Sthompsa error = (pers->load(pers)); 283168561Sthompsa if (error != 0) 284168561Sthompsa mpt_personalities[i] = NULL; 285168561Sthompsa break; 286168561Sthompsa } 287168561Sthompsa case MOD_SHUTDOWN: 288168561Sthompsa break; 289168561Sthompsa#if __FreeBSD_version >= 500000 290168561Sthompsa case MOD_QUIESCE: 291168561Sthompsa break; 292168561Sthompsa#endif 293168561Sthompsa case MOD_UNLOAD: 294168561Sthompsa error = pers->unload(pers); 295168561Sthompsa mpt_personalities[pers->id] = NULL; 296168561Sthompsa break; 297168561Sthompsa default: 298168561Sthompsa error = EINVAL; 299168561Sthompsa break; 300168561Sthompsa } 301168561Sthompsa return (error); 302168561Sthompsa} 303168561Sthompsa 304168561Sthompsastatic int 305168561Sthompsampt_stdload(struct mpt_personality *pers) 306168561Sthompsa{ 307168561Sthompsa 308168561Sthompsa /* Load is always successful. */ 309168561Sthompsa return (0); 310168561Sthompsa} 311168561Sthompsa 312168561Sthompsastatic int 313168561Sthompsampt_stdprobe(struct mpt_softc *mpt) 314168561Sthompsa{ 315168561Sthompsa 316168561Sthompsa /* Probe is always successful. */ 317168561Sthompsa return (0); 318168561Sthompsa} 319168561Sthompsa 320168561Sthompsastatic int 321168561Sthompsampt_stdattach(struct mpt_softc *mpt) 322168561Sthompsa{ 323168561Sthompsa 324168561Sthompsa /* Attach is always successful. */ 325168561Sthompsa return (0); 326168561Sthompsa} 327168561Sthompsa 328168561Sthompsastatic int 329168561Sthompsampt_stdenable(struct mpt_softc *mpt) 330168561Sthompsa{ 331168561Sthompsa 332168561Sthompsa /* Enable is always successful. */ 333168561Sthompsa return (0); 334168561Sthompsa} 335168561Sthompsa 336168793Sthompsastatic void 337170599Sthompsampt_stdready(struct mpt_softc *mpt) 338168561Sthompsa{ 339168561Sthompsa 340168561Sthompsa} 341170599Sthompsa 342168561Sthompsastatic int 343168561Sthompsampt_stdevent(struct mpt_softc *mpt, request_t *req, MSG_EVENT_NOTIFY_REPLY *msg) 344168561Sthompsa{ 345168561Sthompsa 346168561Sthompsa mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_stdevent: 0x%x\n", msg->Event & 0xFF); 347169739Sthompsa /* Event was not for us. */ 348169739Sthompsa return (0); 349169739Sthompsa} 350169739Sthompsa 351169739Sthompsastatic void 352169739Sthompsampt_stdreset(struct mpt_softc *mpt, int type) 353169739Sthompsa{ 354169739Sthompsa 355169739Sthompsa} 356169739Sthompsa 357169739Sthompsastatic void 358168561Sthompsampt_stdshutdown(struct mpt_softc *mpt) 359168561Sthompsa{ 360168561Sthompsa 361168793Sthompsa} 362168561Sthompsa 363168561Sthompsastatic void 364168561Sthompsampt_stddetach(struct mpt_softc *mpt) 365168561Sthompsa{ 366170599Sthompsa 367168561Sthompsa} 368168561Sthompsa 369168561Sthompsastatic int 370168561Sthompsampt_stdunload(struct mpt_personality *pers) 371168561Sthompsa{ 372168561Sthompsa 373168561Sthompsa /* Unload is always successful. */ 374168561Sthompsa return (0); 375168561Sthompsa} 376168561Sthompsa 377168561Sthompsa/* 378168561Sthompsa * Post driver attachment, we may want to perform some global actions. 379168793Sthompsa * Here is the hook to do so. 380168561Sthompsa */ 381168561Sthompsa 382168561Sthompsastatic void 383168561Sthompsampt_postattach(void *unused) 384168561Sthompsa{ 385168561Sthompsa struct mpt_softc *mpt; 386168561Sthompsa struct mpt_personality *pers; 387168561Sthompsa 388168561Sthompsa TAILQ_FOREACH(mpt, &mpt_tailq, links) { 389168561Sthompsa MPT_PERS_FOREACH(mpt, pers) 390168561Sthompsa pers->ready(mpt); 391168561Sthompsa } 392168561Sthompsa} 393168561SthompsaSYSINIT(mptdev, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE, mpt_postattach, NULL); 394168561Sthompsa 395168561Sthompsa/******************************* Bus DMA Support ******************************/ 396168561Sthompsavoid 397168561Sthompsampt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error) 398168561Sthompsa{ 399168561Sthompsa struct mpt_map_info *map_info; 400168561Sthompsa 401168561Sthompsa map_info = (struct mpt_map_info *)arg; 402168561Sthompsa map_info->error = error; 403168561Sthompsa map_info->phys = segs->ds_addr; 404168561Sthompsa} 405168561Sthompsa 406168561Sthompsa/**************************** Reply/Event Handling ****************************/ 407168561Sthompsaint 408168793Sthompsampt_register_handler(struct mpt_softc *mpt, mpt_handler_type type, 409168561Sthompsa mpt_handler_t handler, uint32_t *phandler_id) 410168561Sthompsa{ 411168561Sthompsa 412169739Sthompsa switch (type) { 413169739Sthompsa case MPT_HANDLER_REPLY: 414169739Sthompsa { 415169739Sthompsa u_int cbi; 416169739Sthompsa u_int free_cbi; 417169739Sthompsa 418169739Sthompsa if (phandler_id == NULL) 419169739Sthompsa return (EINVAL); 420170599Sthompsa 421169739Sthompsa free_cbi = MPT_HANDLER_ID_NONE; 422169739Sthompsa for (cbi = 0; cbi < MPT_NUM_REPLY_HANDLERS; cbi++) { 423169739Sthompsa /* 424169739Sthompsa * If the same handler is registered multiple 425169739Sthompsa * times, don't error out. Just return the 426169739Sthompsa * index of the original registration. 427169739Sthompsa */ 428169739Sthompsa if (mpt_reply_handlers[cbi] == handler.reply_handler) { 429169739Sthompsa *phandler_id = MPT_CBI_TO_HID(cbi); 430169739Sthompsa return (0); 431169739Sthompsa } 432169739Sthompsa 433169739Sthompsa /* 434169739Sthompsa * Fill from the front in the hope that 435169739Sthompsa * all registered handlers consume only a 436169739Sthompsa * single cache line. 437169739Sthompsa * 438169739Sthompsa * We don't break on the first empty slot so 439169739Sthompsa * that the full table is checked to see if 440169739Sthompsa * this handler was previously registered. 441169739Sthompsa */ 442169739Sthompsa if (free_cbi == MPT_HANDLER_ID_NONE && 443169739Sthompsa (mpt_reply_handlers[cbi] 444169739Sthompsa == mpt_default_reply_handler)) 445169739Sthompsa free_cbi = cbi; 446169739Sthompsa } 447169739Sthompsa if (free_cbi == MPT_HANDLER_ID_NONE) { 448169739Sthompsa return (ENOMEM); 449169739Sthompsa } 450169739Sthompsa mpt_reply_handlers[free_cbi] = handler.reply_handler; 451169739Sthompsa *phandler_id = MPT_CBI_TO_HID(free_cbi); 452168561Sthompsa break; 453168793Sthompsa } 454168561Sthompsa default: 455168793Sthompsa mpt_prt(mpt, "mpt_register_handler unknown type %d\n", type); 456168793Sthompsa return (EINVAL); 457168561Sthompsa } 458168561Sthompsa return (0); 459168561Sthompsa} 460168561Sthompsa 461168561Sthompsaint 462168561Sthompsampt_deregister_handler(struct mpt_softc *mpt, mpt_handler_type type, 463170599Sthompsa mpt_handler_t handler, uint32_t handler_id) 464168561Sthompsa{ 465168561Sthompsa 466168561Sthompsa switch (type) { 467168561Sthompsa case MPT_HANDLER_REPLY: 468168561Sthompsa { 469168561Sthompsa u_int cbi; 470168561Sthompsa 471169227Sthompsa cbi = MPT_CBI(handler_id); 472169227Sthompsa if (cbi >= MPT_NUM_REPLY_HANDLERS 473169227Sthompsa || mpt_reply_handlers[cbi] != handler.reply_handler) 474168561Sthompsa return (ENOENT); 475168561Sthompsa mpt_reply_handlers[cbi] = mpt_default_reply_handler; 476168561Sthompsa break; 477168561Sthompsa } 478170599Sthompsa default: 479169227Sthompsa mpt_prt(mpt, "mpt_deregister_handler unknown type %d\n", type); 480169227Sthompsa return (EINVAL); 481169227Sthompsa } 482169227Sthompsa return (0); 483169227Sthompsa} 484168561Sthompsa 485168561Sthompsastatic int 486168561Sthompsampt_default_reply_handler(struct mpt_softc *mpt, request_t *req, 487168561Sthompsa uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 488168561Sthompsa{ 489168561Sthompsa 490168561Sthompsa mpt_prt(mpt, 491168561Sthompsa "Default Handler Called: req=%p:%u reply_descriptor=%x frame=%p\n", 492168561Sthompsa req, req->serno, reply_desc, reply_frame); 493168561Sthompsa 494168561Sthompsa if (reply_frame != NULL) 495168561Sthompsa mpt_dump_reply_frame(mpt, reply_frame); 496168561Sthompsa 497168561Sthompsa mpt_prt(mpt, "Reply Frame Ignored\n"); 498168561Sthompsa 499168561Sthompsa return (/*free_reply*/TRUE); 500170599Sthompsa} 501168561Sthompsa 502168561Sthompsastatic int 503169569Sthompsampt_config_reply_handler(struct mpt_softc *mpt, request_t *req, 504168561Sthompsa uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 505168561Sthompsa{ 506168561Sthompsa 507168561Sthompsa if (req != NULL) { 508168561Sthompsa if (reply_frame != NULL) { 509168561Sthompsa MSG_CONFIG *cfgp; 510168561Sthompsa MSG_CONFIG_REPLY *reply; 511168561Sthompsa 512168561Sthompsa cfgp = (MSG_CONFIG *)req->req_vbuf; 513168561Sthompsa reply = (MSG_CONFIG_REPLY *)reply_frame; 514168561Sthompsa req->IOCStatus = le16toh(reply_frame->IOCStatus); 515169569Sthompsa bcopy(&reply->Header, &cfgp->Header, 516168561Sthompsa sizeof(cfgp->Header)); 517168561Sthompsa cfgp->ExtPageLength = reply->ExtPageLength; 518168561Sthompsa cfgp->ExtPageType = reply->ExtPageType; 519168561Sthompsa } 520168793Sthompsa req->state &= ~REQ_STATE_QUEUED; 521168561Sthompsa req->state |= REQ_STATE_DONE; 522170599Sthompsa TAILQ_REMOVE(&mpt->request_pending_list, req, links); 523170599Sthompsa if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) { 524168561Sthompsa wakeup(req); 525168793Sthompsa } else if ((req->state & REQ_STATE_TIMEDOUT) != 0) { 526168561Sthompsa /* 527168561Sthompsa * Whew- we can free this request (late completion) 528168561Sthompsa */ 529168561Sthompsa mpt_free_request(mpt, req); 530168561Sthompsa } 531168561Sthompsa } 532168561Sthompsa 533170599Sthompsa return (TRUE); 534168561Sthompsa} 535168561Sthompsa 536168561Sthompsastatic int 537168561Sthompsampt_handshake_reply_handler(struct mpt_softc *mpt, request_t *req, 538168561Sthompsa uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 539168561Sthompsa{ 540168561Sthompsa 541168561Sthompsa /* Nothing to be done. */ 542168561Sthompsa return (TRUE); 543168561Sthompsa} 544168561Sthompsa 545168561Sthompsastatic int 546168793Sthompsampt_event_reply_handler(struct mpt_softc *mpt, request_t *req, 547168561Sthompsa uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 548168561Sthompsa{ 549168561Sthompsa int free_reply; 550168561Sthompsa 551168561Sthompsa KASSERT(reply_frame != NULL, ("null reply in mpt_event_reply_handler")); 552168561Sthompsa KASSERT(req != NULL, ("null request in mpt_event_reply_handler")); 553168561Sthompsa 554168561Sthompsa free_reply = TRUE; 555168793Sthompsa switch (reply_frame->Function) { 556168561Sthompsa case MPI_FUNCTION_EVENT_NOTIFICATION: 557168793Sthompsa { 558168561Sthompsa MSG_EVENT_NOTIFY_REPLY *msg; 559169327Sthompsa struct mpt_personality *pers; 560168561Sthompsa u_int handled; 561168561Sthompsa 562168561Sthompsa handled = 0; 563168561Sthompsa msg = (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 564169739Sthompsa msg->EventDataLength = le16toh(msg->EventDataLength); 565168561Sthompsa msg->IOCStatus = le16toh(msg->IOCStatus); 566168561Sthompsa msg->IOCLogInfo = le32toh(msg->IOCLogInfo); 567168561Sthompsa msg->Event = le32toh(msg->Event); 568168561Sthompsa MPT_PERS_FOREACH(mpt, pers) 569168793Sthompsa handled += pers->event(mpt, req, msg); 570168561Sthompsa 571168561Sthompsa if (handled == 0 && mpt->mpt_pers_mask == 0) { 572168561Sthompsa mpt_lprt(mpt, MPT_PRT_INFO, 573168561Sthompsa "No Handlers For Any Event Notify Frames. " 574168561Sthompsa "Event %#x (ACK %sequired).\n", 575168561Sthompsa msg->Event, msg->AckRequired? "r" : "not r"); 576168793Sthompsa } else if (handled == 0) { 577168561Sthompsa mpt_lprt(mpt, 578168793Sthompsa msg->AckRequired? MPT_PRT_WARN : MPT_PRT_INFO, 579169327Sthompsa "Unhandled Event Notify Frame. Event %#x " 580168561Sthompsa "(ACK %sequired).\n", 581170599Sthompsa msg->Event, msg->AckRequired? "r" : "not r"); 582168561Sthompsa } 583168561Sthompsa 584168561Sthompsa if (msg->AckRequired) { 585168561Sthompsa request_t *ack_req; 586168561Sthompsa uint32_t context; 587168561Sthompsa 588168561Sthompsa context = req->index | MPT_REPLY_HANDLER_EVENTS; 589168561Sthompsa ack_req = mpt_get_request(mpt, FALSE); 590169227Sthompsa if (ack_req == NULL) { 591168561Sthompsa struct mpt_evtf_record *evtf; 592169328Sthompsa 593169328Sthompsa evtf = (struct mpt_evtf_record *)reply_frame; 594169328Sthompsa evtf->context = context; 595168561Sthompsa LIST_INSERT_HEAD(&mpt->ack_frames, evtf, links); 596168561Sthompsa free_reply = FALSE; 597168561Sthompsa break; 598168561Sthompsa } 599168561Sthompsa mpt_send_event_ack(mpt, ack_req, msg, context); 600168561Sthompsa /* 601168793Sthompsa * Don't check for CONTINUATION_REPLY here 602168561Sthompsa */ 603168793Sthompsa return (free_reply); 604168561Sthompsa } 605168561Sthompsa break; 606168561Sthompsa } 607168561Sthompsa case MPI_FUNCTION_PORT_ENABLE: 608168561Sthompsa mpt_lprt(mpt, MPT_PRT_DEBUG , "enable port reply\n"); 609168561Sthompsa break; 610168561Sthompsa case MPI_FUNCTION_EVENT_ACK: 611168561Sthompsa break; 612168561Sthompsa default: 613168561Sthompsa mpt_prt(mpt, "unknown event function: %x\n", 614168561Sthompsa reply_frame->Function); 615168561Sthompsa break; 616168561Sthompsa } 617168793Sthompsa 618168561Sthompsa /* 619168561Sthompsa * I'm not sure that this continuation stuff works as it should. 620168561Sthompsa * 621168561Sthompsa * I've had FC async events occur that free the frame up because 622168793Sthompsa * the continuation bit isn't set, and then additional async events 623168561Sthompsa * then occur using the same context. As you might imagine, this 624168561Sthompsa * leads to Very Bad Thing. 625168561Sthompsa * 626168561Sthompsa * Let's just be safe for now and not free them up until we figure 627168561Sthompsa * out what's actually happening here. 628168793Sthompsa */ 629168561Sthompsa#if 0 630168561Sthompsa if ((reply_frame->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) == 0) { 631168561Sthompsa TAILQ_REMOVE(&mpt->request_pending_list, req, links); 632168561Sthompsa mpt_free_request(mpt, req); 633168793Sthompsa mpt_prt(mpt, "event_reply %x for req %p:%u NOT a continuation", 634168561Sthompsa reply_frame->Function, req, req->serno); 635168561Sthompsa if (reply_frame->Function == MPI_FUNCTION_EVENT_NOTIFICATION) { 636168561Sthompsa MSG_EVENT_NOTIFY_REPLY *msg = 637168561Sthompsa (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 638168561Sthompsa mpt_prtc(mpt, " Event=0x%x AckReq=%d", 639168561Sthompsa msg->Event, msg->AckRequired); 640168561Sthompsa } 641168793Sthompsa } else { 642168561Sthompsa mpt_prt(mpt, "event_reply %x for %p:%u IS a continuation", 643168561Sthompsa reply_frame->Function, req, req->serno); 644168561Sthompsa if (reply_frame->Function == MPI_FUNCTION_EVENT_NOTIFICATION) { 645168561Sthompsa MSG_EVENT_NOTIFY_REPLY *msg = 646170599Sthompsa (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 647168561Sthompsa mpt_prtc(mpt, " Event=0x%x AckReq=%d", 648168561Sthompsa msg->Event, msg->AckRequired); 649168561Sthompsa } 650168561Sthompsa mpt_prtc(mpt, "\n"); 651168561Sthompsa } 652168561Sthompsa#endif 653168561Sthompsa return (free_reply); 654168561Sthompsa} 655168561Sthompsa 656168561Sthompsa/* 657168561Sthompsa * Process an asynchronous event from the IOC. 658168561Sthompsa */ 659168561Sthompsastatic int 660168561Sthompsampt_core_event(struct mpt_softc *mpt, request_t *req, 661168561Sthompsa MSG_EVENT_NOTIFY_REPLY *msg) 662168561Sthompsa{ 663168561Sthompsa 664168561Sthompsa mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_core_event: 0x%x\n", 665168561Sthompsa msg->Event & 0xFF); 666168561Sthompsa switch(msg->Event & 0xFF) { 667168793Sthompsa case MPI_EVENT_NONE: 668168561Sthompsa break; 669168561Sthompsa case MPI_EVENT_LOG_DATA: 670168561Sthompsa { 671168561Sthompsa int i; 672168561Sthompsa 673168561Sthompsa /* Some error occurred that LSI wants logged */ 674168561Sthompsa mpt_prt(mpt, "EvtLogData: IOCLogInfo: 0x%08x\n", 675168561Sthompsa msg->IOCLogInfo); 676168561Sthompsa mpt_prt(mpt, "\tEvtLogData: Event Data:"); 677168561Sthompsa for (i = 0; i < msg->EventDataLength; i++) 678168561Sthompsa mpt_prtc(mpt, " %08x", msg->Data[i]); 679168793Sthompsa mpt_prtc(mpt, "\n"); 680168561Sthompsa break; 681168561Sthompsa } 682168561Sthompsa case MPI_EVENT_EVENT_CHANGE: 683168561Sthompsa /* 684170599Sthompsa * This is just an acknowledgement 685168561Sthompsa * of our mpt_send_event_request. 686168561Sthompsa */ 687168561Sthompsa break; 688168561Sthompsa case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE: 689168561Sthompsa break; 690168561Sthompsa default: 691168561Sthompsa return (0); 692168561Sthompsa break; 693168561Sthompsa } 694168561Sthompsa return (1); 695168561Sthompsa} 696168561Sthompsa 697168561Sthompsastatic void 698168561Sthompsampt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 699168561Sthompsa MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context) 700168561Sthompsa{ 701168561Sthompsa MSG_EVENT_ACK *ackp; 702168793Sthompsa 703168561Sthompsa ackp = (MSG_EVENT_ACK *)ack_req->req_vbuf; 704168561Sthompsa memset(ackp, 0, sizeof (*ackp)); 705168561Sthompsa ackp->Function = MPI_FUNCTION_EVENT_ACK; 706168561Sthompsa ackp->Event = htole32(msg->Event); 707168561Sthompsa ackp->EventContext = htole32(msg->EventContext); 708168561Sthompsa ackp->MsgContext = htole32(context); 709168561Sthompsa mpt_check_doorbell(mpt); 710168561Sthompsa mpt_send_cmd(mpt, ack_req); 711168561Sthompsa} 712168561Sthompsa 713168561Sthompsa/***************************** Interrupt Handling *****************************/ 714168561Sthompsavoid 715168561Sthompsampt_intr(void *arg) 716168561Sthompsa{ 717168561Sthompsa struct mpt_softc *mpt; 718168561Sthompsa uint32_t reply_desc; 719170599Sthompsa int ntrips = 0; 720168561Sthompsa 721168561Sthompsa mpt = (struct mpt_softc *)arg; 722168561Sthompsa mpt_lprt(mpt, MPT_PRT_DEBUG2, "enter mpt_intr\n"); 723170599Sthompsa MPT_LOCK_ASSERT(mpt); 724168561Sthompsa 725168561Sthompsa while ((reply_desc = mpt_pop_reply_queue(mpt)) != MPT_REPLY_EMPTY) { 726168561Sthompsa request_t *req; 727168561Sthompsa MSG_DEFAULT_REPLY *reply_frame; 728168561Sthompsa uint32_t reply_baddr; 729168561Sthompsa uint32_t ctxt_idx; 730170599Sthompsa u_int cb_index; 731170599Sthompsa u_int req_index; 732168561Sthompsa u_int offset; 733168561Sthompsa int free_rf; 734168561Sthompsa 735168561Sthompsa req = NULL; 736168561Sthompsa reply_frame = NULL; 737168561Sthompsa reply_baddr = 0; 738169569Sthompsa offset = 0; 739169569Sthompsa if ((reply_desc & MPI_ADDRESS_REPLY_A_BIT) != 0) { 740169569Sthompsa /* 741168561Sthompsa * Ensure that the reply frame is coherent. 742169569Sthompsa */ 743169569Sthompsa reply_baddr = MPT_REPLY_BADDR(reply_desc); 744169569Sthompsa offset = reply_baddr - (mpt->reply_phys & 0xFFFFFFFF); 745168793Sthompsa bus_dmamap_sync_range(mpt->reply_dmat, 746170599Sthompsa mpt->reply_dmap, offset, MPT_REPLY_SIZE, 747170599Sthompsa BUS_DMASYNC_POSTREAD); 748168561Sthompsa reply_frame = MPT_REPLY_OTOV(mpt, offset); 749168561Sthompsa ctxt_idx = le32toh(reply_frame->MsgContext); 750168561Sthompsa } else { 751168561Sthompsa uint32_t type; 752168561Sthompsa 753170599Sthompsa type = MPI_GET_CONTEXT_REPLY_TYPE(reply_desc); 754168561Sthompsa ctxt_idx = reply_desc; 755170599Sthompsa mpt_lprt(mpt, MPT_PRT_DEBUG1, "Context Reply: 0x%08x\n", 756168561Sthompsa reply_desc); 757168561Sthompsa 758168561Sthompsa switch (type) { 759168561Sthompsa case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT: 760168561Sthompsa ctxt_idx &= MPI_CONTEXT_REPLY_CONTEXT_MASK; 761168561Sthompsa break; 762170599Sthompsa case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET: 763168561Sthompsa ctxt_idx = GET_IO_INDEX(reply_desc); 764168561Sthompsa if (mpt->tgt_cmd_ptrs == NULL) { 765169569Sthompsa mpt_prt(mpt, 766169569Sthompsa "mpt_intr: no target cmd ptrs\n"); 767169569Sthompsa reply_desc = MPT_REPLY_EMPTY; 768168561Sthompsa break; 769168561Sthompsa } 770168561Sthompsa if (ctxt_idx >= mpt->tgt_cmds_allocated) { 771168561Sthompsa mpt_prt(mpt, 772168561Sthompsa "mpt_intr: bad tgt cmd ctxt %u\n", 773168561Sthompsa ctxt_idx); 774170599Sthompsa reply_desc = MPT_REPLY_EMPTY; 775168561Sthompsa ntrips = 1000; 776170599Sthompsa break; 777168561Sthompsa } 778168561Sthompsa req = mpt->tgt_cmd_ptrs[ctxt_idx]; 779168561Sthompsa if (req == NULL) { 780168561Sthompsa mpt_prt(mpt, "no request backpointer " 781168561Sthompsa "at index %u", ctxt_idx); 782170599Sthompsa reply_desc = MPT_REPLY_EMPTY; 783168561Sthompsa ntrips = 1000; 784170599Sthompsa break; 785168561Sthompsa } 786168561Sthompsa /* 787168561Sthompsa * Reformulate ctxt_idx to be just as if 788168561Sthompsa * it were another type of context reply 789168561Sthompsa * so the code below will find the request 790168793Sthompsa * via indexing into the pool. 791170599Sthompsa */ 792168561Sthompsa ctxt_idx = 793170599Sthompsa req->index | mpt->scsi_tgt_handler_id; 794168561Sthompsa req = NULL; 795168561Sthompsa break; 796168561Sthompsa case MPI_CONTEXT_REPLY_TYPE_LAN: 797168561Sthompsa mpt_prt(mpt, "LAN CONTEXT REPLY: 0x%08x\n", 798168561Sthompsa reply_desc); 799170599Sthompsa reply_desc = MPT_REPLY_EMPTY; 800168561Sthompsa break; 801168561Sthompsa default: 802168561Sthompsa mpt_prt(mpt, "Context Reply 0x%08x?\n", type); 803168561Sthompsa reply_desc = MPT_REPLY_EMPTY; 804168561Sthompsa break; 805168561Sthompsa } 806168561Sthompsa if (reply_desc == MPT_REPLY_EMPTY) { 807168561Sthompsa if (ntrips++ > 1000) { 808168561Sthompsa break; 809168561Sthompsa } 810168561Sthompsa continue; 811168561Sthompsa } 812168561Sthompsa } 813168561Sthompsa 814168561Sthompsa cb_index = MPT_CONTEXT_TO_CBI(ctxt_idx); 815168793Sthompsa req_index = MPT_CONTEXT_TO_REQI(ctxt_idx); 816168561Sthompsa if (req_index < MPT_MAX_REQUESTS(mpt)) { 817168561Sthompsa req = &mpt->request_pool[req_index]; 818168561Sthompsa } else { 819168561Sthompsa mpt_prt(mpt, "WARN: mpt_intr index == %d (reply_desc ==" 820168561Sthompsa " 0x%x)\n", req_index, reply_desc); 821168561Sthompsa } 822168561Sthompsa 823168561Sthompsa bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 824168561Sthompsa BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 825168793Sthompsa free_rf = mpt_reply_handlers[cb_index](mpt, req, 826168561Sthompsa reply_desc, reply_frame); 827168561Sthompsa 828168561Sthompsa if (reply_frame != NULL && free_rf) { 829168561Sthompsa bus_dmamap_sync_range(mpt->reply_dmat, 830168561Sthompsa mpt->reply_dmap, offset, MPT_REPLY_SIZE, 831168561Sthompsa BUS_DMASYNC_PREREAD); 832168561Sthompsa mpt_free_reply(mpt, reply_baddr); 833168561Sthompsa } 834168561Sthompsa 835169739Sthompsa /* 836169739Sthompsa * If we got ourselves disabled, don't get stuck in a loop 837168561Sthompsa */ 838168561Sthompsa if (mpt->disabled) { 839168561Sthompsa mpt_disable_ints(mpt); 840168561Sthompsa break; 841168561Sthompsa } 842168561Sthompsa if (ntrips++ > 1000) { 843169739Sthompsa break; 844169739Sthompsa } 845169739Sthompsa } 846169739Sthompsa mpt_lprt(mpt, MPT_PRT_DEBUG2, "exit mpt_intr\n"); 847169739Sthompsa} 848169739Sthompsa 849169739Sthompsa/******************************* Error Recovery *******************************/ 850169739Sthompsavoid 851168561Sthompsampt_complete_request_chain(struct mpt_softc *mpt, struct req_queue *chain, 852168561Sthompsa u_int iocstatus) 853168561Sthompsa{ 854168561Sthompsa MSG_DEFAULT_REPLY ioc_status_frame; 855168561Sthompsa request_t *req; 856168561Sthompsa 857168561Sthompsa memset(&ioc_status_frame, 0, sizeof(ioc_status_frame)); 858168561Sthompsa ioc_status_frame.MsgLength = roundup2(sizeof(ioc_status_frame), 4); 859168561Sthompsa ioc_status_frame.IOCStatus = iocstatus; 860168561Sthompsa while((req = TAILQ_FIRST(chain)) != NULL) { 861168561Sthompsa MSG_REQUEST_HEADER *msg_hdr; 862168561Sthompsa u_int cb_index; 863168561Sthompsa 864168561Sthompsa bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 865168561Sthompsa BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 866168561Sthompsa msg_hdr = (MSG_REQUEST_HEADER *)req->req_vbuf; 867168561Sthompsa ioc_status_frame.Function = msg_hdr->Function; 868168561Sthompsa ioc_status_frame.MsgContext = msg_hdr->MsgContext; 869168561Sthompsa cb_index = MPT_CONTEXT_TO_CBI(le32toh(msg_hdr->MsgContext)); 870168561Sthompsa mpt_reply_handlers[cb_index](mpt, req, msg_hdr->MsgContext, 871168561Sthompsa &ioc_status_frame); 872168561Sthompsa if (mpt_req_on_pending_list(mpt, req) != 0) 873168561Sthompsa TAILQ_REMOVE(chain, req, links); 874168561Sthompsa } 875168561Sthompsa} 876168561Sthompsa 877168561Sthompsa/********************************* Diagnostics ********************************/ 878168561Sthompsa/* 879168561Sthompsa * Perform a diagnostic dump of a reply frame. 880168561Sthompsa */ 881168561Sthompsavoid 882168561Sthompsampt_dump_reply_frame(struct mpt_softc *mpt, MSG_DEFAULT_REPLY *reply_frame) 883168561Sthompsa{ 884168561Sthompsa 885168561Sthompsa mpt_prt(mpt, "Address Reply:\n"); 886168561Sthompsa mpt_print_reply(reply_frame); 887168561Sthompsa} 888168561Sthompsa 889168561Sthompsa/******************************* Doorbell Access ******************************/ 890168561Sthompsastatic __inline uint32_t mpt_rd_db(struct mpt_softc *mpt); 891168561Sthompsastatic __inline uint32_t mpt_rd_intr(struct mpt_softc *mpt); 892168561Sthompsa 893168561Sthompsastatic __inline uint32_t 894168561Sthompsampt_rd_db(struct mpt_softc *mpt) 895168561Sthompsa{ 896168561Sthompsa 897168561Sthompsa return mpt_read(mpt, MPT_OFFSET_DOORBELL); 898168561Sthompsa} 899168561Sthompsa 900168561Sthompsastatic __inline uint32_t 901168793Sthompsampt_rd_intr(struct mpt_softc *mpt) 902168561Sthompsa{ 903168561Sthompsa 904168561Sthompsa return mpt_read(mpt, MPT_OFFSET_INTR_STATUS); 905168561Sthompsa} 906168561Sthompsa 907168561Sthompsa/* Busy wait for a door bell to be read by IOC */ 908168561Sthompsastatic int 909168561Sthompsampt_wait_db_ack(struct mpt_softc *mpt) 910168561Sthompsa{ 911168561Sthompsa int i; 912168561Sthompsa 913168561Sthompsa for (i=0; i < MPT_MAX_WAIT; i++) { 914168561Sthompsa if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) { 915168561Sthompsa maxwait_ack = i > maxwait_ack ? i : maxwait_ack; 916168561Sthompsa return (MPT_OK); 917168561Sthompsa } 918168561Sthompsa DELAY(200); 919168561Sthompsa } 920168561Sthompsa return (MPT_FAIL); 921168561Sthompsa} 922168561Sthompsa 923168561Sthompsa/* Busy wait for a door bell interrupt */ 924168561Sthompsastatic int 925168561Sthompsampt_wait_db_int(struct mpt_softc *mpt) 926168561Sthompsa{ 927169741Sthompsa int i; 928169741Sthompsa 929169741Sthompsa for (i = 0; i < MPT_MAX_WAIT; i++) { 930169741Sthompsa if (MPT_DB_INTR(mpt_rd_intr(mpt))) { 931169741Sthompsa maxwait_int = i > maxwait_int ? i : maxwait_int; 932169741Sthompsa return MPT_OK; 933169741Sthompsa } 934169741Sthompsa DELAY(100); 935169741Sthompsa } 936168561Sthompsa return (MPT_FAIL); 937168561Sthompsa} 938168561Sthompsa 939168561Sthompsa/* Wait for IOC to transition to a give state */ 940168561Sthompsavoid 941168561Sthompsampt_check_doorbell(struct mpt_softc *mpt) 942168561Sthompsa{ 943168561Sthompsa uint32_t db = mpt_rd_db(mpt); 944168561Sthompsa 945168561Sthompsa if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) { 946168561Sthompsa mpt_prt(mpt, "Device not running\n"); 947168561Sthompsa mpt_print_db(db); 948168561Sthompsa } 949168561Sthompsa} 950168561Sthompsa 951168561Sthompsa/* Wait for IOC to transition to a give state */ 952168561Sthompsastatic int 953168561Sthompsampt_wait_state(struct mpt_softc *mpt, enum DB_STATE_BITS state) 954168561Sthompsa{ 955168561Sthompsa int i; 956168561Sthompsa 957168561Sthompsa for (i = 0; i < MPT_MAX_WAIT; i++) { 958168561Sthompsa uint32_t db = mpt_rd_db(mpt); 959168561Sthompsa if (MPT_STATE(db) == state) { 960168561Sthompsa maxwait_state = i > maxwait_state ? i : maxwait_state; 961168561Sthompsa return (MPT_OK); 962168561Sthompsa } 963168561Sthompsa DELAY(100); 964168561Sthompsa } 965168561Sthompsa return (MPT_FAIL); 966168561Sthompsa} 967168561Sthompsa 968168561Sthompsa 969168561Sthompsa/************************* Intialization/Configuration ************************/ 970168561Sthompsastatic int mpt_download_fw(struct mpt_softc *mpt); 971168561Sthompsa 972168793Sthompsa/* Issue the reset COMMAND to the IOC */ 973170599Sthompsastatic int 974168561Sthompsampt_soft_reset(struct mpt_softc *mpt) 975168561Sthompsa{ 976168561Sthompsa 977168561Sthompsa mpt_lprt(mpt, MPT_PRT_DEBUG, "soft reset\n"); 978168561Sthompsa 979168561Sthompsa /* Have to use hard reset if we are not in Running state */ 980168561Sthompsa if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) { 981168561Sthompsa mpt_prt(mpt, "soft reset failed: device not running\n"); 982168561Sthompsa return (MPT_FAIL); 983168561Sthompsa } 984168561Sthompsa 985168561Sthompsa /* If door bell is in use we don't have a chance of getting 986168561Sthompsa * a word in since the IOC probably crashed in message 987168561Sthompsa * processing. So don't waste our time. 988168561Sthompsa */ 989168561Sthompsa if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) { 990168561Sthompsa mpt_prt(mpt, "soft reset failed: doorbell wedged\n"); 991168561Sthompsa return (MPT_FAIL); 992169227Sthompsa } 993169227Sthompsa 994168561Sthompsa /* Send the reset request to the IOC */ 995168561Sthompsa mpt_write(mpt, MPT_OFFSET_DOORBELL, 996168561Sthompsa MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT); 997168793Sthompsa if (mpt_wait_db_ack(mpt) != MPT_OK) { 998170599Sthompsa mpt_prt(mpt, "soft reset failed: ack timeout\n"); 999168561Sthompsa return (MPT_FAIL); 1000168561Sthompsa } 1001168561Sthompsa 1002168561Sthompsa /* Wait for the IOC to reload and come out of reset state */ 1003168561Sthompsa if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) { 1004168561Sthompsa mpt_prt(mpt, "soft reset failed: device did not restart\n"); 1005168561Sthompsa return (MPT_FAIL); 1006168561Sthompsa } 1007168561Sthompsa 1008168561Sthompsa return MPT_OK; 1009168561Sthompsa} 1010168561Sthompsa 1011168561Sthompsastatic int 1012168561Sthompsampt_enable_diag_mode(struct mpt_softc *mpt) 1013168561Sthompsa{ 1014168561Sthompsa int try; 1015168561Sthompsa 1016168561Sthompsa try = 20; 1017168561Sthompsa while (--try) { 1018168561Sthompsa 1019168561Sthompsa if ((mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC) & MPI_DIAG_DRWE) != 0) 1020168561Sthompsa break; 1021168561Sthompsa 1022168561Sthompsa /* Enable diagnostic registers */ 1023168561Sthompsa mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF); 1024168561Sthompsa mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_1ST_KEY_VALUE); 1025168561Sthompsa mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_2ND_KEY_VALUE); 1026168561Sthompsa mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_3RD_KEY_VALUE); 1027168561Sthompsa mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_4TH_KEY_VALUE); 1028168561Sthompsa mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_5TH_KEY_VALUE); 1029168561Sthompsa 1030168561Sthompsa DELAY(100000); 1031168561Sthompsa } 1032168561Sthompsa if (try == 0) 1033168561Sthompsa return (EIO); 1034168561Sthompsa return (0); 1035168561Sthompsa} 1036168561Sthompsa 1037168561Sthompsastatic void 1038168561Sthompsampt_disable_diag_mode(struct mpt_softc *mpt) 1039168561Sthompsa{ 1040168561Sthompsa 1041168561Sthompsa mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFFFFFFFF); 1042168561Sthompsa} 1043168561Sthompsa 1044168561Sthompsa/* This is a magic diagnostic reset that resets all the ARM 1045168561Sthompsa * processors in the chip. 1046168561Sthompsa */ 1047168561Sthompsastatic void 1048168561Sthompsampt_hard_reset(struct mpt_softc *mpt) 1049168561Sthompsa{ 1050168561Sthompsa int error; 1051168561Sthompsa int wait; 1052168561Sthompsa uint32_t diagreg; 1053168561Sthompsa 1054168561Sthompsa mpt_lprt(mpt, MPT_PRT_DEBUG, "hard reset\n"); 1055168561Sthompsa 1056168561Sthompsa error = mpt_enable_diag_mode(mpt); 1057168561Sthompsa if (error) { 1058168561Sthompsa mpt_prt(mpt, "WARNING - Could not enter diagnostic mode !\n"); 1059168561Sthompsa mpt_prt(mpt, "Trying to reset anyway.\n"); 1060168561Sthompsa } 1061168561Sthompsa 1062168561Sthompsa diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 1063168561Sthompsa 1064168561Sthompsa /* 1065168561Sthompsa * This appears to be a workaround required for some 1066168561Sthompsa * firmware or hardware revs. 1067168561Sthompsa */ 1068168561Sthompsa mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_DISABLE_ARM); 1069168561Sthompsa DELAY(1000); 1070168561Sthompsa 1071168561Sthompsa /* Diag. port is now active so we can now hit the reset bit */ 1072168561Sthompsa mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_RESET_ADAPTER); 1073168561Sthompsa 1074168561Sthompsa /* 1075168561Sthompsa * Ensure that the reset has finished. We delay 1ms 1076168561Sthompsa * prior to reading the register to make sure the chip 1077168561Sthompsa * has sufficiently completed its reset to handle register 1078168561Sthompsa * accesses. 1079168561Sthompsa */ 1080168561Sthompsa wait = 5000; 1081168561Sthompsa do { 1082168561Sthompsa DELAY(1000); 1083168561Sthompsa diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 1084168561Sthompsa } while (--wait && (diagreg & MPI_DIAG_RESET_ADAPTER) == 0); 1085168561Sthompsa 1086168561Sthompsa if (wait == 0) { 1087168561Sthompsa mpt_prt(mpt, "WARNING - Failed hard reset! " 1088168561Sthompsa "Trying to initialize anyway.\n"); 1089168561Sthompsa } 1090168561Sthompsa 1091168561Sthompsa /* 1092168561Sthompsa * If we have firmware to download, it must be loaded before 1093168561Sthompsa * the controller will become operational. Do so now. 1094168561Sthompsa */ 1095168561Sthompsa if (mpt->fw_image != NULL) { 1096168561Sthompsa 1097168561Sthompsa error = mpt_download_fw(mpt); 1098168561Sthompsa 1099168561Sthompsa if (error) { 1100168561Sthompsa mpt_prt(mpt, "WARNING - Firmware Download Failed!\n"); 1101168561Sthompsa mpt_prt(mpt, "Trying to initialize anyway.\n"); 1102168561Sthompsa } 1103168561Sthompsa } 1104168561Sthompsa 1105168561Sthompsa /* 1106168561Sthompsa * Reseting the controller should have disabled write 1107168561Sthompsa * access to the diagnostic registers, but disable 1108168561Sthompsa * manually to be sure. 1109168561Sthompsa */ 1110168561Sthompsa mpt_disable_diag_mode(mpt); 1111168561Sthompsa} 1112168561Sthompsa 1113168561Sthompsastatic void 1114168561Sthompsampt_core_ioc_reset(struct mpt_softc *mpt, int type) 1115168561Sthompsa{ 1116168561Sthompsa 1117168561Sthompsa /* 1118168561Sthompsa * Complete all pending requests with a status 1119168561Sthompsa * appropriate for an IOC reset. 1120168561Sthompsa */ 1121168561Sthompsa mpt_complete_request_chain(mpt, &mpt->request_pending_list, 1122168561Sthompsa MPI_IOCSTATUS_INVALID_STATE); 1123168561Sthompsa} 1124168561Sthompsa 1125168561Sthompsa/* 1126168561Sthompsa * Reset the IOC when needed. Try software command first then if needed 1127168561Sthompsa * poke at the magic diagnostic reset. Note that a hard reset resets 1128168561Sthompsa * *both* IOCs on dual function chips (FC929 && LSI1030) as well as 1129168561Sthompsa * fouls up the PCI configuration registers. 1130168561Sthompsa */ 1131168561Sthompsaint 1132168561Sthompsampt_reset(struct mpt_softc *mpt, int reinit) 1133168561Sthompsa{ 1134168561Sthompsa struct mpt_personality *pers; 1135168561Sthompsa int ret; 1136168561Sthompsa int retry_cnt = 0; 1137168561Sthompsa 1138168561Sthompsa /* 1139169227Sthompsa * Try a soft reset. If that fails, get out the big hammer. 1140169227Sthompsa */ 1141168561Sthompsa again: 1142169227Sthompsa if ((ret = mpt_soft_reset(mpt)) != MPT_OK) { 1143168561Sthompsa int cnt; 1144168561Sthompsa for (cnt = 0; cnt < 5; cnt++) { 1145168561Sthompsa /* Failed; do a hard reset */ 1146168561Sthompsa mpt_hard_reset(mpt); 1147168561Sthompsa 1148169227Sthompsa /* 1149169227Sthompsa * Wait for the IOC to reload 1150168561Sthompsa * and come out of reset state 1151168561Sthompsa */ 1152168561Sthompsa ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 1153168561Sthompsa if (ret == MPT_OK) { 1154168561Sthompsa break; 1155168561Sthompsa } 1156168561Sthompsa /* 1157169227Sthompsa * Okay- try to check again... 1158168561Sthompsa */ 1159168561Sthompsa ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 1160168561Sthompsa if (ret == MPT_OK) { 1161168561Sthompsa break; 1162168561Sthompsa } 1163168561Sthompsa mpt_prt(mpt, "mpt_reset: failed hard reset (%d:%d)\n", 1164168561Sthompsa retry_cnt, cnt); 1165168561Sthompsa } 1166168561Sthompsa } 1167168561Sthompsa 1168168561Sthompsa if (retry_cnt == 0) { 1169168561Sthompsa /* 1170168561Sthompsa * Invoke reset handlers. We bump the reset count so 1171168561Sthompsa * that mpt_wait_req() understands that regardless of 1172168561Sthompsa * the specified wait condition, it should stop its wait. 1173168561Sthompsa */ 1174168561Sthompsa mpt->reset_cnt++; 1175168561Sthompsa MPT_PERS_FOREACH(mpt, pers) 1176168561Sthompsa pers->reset(mpt, ret); 1177168561Sthompsa } 1178168561Sthompsa 1179168561Sthompsa if (reinit) { 1180168561Sthompsa ret = mpt_enable_ioc(mpt, 1); 1181168561Sthompsa if (ret == MPT_OK) { 1182168561Sthompsa mpt_enable_ints(mpt); 1183168561Sthompsa } 1184168561Sthompsa } 1185168561Sthompsa if (ret != MPT_OK && retry_cnt++ < 2) { 1186168561Sthompsa goto again; 1187168561Sthompsa } 1188168561Sthompsa return ret; 1189168561Sthompsa} 1190168561Sthompsa 1191168561Sthompsa/* Return a command buffer to the free queue */ 1192168561Sthompsavoid 1193168561Sthompsampt_free_request(struct mpt_softc *mpt, request_t *req) 1194168561Sthompsa{ 1195168561Sthompsa request_t *nxt; 1196168561Sthompsa struct mpt_evtf_record *record; 1197168561Sthompsa uint32_t offset, reply_baddr; 1198168561Sthompsa 1199168561Sthompsa if (req == NULL || req != &mpt->request_pool[req->index]) { 1200168561Sthompsa panic("mpt_free_request bad req ptr\n"); 1201168561Sthompsa return; 1202168561Sthompsa } 1203168561Sthompsa if ((nxt = req->chain) != NULL) { 1204168561Sthompsa req->chain = NULL; 1205168561Sthompsa mpt_free_request(mpt, nxt); /* NB: recursion */ 1206168561Sthompsa } 1207168561Sthompsa KASSERT(req->state != REQ_STATE_FREE, ("freeing free request")); 1208168561Sthompsa KASSERT(!(req->state & REQ_STATE_LOCKED), ("freeing locked request")); 1209168561Sthompsa MPT_LOCK_ASSERT(mpt); 1210168561Sthompsa KASSERT(mpt_req_on_free_list(mpt, req) == 0, 1211168561Sthompsa ("mpt_free_request: req %p:%u func %x already on freelist", 1212168561Sthompsa req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1213168561Sthompsa KASSERT(mpt_req_on_pending_list(mpt, req) == 0, 1214168561Sthompsa ("mpt_free_request: req %p:%u func %x on pending list", 1215168561Sthompsa req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1216168561Sthompsa#ifdef INVARIANTS 1217168561Sthompsa mpt_req_not_spcl(mpt, req, "mpt_free_request", __LINE__); 1218168561Sthompsa#endif 1219168561Sthompsa 1220168561Sthompsa req->ccb = NULL; 1221168561Sthompsa if (LIST_EMPTY(&mpt->ack_frames)) { 1222168561Sthompsa /* 1223168561Sthompsa * Insert free ones at the tail 1224168561Sthompsa */ 1225168561Sthompsa req->serno = 0; 1226168561Sthompsa req->state = REQ_STATE_FREE; 1227168561Sthompsa#ifdef INVARIANTS 1228168561Sthompsa memset(req->req_vbuf, 0xff, sizeof (MSG_REQUEST_HEADER)); 1229168561Sthompsa#endif 1230168561Sthompsa TAILQ_INSERT_TAIL(&mpt->request_free_list, req, links); 1231168561Sthompsa if (mpt->getreqwaiter != 0) { 1232168561Sthompsa mpt->getreqwaiter = 0; 1233168561Sthompsa wakeup(&mpt->request_free_list); 1234168561Sthompsa } 1235168561Sthompsa return; 1236168561Sthompsa } 1237168561Sthompsa 1238168561Sthompsa /* 1239168561Sthompsa * Process an ack frame deferred due to resource shortage. 1240168561Sthompsa */ 1241168561Sthompsa record = LIST_FIRST(&mpt->ack_frames); 1242168561Sthompsa LIST_REMOVE(record, links); 1243168561Sthompsa req->state = REQ_STATE_ALLOCATED; 1244168561Sthompsa mpt_assign_serno(mpt, req); 1245168561Sthompsa mpt_send_event_ack(mpt, req, &record->reply, record->context); 1246168561Sthompsa offset = (uint32_t)((uint8_t *)record - mpt->reply); 1247168561Sthompsa reply_baddr = offset + (mpt->reply_phys & 0xFFFFFFFF); 1248168561Sthompsa bus_dmamap_sync_range(mpt->reply_dmat, mpt->reply_dmap, offset, 1249168561Sthompsa MPT_REPLY_SIZE, BUS_DMASYNC_PREREAD); 1250168561Sthompsa mpt_free_reply(mpt, reply_baddr); 1251168561Sthompsa} 1252168561Sthompsa 1253168561Sthompsa/* Get a command buffer from the free queue */ 1254168561Sthompsarequest_t * 1255168561Sthompsampt_get_request(struct mpt_softc *mpt, int sleep_ok) 1256168561Sthompsa{ 1257168561Sthompsa request_t *req; 1258168561Sthompsa 1259168561Sthompsaretry: 1260168561Sthompsa MPT_LOCK_ASSERT(mpt); 1261168561Sthompsa req = TAILQ_FIRST(&mpt->request_free_list); 1262168561Sthompsa if (req != NULL) { 1263168561Sthompsa KASSERT(req == &mpt->request_pool[req->index], 1264168561Sthompsa ("mpt_get_request: corrupted request free list\n")); 1265168561Sthompsa KASSERT(req->state == REQ_STATE_FREE, 1266168561Sthompsa ("req %p:%u not free on free list %x index %d function %x", 1267168561Sthompsa req, req->serno, req->state, req->index, 1268168561Sthompsa ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1269168561Sthompsa TAILQ_REMOVE(&mpt->request_free_list, req, links); 1270168561Sthompsa req->state = REQ_STATE_ALLOCATED; 1271168561Sthompsa req->chain = NULL; 1272168561Sthompsa mpt_assign_serno(mpt, req); 1273168561Sthompsa } else if (sleep_ok != 0) { 1274168561Sthompsa mpt->getreqwaiter = 1; 1275168561Sthompsa mpt_sleep(mpt, &mpt->request_free_list, PUSER, "mptgreq", 0); 1276168561Sthompsa goto retry; 1277168561Sthompsa } 1278168561Sthompsa return (req); 1279168561Sthompsa} 1280168561Sthompsa 1281168561Sthompsa/* Pass the command to the IOC */ 1282168561Sthompsavoid 1283168561Sthompsampt_send_cmd(struct mpt_softc *mpt, request_t *req) 1284168561Sthompsa{ 1285168561Sthompsa 1286168561Sthompsa if (mpt->verbose > MPT_PRT_DEBUG2) { 1287168561Sthompsa mpt_dump_request(mpt, req); 1288168561Sthompsa } 1289168561Sthompsa bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 1290168561Sthompsa BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1291168561Sthompsa req->state |= REQ_STATE_QUEUED; 1292168561Sthompsa KASSERT(mpt_req_on_free_list(mpt, req) == 0, 1293168561Sthompsa ("req %p:%u func %x on freelist list in mpt_send_cmd", 1294168561Sthompsa req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1295168561Sthompsa KASSERT(mpt_req_on_pending_list(mpt, req) == 0, 1296168561Sthompsa ("req %p:%u func %x already on pending list in mpt_send_cmd", 1297168561Sthompsa req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1298168561Sthompsa TAILQ_INSERT_HEAD(&mpt->request_pending_list, req, links); 1299168561Sthompsa mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (uint32_t) req->req_pbuf); 1300168561Sthompsa} 1301168561Sthompsa 1302168561Sthompsa/* 1303168561Sthompsa * Wait for a request to complete. 1304168561Sthompsa * 1305168561Sthompsa * Inputs: 1306168561Sthompsa * mpt softc of controller executing request 1307168561Sthompsa * req request to wait for 1308168561Sthompsa * sleep_ok nonzero implies may sleep in this context 1309168561Sthompsa * time_ms timeout in ms. 0 implies no timeout. 1310168561Sthompsa * 1311168561Sthompsa * Return Values: 1312168561Sthompsa * 0 Request completed 1313168561Sthompsa * non-0 Timeout fired before request completion. 1314168561Sthompsa */ 1315168561Sthompsaint 1316168561Sthompsampt_wait_req(struct mpt_softc *mpt, request_t *req, 1317168561Sthompsa mpt_req_state_t state, mpt_req_state_t mask, 1318168561Sthompsa int sleep_ok, int time_ms) 1319168561Sthompsa{ 1320168561Sthompsa int error; 1321168561Sthompsa int timeout; 1322168561Sthompsa u_int saved_cnt; 1323168561Sthompsa 1324168561Sthompsa /* 1325168561Sthompsa * timeout is in ms. 0 indicates infinite wait. 1326168561Sthompsa * Convert to ticks or 500us units depending on 1327168561Sthompsa * our sleep mode. 1328168561Sthompsa */ 1329168561Sthompsa if (sleep_ok != 0) { 1330168561Sthompsa timeout = (time_ms * hz) / 1000; 1331168561Sthompsa } else { 1332168561Sthompsa timeout = time_ms * 2; 1333168561Sthompsa } 1334168561Sthompsa req->state |= REQ_STATE_NEED_WAKEUP; 1335168561Sthompsa mask &= ~REQ_STATE_NEED_WAKEUP; 1336168561Sthompsa saved_cnt = mpt->reset_cnt; 1337168561Sthompsa while ((req->state & mask) != state && mpt->reset_cnt == saved_cnt) { 1338168561Sthompsa if (sleep_ok != 0) { 1339168561Sthompsa error = mpt_sleep(mpt, req, PUSER, "mptreq", timeout); 1340168561Sthompsa if (error == EWOULDBLOCK) { 1341168561Sthompsa timeout = 0; 1342168561Sthompsa break; 1343168561Sthompsa } 1344168561Sthompsa } else { 1345168561Sthompsa if (time_ms != 0 && --timeout == 0) { 1346168561Sthompsa break; 1347168561Sthompsa } 1348168561Sthompsa DELAY(500); 1349168561Sthompsa mpt_intr(mpt); 1350168561Sthompsa } 1351168561Sthompsa } 1352168561Sthompsa req->state &= ~REQ_STATE_NEED_WAKEUP; 1353168561Sthompsa if (mpt->reset_cnt != saved_cnt) { 1354168561Sthompsa return (EIO); 1355168561Sthompsa } 1356168561Sthompsa if (time_ms && timeout <= 0) { 1357168561Sthompsa MSG_REQUEST_HEADER *msg_hdr = req->req_vbuf; 1358168561Sthompsa req->state |= REQ_STATE_TIMEDOUT; 1359168561Sthompsa mpt_prt(mpt, "mpt_wait_req(%x) timed out\n", msg_hdr->Function); 1360168561Sthompsa return (ETIMEDOUT); 1361168561Sthompsa } 1362168561Sthompsa return (0); 1363168561Sthompsa} 1364168561Sthompsa 1365168561Sthompsa/* 1366168561Sthompsa * Send a command to the IOC via the handshake register. 1367168561Sthompsa * 1368168561Sthompsa * Only done at initialization time and for certain unusual 1369168561Sthompsa * commands such as device/bus reset as specified by LSI. 1370168561Sthompsa */ 1371168561Sthompsaint 1372168561Sthompsampt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd) 1373168561Sthompsa{ 1374168561Sthompsa int i; 1375168561Sthompsa uint32_t data, *data32; 1376168561Sthompsa 1377168561Sthompsa /* Check condition of the IOC */ 1378168561Sthompsa data = mpt_rd_db(mpt); 1379168561Sthompsa if ((MPT_STATE(data) != MPT_DB_STATE_READY 1380168561Sthompsa && MPT_STATE(data) != MPT_DB_STATE_RUNNING 1381168561Sthompsa && MPT_STATE(data) != MPT_DB_STATE_FAULT) 1382168561Sthompsa || MPT_DB_IS_IN_USE(data)) { 1383168561Sthompsa mpt_prt(mpt, "handshake aborted - invalid doorbell state\n"); 1384168561Sthompsa mpt_print_db(data); 1385168561Sthompsa return (EBUSY); 1386168561Sthompsa } 1387168561Sthompsa 1388168561Sthompsa /* We move things in 32 bit chunks */ 1389168561Sthompsa len = (len + 3) >> 2; 1390168561Sthompsa data32 = cmd; 1391168561Sthompsa 1392168561Sthompsa /* Clear any left over pending doorbell interrupts */ 1393168561Sthompsa if (MPT_DB_INTR(mpt_rd_intr(mpt))) 1394168561Sthompsa mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1395168561Sthompsa 1396168561Sthompsa /* 1397168561Sthompsa * Tell the handshake reg. we are going to send a command 1398168561Sthompsa * and how long it is going to be. 1399168561Sthompsa */ 1400168561Sthompsa data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) | 1401168561Sthompsa (len << MPI_DOORBELL_ADD_DWORDS_SHIFT); 1402168561Sthompsa mpt_write(mpt, MPT_OFFSET_DOORBELL, data); 1403168561Sthompsa 1404168561Sthompsa /* Wait for the chip to notice */ 1405168561Sthompsa if (mpt_wait_db_int(mpt) != MPT_OK) { 1406168561Sthompsa mpt_prt(mpt, "mpt_send_handshake_cmd: db ignored\n"); 1407168561Sthompsa return (ETIMEDOUT); 1408168561Sthompsa } 1409168561Sthompsa 1410168561Sthompsa /* Clear the interrupt */ 1411168561Sthompsa mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1412168561Sthompsa 1413168561Sthompsa if (mpt_wait_db_ack(mpt) != MPT_OK) { 1414168561Sthompsa mpt_prt(mpt, "mpt_send_handshake_cmd: db ack timed out\n"); 1415168561Sthompsa return (ETIMEDOUT); 1416168561Sthompsa } 1417168561Sthompsa 1418168561Sthompsa /* Send the command */ 1419168561Sthompsa for (i = 0; i < len; i++) { 1420168561Sthompsa mpt_write(mpt, MPT_OFFSET_DOORBELL, htole32(*data32++)); 1421168561Sthompsa if (mpt_wait_db_ack(mpt) != MPT_OK) { 1422168561Sthompsa mpt_prt(mpt, 1423168561Sthompsa "mpt_send_handshake_cmd: timeout @ index %d\n", i); 1424168561Sthompsa return (ETIMEDOUT); 1425168561Sthompsa } 1426168561Sthompsa } 1427168561Sthompsa return MPT_OK; 1428168561Sthompsa} 1429168561Sthompsa 1430168561Sthompsa/* Get the response from the handshake register */ 1431168561Sthompsaint 1432168561Sthompsampt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply) 1433168561Sthompsa{ 1434168561Sthompsa int left, reply_left; 1435168561Sthompsa u_int16_t *data16; 1436168561Sthompsa uint32_t data; 1437168561Sthompsa MSG_DEFAULT_REPLY *hdr; 1438168561Sthompsa 1439168561Sthompsa /* We move things out in 16 bit chunks */ 1440168561Sthompsa reply_len >>= 1; 1441168561Sthompsa data16 = (u_int16_t *)reply; 1442168561Sthompsa 1443168561Sthompsa hdr = (MSG_DEFAULT_REPLY *)reply; 1444168561Sthompsa 1445168561Sthompsa /* Get first word */ 1446168561Sthompsa if (mpt_wait_db_int(mpt) != MPT_OK) { 1447168561Sthompsa mpt_prt(mpt, "mpt_recv_handshake_cmd timeout1\n"); 1448168561Sthompsa return ETIMEDOUT; 1449168561Sthompsa } 1450168561Sthompsa data = mpt_read(mpt, MPT_OFFSET_DOORBELL); 1451168561Sthompsa *data16++ = le16toh(data & MPT_DB_DATA_MASK); 1452168561Sthompsa mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1453168561Sthompsa 1454168561Sthompsa /* Get Second Word */ 1455168561Sthompsa if (mpt_wait_db_int(mpt) != MPT_OK) { 1456168561Sthompsa mpt_prt(mpt, "mpt_recv_handshake_cmd timeout2\n"); 1457168561Sthompsa return ETIMEDOUT; 1458168561Sthompsa } 1459168561Sthompsa data = mpt_read(mpt, MPT_OFFSET_DOORBELL); 1460168561Sthompsa *data16++ = le16toh(data & MPT_DB_DATA_MASK); 1461168561Sthompsa mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1462168561Sthompsa 1463168561Sthompsa /* 1464168561Sthompsa * With the second word, we can now look at the length. 1465168561Sthompsa * Warn about a reply that's too short (except for IOC FACTS REPLY) 1466168561Sthompsa */ 1467168561Sthompsa if ((reply_len >> 1) != hdr->MsgLength && 1468168561Sthompsa (hdr->Function != MPI_FUNCTION_IOC_FACTS)){ 1469168561Sthompsa#if __FreeBSD_version >= 500000 1470168561Sthompsa mpt_prt(mpt, "reply length does not match message length: " 1471168561Sthompsa "got %x; expected %zx for function %x\n", 1472168561Sthompsa hdr->MsgLength << 2, reply_len << 1, hdr->Function); 1473168561Sthompsa#else 1474168561Sthompsa mpt_prt(mpt, "reply length does not match message length: " 1475168561Sthompsa "got %x; expected %x for function %x\n", 1476168561Sthompsa hdr->MsgLength << 2, reply_len << 1, hdr->Function); 1477168561Sthompsa#endif 1478168561Sthompsa } 1479168561Sthompsa 1480168561Sthompsa /* Get rest of the reply; but don't overflow the provided buffer */ 1481168561Sthompsa left = (hdr->MsgLength << 1) - 2; 1482168561Sthompsa reply_left = reply_len - 2; 1483168561Sthompsa while (left--) { 1484168561Sthompsa u_int16_t datum; 1485168561Sthompsa 1486168561Sthompsa if (mpt_wait_db_int(mpt) != MPT_OK) { 1487168561Sthompsa mpt_prt(mpt, "mpt_recv_handshake_cmd timeout3\n"); 1488168561Sthompsa return ETIMEDOUT; 1489168561Sthompsa } 1490168561Sthompsa data = mpt_read(mpt, MPT_OFFSET_DOORBELL); 1491168561Sthompsa datum = le16toh(data & MPT_DB_DATA_MASK); 1492168561Sthompsa 1493168561Sthompsa if (reply_left-- > 0) 1494168561Sthompsa *data16++ = datum; 1495168561Sthompsa 1496168561Sthompsa mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1497168561Sthompsa } 1498168561Sthompsa 1499168561Sthompsa /* One more wait & clear at the end */ 1500168561Sthompsa if (mpt_wait_db_int(mpt) != MPT_OK) { 1501168561Sthompsa mpt_prt(mpt, "mpt_recv_handshake_cmd timeout4\n"); 1502168561Sthompsa return ETIMEDOUT; 1503168561Sthompsa } 1504168561Sthompsa mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1505168561Sthompsa 1506168561Sthompsa if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1507168561Sthompsa if (mpt->verbose >= MPT_PRT_TRACE) 1508168561Sthompsa mpt_print_reply(hdr); 1509168561Sthompsa return (MPT_FAIL | hdr->IOCStatus); 1510168561Sthompsa } 1511168561Sthompsa 1512168561Sthompsa return (0); 1513168561Sthompsa} 1514168561Sthompsa 1515168561Sthompsastatic int 1516168561Sthompsampt_get_iocfacts(struct mpt_softc *mpt, MSG_IOC_FACTS_REPLY *freplp) 1517168561Sthompsa{ 1518168561Sthompsa MSG_IOC_FACTS f_req; 1519168561Sthompsa int error; 1520168561Sthompsa 1521168561Sthompsa memset(&f_req, 0, sizeof f_req); 1522168561Sthompsa f_req.Function = MPI_FUNCTION_IOC_FACTS; 1523168561Sthompsa f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1524168561Sthompsa error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 1525168561Sthompsa if (error) { 1526168561Sthompsa return(error); 1527168561Sthompsa } 1528168561Sthompsa error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 1529168561Sthompsa return (error); 1530168561Sthompsa} 1531168561Sthompsa 1532168561Sthompsastatic int 1533168561Sthompsampt_get_portfacts(struct mpt_softc *mpt, U8 port, MSG_PORT_FACTS_REPLY *freplp) 1534168561Sthompsa{ 1535168561Sthompsa MSG_PORT_FACTS f_req; 1536168561Sthompsa int error; 1537168561Sthompsa 1538168561Sthompsa memset(&f_req, 0, sizeof f_req); 1539168561Sthompsa f_req.Function = MPI_FUNCTION_PORT_FACTS; 1540168561Sthompsa f_req.PortNumber = port; 1541168561Sthompsa f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1542168561Sthompsa error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 1543168561Sthompsa if (error) { 1544168561Sthompsa return(error); 1545168561Sthompsa } 1546168561Sthompsa error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 1547168561Sthompsa return (error); 1548168561Sthompsa} 1549168561Sthompsa 1550168561Sthompsa/* 1551168561Sthompsa * Send the initialization request. This is where we specify how many 1552168561Sthompsa * SCSI busses and how many devices per bus we wish to emulate. 1553168561Sthompsa * This is also the command that specifies the max size of the reply 1554168561Sthompsa * frames from the IOC that we will be allocating. 1555168561Sthompsa */ 1556168561Sthompsastatic int 1557168561Sthompsampt_send_ioc_init(struct mpt_softc *mpt, uint32_t who) 1558168561Sthompsa{ 1559168561Sthompsa int error = 0; 1560168561Sthompsa MSG_IOC_INIT init; 1561168561Sthompsa MSG_IOC_INIT_REPLY reply; 1562168561Sthompsa 1563168561Sthompsa memset(&init, 0, sizeof init); 1564168561Sthompsa init.WhoInit = who; 1565168561Sthompsa init.Function = MPI_FUNCTION_IOC_INIT; 1566168561Sthompsa init.MaxDevices = 0; /* at least 256 devices per bus */ 1567168561Sthompsa init.MaxBuses = 16; /* at least 16 busses */ 1568168561Sthompsa 1569168561Sthompsa init.MsgVersion = htole16(MPI_VERSION); 1570168561Sthompsa init.HeaderVersion = htole16(MPI_HEADER_VERSION); 1571168561Sthompsa init.ReplyFrameSize = htole16(MPT_REPLY_SIZE); 1572168561Sthompsa init.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1573168561Sthompsa 1574168561Sthompsa if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) { 1575168561Sthompsa return(error); 1576168561Sthompsa } 1577168561Sthompsa 1578168561Sthompsa error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply); 1579168561Sthompsa return (error); 1580168561Sthompsa} 1581168561Sthompsa 1582168561Sthompsa 1583168561Sthompsa/* 1584168561Sthompsa * Utiltity routine to read configuration headers and pages 1585168561Sthompsa */ 1586168561Sthompsaint 1587168561Sthompsampt_issue_cfg_req(struct mpt_softc *mpt, request_t *req, cfgparms_t *params, 1588168561Sthompsa bus_addr_t addr, bus_size_t len, int sleep_ok, int timeout_ms) 1589168561Sthompsa{ 1590168561Sthompsa MSG_CONFIG *cfgp; 1591168561Sthompsa SGE_SIMPLE32 *se; 1592168561Sthompsa 1593168561Sthompsa cfgp = req->req_vbuf; 1594168561Sthompsa memset(cfgp, 0, sizeof *cfgp); 1595168561Sthompsa cfgp->Action = params->Action; 1596168561Sthompsa cfgp->Function = MPI_FUNCTION_CONFIG; 1597168561Sthompsa cfgp->Header.PageVersion = params->PageVersion; 1598168561Sthompsa cfgp->Header.PageNumber = params->PageNumber; 1599168561Sthompsa cfgp->PageAddress = htole32(params->PageAddress); 1600168561Sthompsa if ((params->PageType & MPI_CONFIG_PAGETYPE_MASK) == 1601168561Sthompsa MPI_CONFIG_PAGETYPE_EXTENDED) { 1602168561Sthompsa cfgp->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED; 1603168561Sthompsa cfgp->Header.PageLength = 0; 1604168561Sthompsa cfgp->ExtPageLength = htole16(params->ExtPageLength); 1605168561Sthompsa cfgp->ExtPageType = params->ExtPageType; 1606168561Sthompsa } else { 1607168561Sthompsa cfgp->Header.PageType = params->PageType; 1608168561Sthompsa cfgp->Header.PageLength = params->PageLength; 1609168561Sthompsa } 1610168561Sthompsa se = (SGE_SIMPLE32 *)&cfgp->PageBufferSGE; 1611168561Sthompsa se->Address = htole32(addr); 1612168561Sthompsa MPI_pSGE_SET_LENGTH(se, len); 1613168561Sthompsa MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT | 1614168561Sthompsa MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER | 1615168561Sthompsa MPI_SGE_FLAGS_END_OF_LIST | 1616168561Sthompsa ((params->Action == MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT 1617168561Sthompsa || params->Action == MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM) 1618168561Sthompsa ? MPI_SGE_FLAGS_HOST_TO_IOC : MPI_SGE_FLAGS_IOC_TO_HOST))); 1619168561Sthompsa se->FlagsLength = htole32(se->FlagsLength); 1620168561Sthompsa cfgp->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 1621168561Sthompsa 1622168561Sthompsa mpt_check_doorbell(mpt); 1623168561Sthompsa mpt_send_cmd(mpt, req); 1624168561Sthompsa return (mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1625168561Sthompsa sleep_ok, timeout_ms)); 1626168561Sthompsa} 1627168561Sthompsa 1628168561Sthompsaint 1629168561Sthompsampt_read_extcfg_header(struct mpt_softc *mpt, int PageVersion, int PageNumber, 1630168561Sthompsa uint32_t PageAddress, int ExtPageType, 1631168561Sthompsa CONFIG_EXTENDED_PAGE_HEADER *rslt, 1632168561Sthompsa int sleep_ok, int timeout_ms) 1633168561Sthompsa{ 1634168561Sthompsa request_t *req; 1635168561Sthompsa cfgparms_t params; 1636168561Sthompsa MSG_CONFIG_REPLY *cfgp; 1637168561Sthompsa int error; 1638168561Sthompsa 1639168561Sthompsa req = mpt_get_request(mpt, sleep_ok); 1640168561Sthompsa if (req == NULL) { 1641168561Sthompsa mpt_prt(mpt, "mpt_extread_cfg_header: Get request failed!\n"); 1642168561Sthompsa return (ENOMEM); 1643168561Sthompsa } 1644168561Sthompsa 1645168561Sthompsa params.Action = MPI_CONFIG_ACTION_PAGE_HEADER; 1646168561Sthompsa params.PageVersion = PageVersion; 1647168561Sthompsa params.PageLength = 0; 1648168561Sthompsa params.PageNumber = PageNumber; 1649168561Sthompsa params.PageType = MPI_CONFIG_PAGETYPE_EXTENDED; 1650168561Sthompsa params.PageAddress = PageAddress; 1651168561Sthompsa params.ExtPageType = ExtPageType; 1652168561Sthompsa params.ExtPageLength = 0; 1653168561Sthompsa error = mpt_issue_cfg_req(mpt, req, ¶ms, /*addr*/0, /*len*/0, 1654168561Sthompsa sleep_ok, timeout_ms); 1655168561Sthompsa if (error != 0) { 1656168561Sthompsa /* 1657168561Sthompsa * Leave the request. Without resetting the chip, it's 1658168561Sthompsa * still owned by it and we'll just get into trouble 1659168561Sthompsa * freeing it now. Mark it as abandoned so that if it 1660168561Sthompsa * shows up later it can be freed. 1661168561Sthompsa */ 1662168561Sthompsa mpt_prt(mpt, "read_extcfg_header timed out\n"); 1663168793Sthompsa return (ETIMEDOUT); 1664168561Sthompsa } 1665168793Sthompsa 1666169739Sthompsa switch (req->IOCStatus & MPI_IOCSTATUS_MASK) { 1667169739Sthompsa case MPI_IOCSTATUS_SUCCESS: 1668168561Sthompsa cfgp = req->req_vbuf; 1669168561Sthompsa rslt->PageVersion = cfgp->Header.PageVersion; 1670169739Sthompsa rslt->PageNumber = cfgp->Header.PageNumber; 1671168561Sthompsa rslt->PageType = cfgp->Header.PageType; 1672170599Sthompsa rslt->ExtPageLength = le16toh(cfgp->ExtPageLength); 1673168561Sthompsa rslt->ExtPageType = cfgp->ExtPageType; 1674168561Sthompsa error = 0; 1675168561Sthompsa break; 1676168561Sthompsa case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: 1677168561Sthompsa mpt_lprt(mpt, MPT_PRT_DEBUG, 1678168561Sthompsa "Invalid Page Type %d Number %d Addr 0x%0x\n", 1679168561Sthompsa MPI_CONFIG_PAGETYPE_EXTENDED, PageNumber, PageAddress); 1680168561Sthompsa error = EINVAL; 1681168561Sthompsa break; 1682168561Sthompsa default: 1683168561Sthompsa mpt_prt(mpt, "mpt_read_extcfg_header: Config Info Status %x\n", 1684168561Sthompsa req->IOCStatus); 1685168561Sthompsa error = EIO; 1686168561Sthompsa break; 1687168561Sthompsa } 1688168561Sthompsa mpt_free_request(mpt, req); 1689168561Sthompsa return (error); 1690168561Sthompsa} 1691168561Sthompsa 1692168561Sthompsaint 1693168561Sthompsampt_read_extcfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1694168561Sthompsa CONFIG_EXTENDED_PAGE_HEADER *hdr, void *buf, size_t len, 1695168561Sthompsa int sleep_ok, int timeout_ms) 1696168561Sthompsa{ 1697168561Sthompsa request_t *req; 1698168561Sthompsa cfgparms_t params; 1699168561Sthompsa int error; 1700168561Sthompsa 1701168561Sthompsa req = mpt_get_request(mpt, sleep_ok); 1702168561Sthompsa if (req == NULL) { 1703168561Sthompsa mpt_prt(mpt, "mpt_read_extcfg_page: Get request failed!\n"); 1704168561Sthompsa return (-1); 1705168561Sthompsa } 1706168561Sthompsa 1707168561Sthompsa params.Action = Action; 1708168561Sthompsa params.PageVersion = hdr->PageVersion; 1709168561Sthompsa params.PageLength = 0; 1710168793Sthompsa params.PageNumber = hdr->PageNumber; 1711168793Sthompsa params.PageType = MPI_CONFIG_PAGETYPE_EXTENDED; 1712168561Sthompsa params.PageAddress = PageAddress; 1713168561Sthompsa params.ExtPageType = hdr->ExtPageType; 1714168561Sthompsa params.ExtPageLength = hdr->ExtPageLength; 1715168561Sthompsa error = mpt_issue_cfg_req(mpt, req, ¶ms, 1716168561Sthompsa req->req_pbuf + MPT_RQSL(mpt), 1717168561Sthompsa len, sleep_ok, timeout_ms); 1718168561Sthompsa if (error != 0) { 1719169739Sthompsa mpt_prt(mpt, "read_extcfg_page(%d) timed out\n", Action); 1720169739Sthompsa return (-1); 1721169739Sthompsa } 1722169739Sthompsa 1723169739Sthompsa if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1724169739Sthompsa mpt_prt(mpt, "mpt_read_extcfg_page: Config Info Status %x\n", 1725169739Sthompsa req->IOCStatus); 1726169739Sthompsa mpt_free_request(mpt, req); 1727169739Sthompsa return (-1); 1728169739Sthompsa } 1729169739Sthompsa memcpy(buf, ((uint8_t *)req->req_vbuf)+MPT_RQSL(mpt), len); 1730169739Sthompsa mpt_free_request(mpt, req); 1731169739Sthompsa return (0); 1732169739Sthompsa} 1733169739Sthompsa 1734169739Sthompsaint 1735169739Sthompsampt_read_cfg_header(struct mpt_softc *mpt, int PageType, int PageNumber, 1736169739Sthompsa uint32_t PageAddress, CONFIG_PAGE_HEADER *rslt, 1737169739Sthompsa int sleep_ok, int timeout_ms) 1738169739Sthompsa{ 1739169739Sthompsa request_t *req; 1740169739Sthompsa cfgparms_t params; 1741169739Sthompsa MSG_CONFIG *cfgp; 1742169739Sthompsa int error; 1743169739Sthompsa 1744169739Sthompsa req = mpt_get_request(mpt, sleep_ok); 1745169739Sthompsa if (req == NULL) { 1746169739Sthompsa mpt_prt(mpt, "mpt_read_cfg_header: Get request failed!\n"); 1747169739Sthompsa return (ENOMEM); 1748169739Sthompsa } 1749168561Sthompsa 1750168561Sthompsa params.Action = MPI_CONFIG_ACTION_PAGE_HEADER; 1751168561Sthompsa params.PageVersion = 0; 1752168561Sthompsa params.PageLength = 0; 1753168561Sthompsa params.PageNumber = PageNumber; 1754168561Sthompsa params.PageType = PageType; 1755168561Sthompsa params.PageAddress = PageAddress; 1756169739Sthompsa error = mpt_issue_cfg_req(mpt, req, ¶ms, /*addr*/0, /*len*/0, 1757168561Sthompsa sleep_ok, timeout_ms); 1758168561Sthompsa if (error != 0) { 1759168561Sthompsa /* 1760168561Sthompsa * Leave the request. Without resetting the chip, it's 1761168561Sthompsa * still owned by it and we'll just get into trouble 1762168561Sthompsa * freeing it now. Mark it as abandoned so that if it 1763168561Sthompsa * shows up later it can be freed. 1764168561Sthompsa */ 1765168561Sthompsa mpt_prt(mpt, "read_cfg_header timed out\n"); 1766168561Sthompsa return (ETIMEDOUT); 1767168561Sthompsa } 1768168561Sthompsa 1769168561Sthompsa switch (req->IOCStatus & MPI_IOCSTATUS_MASK) { 1770168561Sthompsa case MPI_IOCSTATUS_SUCCESS: 1771168561Sthompsa cfgp = req->req_vbuf; 1772168561Sthompsa bcopy(&cfgp->Header, rslt, sizeof(*rslt)); 1773168561Sthompsa error = 0; 1774168561Sthompsa break; 1775168561Sthompsa case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: 1776168561Sthompsa mpt_lprt(mpt, MPT_PRT_DEBUG, 1777168561Sthompsa "Invalid Page Type %d Number %d Addr 0x%0x\n", 1778168561Sthompsa PageType, PageNumber, PageAddress); 1779168561Sthompsa error = EINVAL; 1780168561Sthompsa break; 1781168561Sthompsa default: 1782168561Sthompsa mpt_prt(mpt, "mpt_read_cfg_header: Config Info Status %x\n", 1783168561Sthompsa req->IOCStatus); 1784168561Sthompsa error = EIO; 1785168561Sthompsa break; 1786168561Sthompsa } 1787168561Sthompsa mpt_free_request(mpt, req); 1788168561Sthompsa return (error); 1789168561Sthompsa} 1790168561Sthompsa 1791168561Sthompsaint 1792168561Sthompsampt_read_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1793168561Sthompsa CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1794168561Sthompsa int timeout_ms) 1795168561Sthompsa{ 1796168561Sthompsa request_t *req; 1797168561Sthompsa cfgparms_t params; 1798168561Sthompsa int error; 1799168561Sthompsa 1800168561Sthompsa req = mpt_get_request(mpt, sleep_ok); 1801168561Sthompsa if (req == NULL) { 1802168561Sthompsa mpt_prt(mpt, "mpt_read_cfg_page: Get request failed!\n"); 1803168561Sthompsa return (-1); 1804168561Sthompsa } 1805168561Sthompsa 1806168561Sthompsa params.Action = Action; 1807168561Sthompsa params.PageVersion = hdr->PageVersion; 1808168561Sthompsa params.PageLength = hdr->PageLength; 1809168561Sthompsa params.PageNumber = hdr->PageNumber; 1810168561Sthompsa params.PageType = hdr->PageType & MPI_CONFIG_PAGETYPE_MASK; 1811168561Sthompsa params.PageAddress = PageAddress; 1812168561Sthompsa error = mpt_issue_cfg_req(mpt, req, ¶ms, 1813168561Sthompsa req->req_pbuf + MPT_RQSL(mpt), 1814168561Sthompsa len, sleep_ok, timeout_ms); 1815168561Sthompsa if (error != 0) { 1816168561Sthompsa mpt_prt(mpt, "read_cfg_page(%d) timed out\n", Action); 1817168561Sthompsa return (-1); 1818168561Sthompsa } 1819168561Sthompsa 1820168561Sthompsa if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1821168561Sthompsa mpt_prt(mpt, "mpt_read_cfg_page: Config Info Status %x\n", 1822168561Sthompsa req->IOCStatus); 1823168561Sthompsa mpt_free_request(mpt, req); 1824168561Sthompsa return (-1); 1825168561Sthompsa } 1826168561Sthompsa memcpy(hdr, ((uint8_t *)req->req_vbuf)+MPT_RQSL(mpt), len); 1827168561Sthompsa mpt_free_request(mpt, req); 1828168561Sthompsa return (0); 1829168561Sthompsa} 1830168561Sthompsa 1831168561Sthompsaint 1832168561Sthompsampt_write_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1833168561Sthompsa CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1834168561Sthompsa int timeout_ms) 1835168561Sthompsa{ 1836168561Sthompsa request_t *req; 1837168561Sthompsa cfgparms_t params; 1838168561Sthompsa u_int hdr_attr; 1839168561Sthompsa int error; 1840168561Sthompsa 1841168561Sthompsa hdr_attr = hdr->PageType & MPI_CONFIG_PAGEATTR_MASK; 1842168561Sthompsa if (hdr_attr != MPI_CONFIG_PAGEATTR_CHANGEABLE && 1843168561Sthompsa hdr_attr != MPI_CONFIG_PAGEATTR_PERSISTENT) { 1844168561Sthompsa mpt_prt(mpt, "page type 0x%x not changeable\n", 1845168561Sthompsa hdr->PageType & MPI_CONFIG_PAGETYPE_MASK); 1846168561Sthompsa return (-1); 1847168561Sthompsa } 1848168561Sthompsa 1849168561Sthompsa#if 0 1850168561Sthompsa /* 1851168561Sthompsa * We shouldn't mask off other bits here. 1852168561Sthompsa */ 1853168561Sthompsa hdr->PageType &= MPI_CONFIG_PAGETYPE_MASK; 1854168561Sthompsa#endif 1855168561Sthompsa 1856168561Sthompsa req = mpt_get_request(mpt, sleep_ok); 1857168561Sthompsa if (req == NULL) 1858168561Sthompsa return (-1); 1859168561Sthompsa 1860168561Sthompsa memcpy(((caddr_t)req->req_vbuf) + MPT_RQSL(mpt), hdr, len); 1861168561Sthompsa 1862168561Sthompsa /* 1863168561Sthompsa * There isn't any point in restoring stripped out attributes 1864168561Sthompsa * if you then mask them going down to issue the request. 1865168561Sthompsa */ 1866168561Sthompsa 1867168561Sthompsa params.Action = Action; 1868168561Sthompsa params.PageVersion = hdr->PageVersion; 1869168561Sthompsa params.PageLength = hdr->PageLength; 1870168561Sthompsa params.PageNumber = hdr->PageNumber; 1871168561Sthompsa params.PageAddress = PageAddress; 1872168561Sthompsa#if 0 1873168561Sthompsa /* Restore stripped out attributes */ 1874168561Sthompsa hdr->PageType |= hdr_attr; 1875168561Sthompsa params.PageType = hdr->PageType & MPI_CONFIG_PAGETYPE_MASK; 1876168561Sthompsa#else 1877168561Sthompsa params.PageType = hdr->PageType; 1878168561Sthompsa#endif 1879168561Sthompsa error = mpt_issue_cfg_req(mpt, req, ¶ms, 1880168561Sthompsa req->req_pbuf + MPT_RQSL(mpt), 1881168561Sthompsa len, sleep_ok, timeout_ms); 1882168561Sthompsa if (error != 0) { 1883168561Sthompsa mpt_prt(mpt, "mpt_write_cfg_page timed out\n"); 1884168561Sthompsa return (-1); 1885168561Sthompsa } 1886168561Sthompsa 1887168561Sthompsa if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1888168561Sthompsa mpt_prt(mpt, "mpt_write_cfg_page: Config Info Status %x\n", 1889168561Sthompsa req->IOCStatus); 1890168561Sthompsa mpt_free_request(mpt, req); 1891168561Sthompsa return (-1); 1892168561Sthompsa } 1893168561Sthompsa mpt_free_request(mpt, req); 1894168561Sthompsa return (0); 1895168561Sthompsa} 1896168561Sthompsa 1897168561Sthompsa/* 1898168561Sthompsa * Read IOC configuration information 1899168561Sthompsa */ 1900168561Sthompsastatic int 1901168561Sthompsampt_read_config_info_ioc(struct mpt_softc *mpt) 1902168561Sthompsa{ 1903168561Sthompsa CONFIG_PAGE_HEADER hdr; 1904168561Sthompsa struct mpt_raid_volume *mpt_raid; 1905168561Sthompsa int rv; 1906168561Sthompsa int i; 1907168561Sthompsa size_t len; 1908168561Sthompsa 1909168561Sthompsa rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1910168561Sthompsa 2, 0, &hdr, FALSE, 5000); 1911168561Sthompsa /* 1912168561Sthompsa * If it's an invalid page, so what? Not a supported function.... 1913168561Sthompsa */ 1914168561Sthompsa if (rv == EINVAL) { 1915 return (0); 1916 } 1917 if (rv) { 1918 return (rv); 1919 } 1920 1921 mpt_lprt(mpt, MPT_PRT_DEBUG, 1922 "IOC Page 2 Header: Version %x len %x PageNumber %x PageType %x\n", 1923 hdr.PageVersion, hdr.PageLength << 2, 1924 hdr.PageNumber, hdr.PageType); 1925 1926 len = hdr.PageLength * sizeof(uint32_t); 1927 mpt->ioc_page2 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1928 if (mpt->ioc_page2 == NULL) { 1929 mpt_prt(mpt, "unable to allocate memory for IOC page 2\n"); 1930 mpt_raid_free_mem(mpt); 1931 return (ENOMEM); 1932 } 1933 memcpy(&mpt->ioc_page2->Header, &hdr, sizeof(hdr)); 1934 rv = mpt_read_cur_cfg_page(mpt, 0, 1935 &mpt->ioc_page2->Header, len, FALSE, 5000); 1936 if (rv) { 1937 mpt_prt(mpt, "failed to read IOC Page 2\n"); 1938 mpt_raid_free_mem(mpt); 1939 return (EIO); 1940 } 1941 mpt2host_config_page_ioc2(mpt->ioc_page2); 1942 1943 if (mpt->ioc_page2->CapabilitiesFlags != 0) { 1944 uint32_t mask; 1945 1946 mpt_prt(mpt, "Capabilities: ("); 1947 for (mask = 1; mask != 0; mask <<= 1) { 1948 if ((mpt->ioc_page2->CapabilitiesFlags & mask) == 0) { 1949 continue; 1950 } 1951 switch (mask) { 1952 case MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT: 1953 mpt_prtc(mpt, " RAID-0"); 1954 break; 1955 case MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT: 1956 mpt_prtc(mpt, " RAID-1E"); 1957 break; 1958 case MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT: 1959 mpt_prtc(mpt, " RAID-1"); 1960 break; 1961 case MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT: 1962 mpt_prtc(mpt, " SES"); 1963 break; 1964 case MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT: 1965 mpt_prtc(mpt, " SAFTE"); 1966 break; 1967 case MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT: 1968 mpt_prtc(mpt, " Multi-Channel-Arrays"); 1969 default: 1970 break; 1971 } 1972 } 1973 mpt_prtc(mpt, " )\n"); 1974 if ((mpt->ioc_page2->CapabilitiesFlags 1975 & (MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT 1976 | MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT 1977 | MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT)) != 0) { 1978 mpt_prt(mpt, "%d Active Volume%s(%d Max)\n", 1979 mpt->ioc_page2->NumActiveVolumes, 1980 mpt->ioc_page2->NumActiveVolumes != 1 1981 ? "s " : " ", 1982 mpt->ioc_page2->MaxVolumes); 1983 mpt_prt(mpt, "%d Hidden Drive Member%s(%d Max)\n", 1984 mpt->ioc_page2->NumActivePhysDisks, 1985 mpt->ioc_page2->NumActivePhysDisks != 1 1986 ? "s " : " ", 1987 mpt->ioc_page2->MaxPhysDisks); 1988 } 1989 } 1990 1991 len = mpt->ioc_page2->MaxVolumes * sizeof(struct mpt_raid_volume); 1992 mpt->raid_volumes = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1993 if (mpt->raid_volumes == NULL) { 1994 mpt_prt(mpt, "Could not allocate RAID volume data\n"); 1995 mpt_raid_free_mem(mpt); 1996 return (ENOMEM); 1997 } 1998 1999 /* 2000 * Copy critical data out of ioc_page2 so that we can 2001 * safely refresh the page without windows of unreliable 2002 * data. 2003 */ 2004 mpt->raid_max_volumes = mpt->ioc_page2->MaxVolumes; 2005 2006 len = sizeof(*mpt->raid_volumes->config_page) + 2007 (sizeof (RAID_VOL0_PHYS_DISK) * (mpt->ioc_page2->MaxPhysDisks - 1)); 2008 for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) { 2009 mpt_raid = &mpt->raid_volumes[i]; 2010 mpt_raid->config_page = 2011 malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 2012 if (mpt_raid->config_page == NULL) { 2013 mpt_prt(mpt, "Could not allocate RAID page data\n"); 2014 mpt_raid_free_mem(mpt); 2015 return (ENOMEM); 2016 } 2017 } 2018 mpt->raid_page0_len = len; 2019 2020 len = mpt->ioc_page2->MaxPhysDisks * sizeof(struct mpt_raid_disk); 2021 mpt->raid_disks = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 2022 if (mpt->raid_disks == NULL) { 2023 mpt_prt(mpt, "Could not allocate RAID disk data\n"); 2024 mpt_raid_free_mem(mpt); 2025 return (ENOMEM); 2026 } 2027 mpt->raid_max_disks = mpt->ioc_page2->MaxPhysDisks; 2028 2029 /* 2030 * Load page 3. 2031 */ 2032 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 2033 3, 0, &hdr, FALSE, 5000); 2034 if (rv) { 2035 mpt_raid_free_mem(mpt); 2036 return (EIO); 2037 } 2038 2039 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 3 Header: %x %x %x %x\n", 2040 hdr.PageVersion, hdr.PageLength, hdr.PageNumber, hdr.PageType); 2041 2042 len = hdr.PageLength * sizeof(uint32_t); 2043 mpt->ioc_page3 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 2044 if (mpt->ioc_page3 == NULL) { 2045 mpt_prt(mpt, "unable to allocate memory for IOC page 3\n"); 2046 mpt_raid_free_mem(mpt); 2047 return (ENOMEM); 2048 } 2049 memcpy(&mpt->ioc_page3->Header, &hdr, sizeof(hdr)); 2050 rv = mpt_read_cur_cfg_page(mpt, 0, 2051 &mpt->ioc_page3->Header, len, FALSE, 5000); 2052 if (rv) { 2053 mpt_raid_free_mem(mpt); 2054 return (EIO); 2055 } 2056 mpt2host_config_page_ioc3(mpt->ioc_page3); 2057 mpt_raid_wakeup(mpt); 2058 return (0); 2059} 2060 2061/* 2062 * Enable IOC port 2063 */ 2064static int 2065mpt_send_port_enable(struct mpt_softc *mpt, int port) 2066{ 2067 request_t *req; 2068 MSG_PORT_ENABLE *enable_req; 2069 int error; 2070 2071 req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 2072 if (req == NULL) 2073 return (-1); 2074 2075 enable_req = req->req_vbuf; 2076 memset(enable_req, 0, MPT_RQSL(mpt)); 2077 2078 enable_req->Function = MPI_FUNCTION_PORT_ENABLE; 2079 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 2080 enable_req->PortNumber = port; 2081 2082 mpt_check_doorbell(mpt); 2083 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling port %d\n", port); 2084 2085 mpt_send_cmd(mpt, req); 2086 error = mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 2087 FALSE, (mpt->is_sas || mpt->is_fc)? 300000 : 30000); 2088 if (error != 0) { 2089 mpt_prt(mpt, "port %d enable timed out\n", port); 2090 return (-1); 2091 } 2092 mpt_free_request(mpt, req); 2093 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabled port %d\n", port); 2094 return (0); 2095} 2096 2097/* 2098 * Enable/Disable asynchronous event reporting. 2099 */ 2100static int 2101mpt_send_event_request(struct mpt_softc *mpt, int onoff) 2102{ 2103 request_t *req; 2104 MSG_EVENT_NOTIFY *enable_req; 2105 2106 req = mpt_get_request(mpt, FALSE); 2107 if (req == NULL) { 2108 return (ENOMEM); 2109 } 2110 enable_req = req->req_vbuf; 2111 memset(enable_req, 0, sizeof *enable_req); 2112 2113 enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION; 2114 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_EVENTS); 2115 enable_req->Switch = onoff; 2116 2117 mpt_check_doorbell(mpt); 2118 mpt_lprt(mpt, MPT_PRT_DEBUG, "%sabling async events\n", 2119 onoff ? "en" : "dis"); 2120 /* 2121 * Send the command off, but don't wait for it. 2122 */ 2123 mpt_send_cmd(mpt, req); 2124 return (0); 2125} 2126 2127/* 2128 * Un-mask the interrupts on the chip. 2129 */ 2130void 2131mpt_enable_ints(struct mpt_softc *mpt) 2132{ 2133 2134 /* Unmask every thing except door bell int */ 2135 mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK); 2136} 2137 2138/* 2139 * Mask the interrupts on the chip. 2140 */ 2141void 2142mpt_disable_ints(struct mpt_softc *mpt) 2143{ 2144 2145 /* Mask all interrupts */ 2146 mpt_write(mpt, MPT_OFFSET_INTR_MASK, 2147 MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK); 2148} 2149 2150static void 2151mpt_sysctl_attach(struct mpt_softc *mpt) 2152{ 2153#if __FreeBSD_version >= 500000 2154 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(mpt->dev); 2155 struct sysctl_oid *tree = device_get_sysctl_tree(mpt->dev); 2156 2157 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 2158 "debug", CTLFLAG_RW, &mpt->verbose, 0, 2159 "Debugging/Verbose level"); 2160 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 2161 "role", CTLFLAG_RD, &mpt->role, 0, 2162 "HBA role"); 2163#ifdef MPT_TEST_MULTIPATH 2164 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 2165 "failure_id", CTLFLAG_RW, &mpt->failure_id, -1, 2166 "Next Target to Fail"); 2167#endif 2168#endif 2169} 2170 2171int 2172mpt_attach(struct mpt_softc *mpt) 2173{ 2174 struct mpt_personality *pers; 2175 int i; 2176 int error; 2177 2178 mpt_core_attach(mpt); 2179 mpt_core_enable(mpt); 2180 2181 TAILQ_INSERT_TAIL(&mpt_tailq, mpt, links); 2182 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 2183 pers = mpt_personalities[i]; 2184 if (pers == NULL) { 2185 continue; 2186 } 2187 if (pers->probe(mpt) == 0) { 2188 error = pers->attach(mpt); 2189 if (error != 0) { 2190 mpt_detach(mpt); 2191 return (error); 2192 } 2193 mpt->mpt_pers_mask |= (0x1 << pers->id); 2194 pers->use_count++; 2195 } 2196 } 2197 2198 /* 2199 * Now that we've attached everything, do the enable function 2200 * for all of the personalities. This allows the personalities 2201 * to do setups that are appropriate for them prior to enabling 2202 * any ports. 2203 */ 2204 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 2205 pers = mpt_personalities[i]; 2206 if (pers != NULL && MPT_PERS_ATTACHED(pers, mpt) != 0) { 2207 error = pers->enable(mpt); 2208 if (error != 0) { 2209 mpt_prt(mpt, "personality %s attached but would" 2210 " not enable (%d)\n", pers->name, error); 2211 mpt_detach(mpt); 2212 return (error); 2213 } 2214 } 2215 } 2216 return (0); 2217} 2218 2219int 2220mpt_shutdown(struct mpt_softc *mpt) 2221{ 2222 struct mpt_personality *pers; 2223 2224 MPT_PERS_FOREACH_REVERSE(mpt, pers) { 2225 pers->shutdown(mpt); 2226 } 2227 return (0); 2228} 2229 2230int 2231mpt_detach(struct mpt_softc *mpt) 2232{ 2233 struct mpt_personality *pers; 2234 2235 MPT_PERS_FOREACH_REVERSE(mpt, pers) { 2236 pers->detach(mpt); 2237 mpt->mpt_pers_mask &= ~(0x1 << pers->id); 2238 pers->use_count--; 2239 } 2240 TAILQ_REMOVE(&mpt_tailq, mpt, links); 2241 return (0); 2242} 2243 2244static int 2245mpt_core_load(struct mpt_personality *pers) 2246{ 2247 int i; 2248 2249 /* 2250 * Setup core handlers and insert the default handler 2251 * into all "empty slots". 2252 */ 2253 for (i = 0; i < MPT_NUM_REPLY_HANDLERS; i++) { 2254 mpt_reply_handlers[i] = mpt_default_reply_handler; 2255 } 2256 2257 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_EVENTS)] = 2258 mpt_event_reply_handler; 2259 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_CONFIG)] = 2260 mpt_config_reply_handler; 2261 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_HANDSHAKE)] = 2262 mpt_handshake_reply_handler; 2263 return (0); 2264} 2265 2266/* 2267 * Initialize per-instance driver data and perform 2268 * initial controller configuration. 2269 */ 2270static int 2271mpt_core_attach(struct mpt_softc *mpt) 2272{ 2273 int val, error; 2274 2275 LIST_INIT(&mpt->ack_frames); 2276 /* Put all request buffers on the free list */ 2277 TAILQ_INIT(&mpt->request_pending_list); 2278 TAILQ_INIT(&mpt->request_free_list); 2279 TAILQ_INIT(&mpt->request_timeout_list); 2280 for (val = 0; val < MPT_MAX_LUNS; val++) { 2281 STAILQ_INIT(&mpt->trt[val].atios); 2282 STAILQ_INIT(&mpt->trt[val].inots); 2283 } 2284 STAILQ_INIT(&mpt->trt_wildcard.atios); 2285 STAILQ_INIT(&mpt->trt_wildcard.inots); 2286#ifdef MPT_TEST_MULTIPATH 2287 mpt->failure_id = -1; 2288#endif 2289 mpt->scsi_tgt_handler_id = MPT_HANDLER_ID_NONE; 2290 mpt_sysctl_attach(mpt); 2291 mpt_lprt(mpt, MPT_PRT_DEBUG, "doorbell req = %s\n", 2292 mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL))); 2293 2294 MPT_LOCK(mpt); 2295 error = mpt_configure_ioc(mpt, 0, 0); 2296 MPT_UNLOCK(mpt); 2297 2298 return (error); 2299} 2300 2301static int 2302mpt_core_enable(struct mpt_softc *mpt) 2303{ 2304 2305 /* 2306 * We enter with the IOC enabled, but async events 2307 * not enabled, ports not enabled and interrupts 2308 * not enabled. 2309 */ 2310 MPT_LOCK(mpt); 2311 2312 /* 2313 * Enable asynchronous event reporting- all personalities 2314 * have attached so that they should be able to now field 2315 * async events. 2316 */ 2317 mpt_send_event_request(mpt, 1); 2318 2319 /* 2320 * Catch any pending interrupts 2321 * 2322 * This seems to be crucial- otherwise 2323 * the portenable below times out. 2324 */ 2325 mpt_intr(mpt); 2326 2327 /* 2328 * Enable Interrupts 2329 */ 2330 mpt_enable_ints(mpt); 2331 2332 /* 2333 * Catch any pending interrupts 2334 * 2335 * This seems to be crucial- otherwise 2336 * the portenable below times out. 2337 */ 2338 mpt_intr(mpt); 2339 2340 /* 2341 * Enable the port. 2342 */ 2343 if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2344 mpt_prt(mpt, "failed to enable port 0\n"); 2345 MPT_UNLOCK(mpt); 2346 return (ENXIO); 2347 } 2348 MPT_UNLOCK(mpt); 2349 return (0); 2350} 2351 2352static void 2353mpt_core_shutdown(struct mpt_softc *mpt) 2354{ 2355 2356 mpt_disable_ints(mpt); 2357} 2358 2359static void 2360mpt_core_detach(struct mpt_softc *mpt) 2361{ 2362 int val; 2363 2364 /* 2365 * XXX: FREE MEMORY 2366 */ 2367 mpt_disable_ints(mpt); 2368 2369 /* Make sure no request has pending timeouts. */ 2370 for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) { 2371 request_t *req = &mpt->request_pool[val]; 2372 mpt_callout_drain(mpt, &req->callout); 2373 } 2374 2375 mpt_dma_buf_free(mpt); 2376} 2377 2378static int 2379mpt_core_unload(struct mpt_personality *pers) 2380{ 2381 2382 /* Unload is always successful. */ 2383 return (0); 2384} 2385 2386#define FW_UPLOAD_REQ_SIZE \ 2387 (sizeof(MSG_FW_UPLOAD) - sizeof(SGE_MPI_UNION) \ 2388 + sizeof(FW_UPLOAD_TCSGE) + sizeof(SGE_SIMPLE32)) 2389 2390static int 2391mpt_upload_fw(struct mpt_softc *mpt) 2392{ 2393 uint8_t fw_req_buf[FW_UPLOAD_REQ_SIZE]; 2394 MSG_FW_UPLOAD_REPLY fw_reply; 2395 MSG_FW_UPLOAD *fw_req; 2396 FW_UPLOAD_TCSGE *tsge; 2397 SGE_SIMPLE32 *sge; 2398 uint32_t flags; 2399 int error; 2400 2401 memset(&fw_req_buf, 0, sizeof(fw_req_buf)); 2402 fw_req = (MSG_FW_UPLOAD *)fw_req_buf; 2403 fw_req->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM; 2404 fw_req->Function = MPI_FUNCTION_FW_UPLOAD; 2405 fw_req->MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 2406 tsge = (FW_UPLOAD_TCSGE *)&fw_req->SGL; 2407 tsge->DetailsLength = 12; 2408 tsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT; 2409 tsge->ImageSize = htole32(mpt->fw_image_size); 2410 sge = (SGE_SIMPLE32 *)(tsge + 1); 2411 flags = (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER 2412 | MPI_SGE_FLAGS_END_OF_LIST | MPI_SGE_FLAGS_SIMPLE_ELEMENT 2413 | MPI_SGE_FLAGS_32_BIT_ADDRESSING | MPI_SGE_FLAGS_IOC_TO_HOST); 2414 flags <<= MPI_SGE_FLAGS_SHIFT; 2415 sge->FlagsLength = htole32(flags | mpt->fw_image_size); 2416 sge->Address = htole32(mpt->fw_phys); 2417 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap, BUS_DMASYNC_PREREAD); 2418 error = mpt_send_handshake_cmd(mpt, sizeof(fw_req_buf), &fw_req_buf); 2419 if (error) 2420 return(error); 2421 error = mpt_recv_handshake_reply(mpt, sizeof(fw_reply), &fw_reply); 2422 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap, BUS_DMASYNC_POSTREAD); 2423 return (error); 2424} 2425 2426static void 2427mpt_diag_outsl(struct mpt_softc *mpt, uint32_t addr, 2428 uint32_t *data, bus_size_t len) 2429{ 2430 uint32_t *data_end; 2431 2432 data_end = data + (roundup2(len, sizeof(uint32_t)) / 4); 2433 if (mpt->is_sas) { 2434 pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2435 } 2436 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, addr); 2437 while (data != data_end) { 2438 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, *data); 2439 data++; 2440 } 2441 if (mpt->is_sas) { 2442 pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2443 } 2444} 2445 2446static int 2447mpt_download_fw(struct mpt_softc *mpt) 2448{ 2449 MpiFwHeader_t *fw_hdr; 2450 int error; 2451 uint32_t ext_offset; 2452 uint32_t data; 2453 2454 mpt_prt(mpt, "Downloading Firmware - Image Size %d\n", 2455 mpt->fw_image_size); 2456 2457 error = mpt_enable_diag_mode(mpt); 2458 if (error != 0) { 2459 mpt_prt(mpt, "Could not enter diagnostic mode!\n"); 2460 return (EIO); 2461 } 2462 2463 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, 2464 MPI_DIAG_RW_ENABLE|MPI_DIAG_DISABLE_ARM); 2465 2466 fw_hdr = (MpiFwHeader_t *)mpt->fw_image; 2467 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap, BUS_DMASYNC_PREWRITE); 2468 mpt_diag_outsl(mpt, fw_hdr->LoadStartAddress, (uint32_t*)fw_hdr, 2469 fw_hdr->ImageSize); 2470 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap, BUS_DMASYNC_POSTWRITE); 2471 2472 ext_offset = fw_hdr->NextImageHeaderOffset; 2473 while (ext_offset != 0) { 2474 MpiExtImageHeader_t *ext; 2475 2476 ext = (MpiExtImageHeader_t *)((uintptr_t)fw_hdr + ext_offset); 2477 ext_offset = ext->NextImageHeaderOffset; 2478 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap, 2479 BUS_DMASYNC_PREWRITE); 2480 mpt_diag_outsl(mpt, ext->LoadStartAddress, (uint32_t*)ext, 2481 ext->ImageSize); 2482 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap, 2483 BUS_DMASYNC_POSTWRITE); 2484 } 2485 2486 if (mpt->is_sas) { 2487 pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2488 } 2489 /* Setup the address to jump to on reset. */ 2490 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, fw_hdr->IopResetRegAddr); 2491 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, fw_hdr->IopResetVectorValue); 2492 2493 /* 2494 * The controller sets the "flash bad" status after attempting 2495 * to auto-boot from flash. Clear the status so that the controller 2496 * will continue the boot process with our newly installed firmware. 2497 */ 2498 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2499 data = mpt_pio_read(mpt, MPT_OFFSET_DIAG_DATA) | MPT_DIAG_MEM_CFG_BADFL; 2500 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2501 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, data); 2502 2503 if (mpt->is_sas) { 2504 pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2505 } 2506 2507 /* 2508 * Re-enable the processor and clear the boot halt flag. 2509 */ 2510 data = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 2511 data &= ~(MPI_DIAG_PREVENT_IOC_BOOT|MPI_DIAG_DISABLE_ARM); 2512 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, data); 2513 2514 mpt_disable_diag_mode(mpt); 2515 return (0); 2516} 2517 2518static int 2519mpt_dma_buf_alloc(struct mpt_softc *mpt) 2520{ 2521 struct mpt_map_info mi; 2522 uint8_t *vptr; 2523 uint32_t pptr, end; 2524 int i, error; 2525 2526 /* Create a child tag for data buffers */ 2527 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 2528 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 2529 NULL, NULL, (mpt->max_cam_seg_cnt - 1) * PAGE_SIZE, 2530 mpt->max_cam_seg_cnt, BUS_SPACE_MAXSIZE_32BIT, 0, 2531 &mpt->buffer_dmat) != 0) { 2532 mpt_prt(mpt, "cannot create a dma tag for data buffers\n"); 2533 return (1); 2534 } 2535 2536 /* Create a child tag for request buffers */ 2537 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 2538 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 2539 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0, 2540 &mpt->request_dmat) != 0) { 2541 mpt_prt(mpt, "cannot create a dma tag for requests\n"); 2542 return (1); 2543 } 2544 2545 /* Allocate some DMA accessible memory for requests */ 2546 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request, 2547 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &mpt->request_dmap) != 0) { 2548 mpt_prt(mpt, "cannot allocate %d bytes of request memory\n", 2549 MPT_REQ_MEM_SIZE(mpt)); 2550 return (1); 2551 } 2552 2553 mi.mpt = mpt; 2554 mi.error = 0; 2555 2556 /* Load and lock it into "bus space" */ 2557 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request, 2558 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0); 2559 2560 if (mi.error) { 2561 mpt_prt(mpt, "error %d loading dma map for DMA request queue\n", 2562 mi.error); 2563 return (1); 2564 } 2565 mpt->request_phys = mi.phys; 2566 2567 /* 2568 * Now create per-request dma maps 2569 */ 2570 i = 0; 2571 pptr = mpt->request_phys; 2572 vptr = mpt->request; 2573 end = pptr + MPT_REQ_MEM_SIZE(mpt); 2574 while(pptr < end) { 2575 request_t *req = &mpt->request_pool[i]; 2576 req->index = i++; 2577 2578 /* Store location of Request Data */ 2579 req->req_pbuf = pptr; 2580 req->req_vbuf = vptr; 2581 2582 pptr += MPT_REQUEST_AREA; 2583 vptr += MPT_REQUEST_AREA; 2584 2585 req->sense_pbuf = (pptr - MPT_SENSE_SIZE); 2586 req->sense_vbuf = (vptr - MPT_SENSE_SIZE); 2587 2588 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap); 2589 if (error) { 2590 mpt_prt(mpt, "error %d creating per-cmd DMA maps\n", 2591 error); 2592 return (1); 2593 } 2594 } 2595 2596 return (0); 2597} 2598 2599static void 2600mpt_dma_buf_free(struct mpt_softc *mpt) 2601{ 2602 int i; 2603 2604 if (mpt->request_dmat == 0) { 2605 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 2606 return; 2607 } 2608 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) { 2609 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap); 2610 } 2611 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap); 2612 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap); 2613 bus_dma_tag_destroy(mpt->request_dmat); 2614 mpt->request_dmat = 0; 2615 bus_dma_tag_destroy(mpt->buffer_dmat); 2616} 2617 2618/* 2619 * Allocate/Initialize data structures for the controller. Called 2620 * once at instance startup. 2621 */ 2622static int 2623mpt_configure_ioc(struct mpt_softc *mpt, int tn, int needreset) 2624{ 2625 PTR_MSG_PORT_FACTS_REPLY pfp; 2626 int error, port, val; 2627 size_t len; 2628 2629 if (tn == MPT_MAX_TRYS) { 2630 return (-1); 2631 } 2632 2633 /* 2634 * No need to reset if the IOC is already in the READY state. 2635 * 2636 * Force reset if initialization failed previously. 2637 * Note that a hard_reset of the second channel of a '929 2638 * will stop operation of the first channel. Hopefully, if the 2639 * first channel is ok, the second will not require a hard 2640 * reset. 2641 */ 2642 if (needreset || MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_READY) { 2643 if (mpt_reset(mpt, FALSE) != MPT_OK) { 2644 return (mpt_configure_ioc(mpt, tn++, 1)); 2645 } 2646 needreset = 0; 2647 } 2648 2649 if (mpt_get_iocfacts(mpt, &mpt->ioc_facts) != MPT_OK) { 2650 mpt_prt(mpt, "mpt_get_iocfacts failed\n"); 2651 return (mpt_configure_ioc(mpt, tn++, 1)); 2652 } 2653 mpt2host_iocfacts_reply(&mpt->ioc_facts); 2654 2655 mpt_prt(mpt, "MPI Version=%d.%d.%d.%d\n", 2656 mpt->ioc_facts.MsgVersion >> 8, 2657 mpt->ioc_facts.MsgVersion & 0xFF, 2658 mpt->ioc_facts.HeaderVersion >> 8, 2659 mpt->ioc_facts.HeaderVersion & 0xFF); 2660 2661 /* 2662 * Now that we know request frame size, we can calculate 2663 * the actual (reasonable) segment limit for read/write I/O. 2664 * 2665 * This limit is constrained by: 2666 * 2667 * + The size of each area we allocate per command (and how 2668 * many chain segments we can fit into it). 2669 * + The total number of areas we've set up. 2670 * + The actual chain depth the card will allow. 2671 * 2672 * The first area's segment count is limited by the I/O request 2673 * at the head of it. We cannot allocate realistically more 2674 * than MPT_MAX_REQUESTS areas. Therefore, to account for both 2675 * conditions, we'll just start out with MPT_MAX_REQUESTS-2. 2676 * 2677 */ 2678 /* total number of request areas we (can) allocate */ 2679 mpt->max_seg_cnt = MPT_MAX_REQUESTS(mpt) - 2; 2680 2681 /* converted to the number of chain areas possible */ 2682 mpt->max_seg_cnt *= MPT_NRFM(mpt); 2683 2684 /* limited by the number of chain areas the card will support */ 2685 if (mpt->max_seg_cnt > mpt->ioc_facts.MaxChainDepth) { 2686 mpt_lprt(mpt, MPT_PRT_INFO, 2687 "chain depth limited to %u (from %u)\n", 2688 mpt->ioc_facts.MaxChainDepth, mpt->max_seg_cnt); 2689 mpt->max_seg_cnt = mpt->ioc_facts.MaxChainDepth; 2690 } 2691 2692 /* converted to the number of simple sges in chain segments. */ 2693 mpt->max_seg_cnt *= (MPT_NSGL(mpt) - 1); 2694 2695 /* 2696 * Use this as the basis for reporting the maximum I/O size to CAM. 2697 */ 2698 mpt->max_cam_seg_cnt = min(mpt->max_seg_cnt, (MAXPHYS / PAGE_SIZE) + 1); 2699 2700 error = mpt_dma_buf_alloc(mpt); 2701 if (error != 0) { 2702 mpt_prt(mpt, "mpt_dma_buf_alloc() failed!\n"); 2703 return (EIO); 2704 } 2705 2706 for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) { 2707 request_t *req = &mpt->request_pool[val]; 2708 req->state = REQ_STATE_ALLOCATED; 2709 mpt_callout_init(mpt, &req->callout); 2710 mpt_free_request(mpt, req); 2711 } 2712 2713 mpt_lprt(mpt, MPT_PRT_INFO, "Maximum Segment Count: %u, Maximum " 2714 "CAM Segment Count: %u\n", mpt->max_seg_cnt, 2715 mpt->max_cam_seg_cnt); 2716 2717 mpt_lprt(mpt, MPT_PRT_INFO, "MsgLength=%u IOCNumber = %d\n", 2718 mpt->ioc_facts.MsgLength, mpt->ioc_facts.IOCNumber); 2719 mpt_lprt(mpt, MPT_PRT_INFO, 2720 "IOCFACTS: GlobalCredits=%d BlockSize=%u bytes " 2721 "Request Frame Size %u bytes Max Chain Depth %u\n", 2722 mpt->ioc_facts.GlobalCredits, mpt->ioc_facts.BlockSize, 2723 mpt->ioc_facts.RequestFrameSize << 2, 2724 mpt->ioc_facts.MaxChainDepth); 2725 mpt_lprt(mpt, MPT_PRT_INFO, "IOCFACTS: Num Ports %d, FWImageSize %d, " 2726 "Flags=%#x\n", mpt->ioc_facts.NumberOfPorts, 2727 mpt->ioc_facts.FWImageSize, mpt->ioc_facts.Flags); 2728 2729 len = mpt->ioc_facts.NumberOfPorts * sizeof (MSG_PORT_FACTS_REPLY); 2730 mpt->port_facts = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 2731 if (mpt->port_facts == NULL) { 2732 mpt_prt(mpt, "unable to allocate memory for port facts\n"); 2733 return (ENOMEM); 2734 } 2735 2736 2737 if ((mpt->ioc_facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) && 2738 (mpt->fw_uploaded == 0)) { 2739 struct mpt_map_info mi; 2740 2741 /* 2742 * In some configurations, the IOC's firmware is 2743 * stored in a shared piece of system NVRAM that 2744 * is only accessible via the BIOS. In this 2745 * case, the firmware keeps a copy of firmware in 2746 * RAM until the OS driver retrieves it. Once 2747 * retrieved, we are responsible for re-downloading 2748 * the firmware after any hard-reset. 2749 */ 2750 mpt->fw_image_size = mpt->ioc_facts.FWImageSize; 2751 error = mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 0, 2752 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 2753 mpt->fw_image_size, 1, mpt->fw_image_size, 0, 2754 &mpt->fw_dmat); 2755 if (error != 0) { 2756 mpt_prt(mpt, "cannot create firmware dma tag\n"); 2757 return (ENOMEM); 2758 } 2759 error = bus_dmamem_alloc(mpt->fw_dmat, 2760 (void **)&mpt->fw_image, BUS_DMA_NOWAIT | 2761 BUS_DMA_COHERENT, &mpt->fw_dmap); 2762 if (error != 0) { 2763 mpt_prt(mpt, "cannot allocate firmware memory\n"); 2764 bus_dma_tag_destroy(mpt->fw_dmat); 2765 return (ENOMEM); 2766 } 2767 mi.mpt = mpt; 2768 mi.error = 0; 2769 bus_dmamap_load(mpt->fw_dmat, mpt->fw_dmap, 2770 mpt->fw_image, mpt->fw_image_size, mpt_map_rquest, &mi, 0); 2771 mpt->fw_phys = mi.phys; 2772 2773 error = mpt_upload_fw(mpt); 2774 if (error != 0) { 2775 mpt_prt(mpt, "firmware upload failed.\n"); 2776 bus_dmamap_unload(mpt->fw_dmat, mpt->fw_dmap); 2777 bus_dmamem_free(mpt->fw_dmat, mpt->fw_image, 2778 mpt->fw_dmap); 2779 bus_dma_tag_destroy(mpt->fw_dmat); 2780 mpt->fw_image = NULL; 2781 return (EIO); 2782 } 2783 mpt->fw_uploaded = 1; 2784 } 2785 2786 for (port = 0; port < mpt->ioc_facts.NumberOfPorts; port++) { 2787 pfp = &mpt->port_facts[port]; 2788 error = mpt_get_portfacts(mpt, 0, pfp); 2789 if (error != MPT_OK) { 2790 mpt_prt(mpt, 2791 "mpt_get_portfacts on port %d failed\n", port); 2792 free(mpt->port_facts, M_DEVBUF); 2793 mpt->port_facts = NULL; 2794 return (mpt_configure_ioc(mpt, tn++, 1)); 2795 } 2796 mpt2host_portfacts_reply(pfp); 2797 2798 if (port > 0) { 2799 error = MPT_PRT_INFO; 2800 } else { 2801 error = MPT_PRT_DEBUG; 2802 } 2803 mpt_lprt(mpt, error, 2804 "PORTFACTS[%d]: Type %x PFlags %x IID %d MaxDev %d\n", 2805 port, pfp->PortType, pfp->ProtocolFlags, pfp->PortSCSIID, 2806 pfp->MaxDevices); 2807 2808 } 2809 2810 /* 2811 * XXX: Not yet supporting more than port 0 2812 */ 2813 pfp = &mpt->port_facts[0]; 2814 if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_FC) { 2815 mpt->is_fc = 1; 2816 mpt->is_sas = 0; 2817 mpt->is_spi = 0; 2818 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_SAS) { 2819 mpt->is_fc = 0; 2820 mpt->is_sas = 1; 2821 mpt->is_spi = 0; 2822 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_SCSI) { 2823 mpt->is_fc = 0; 2824 mpt->is_sas = 0; 2825 mpt->is_spi = 1; 2826 if (mpt->mpt_ini_id == MPT_INI_ID_NONE) 2827 mpt->mpt_ini_id = pfp->PortSCSIID; 2828 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_ISCSI) { 2829 mpt_prt(mpt, "iSCSI not supported yet\n"); 2830 return (ENXIO); 2831 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_INACTIVE) { 2832 mpt_prt(mpt, "Inactive Port\n"); 2833 return (ENXIO); 2834 } else { 2835 mpt_prt(mpt, "unknown Port Type %#x\n", pfp->PortType); 2836 return (ENXIO); 2837 } 2838 2839 /* 2840 * Set our role with what this port supports. 2841 * 2842 * Note this might be changed later in different modules 2843 * if this is different from what is wanted. 2844 */ 2845 mpt->role = MPT_ROLE_NONE; 2846 if (pfp->ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) { 2847 mpt->role |= MPT_ROLE_INITIATOR; 2848 } 2849 if (pfp->ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) { 2850 mpt->role |= MPT_ROLE_TARGET; 2851 } 2852 2853 /* 2854 * Enable the IOC 2855 */ 2856 if (mpt_enable_ioc(mpt, 1) != MPT_OK) { 2857 mpt_prt(mpt, "unable to initialize IOC\n"); 2858 return (ENXIO); 2859 } 2860 2861 /* 2862 * Read IOC configuration information. 2863 * 2864 * We need this to determine whether or not we have certain 2865 * settings for Integrated Mirroring (e.g.). 2866 */ 2867 mpt_read_config_info_ioc(mpt); 2868 2869 return (0); 2870} 2871 2872static int 2873mpt_enable_ioc(struct mpt_softc *mpt, int portenable) 2874{ 2875 uint32_t pptr; 2876 int val; 2877 2878 if (mpt_send_ioc_init(mpt, MPI_WHOINIT_HOST_DRIVER) != MPT_OK) { 2879 mpt_prt(mpt, "mpt_send_ioc_init failed\n"); 2880 return (EIO); 2881 } 2882 2883 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_send_ioc_init ok\n"); 2884 2885 if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) { 2886 mpt_prt(mpt, "IOC failed to go to run state\n"); 2887 return (ENXIO); 2888 } 2889 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC now at RUNSTATE\n"); 2890 2891 /* 2892 * Give it reply buffers 2893 * 2894 * Do *not* exceed global credits. 2895 */ 2896 for (val = 0, pptr = mpt->reply_phys; 2897 (pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE); 2898 pptr += MPT_REPLY_SIZE) { 2899 mpt_free_reply(mpt, pptr); 2900 if (++val == mpt->ioc_facts.GlobalCredits - 1) 2901 break; 2902 } 2903 2904 2905 /* 2906 * Enable the port if asked. This is only done if we're resetting 2907 * the IOC after initial startup. 2908 */ 2909 if (portenable) { 2910 /* 2911 * Enable asynchronous event reporting 2912 */ 2913 mpt_send_event_request(mpt, 1); 2914 2915 if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2916 mpt_prt(mpt, "%s: failed to enable port 0\n", __func__); 2917 return (ENXIO); 2918 } 2919 } 2920 return (MPT_OK); 2921} 2922 2923/* 2924 * Endian Conversion Functions- only used on Big Endian machines 2925 */ 2926#if _BYTE_ORDER == _BIG_ENDIAN 2927void 2928mpt2host_sge_simple_union(SGE_SIMPLE_UNION *sge) 2929{ 2930 2931 MPT_2_HOST32(sge, FlagsLength); 2932 MPT_2_HOST32(sge, u.Address64.Low); 2933 MPT_2_HOST32(sge, u.Address64.High); 2934} 2935 2936void 2937mpt2host_iocfacts_reply(MSG_IOC_FACTS_REPLY *rp) 2938{ 2939 2940 MPT_2_HOST16(rp, MsgVersion); 2941 MPT_2_HOST16(rp, HeaderVersion); 2942 MPT_2_HOST32(rp, MsgContext); 2943 MPT_2_HOST16(rp, IOCExceptions); 2944 MPT_2_HOST16(rp, IOCStatus); 2945 MPT_2_HOST32(rp, IOCLogInfo); 2946 MPT_2_HOST16(rp, ReplyQueueDepth); 2947 MPT_2_HOST16(rp, RequestFrameSize); 2948 MPT_2_HOST16(rp, Reserved_0101_FWVersion); 2949 MPT_2_HOST16(rp, ProductID); 2950 MPT_2_HOST32(rp, CurrentHostMfaHighAddr); 2951 MPT_2_HOST16(rp, GlobalCredits); 2952 MPT_2_HOST32(rp, CurrentSenseBufferHighAddr); 2953 MPT_2_HOST16(rp, CurReplyFrameSize); 2954 MPT_2_HOST32(rp, FWImageSize); 2955 MPT_2_HOST32(rp, IOCCapabilities); 2956 MPT_2_HOST32(rp, FWVersion.Word); 2957 MPT_2_HOST16(rp, HighPriorityQueueDepth); 2958 MPT_2_HOST16(rp, Reserved2); 2959 mpt2host_sge_simple_union(&rp->HostPageBufferSGE); 2960 MPT_2_HOST32(rp, ReplyFifoHostSignalingAddr); 2961} 2962 2963void 2964mpt2host_portfacts_reply(MSG_PORT_FACTS_REPLY *pfp) 2965{ 2966 2967 MPT_2_HOST16(pfp, Reserved); 2968 MPT_2_HOST16(pfp, Reserved1); 2969 MPT_2_HOST32(pfp, MsgContext); 2970 MPT_2_HOST16(pfp, Reserved2); 2971 MPT_2_HOST16(pfp, IOCStatus); 2972 MPT_2_HOST32(pfp, IOCLogInfo); 2973 MPT_2_HOST16(pfp, MaxDevices); 2974 MPT_2_HOST16(pfp, PortSCSIID); 2975 MPT_2_HOST16(pfp, ProtocolFlags); 2976 MPT_2_HOST16(pfp, MaxPostedCmdBuffers); 2977 MPT_2_HOST16(pfp, MaxPersistentIDs); 2978 MPT_2_HOST16(pfp, MaxLanBuckets); 2979 MPT_2_HOST16(pfp, Reserved4); 2980 MPT_2_HOST32(pfp, Reserved5); 2981} 2982 2983void 2984mpt2host_config_page_ioc2(CONFIG_PAGE_IOC_2 *ioc2) 2985{ 2986 int i; 2987 2988 MPT_2_HOST32(ioc2, CapabilitiesFlags); 2989 for (i = 0; i < MPI_IOC_PAGE_2_RAID_VOLUME_MAX; i++) { 2990 MPT_2_HOST16(ioc2, RaidVolume[i].Reserved3); 2991 } 2992} 2993 2994void 2995mpt2host_config_page_ioc3(CONFIG_PAGE_IOC_3 *ioc3) 2996{ 2997 2998 MPT_2_HOST16(ioc3, Reserved2); 2999} 3000 3001void 3002mpt2host_config_page_scsi_port_0(CONFIG_PAGE_SCSI_PORT_0 *sp0) 3003{ 3004 3005 MPT_2_HOST32(sp0, Capabilities); 3006 MPT_2_HOST32(sp0, PhysicalInterface); 3007} 3008 3009void 3010mpt2host_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 *sp1) 3011{ 3012 3013 MPT_2_HOST32(sp1, Configuration); 3014 MPT_2_HOST32(sp1, OnBusTimerValue); 3015 MPT_2_HOST16(sp1, IDConfig); 3016} 3017 3018void 3019host2mpt_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 *sp1) 3020{ 3021 3022 HOST_2_MPT32(sp1, Configuration); 3023 HOST_2_MPT32(sp1, OnBusTimerValue); 3024 HOST_2_MPT16(sp1, IDConfig); 3025} 3026 3027void 3028mpt2host_config_page_scsi_port_2(CONFIG_PAGE_SCSI_PORT_2 *sp2) 3029{ 3030 int i; 3031 3032 MPT_2_HOST32(sp2, PortFlags); 3033 MPT_2_HOST32(sp2, PortSettings); 3034 for (i = 0; i < sizeof(sp2->DeviceSettings) / 3035 sizeof(*sp2->DeviceSettings); i++) { 3036 MPT_2_HOST16(sp2, DeviceSettings[i].DeviceFlags); 3037 } 3038} 3039 3040void 3041mpt2host_config_page_scsi_device_0(CONFIG_PAGE_SCSI_DEVICE_0 *sd0) 3042{ 3043 3044 MPT_2_HOST32(sd0, NegotiatedParameters); 3045 MPT_2_HOST32(sd0, Information); 3046} 3047 3048void 3049mpt2host_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 *sd1) 3050{ 3051 3052 MPT_2_HOST32(sd1, RequestedParameters); 3053 MPT_2_HOST32(sd1, Reserved); 3054 MPT_2_HOST32(sd1, Configuration); 3055} 3056 3057void 3058host2mpt_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 *sd1) 3059{ 3060 3061 HOST_2_MPT32(sd1, RequestedParameters); 3062 HOST_2_MPT32(sd1, Reserved); 3063 HOST_2_MPT32(sd1, Configuration); 3064} 3065 3066void 3067mpt2host_config_page_fc_port_0(CONFIG_PAGE_FC_PORT_0 *fp0) 3068{ 3069 3070 MPT_2_HOST32(fp0, Flags); 3071 MPT_2_HOST32(fp0, PortIdentifier); 3072 MPT_2_HOST32(fp0, WWNN.Low); 3073 MPT_2_HOST32(fp0, WWNN.High); 3074 MPT_2_HOST32(fp0, WWPN.Low); 3075 MPT_2_HOST32(fp0, WWPN.High); 3076 MPT_2_HOST32(fp0, SupportedServiceClass); 3077 MPT_2_HOST32(fp0, SupportedSpeeds); 3078 MPT_2_HOST32(fp0, CurrentSpeed); 3079 MPT_2_HOST32(fp0, MaxFrameSize); 3080 MPT_2_HOST32(fp0, FabricWWNN.Low); 3081 MPT_2_HOST32(fp0, FabricWWNN.High); 3082 MPT_2_HOST32(fp0, FabricWWPN.Low); 3083 MPT_2_HOST32(fp0, FabricWWPN.High); 3084 MPT_2_HOST32(fp0, DiscoveredPortsCount); 3085 MPT_2_HOST32(fp0, MaxInitiators); 3086} 3087 3088void 3089mpt2host_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 *fp1) 3090{ 3091 3092 MPT_2_HOST32(fp1, Flags); 3093 MPT_2_HOST32(fp1, NoSEEPROMWWNN.Low); 3094 MPT_2_HOST32(fp1, NoSEEPROMWWNN.High); 3095 MPT_2_HOST32(fp1, NoSEEPROMWWPN.Low); 3096 MPT_2_HOST32(fp1, NoSEEPROMWWPN.High); 3097} 3098 3099void 3100host2mpt_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 *fp1) 3101{ 3102 3103 HOST_2_MPT32(fp1, Flags); 3104 HOST_2_MPT32(fp1, NoSEEPROMWWNN.Low); 3105 HOST_2_MPT32(fp1, NoSEEPROMWWNN.High); 3106 HOST_2_MPT32(fp1, NoSEEPROMWWPN.Low); 3107 HOST_2_MPT32(fp1, NoSEEPROMWWPN.High); 3108} 3109 3110void 3111mpt2host_config_page_raid_vol_0(CONFIG_PAGE_RAID_VOL_0 *volp) 3112{ 3113 int i; 3114 3115 MPT_2_HOST16(volp, VolumeStatus.Reserved); 3116 MPT_2_HOST16(volp, VolumeSettings.Settings); 3117 MPT_2_HOST32(volp, MaxLBA); 3118 MPT_2_HOST32(volp, MaxLBAHigh); 3119 MPT_2_HOST32(volp, StripeSize); 3120 MPT_2_HOST32(volp, Reserved2); 3121 MPT_2_HOST32(volp, Reserved3); 3122 for (i = 0; i < MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX; i++) { 3123 MPT_2_HOST16(volp, PhysDisk[i].Reserved); 3124 } 3125} 3126 3127void 3128mpt2host_config_page_raid_phys_disk_0(CONFIG_PAGE_RAID_PHYS_DISK_0 *rpd0) 3129{ 3130 3131 MPT_2_HOST32(rpd0, Reserved1); 3132 MPT_2_HOST16(rpd0, PhysDiskStatus.Reserved); 3133 MPT_2_HOST32(rpd0, MaxLBA); 3134 MPT_2_HOST16(rpd0, ErrorData.Reserved); 3135 MPT_2_HOST16(rpd0, ErrorData.ErrorCount); 3136 MPT_2_HOST16(rpd0, ErrorData.SmartCount); 3137} 3138 3139void 3140mpt2host_mpi_raid_vol_indicator(MPI_RAID_VOL_INDICATOR *vi) 3141{ 3142 3143 MPT_2_HOST16(vi, TotalBlocks.High); 3144 MPT_2_HOST16(vi, TotalBlocks.Low); 3145 MPT_2_HOST16(vi, BlocksRemaining.High); 3146 MPT_2_HOST16(vi, BlocksRemaining.Low); 3147} 3148#endif 3149