mpt.c revision 198262
1/*- 2 * Generic routines for LSI Fusion adapters. 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice immediately at the beginning of the file, without modification, 12 * this list of conditions, and the following disclaimer. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28/*- 29 * Copyright (c) 2002, 2006 by Matthew Jacob 30 * All rights reserved. 31 * 32 * Redistribution and use in source and binary forms, with or without 33 * modification, are permitted provided that the following conditions are 34 * met: 35 * 1. Redistributions of source code must retain the above copyright 36 * notice, this list of conditions and the following disclaimer. 37 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 38 * substantially similar to the "NO WARRANTY" disclaimer below 39 * ("Disclaimer") and any redistribution must be conditioned upon including 40 * a substantially similar Disclaimer requirement for further binary 41 * redistribution. 42 * 3. Neither the names of the above listed copyright holders nor the names 43 * of any contributors may be used to endorse or promote products derived 44 * from this software without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 47 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 49 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 50 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 56 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 * 58 * Support from Chris Ellsworth in order to make SAS adapters work 59 * is gratefully acknowledged. 60 * 61 * 62 * Support from LSI-Logic has also gone a great deal toward making this a 63 * workable subsystem and is gratefully acknowledged. 64 */ 65/*- 66 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 67 * Copyright (c) 2005, WHEEL Sp. z o.o. 68 * Copyright (c) 2004, 2005 Justin T. Gibbs 69 * All rights reserved. 70 * 71 * Redistribution and use in source and binary forms, with or without 72 * modification, are permitted provided that the following conditions are 73 * met: 74 * 1. Redistributions of source code must retain the above copyright 75 * notice, this list of conditions and the following disclaimer. 76 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 77 * substantially similar to the "NO WARRANTY" disclaimer below 78 * ("Disclaimer") and any redistribution must be conditioned upon including 79 * a substantially similar Disclaimer requirement for further binary 80 * redistribution. 81 * 3. Neither the names of the above listed copyright holders nor the names 82 * of any contributors may be used to endorse or promote products derived 83 * from this software without specific prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 86 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 89 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 90 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 91 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 92 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 93 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 94 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 95 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 96 */ 97 98#include <sys/cdefs.h> 99__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt.c 198262 2009-10-20 02:35:12Z kan $"); 100 101#include <dev/mpt/mpt.h> 102#include <dev/mpt/mpt_cam.h> /* XXX For static handler registration */ 103#include <dev/mpt/mpt_raid.h> /* XXX For static handler registration */ 104 105#include <dev/mpt/mpilib/mpi.h> 106#include <dev/mpt/mpilib/mpi_ioc.h> 107#include <dev/mpt/mpilib/mpi_fc.h> 108#include <dev/mpt/mpilib/mpi_targ.h> 109 110#include <sys/sysctl.h> 111 112#define MPT_MAX_TRYS 3 113#define MPT_MAX_WAIT 300000 114 115static int maxwait_ack = 0; 116static int maxwait_int = 0; 117static int maxwait_state = 0; 118 119static TAILQ_HEAD(, mpt_softc) mpt_tailq = TAILQ_HEAD_INITIALIZER(mpt_tailq); 120mpt_reply_handler_t *mpt_reply_handlers[MPT_NUM_REPLY_HANDLERS]; 121 122static mpt_reply_handler_t mpt_default_reply_handler; 123static mpt_reply_handler_t mpt_config_reply_handler; 124static mpt_reply_handler_t mpt_handshake_reply_handler; 125static mpt_reply_handler_t mpt_event_reply_handler; 126static void mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 127 MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context); 128static int mpt_send_event_request(struct mpt_softc *mpt, int onoff); 129static int mpt_soft_reset(struct mpt_softc *mpt); 130static void mpt_hard_reset(struct mpt_softc *mpt); 131static int mpt_configure_ioc(struct mpt_softc *mpt, int, int); 132static int mpt_enable_ioc(struct mpt_softc *mpt, int); 133 134/************************* Personality Module Support *************************/ 135/* 136 * We include one extra entry that is guaranteed to be NULL 137 * to simplify our itterator. 138 */ 139static struct mpt_personality *mpt_personalities[MPT_MAX_PERSONALITIES + 1]; 140static __inline struct mpt_personality* 141 mpt_pers_find(struct mpt_softc *, u_int); 142static __inline struct mpt_personality* 143 mpt_pers_find_reverse(struct mpt_softc *, u_int); 144 145static __inline struct mpt_personality * 146mpt_pers_find(struct mpt_softc *mpt, u_int start_at) 147{ 148 KASSERT(start_at <= MPT_MAX_PERSONALITIES, 149 ("mpt_pers_find: starting position out of range\n")); 150 151 while (start_at < MPT_MAX_PERSONALITIES 152 && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 153 start_at++; 154 } 155 return (mpt_personalities[start_at]); 156} 157 158/* 159 * Used infrequently, so no need to optimize like a forward 160 * traversal where we use the MAX+1 is guaranteed to be NULL 161 * trick. 162 */ 163static __inline struct mpt_personality * 164mpt_pers_find_reverse(struct mpt_softc *mpt, u_int start_at) 165{ 166 while (start_at < MPT_MAX_PERSONALITIES 167 && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 168 start_at--; 169 } 170 if (start_at < MPT_MAX_PERSONALITIES) 171 return (mpt_personalities[start_at]); 172 return (NULL); 173} 174 175#define MPT_PERS_FOREACH(mpt, pers) \ 176 for (pers = mpt_pers_find(mpt, /*start_at*/0); \ 177 pers != NULL; \ 178 pers = mpt_pers_find(mpt, /*start_at*/pers->id+1)) 179 180#define MPT_PERS_FOREACH_REVERSE(mpt, pers) \ 181 for (pers = mpt_pers_find_reverse(mpt, MPT_MAX_PERSONALITIES-1);\ 182 pers != NULL; \ 183 pers = mpt_pers_find_reverse(mpt, /*start_at*/pers->id-1)) 184 185static mpt_load_handler_t mpt_stdload; 186static mpt_probe_handler_t mpt_stdprobe; 187static mpt_attach_handler_t mpt_stdattach; 188static mpt_enable_handler_t mpt_stdenable; 189static mpt_ready_handler_t mpt_stdready; 190static mpt_event_handler_t mpt_stdevent; 191static mpt_reset_handler_t mpt_stdreset; 192static mpt_shutdown_handler_t mpt_stdshutdown; 193static mpt_detach_handler_t mpt_stddetach; 194static mpt_unload_handler_t mpt_stdunload; 195static struct mpt_personality mpt_default_personality = 196{ 197 .load = mpt_stdload, 198 .probe = mpt_stdprobe, 199 .attach = mpt_stdattach, 200 .enable = mpt_stdenable, 201 .ready = mpt_stdready, 202 .event = mpt_stdevent, 203 .reset = mpt_stdreset, 204 .shutdown = mpt_stdshutdown, 205 .detach = mpt_stddetach, 206 .unload = mpt_stdunload 207}; 208 209static mpt_load_handler_t mpt_core_load; 210static mpt_attach_handler_t mpt_core_attach; 211static mpt_enable_handler_t mpt_core_enable; 212static mpt_reset_handler_t mpt_core_ioc_reset; 213static mpt_event_handler_t mpt_core_event; 214static mpt_shutdown_handler_t mpt_core_shutdown; 215static mpt_shutdown_handler_t mpt_core_detach; 216static mpt_unload_handler_t mpt_core_unload; 217static struct mpt_personality mpt_core_personality = 218{ 219 .name = "mpt_core", 220 .load = mpt_core_load, 221// .attach = mpt_core_attach, 222// .enable = mpt_core_enable, 223 .event = mpt_core_event, 224 .reset = mpt_core_ioc_reset, 225 .shutdown = mpt_core_shutdown, 226 .detach = mpt_core_detach, 227 .unload = mpt_core_unload, 228}; 229 230/* 231 * Manual declaration so that DECLARE_MPT_PERSONALITY doesn't need 232 * ordering information. We want the core to always register FIRST. 233 * other modules are set to SI_ORDER_SECOND. 234 */ 235static moduledata_t mpt_core_mod = { 236 "mpt_core", mpt_modevent, &mpt_core_personality 237}; 238DECLARE_MODULE(mpt_core, mpt_core_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST); 239MODULE_VERSION(mpt_core, 1); 240 241#define MPT_PERS_ATTACHED(pers, mpt) ((mpt)->mpt_pers_mask & (0x1 << pers->id)) 242 243int 244mpt_modevent(module_t mod, int type, void *data) 245{ 246 struct mpt_personality *pers; 247 int error; 248 249 pers = (struct mpt_personality *)data; 250 251 error = 0; 252 switch (type) { 253 case MOD_LOAD: 254 { 255 mpt_load_handler_t **def_handler; 256 mpt_load_handler_t **pers_handler; 257 int i; 258 259 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 260 if (mpt_personalities[i] == NULL) 261 break; 262 } 263 if (i >= MPT_MAX_PERSONALITIES) { 264 error = ENOMEM; 265 break; 266 } 267 pers->id = i; 268 mpt_personalities[i] = pers; 269 270 /* Install standard/noop handlers for any NULL entries. */ 271 def_handler = MPT_PERS_FIRST_HANDLER(&mpt_default_personality); 272 pers_handler = MPT_PERS_FIRST_HANDLER(pers); 273 while (pers_handler <= MPT_PERS_LAST_HANDLER(pers)) { 274 if (*pers_handler == NULL) 275 *pers_handler = *def_handler; 276 pers_handler++; 277 def_handler++; 278 } 279 280 error = (pers->load(pers)); 281 if (error != 0) 282 mpt_personalities[i] = NULL; 283 break; 284 } 285 case MOD_SHUTDOWN: 286 break; 287#if __FreeBSD_version >= 500000 288 case MOD_QUIESCE: 289 break; 290#endif 291 case MOD_UNLOAD: 292 error = pers->unload(pers); 293 mpt_personalities[pers->id] = NULL; 294 break; 295 default: 296 error = EINVAL; 297 break; 298 } 299 return (error); 300} 301 302int 303mpt_stdload(struct mpt_personality *pers) 304{ 305 /* Load is always successfull. */ 306 return (0); 307} 308 309int 310mpt_stdprobe(struct mpt_softc *mpt) 311{ 312 /* Probe is always successfull. */ 313 return (0); 314} 315 316int 317mpt_stdattach(struct mpt_softc *mpt) 318{ 319 /* Attach is always successfull. */ 320 return (0); 321} 322 323int 324mpt_stdenable(struct mpt_softc *mpt) 325{ 326 /* Enable is always successfull. */ 327 return (0); 328} 329 330void 331mpt_stdready(struct mpt_softc *mpt) 332{ 333} 334 335 336int 337mpt_stdevent(struct mpt_softc *mpt, request_t *req, MSG_EVENT_NOTIFY_REPLY *msg) 338{ 339 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_stdevent: 0x%x\n", msg->Event & 0xFF); 340 /* Event was not for us. */ 341 return (0); 342} 343 344void 345mpt_stdreset(struct mpt_softc *mpt, int type) 346{ 347} 348 349void 350mpt_stdshutdown(struct mpt_softc *mpt) 351{ 352} 353 354void 355mpt_stddetach(struct mpt_softc *mpt) 356{ 357} 358 359int 360mpt_stdunload(struct mpt_personality *pers) 361{ 362 /* Unload is always successfull. */ 363 return (0); 364} 365 366/* 367 * Post driver attachment, we may want to perform some global actions. 368 * Here is the hook to do so. 369 */ 370 371static void 372mpt_postattach(void *unused) 373{ 374 struct mpt_softc *mpt; 375 struct mpt_personality *pers; 376 377 TAILQ_FOREACH(mpt, &mpt_tailq, links) { 378 MPT_PERS_FOREACH(mpt, pers) 379 pers->ready(mpt); 380 } 381} 382SYSINIT(mptdev, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE, mpt_postattach, NULL); 383 384 385/******************************* Bus DMA Support ******************************/ 386void 387mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error) 388{ 389 struct mpt_map_info *map_info; 390 391 map_info = (struct mpt_map_info *)arg; 392 map_info->error = error; 393 map_info->phys = segs->ds_addr; 394} 395 396/**************************** Reply/Event Handling ****************************/ 397int 398mpt_register_handler(struct mpt_softc *mpt, mpt_handler_type type, 399 mpt_handler_t handler, uint32_t *phandler_id) 400{ 401 402 switch (type) { 403 case MPT_HANDLER_REPLY: 404 { 405 u_int cbi; 406 u_int free_cbi; 407 408 if (phandler_id == NULL) 409 return (EINVAL); 410 411 free_cbi = MPT_HANDLER_ID_NONE; 412 for (cbi = 0; cbi < MPT_NUM_REPLY_HANDLERS; cbi++) { 413 /* 414 * If the same handler is registered multiple 415 * times, don't error out. Just return the 416 * index of the original registration. 417 */ 418 if (mpt_reply_handlers[cbi] == handler.reply_handler) { 419 *phandler_id = MPT_CBI_TO_HID(cbi); 420 return (0); 421 } 422 423 /* 424 * Fill from the front in the hope that 425 * all registered handlers consume only a 426 * single cache line. 427 * 428 * We don't break on the first empty slot so 429 * that the full table is checked to see if 430 * this handler was previously registered. 431 */ 432 if (free_cbi == MPT_HANDLER_ID_NONE && 433 (mpt_reply_handlers[cbi] 434 == mpt_default_reply_handler)) 435 free_cbi = cbi; 436 } 437 if (free_cbi == MPT_HANDLER_ID_NONE) { 438 return (ENOMEM); 439 } 440 mpt_reply_handlers[free_cbi] = handler.reply_handler; 441 *phandler_id = MPT_CBI_TO_HID(free_cbi); 442 break; 443 } 444 default: 445 mpt_prt(mpt, "mpt_register_handler unknown type %d\n", type); 446 return (EINVAL); 447 } 448 return (0); 449} 450 451int 452mpt_deregister_handler(struct mpt_softc *mpt, mpt_handler_type type, 453 mpt_handler_t handler, uint32_t handler_id) 454{ 455 456 switch (type) { 457 case MPT_HANDLER_REPLY: 458 { 459 u_int cbi; 460 461 cbi = MPT_CBI(handler_id); 462 if (cbi >= MPT_NUM_REPLY_HANDLERS 463 || mpt_reply_handlers[cbi] != handler.reply_handler) 464 return (ENOENT); 465 mpt_reply_handlers[cbi] = mpt_default_reply_handler; 466 break; 467 } 468 default: 469 mpt_prt(mpt, "mpt_deregister_handler unknown type %d\n", type); 470 return (EINVAL); 471 } 472 return (0); 473} 474 475static int 476mpt_default_reply_handler(struct mpt_softc *mpt, request_t *req, 477 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 478{ 479 mpt_prt(mpt, 480 "Default Handler Called: req=%p:%u reply_descriptor=%x frame=%p\n", 481 req, req->serno, reply_desc, reply_frame); 482 483 if (reply_frame != NULL) 484 mpt_dump_reply_frame(mpt, reply_frame); 485 486 mpt_prt(mpt, "Reply Frame Ignored\n"); 487 488 return (/*free_reply*/TRUE); 489} 490 491static int 492mpt_config_reply_handler(struct mpt_softc *mpt, request_t *req, 493 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 494{ 495 if (req != NULL) { 496 497 if (reply_frame != NULL) { 498 MSG_CONFIG *cfgp; 499 MSG_CONFIG_REPLY *reply; 500 501 cfgp = (MSG_CONFIG *)req->req_vbuf; 502 reply = (MSG_CONFIG_REPLY *)reply_frame; 503 req->IOCStatus = le16toh(reply_frame->IOCStatus); 504 bcopy(&reply->Header, &cfgp->Header, 505 sizeof(cfgp->Header)); 506 cfgp->ExtPageLength = reply->ExtPageLength; 507 cfgp->ExtPageType = reply->ExtPageType; 508 } 509 req->state &= ~REQ_STATE_QUEUED; 510 req->state |= REQ_STATE_DONE; 511 TAILQ_REMOVE(&mpt->request_pending_list, req, links); 512 if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) { 513 wakeup(req); 514 } else if ((req->state & REQ_STATE_TIMEDOUT) != 0) { 515 /* 516 * Whew- we can free this request (late completion) 517 */ 518 mpt_free_request(mpt, req); 519 } 520 } 521 522 return (TRUE); 523} 524 525static int 526mpt_handshake_reply_handler(struct mpt_softc *mpt, request_t *req, 527 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 528{ 529 /* Nothing to be done. */ 530 return (TRUE); 531} 532 533static int 534mpt_event_reply_handler(struct mpt_softc *mpt, request_t *req, 535 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 536{ 537 int free_reply; 538 539 KASSERT(reply_frame != NULL, ("null reply in mpt_event_reply_handler")); 540 KASSERT(req != NULL, ("null request in mpt_event_reply_handler")); 541 542 free_reply = TRUE; 543 switch (reply_frame->Function) { 544 case MPI_FUNCTION_EVENT_NOTIFICATION: 545 { 546 MSG_EVENT_NOTIFY_REPLY *msg; 547 struct mpt_personality *pers; 548 u_int handled; 549 550 handled = 0; 551 msg = (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 552 msg->EventDataLength = le16toh(msg->EventDataLength); 553 msg->IOCStatus = le16toh(msg->IOCStatus); 554 msg->IOCLogInfo = le32toh(msg->IOCLogInfo); 555 msg->Event = le32toh(msg->Event); 556 MPT_PERS_FOREACH(mpt, pers) 557 handled += pers->event(mpt, req, msg); 558 559 if (handled == 0 && mpt->mpt_pers_mask == 0) { 560 mpt_lprt(mpt, MPT_PRT_INFO, 561 "No Handlers For Any Event Notify Frames. " 562 "Event %#x (ACK %sequired).\n", 563 msg->Event, msg->AckRequired? "r" : "not r"); 564 } else if (handled == 0) { 565 mpt_lprt(mpt, 566 msg->AckRequired? MPT_PRT_WARN : MPT_PRT_INFO, 567 "Unhandled Event Notify Frame. Event %#x " 568 "(ACK %sequired).\n", 569 msg->Event, msg->AckRequired? "r" : "not r"); 570 } 571 572 if (msg->AckRequired) { 573 request_t *ack_req; 574 uint32_t context; 575 576 context = req->index | MPT_REPLY_HANDLER_EVENTS; 577 ack_req = mpt_get_request(mpt, FALSE); 578 if (ack_req == NULL) { 579 struct mpt_evtf_record *evtf; 580 581 evtf = (struct mpt_evtf_record *)reply_frame; 582 evtf->context = context; 583 LIST_INSERT_HEAD(&mpt->ack_frames, evtf, links); 584 free_reply = FALSE; 585 break; 586 } 587 mpt_send_event_ack(mpt, ack_req, msg, context); 588 /* 589 * Don't check for CONTINUATION_REPLY here 590 */ 591 return (free_reply); 592 } 593 break; 594 } 595 case MPI_FUNCTION_PORT_ENABLE: 596 mpt_lprt(mpt, MPT_PRT_DEBUG , "enable port reply\n"); 597 break; 598 case MPI_FUNCTION_EVENT_ACK: 599 break; 600 default: 601 mpt_prt(mpt, "unknown event function: %x\n", 602 reply_frame->Function); 603 break; 604 } 605 606 /* 607 * I'm not sure that this continuation stuff works as it should. 608 * 609 * I've had FC async events occur that free the frame up because 610 * the continuation bit isn't set, and then additional async events 611 * then occur using the same context. As you might imagine, this 612 * leads to Very Bad Thing. 613 * 614 * Let's just be safe for now and not free them up until we figure 615 * out what's actually happening here. 616 */ 617#if 0 618 if ((reply_frame->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) == 0) { 619 TAILQ_REMOVE(&mpt->request_pending_list, req, links); 620 mpt_free_request(mpt, req); 621 mpt_prt(mpt, "event_reply %x for req %p:%u NOT a continuation", 622 reply_frame->Function, req, req->serno); 623 if (reply_frame->Function == MPI_FUNCTION_EVENT_NOTIFICATION) { 624 MSG_EVENT_NOTIFY_REPLY *msg = 625 (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 626 mpt_prtc(mpt, " Event=0x%x AckReq=%d", 627 msg->Event, msg->AckRequired); 628 } 629 } else { 630 mpt_prt(mpt, "event_reply %x for %p:%u IS a continuation", 631 reply_frame->Function, req, req->serno); 632 if (reply_frame->Function == MPI_FUNCTION_EVENT_NOTIFICATION) { 633 MSG_EVENT_NOTIFY_REPLY *msg = 634 (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 635 mpt_prtc(mpt, " Event=0x%x AckReq=%d", 636 msg->Event, msg->AckRequired); 637 } 638 mpt_prtc(mpt, "\n"); 639 } 640#endif 641 return (free_reply); 642} 643 644/* 645 * Process an asynchronous event from the IOC. 646 */ 647static int 648mpt_core_event(struct mpt_softc *mpt, request_t *req, 649 MSG_EVENT_NOTIFY_REPLY *msg) 650{ 651 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_core_event: 0x%x\n", 652 msg->Event & 0xFF); 653 switch(msg->Event & 0xFF) { 654 case MPI_EVENT_NONE: 655 break; 656 case MPI_EVENT_LOG_DATA: 657 { 658 int i; 659 660 /* Some error occured that LSI wants logged */ 661 mpt_prt(mpt, "EvtLogData: IOCLogInfo: 0x%08x\n", 662 msg->IOCLogInfo); 663 mpt_prt(mpt, "\tEvtLogData: Event Data:"); 664 for (i = 0; i < msg->EventDataLength; i++) 665 mpt_prtc(mpt, " %08x", msg->Data[i]); 666 mpt_prtc(mpt, "\n"); 667 break; 668 } 669 case MPI_EVENT_EVENT_CHANGE: 670 /* 671 * This is just an acknowledgement 672 * of our mpt_send_event_request. 673 */ 674 break; 675 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE: 676 break; 677 default: 678 return (0); 679 break; 680 } 681 return (1); 682} 683 684static void 685mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 686 MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context) 687{ 688 MSG_EVENT_ACK *ackp; 689 690 ackp = (MSG_EVENT_ACK *)ack_req->req_vbuf; 691 memset(ackp, 0, sizeof (*ackp)); 692 ackp->Function = MPI_FUNCTION_EVENT_ACK; 693 ackp->Event = htole32(msg->Event); 694 ackp->EventContext = htole32(msg->EventContext); 695 ackp->MsgContext = htole32(context); 696 mpt_check_doorbell(mpt); 697 mpt_send_cmd(mpt, ack_req); 698} 699 700/***************************** Interrupt Handling *****************************/ 701void 702mpt_intr(void *arg) 703{ 704 struct mpt_softc *mpt; 705 uint32_t reply_desc; 706 int ntrips = 0; 707 708 mpt = (struct mpt_softc *)arg; 709 mpt_lprt(mpt, MPT_PRT_DEBUG2, "enter mpt_intr\n"); 710 MPT_LOCK_ASSERT(mpt); 711 712 while ((reply_desc = mpt_pop_reply_queue(mpt)) != MPT_REPLY_EMPTY) { 713 request_t *req; 714 MSG_DEFAULT_REPLY *reply_frame; 715 uint32_t reply_baddr; 716 uint32_t ctxt_idx; 717 u_int cb_index; 718 u_int req_index; 719 int free_rf; 720 721 req = NULL; 722 reply_frame = NULL; 723 reply_baddr = 0; 724 if ((reply_desc & MPI_ADDRESS_REPLY_A_BIT) != 0) { 725 u_int offset; 726 /* 727 * Insure that the reply frame is coherent. 728 */ 729 reply_baddr = MPT_REPLY_BADDR(reply_desc); 730 offset = reply_baddr - (mpt->reply_phys & 0xFFFFFFFF); 731 bus_dmamap_sync_range(mpt->reply_dmat, 732 mpt->reply_dmap, offset, MPT_REPLY_SIZE, 733 BUS_DMASYNC_POSTREAD); 734 reply_frame = MPT_REPLY_OTOV(mpt, offset); 735 ctxt_idx = le32toh(reply_frame->MsgContext); 736 } else { 737 uint32_t type; 738 739 type = MPI_GET_CONTEXT_REPLY_TYPE(reply_desc); 740 ctxt_idx = reply_desc; 741 mpt_lprt(mpt, MPT_PRT_DEBUG1, "Context Reply: 0x%08x\n", 742 reply_desc); 743 744 switch (type) { 745 case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT: 746 ctxt_idx &= MPI_CONTEXT_REPLY_CONTEXT_MASK; 747 break; 748 case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET: 749 ctxt_idx = GET_IO_INDEX(reply_desc); 750 if (mpt->tgt_cmd_ptrs == NULL) { 751 mpt_prt(mpt, 752 "mpt_intr: no target cmd ptrs\n"); 753 reply_desc = MPT_REPLY_EMPTY; 754 break; 755 } 756 if (ctxt_idx >= mpt->tgt_cmds_allocated) { 757 mpt_prt(mpt, 758 "mpt_intr: bad tgt cmd ctxt %u\n", 759 ctxt_idx); 760 reply_desc = MPT_REPLY_EMPTY; 761 ntrips = 1000; 762 break; 763 } 764 req = mpt->tgt_cmd_ptrs[ctxt_idx]; 765 if (req == NULL) { 766 mpt_prt(mpt, "no request backpointer " 767 "at index %u", ctxt_idx); 768 reply_desc = MPT_REPLY_EMPTY; 769 ntrips = 1000; 770 break; 771 } 772 /* 773 * Reformulate ctxt_idx to be just as if 774 * it were another type of context reply 775 * so the code below will find the request 776 * via indexing into the pool. 777 */ 778 ctxt_idx = 779 req->index | mpt->scsi_tgt_handler_id; 780 req = NULL; 781 break; 782 case MPI_CONTEXT_REPLY_TYPE_LAN: 783 mpt_prt(mpt, "LAN CONTEXT REPLY: 0x%08x\n", 784 reply_desc); 785 reply_desc = MPT_REPLY_EMPTY; 786 break; 787 default: 788 mpt_prt(mpt, "Context Reply 0x%08x?\n", type); 789 reply_desc = MPT_REPLY_EMPTY; 790 break; 791 } 792 if (reply_desc == MPT_REPLY_EMPTY) { 793 if (ntrips++ > 1000) { 794 break; 795 } 796 continue; 797 } 798 } 799 800 cb_index = MPT_CONTEXT_TO_CBI(ctxt_idx); 801 req_index = MPT_CONTEXT_TO_REQI(ctxt_idx); 802 if (req_index < MPT_MAX_REQUESTS(mpt)) { 803 req = &mpt->request_pool[req_index]; 804 } else { 805 mpt_prt(mpt, "WARN: mpt_intr index == %d (reply_desc ==" 806 " 0x%x)\n", req_index, reply_desc); 807 } 808 809 free_rf = mpt_reply_handlers[cb_index](mpt, req, 810 reply_desc, reply_frame); 811 812 if (reply_frame != NULL && free_rf) { 813 mpt_free_reply(mpt, reply_baddr); 814 } 815 816 /* 817 * If we got ourselves disabled, don't get stuck in a loop 818 */ 819 if (mpt->disabled) { 820 mpt_disable_ints(mpt); 821 break; 822 } 823 if (ntrips++ > 1000) { 824 break; 825 } 826 } 827 mpt_lprt(mpt, MPT_PRT_DEBUG2, "exit mpt_intr\n"); 828} 829 830/******************************* Error Recovery *******************************/ 831void 832mpt_complete_request_chain(struct mpt_softc *mpt, struct req_queue *chain, 833 u_int iocstatus) 834{ 835 MSG_DEFAULT_REPLY ioc_status_frame; 836 request_t *req; 837 838 memset(&ioc_status_frame, 0, sizeof(ioc_status_frame)); 839 ioc_status_frame.MsgLength = roundup2(sizeof(ioc_status_frame), 4); 840 ioc_status_frame.IOCStatus = iocstatus; 841 while((req = TAILQ_FIRST(chain)) != NULL) { 842 MSG_REQUEST_HEADER *msg_hdr; 843 u_int cb_index; 844 845 TAILQ_REMOVE(chain, req, links); 846 msg_hdr = (MSG_REQUEST_HEADER *)req->req_vbuf; 847 ioc_status_frame.Function = msg_hdr->Function; 848 ioc_status_frame.MsgContext = msg_hdr->MsgContext; 849 cb_index = MPT_CONTEXT_TO_CBI(le32toh(msg_hdr->MsgContext)); 850 mpt_reply_handlers[cb_index](mpt, req, msg_hdr->MsgContext, 851 &ioc_status_frame); 852 } 853} 854 855/********************************* Diagnostics ********************************/ 856/* 857 * Perform a diagnostic dump of a reply frame. 858 */ 859void 860mpt_dump_reply_frame(struct mpt_softc *mpt, MSG_DEFAULT_REPLY *reply_frame) 861{ 862 mpt_prt(mpt, "Address Reply:\n"); 863 mpt_print_reply(reply_frame); 864} 865 866/******************************* Doorbell Access ******************************/ 867static __inline uint32_t mpt_rd_db(struct mpt_softc *mpt); 868static __inline uint32_t mpt_rd_intr(struct mpt_softc *mpt); 869 870static __inline uint32_t 871mpt_rd_db(struct mpt_softc *mpt) 872{ 873 return mpt_read(mpt, MPT_OFFSET_DOORBELL); 874} 875 876static __inline uint32_t 877mpt_rd_intr(struct mpt_softc *mpt) 878{ 879 return mpt_read(mpt, MPT_OFFSET_INTR_STATUS); 880} 881 882/* Busy wait for a door bell to be read by IOC */ 883static int 884mpt_wait_db_ack(struct mpt_softc *mpt) 885{ 886 int i; 887 for (i=0; i < MPT_MAX_WAIT; i++) { 888 if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) { 889 maxwait_ack = i > maxwait_ack ? i : maxwait_ack; 890 return (MPT_OK); 891 } 892 DELAY(200); 893 } 894 return (MPT_FAIL); 895} 896 897/* Busy wait for a door bell interrupt */ 898static int 899mpt_wait_db_int(struct mpt_softc *mpt) 900{ 901 int i; 902 for (i = 0; i < MPT_MAX_WAIT; i++) { 903 if (MPT_DB_INTR(mpt_rd_intr(mpt))) { 904 maxwait_int = i > maxwait_int ? i : maxwait_int; 905 return MPT_OK; 906 } 907 DELAY(100); 908 } 909 return (MPT_FAIL); 910} 911 912/* Wait for IOC to transition to a give state */ 913void 914mpt_check_doorbell(struct mpt_softc *mpt) 915{ 916 uint32_t db = mpt_rd_db(mpt); 917 if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) { 918 mpt_prt(mpt, "Device not running\n"); 919 mpt_print_db(db); 920 } 921} 922 923/* Wait for IOC to transition to a give state */ 924static int 925mpt_wait_state(struct mpt_softc *mpt, enum DB_STATE_BITS state) 926{ 927 int i; 928 929 for (i = 0; i < MPT_MAX_WAIT; i++) { 930 uint32_t db = mpt_rd_db(mpt); 931 if (MPT_STATE(db) == state) { 932 maxwait_state = i > maxwait_state ? i : maxwait_state; 933 return (MPT_OK); 934 } 935 DELAY(100); 936 } 937 return (MPT_FAIL); 938} 939 940 941/************************* Intialization/Configuration ************************/ 942static int mpt_download_fw(struct mpt_softc *mpt); 943 944/* Issue the reset COMMAND to the IOC */ 945static int 946mpt_soft_reset(struct mpt_softc *mpt) 947{ 948 mpt_lprt(mpt, MPT_PRT_DEBUG, "soft reset\n"); 949 950 /* Have to use hard reset if we are not in Running state */ 951 if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) { 952 mpt_prt(mpt, "soft reset failed: device not running\n"); 953 return (MPT_FAIL); 954 } 955 956 /* If door bell is in use we don't have a chance of getting 957 * a word in since the IOC probably crashed in message 958 * processing. So don't waste our time. 959 */ 960 if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) { 961 mpt_prt(mpt, "soft reset failed: doorbell wedged\n"); 962 return (MPT_FAIL); 963 } 964 965 /* Send the reset request to the IOC */ 966 mpt_write(mpt, MPT_OFFSET_DOORBELL, 967 MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT); 968 if (mpt_wait_db_ack(mpt) != MPT_OK) { 969 mpt_prt(mpt, "soft reset failed: ack timeout\n"); 970 return (MPT_FAIL); 971 } 972 973 /* Wait for the IOC to reload and come out of reset state */ 974 if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) { 975 mpt_prt(mpt, "soft reset failed: device did not restart\n"); 976 return (MPT_FAIL); 977 } 978 979 return MPT_OK; 980} 981 982static int 983mpt_enable_diag_mode(struct mpt_softc *mpt) 984{ 985 int try; 986 987 try = 20; 988 while (--try) { 989 990 if ((mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC) & MPI_DIAG_DRWE) != 0) 991 break; 992 993 /* Enable diagnostic registers */ 994 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF); 995 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_1ST_KEY_VALUE); 996 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_2ND_KEY_VALUE); 997 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_3RD_KEY_VALUE); 998 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_4TH_KEY_VALUE); 999 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_5TH_KEY_VALUE); 1000 1001 DELAY(100000); 1002 } 1003 if (try == 0) 1004 return (EIO); 1005 return (0); 1006} 1007 1008static void 1009mpt_disable_diag_mode(struct mpt_softc *mpt) 1010{ 1011 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFFFFFFFF); 1012} 1013 1014/* This is a magic diagnostic reset that resets all the ARM 1015 * processors in the chip. 1016 */ 1017static void 1018mpt_hard_reset(struct mpt_softc *mpt) 1019{ 1020 int error; 1021 int wait; 1022 uint32_t diagreg; 1023 1024 mpt_lprt(mpt, MPT_PRT_DEBUG, "hard reset\n"); 1025 1026 error = mpt_enable_diag_mode(mpt); 1027 if (error) { 1028 mpt_prt(mpt, "WARNING - Could not enter diagnostic mode !\n"); 1029 mpt_prt(mpt, "Trying to reset anyway.\n"); 1030 } 1031 1032 diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 1033 1034 /* 1035 * This appears to be a workaround required for some 1036 * firmware or hardware revs. 1037 */ 1038 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_DISABLE_ARM); 1039 DELAY(1000); 1040 1041 /* Diag. port is now active so we can now hit the reset bit */ 1042 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_RESET_ADAPTER); 1043 1044 /* 1045 * Ensure that the reset has finished. We delay 1ms 1046 * prior to reading the register to make sure the chip 1047 * has sufficiently completed its reset to handle register 1048 * accesses. 1049 */ 1050 wait = 5000; 1051 do { 1052 DELAY(1000); 1053 diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 1054 } while (--wait && (diagreg & MPI_DIAG_RESET_ADAPTER) == 0); 1055 1056 if (wait == 0) { 1057 mpt_prt(mpt, "WARNING - Failed hard reset! " 1058 "Trying to initialize anyway.\n"); 1059 } 1060 1061 /* 1062 * If we have firmware to download, it must be loaded before 1063 * the controller will become operational. Do so now. 1064 */ 1065 if (mpt->fw_image != NULL) { 1066 1067 error = mpt_download_fw(mpt); 1068 1069 if (error) { 1070 mpt_prt(mpt, "WARNING - Firmware Download Failed!\n"); 1071 mpt_prt(mpt, "Trying to initialize anyway.\n"); 1072 } 1073 } 1074 1075 /* 1076 * Reseting the controller should have disabled write 1077 * access to the diagnostic registers, but disable 1078 * manually to be sure. 1079 */ 1080 mpt_disable_diag_mode(mpt); 1081} 1082 1083static void 1084mpt_core_ioc_reset(struct mpt_softc *mpt, int type) 1085{ 1086 /* 1087 * Complete all pending requests with a status 1088 * appropriate for an IOC reset. 1089 */ 1090 mpt_complete_request_chain(mpt, &mpt->request_pending_list, 1091 MPI_IOCSTATUS_INVALID_STATE); 1092} 1093 1094 1095/* 1096 * Reset the IOC when needed. Try software command first then if needed 1097 * poke at the magic diagnostic reset. Note that a hard reset resets 1098 * *both* IOCs on dual function chips (FC929 && LSI1030) as well as 1099 * fouls up the PCI configuration registers. 1100 */ 1101int 1102mpt_reset(struct mpt_softc *mpt, int reinit) 1103{ 1104 struct mpt_personality *pers; 1105 int ret; 1106 int retry_cnt = 0; 1107 1108 /* 1109 * Try a soft reset. If that fails, get out the big hammer. 1110 */ 1111 again: 1112 if ((ret = mpt_soft_reset(mpt)) != MPT_OK) { 1113 int cnt; 1114 for (cnt = 0; cnt < 5; cnt++) { 1115 /* Failed; do a hard reset */ 1116 mpt_hard_reset(mpt); 1117 1118 /* 1119 * Wait for the IOC to reload 1120 * and come out of reset state 1121 */ 1122 ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 1123 if (ret == MPT_OK) { 1124 break; 1125 } 1126 /* 1127 * Okay- try to check again... 1128 */ 1129 ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 1130 if (ret == MPT_OK) { 1131 break; 1132 } 1133 mpt_prt(mpt, "mpt_reset: failed hard reset (%d:%d)\n", 1134 retry_cnt, cnt); 1135 } 1136 } 1137 1138 if (retry_cnt == 0) { 1139 /* 1140 * Invoke reset handlers. We bump the reset count so 1141 * that mpt_wait_req() understands that regardless of 1142 * the specified wait condition, it should stop its wait. 1143 */ 1144 mpt->reset_cnt++; 1145 MPT_PERS_FOREACH(mpt, pers) 1146 pers->reset(mpt, ret); 1147 } 1148 1149 if (reinit) { 1150 ret = mpt_enable_ioc(mpt, 1); 1151 if (ret == MPT_OK) { 1152 mpt_enable_ints(mpt); 1153 } 1154 } 1155 if (ret != MPT_OK && retry_cnt++ < 2) { 1156 goto again; 1157 } 1158 return ret; 1159} 1160 1161/* Return a command buffer to the free queue */ 1162void 1163mpt_free_request(struct mpt_softc *mpt, request_t *req) 1164{ 1165 request_t *nxt; 1166 struct mpt_evtf_record *record; 1167 uint32_t reply_baddr; 1168 1169 if (req == NULL || req != &mpt->request_pool[req->index]) { 1170 panic("mpt_free_request bad req ptr\n"); 1171 return; 1172 } 1173 if ((nxt = req->chain) != NULL) { 1174 req->chain = NULL; 1175 mpt_free_request(mpt, nxt); /* NB: recursion */ 1176 } 1177 KASSERT(req->state != REQ_STATE_FREE, ("freeing free request")); 1178 KASSERT(!(req->state & REQ_STATE_LOCKED), ("freeing locked request")); 1179 MPT_LOCK_ASSERT(mpt); 1180 KASSERT(mpt_req_on_free_list(mpt, req) == 0, 1181 ("mpt_free_request: req %p:%u func %x already on freelist", 1182 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1183 KASSERT(mpt_req_on_pending_list(mpt, req) == 0, 1184 ("mpt_free_request: req %p:%u func %x on pending list", 1185 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1186#ifdef INVARIANTS 1187 mpt_req_not_spcl(mpt, req, "mpt_free_request", __LINE__); 1188#endif 1189 1190 req->ccb = NULL; 1191 if (LIST_EMPTY(&mpt->ack_frames)) { 1192 /* 1193 * Insert free ones at the tail 1194 */ 1195 req->serno = 0; 1196 req->state = REQ_STATE_FREE; 1197#ifdef INVARIANTS 1198 memset(req->req_vbuf, 0xff, sizeof (MSG_REQUEST_HEADER)); 1199#endif 1200 TAILQ_INSERT_TAIL(&mpt->request_free_list, req, links); 1201 if (mpt->getreqwaiter != 0) { 1202 mpt->getreqwaiter = 0; 1203 wakeup(&mpt->request_free_list); 1204 } 1205 return; 1206 } 1207 1208 /* 1209 * Process an ack frame deferred due to resource shortage. 1210 */ 1211 record = LIST_FIRST(&mpt->ack_frames); 1212 LIST_REMOVE(record, links); 1213 req->state = REQ_STATE_ALLOCATED; 1214 mpt_assign_serno(mpt, req); 1215 mpt_send_event_ack(mpt, req, &record->reply, record->context); 1216 reply_baddr = (uint32_t)((uint8_t *)record - mpt->reply) 1217 + (mpt->reply_phys & 0xFFFFFFFF); 1218 mpt_free_reply(mpt, reply_baddr); 1219} 1220 1221/* Get a command buffer from the free queue */ 1222request_t * 1223mpt_get_request(struct mpt_softc *mpt, int sleep_ok) 1224{ 1225 request_t *req; 1226 1227retry: 1228 MPT_LOCK_ASSERT(mpt); 1229 req = TAILQ_FIRST(&mpt->request_free_list); 1230 if (req != NULL) { 1231 KASSERT(req == &mpt->request_pool[req->index], 1232 ("mpt_get_request: corrupted request free list\n")); 1233 KASSERT(req->state == REQ_STATE_FREE, 1234 ("req %p:%u not free on free list %x index %d function %x", 1235 req, req->serno, req->state, req->index, 1236 ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1237 TAILQ_REMOVE(&mpt->request_free_list, req, links); 1238 req->state = REQ_STATE_ALLOCATED; 1239 req->chain = NULL; 1240 mpt_assign_serno(mpt, req); 1241 } else if (sleep_ok != 0) { 1242 mpt->getreqwaiter = 1; 1243 mpt_sleep(mpt, &mpt->request_free_list, PUSER, "mptgreq", 0); 1244 goto retry; 1245 } 1246 return (req); 1247} 1248 1249/* Pass the command to the IOC */ 1250void 1251mpt_send_cmd(struct mpt_softc *mpt, request_t *req) 1252{ 1253 if (mpt->verbose > MPT_PRT_DEBUG2) { 1254 mpt_dump_request(mpt, req); 1255 } 1256 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 1257 BUS_DMASYNC_PREWRITE); 1258 req->state |= REQ_STATE_QUEUED; 1259 KASSERT(mpt_req_on_free_list(mpt, req) == 0, 1260 ("req %p:%u func %x on freelist list in mpt_send_cmd", 1261 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1262 KASSERT(mpt_req_on_pending_list(mpt, req) == 0, 1263 ("req %p:%u func %x already on pending list in mpt_send_cmd", 1264 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1265 TAILQ_INSERT_HEAD(&mpt->request_pending_list, req, links); 1266 mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (uint32_t) req->req_pbuf); 1267} 1268 1269/* 1270 * Wait for a request to complete. 1271 * 1272 * Inputs: 1273 * mpt softc of controller executing request 1274 * req request to wait for 1275 * sleep_ok nonzero implies may sleep in this context 1276 * time_ms timeout in ms. 0 implies no timeout. 1277 * 1278 * Return Values: 1279 * 0 Request completed 1280 * non-0 Timeout fired before request completion. 1281 */ 1282int 1283mpt_wait_req(struct mpt_softc *mpt, request_t *req, 1284 mpt_req_state_t state, mpt_req_state_t mask, 1285 int sleep_ok, int time_ms) 1286{ 1287 int error; 1288 int timeout; 1289 u_int saved_cnt; 1290 1291 /* 1292 * timeout is in ms. 0 indicates infinite wait. 1293 * Convert to ticks or 500us units depending on 1294 * our sleep mode. 1295 */ 1296 if (sleep_ok != 0) { 1297 timeout = (time_ms * hz) / 1000; 1298 } else { 1299 timeout = time_ms * 2; 1300 } 1301 req->state |= REQ_STATE_NEED_WAKEUP; 1302 mask &= ~REQ_STATE_NEED_WAKEUP; 1303 saved_cnt = mpt->reset_cnt; 1304 while ((req->state & mask) != state && mpt->reset_cnt == saved_cnt) { 1305 if (sleep_ok != 0) { 1306 error = mpt_sleep(mpt, req, PUSER, "mptreq", timeout); 1307 if (error == EWOULDBLOCK) { 1308 timeout = 0; 1309 break; 1310 } 1311 } else { 1312 if (time_ms != 0 && --timeout == 0) { 1313 break; 1314 } 1315 DELAY(500); 1316 mpt_intr(mpt); 1317 } 1318 } 1319 req->state &= ~REQ_STATE_NEED_WAKEUP; 1320 if (mpt->reset_cnt != saved_cnt) { 1321 return (EIO); 1322 } 1323 if (time_ms && timeout <= 0) { 1324 MSG_REQUEST_HEADER *msg_hdr = req->req_vbuf; 1325 req->state |= REQ_STATE_TIMEDOUT; 1326 mpt_prt(mpt, "mpt_wait_req(%x) timed out\n", msg_hdr->Function); 1327 return (ETIMEDOUT); 1328 } 1329 return (0); 1330} 1331 1332/* 1333 * Send a command to the IOC via the handshake register. 1334 * 1335 * Only done at initialization time and for certain unusual 1336 * commands such as device/bus reset as specified by LSI. 1337 */ 1338int 1339mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd) 1340{ 1341 int i; 1342 uint32_t data, *data32; 1343 1344 /* Check condition of the IOC */ 1345 data = mpt_rd_db(mpt); 1346 if ((MPT_STATE(data) != MPT_DB_STATE_READY 1347 && MPT_STATE(data) != MPT_DB_STATE_RUNNING 1348 && MPT_STATE(data) != MPT_DB_STATE_FAULT) 1349 || MPT_DB_IS_IN_USE(data)) { 1350 mpt_prt(mpt, "handshake aborted - invalid doorbell state\n"); 1351 mpt_print_db(data); 1352 return (EBUSY); 1353 } 1354 1355 /* We move things in 32 bit chunks */ 1356 len = (len + 3) >> 2; 1357 data32 = cmd; 1358 1359 /* Clear any left over pending doorbell interrupts */ 1360 if (MPT_DB_INTR(mpt_rd_intr(mpt))) 1361 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1362 1363 /* 1364 * Tell the handshake reg. we are going to send a command 1365 * and how long it is going to be. 1366 */ 1367 data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) | 1368 (len << MPI_DOORBELL_ADD_DWORDS_SHIFT); 1369 mpt_write(mpt, MPT_OFFSET_DOORBELL, data); 1370 1371 /* Wait for the chip to notice */ 1372 if (mpt_wait_db_int(mpt) != MPT_OK) { 1373 mpt_prt(mpt, "mpt_send_handshake_cmd: db ignored\n"); 1374 return (ETIMEDOUT); 1375 } 1376 1377 /* Clear the interrupt */ 1378 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1379 1380 if (mpt_wait_db_ack(mpt) != MPT_OK) { 1381 mpt_prt(mpt, "mpt_send_handshake_cmd: db ack timed out\n"); 1382 return (ETIMEDOUT); 1383 } 1384 1385 /* Send the command */ 1386 for (i = 0; i < len; i++) { 1387 mpt_write(mpt, MPT_OFFSET_DOORBELL, htole32(*data32++)); 1388 if (mpt_wait_db_ack(mpt) != MPT_OK) { 1389 mpt_prt(mpt, 1390 "mpt_send_handshake_cmd: timeout @ index %d\n", i); 1391 return (ETIMEDOUT); 1392 } 1393 } 1394 return MPT_OK; 1395} 1396 1397/* Get the response from the handshake register */ 1398int 1399mpt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply) 1400{ 1401 int left, reply_left; 1402 u_int16_t *data16; 1403 uint32_t data; 1404 MSG_DEFAULT_REPLY *hdr; 1405 1406 /* We move things out in 16 bit chunks */ 1407 reply_len >>= 1; 1408 data16 = (u_int16_t *)reply; 1409 1410 hdr = (MSG_DEFAULT_REPLY *)reply; 1411 1412 /* Get first word */ 1413 if (mpt_wait_db_int(mpt) != MPT_OK) { 1414 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout1\n"); 1415 return ETIMEDOUT; 1416 } 1417 data = mpt_read(mpt, MPT_OFFSET_DOORBELL); 1418 *data16++ = le16toh(data & MPT_DB_DATA_MASK); 1419 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1420 1421 /* Get Second Word */ 1422 if (mpt_wait_db_int(mpt) != MPT_OK) { 1423 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout2\n"); 1424 return ETIMEDOUT; 1425 } 1426 data = mpt_read(mpt, MPT_OFFSET_DOORBELL); 1427 *data16++ = le16toh(data & MPT_DB_DATA_MASK); 1428 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1429 1430 /* 1431 * With the second word, we can now look at the length. 1432 * Warn about a reply that's too short (except for IOC FACTS REPLY) 1433 */ 1434 if ((reply_len >> 1) != hdr->MsgLength && 1435 (hdr->Function != MPI_FUNCTION_IOC_FACTS)){ 1436#if __FreeBSD_version >= 500000 1437 mpt_prt(mpt, "reply length does not match message length: " 1438 "got %x; expected %zx for function %x\n", 1439 hdr->MsgLength << 2, reply_len << 1, hdr->Function); 1440#else 1441 mpt_prt(mpt, "reply length does not match message length: " 1442 "got %x; expected %x for function %x\n", 1443 hdr->MsgLength << 2, reply_len << 1, hdr->Function); 1444#endif 1445 } 1446 1447 /* Get rest of the reply; but don't overflow the provided buffer */ 1448 left = (hdr->MsgLength << 1) - 2; 1449 reply_left = reply_len - 2; 1450 while (left--) { 1451 u_int16_t datum; 1452 1453 if (mpt_wait_db_int(mpt) != MPT_OK) { 1454 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout3\n"); 1455 return ETIMEDOUT; 1456 } 1457 data = mpt_read(mpt, MPT_OFFSET_DOORBELL); 1458 datum = le16toh(data & MPT_DB_DATA_MASK); 1459 1460 if (reply_left-- > 0) 1461 *data16++ = datum; 1462 1463 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1464 } 1465 1466 /* One more wait & clear at the end */ 1467 if (mpt_wait_db_int(mpt) != MPT_OK) { 1468 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout4\n"); 1469 return ETIMEDOUT; 1470 } 1471 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1472 1473 if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1474 if (mpt->verbose >= MPT_PRT_TRACE) 1475 mpt_print_reply(hdr); 1476 return (MPT_FAIL | hdr->IOCStatus); 1477 } 1478 1479 return (0); 1480} 1481 1482static int 1483mpt_get_iocfacts(struct mpt_softc *mpt, MSG_IOC_FACTS_REPLY *freplp) 1484{ 1485 MSG_IOC_FACTS f_req; 1486 int error; 1487 1488 memset(&f_req, 0, sizeof f_req); 1489 f_req.Function = MPI_FUNCTION_IOC_FACTS; 1490 f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1491 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 1492 if (error) { 1493 return(error); 1494 } 1495 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 1496 return (error); 1497} 1498 1499static int 1500mpt_get_portfacts(struct mpt_softc *mpt, U8 port, MSG_PORT_FACTS_REPLY *freplp) 1501{ 1502 MSG_PORT_FACTS f_req; 1503 int error; 1504 1505 memset(&f_req, 0, sizeof f_req); 1506 f_req.Function = MPI_FUNCTION_PORT_FACTS; 1507 f_req.PortNumber = port; 1508 f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1509 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 1510 if (error) { 1511 return(error); 1512 } 1513 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 1514 return (error); 1515} 1516 1517/* 1518 * Send the initialization request. This is where we specify how many 1519 * SCSI busses and how many devices per bus we wish to emulate. 1520 * This is also the command that specifies the max size of the reply 1521 * frames from the IOC that we will be allocating. 1522 */ 1523static int 1524mpt_send_ioc_init(struct mpt_softc *mpt, uint32_t who) 1525{ 1526 int error = 0; 1527 MSG_IOC_INIT init; 1528 MSG_IOC_INIT_REPLY reply; 1529 1530 memset(&init, 0, sizeof init); 1531 init.WhoInit = who; 1532 init.Function = MPI_FUNCTION_IOC_INIT; 1533 init.MaxDevices = 0; /* at least 256 devices per bus */ 1534 init.MaxBuses = 16; /* at least 16 busses */ 1535 1536 init.MsgVersion = htole16(MPI_VERSION); 1537 init.HeaderVersion = htole16(MPI_HEADER_VERSION); 1538 init.ReplyFrameSize = htole16(MPT_REPLY_SIZE); 1539 init.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1540 1541 if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) { 1542 return(error); 1543 } 1544 1545 error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply); 1546 return (error); 1547} 1548 1549 1550/* 1551 * Utiltity routine to read configuration headers and pages 1552 */ 1553int 1554mpt_issue_cfg_req(struct mpt_softc *mpt, request_t *req, cfgparms_t *params, 1555 bus_addr_t addr, bus_size_t len, int sleep_ok, int timeout_ms) 1556{ 1557 MSG_CONFIG *cfgp; 1558 SGE_SIMPLE32 *se; 1559 1560 cfgp = req->req_vbuf; 1561 memset(cfgp, 0, sizeof *cfgp); 1562 cfgp->Action = params->Action; 1563 cfgp->Function = MPI_FUNCTION_CONFIG; 1564 cfgp->Header.PageVersion = params->PageVersion; 1565 cfgp->Header.PageNumber = params->PageNumber; 1566 cfgp->PageAddress = htole32(params->PageAddress); 1567 if ((params->PageType & MPI_CONFIG_PAGETYPE_MASK) == 1568 MPI_CONFIG_PAGETYPE_EXTENDED) { 1569 cfgp->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED; 1570 cfgp->Header.PageLength = 0; 1571 cfgp->ExtPageLength = htole16(params->ExtPageLength); 1572 cfgp->ExtPageType = params->ExtPageType; 1573 } else { 1574 cfgp->Header.PageType = params->PageType; 1575 cfgp->Header.PageLength = params->PageLength; 1576 } 1577 se = (SGE_SIMPLE32 *)&cfgp->PageBufferSGE; 1578 se->Address = htole32(addr); 1579 MPI_pSGE_SET_LENGTH(se, len); 1580 MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT | 1581 MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER | 1582 MPI_SGE_FLAGS_END_OF_LIST | 1583 ((params->Action == MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT 1584 || params->Action == MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM) 1585 ? MPI_SGE_FLAGS_HOST_TO_IOC : MPI_SGE_FLAGS_IOC_TO_HOST))); 1586 se->FlagsLength = htole32(se->FlagsLength); 1587 cfgp->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 1588 1589 mpt_check_doorbell(mpt); 1590 mpt_send_cmd(mpt, req); 1591 return (mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1592 sleep_ok, timeout_ms)); 1593} 1594 1595int 1596mpt_read_extcfg_header(struct mpt_softc *mpt, int PageVersion, int PageNumber, 1597 uint32_t PageAddress, int ExtPageType, 1598 CONFIG_EXTENDED_PAGE_HEADER *rslt, 1599 int sleep_ok, int timeout_ms) 1600{ 1601 request_t *req; 1602 cfgparms_t params; 1603 MSG_CONFIG_REPLY *cfgp; 1604 int error; 1605 1606 req = mpt_get_request(mpt, sleep_ok); 1607 if (req == NULL) { 1608 mpt_prt(mpt, "mpt_extread_cfg_header: Get request failed!\n"); 1609 return (ENOMEM); 1610 } 1611 1612 params.Action = MPI_CONFIG_ACTION_PAGE_HEADER; 1613 params.PageVersion = PageVersion; 1614 params.PageLength = 0; 1615 params.PageNumber = PageNumber; 1616 params.PageType = MPI_CONFIG_PAGETYPE_EXTENDED; 1617 params.PageAddress = PageAddress; 1618 params.ExtPageType = ExtPageType; 1619 params.ExtPageLength = 0; 1620 error = mpt_issue_cfg_req(mpt, req, ¶ms, /*addr*/0, /*len*/0, 1621 sleep_ok, timeout_ms); 1622 if (error != 0) { 1623 /* 1624 * Leave the request. Without resetting the chip, it's 1625 * still owned by it and we'll just get into trouble 1626 * freeing it now. Mark it as abandoned so that if it 1627 * shows up later it can be freed. 1628 */ 1629 mpt_prt(mpt, "read_extcfg_header timed out\n"); 1630 return (ETIMEDOUT); 1631 } 1632 1633 switch (req->IOCStatus & MPI_IOCSTATUS_MASK) { 1634 case MPI_IOCSTATUS_SUCCESS: 1635 cfgp = req->req_vbuf; 1636 rslt->PageVersion = cfgp->Header.PageVersion; 1637 rslt->PageNumber = cfgp->Header.PageNumber; 1638 rslt->PageType = cfgp->Header.PageType; 1639 rslt->ExtPageLength = le16toh(cfgp->ExtPageLength); 1640 rslt->ExtPageType = cfgp->ExtPageType; 1641 error = 0; 1642 break; 1643 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: 1644 mpt_lprt(mpt, MPT_PRT_DEBUG, 1645 "Invalid Page Type %d Number %d Addr 0x%0x\n", 1646 MPI_CONFIG_PAGETYPE_EXTENDED, PageNumber, PageAddress); 1647 error = EINVAL; 1648 break; 1649 default: 1650 mpt_prt(mpt, "mpt_read_extcfg_header: Config Info Status %x\n", 1651 req->IOCStatus); 1652 error = EIO; 1653 break; 1654 } 1655 mpt_free_request(mpt, req); 1656 return (error); 1657} 1658 1659int 1660mpt_read_extcfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1661 CONFIG_EXTENDED_PAGE_HEADER *hdr, void *buf, size_t len, 1662 int sleep_ok, int timeout_ms) 1663{ 1664 request_t *req; 1665 cfgparms_t params; 1666 int error; 1667 1668 req = mpt_get_request(mpt, sleep_ok); 1669 if (req == NULL) { 1670 mpt_prt(mpt, "mpt_read_extcfg_page: Get request failed!\n"); 1671 return (-1); 1672 } 1673 1674 params.Action = Action; 1675 params.PageVersion = hdr->PageVersion; 1676 params.PageLength = 0; 1677 params.PageNumber = hdr->PageNumber; 1678 params.PageType = MPI_CONFIG_PAGETYPE_EXTENDED; 1679 params.PageAddress = PageAddress; 1680 params.ExtPageType = hdr->ExtPageType; 1681 params.ExtPageLength = hdr->ExtPageLength; 1682 error = mpt_issue_cfg_req(mpt, req, ¶ms, 1683 req->req_pbuf + MPT_RQSL(mpt), 1684 len, sleep_ok, timeout_ms); 1685 if (error != 0) { 1686 mpt_prt(mpt, "read_extcfg_page(%d) timed out\n", Action); 1687 return (-1); 1688 } 1689 1690 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1691 mpt_prt(mpt, "mpt_read_extcfg_page: Config Info Status %x\n", 1692 req->IOCStatus); 1693 mpt_free_request(mpt, req); 1694 return (-1); 1695 } 1696 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 1697 BUS_DMASYNC_POSTREAD); 1698 memcpy(buf, ((uint8_t *)req->req_vbuf)+MPT_RQSL(mpt), len); 1699 mpt_free_request(mpt, req); 1700 return (0); 1701} 1702 1703int 1704mpt_read_cfg_header(struct mpt_softc *mpt, int PageType, int PageNumber, 1705 uint32_t PageAddress, CONFIG_PAGE_HEADER *rslt, 1706 int sleep_ok, int timeout_ms) 1707{ 1708 request_t *req; 1709 cfgparms_t params; 1710 MSG_CONFIG *cfgp; 1711 int error; 1712 1713 req = mpt_get_request(mpt, sleep_ok); 1714 if (req == NULL) { 1715 mpt_prt(mpt, "mpt_read_cfg_header: Get request failed!\n"); 1716 return (ENOMEM); 1717 } 1718 1719 params.Action = MPI_CONFIG_ACTION_PAGE_HEADER; 1720 params.PageVersion = 0; 1721 params.PageLength = 0; 1722 params.PageNumber = PageNumber; 1723 params.PageType = PageType; 1724 params.PageAddress = PageAddress; 1725 error = mpt_issue_cfg_req(mpt, req, ¶ms, /*addr*/0, /*len*/0, 1726 sleep_ok, timeout_ms); 1727 if (error != 0) { 1728 /* 1729 * Leave the request. Without resetting the chip, it's 1730 * still owned by it and we'll just get into trouble 1731 * freeing it now. Mark it as abandoned so that if it 1732 * shows up later it can be freed. 1733 */ 1734 mpt_prt(mpt, "read_cfg_header timed out\n"); 1735 return (ETIMEDOUT); 1736 } 1737 1738 switch (req->IOCStatus & MPI_IOCSTATUS_MASK) { 1739 case MPI_IOCSTATUS_SUCCESS: 1740 cfgp = req->req_vbuf; 1741 bcopy(&cfgp->Header, rslt, sizeof(*rslt)); 1742 error = 0; 1743 break; 1744 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: 1745 mpt_lprt(mpt, MPT_PRT_DEBUG, 1746 "Invalid Page Type %d Number %d Addr 0x%0x\n", 1747 PageType, PageNumber, PageAddress); 1748 error = EINVAL; 1749 break; 1750 default: 1751 mpt_prt(mpt, "mpt_read_cfg_header: Config Info Status %x\n", 1752 req->IOCStatus); 1753 error = EIO; 1754 break; 1755 } 1756 mpt_free_request(mpt, req); 1757 return (error); 1758} 1759 1760int 1761mpt_read_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1762 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1763 int timeout_ms) 1764{ 1765 request_t *req; 1766 cfgparms_t params; 1767 int error; 1768 1769 req = mpt_get_request(mpt, sleep_ok); 1770 if (req == NULL) { 1771 mpt_prt(mpt, "mpt_read_cfg_page: Get request failed!\n"); 1772 return (-1); 1773 } 1774 1775 params.Action = Action; 1776 params.PageVersion = hdr->PageVersion; 1777 params.PageLength = hdr->PageLength; 1778 params.PageNumber = hdr->PageNumber; 1779 params.PageType = hdr->PageType & MPI_CONFIG_PAGETYPE_MASK; 1780 params.PageAddress = PageAddress; 1781 error = mpt_issue_cfg_req(mpt, req, ¶ms, 1782 req->req_pbuf + MPT_RQSL(mpt), 1783 len, sleep_ok, timeout_ms); 1784 if (error != 0) { 1785 mpt_prt(mpt, "read_cfg_page(%d) timed out\n", Action); 1786 return (-1); 1787 } 1788 1789 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1790 mpt_prt(mpt, "mpt_read_cfg_page: Config Info Status %x\n", 1791 req->IOCStatus); 1792 mpt_free_request(mpt, req); 1793 return (-1); 1794 } 1795 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 1796 BUS_DMASYNC_POSTREAD); 1797 memcpy(hdr, ((uint8_t *)req->req_vbuf)+MPT_RQSL(mpt), len); 1798 mpt_free_request(mpt, req); 1799 return (0); 1800} 1801 1802int 1803mpt_write_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1804 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1805 int timeout_ms) 1806{ 1807 request_t *req; 1808 cfgparms_t params; 1809 u_int hdr_attr; 1810 int error; 1811 1812 hdr_attr = hdr->PageType & MPI_CONFIG_PAGEATTR_MASK; 1813 if (hdr_attr != MPI_CONFIG_PAGEATTR_CHANGEABLE && 1814 hdr_attr != MPI_CONFIG_PAGEATTR_PERSISTENT) { 1815 mpt_prt(mpt, "page type 0x%x not changeable\n", 1816 hdr->PageType & MPI_CONFIG_PAGETYPE_MASK); 1817 return (-1); 1818 } 1819 1820#if 0 1821 /* 1822 * We shouldn't mask off other bits here. 1823 */ 1824 hdr->PageType &= MPI_CONFIG_PAGETYPE_MASK; 1825#endif 1826 1827 req = mpt_get_request(mpt, sleep_ok); 1828 if (req == NULL) 1829 return (-1); 1830 1831 memcpy(((caddr_t)req->req_vbuf) + MPT_RQSL(mpt), hdr, len); 1832 1833 /* 1834 * There isn't any point in restoring stripped out attributes 1835 * if you then mask them going down to issue the request. 1836 */ 1837 1838 params.Action = Action; 1839 params.PageVersion = hdr->PageVersion; 1840 params.PageLength = hdr->PageLength; 1841 params.PageNumber = hdr->PageNumber; 1842 params.PageAddress = PageAddress; 1843#if 0 1844 /* Restore stripped out attributes */ 1845 hdr->PageType |= hdr_attr; 1846 params.PageType = hdr->PageType & MPI_CONFIG_PAGETYPE_MASK; 1847#else 1848 params.PageType = hdr->PageType; 1849#endif 1850 error = mpt_issue_cfg_req(mpt, req, ¶ms, 1851 req->req_pbuf + MPT_RQSL(mpt), 1852 len, sleep_ok, timeout_ms); 1853 if (error != 0) { 1854 mpt_prt(mpt, "mpt_write_cfg_page timed out\n"); 1855 return (-1); 1856 } 1857 1858 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1859 mpt_prt(mpt, "mpt_write_cfg_page: Config Info Status %x\n", 1860 req->IOCStatus); 1861 mpt_free_request(mpt, req); 1862 return (-1); 1863 } 1864 mpt_free_request(mpt, req); 1865 return (0); 1866} 1867 1868/* 1869 * Read IOC configuration information 1870 */ 1871static int 1872mpt_read_config_info_ioc(struct mpt_softc *mpt) 1873{ 1874 CONFIG_PAGE_HEADER hdr; 1875 struct mpt_raid_volume *mpt_raid; 1876 int rv; 1877 int i; 1878 size_t len; 1879 1880 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1881 2, 0, &hdr, FALSE, 5000); 1882 /* 1883 * If it's an invalid page, so what? Not a supported function.... 1884 */ 1885 if (rv == EINVAL) { 1886 return (0); 1887 } 1888 if (rv) { 1889 return (rv); 1890 } 1891 1892 mpt_lprt(mpt, MPT_PRT_DEBUG, 1893 "IOC Page 2 Header: Version %x len %x PageNumber %x PageType %x\n", 1894 hdr.PageVersion, hdr.PageLength << 2, 1895 hdr.PageNumber, hdr.PageType); 1896 1897 len = hdr.PageLength * sizeof(uint32_t); 1898 mpt->ioc_page2 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1899 if (mpt->ioc_page2 == NULL) { 1900 mpt_prt(mpt, "unable to allocate memory for IOC page 2\n"); 1901 mpt_raid_free_mem(mpt); 1902 return (ENOMEM); 1903 } 1904 memcpy(&mpt->ioc_page2->Header, &hdr, sizeof(hdr)); 1905 rv = mpt_read_cur_cfg_page(mpt, 0, 1906 &mpt->ioc_page2->Header, len, FALSE, 5000); 1907 if (rv) { 1908 mpt_prt(mpt, "failed to read IOC Page 2\n"); 1909 mpt_raid_free_mem(mpt); 1910 return (EIO); 1911 } 1912 mpt2host_config_page_ioc2(mpt->ioc_page2); 1913 1914 if (mpt->ioc_page2->CapabilitiesFlags != 0) { 1915 uint32_t mask; 1916 1917 mpt_prt(mpt, "Capabilities: ("); 1918 for (mask = 1; mask != 0; mask <<= 1) { 1919 if ((mpt->ioc_page2->CapabilitiesFlags & mask) == 0) { 1920 continue; 1921 } 1922 switch (mask) { 1923 case MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT: 1924 mpt_prtc(mpt, " RAID-0"); 1925 break; 1926 case MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT: 1927 mpt_prtc(mpt, " RAID-1E"); 1928 break; 1929 case MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT: 1930 mpt_prtc(mpt, " RAID-1"); 1931 break; 1932 case MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT: 1933 mpt_prtc(mpt, " SES"); 1934 break; 1935 case MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT: 1936 mpt_prtc(mpt, " SAFTE"); 1937 break; 1938 case MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT: 1939 mpt_prtc(mpt, " Multi-Channel-Arrays"); 1940 default: 1941 break; 1942 } 1943 } 1944 mpt_prtc(mpt, " )\n"); 1945 if ((mpt->ioc_page2->CapabilitiesFlags 1946 & (MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT 1947 | MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT 1948 | MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT)) != 0) { 1949 mpt_prt(mpt, "%d Active Volume%s(%d Max)\n", 1950 mpt->ioc_page2->NumActiveVolumes, 1951 mpt->ioc_page2->NumActiveVolumes != 1 1952 ? "s " : " ", 1953 mpt->ioc_page2->MaxVolumes); 1954 mpt_prt(mpt, "%d Hidden Drive Member%s(%d Max)\n", 1955 mpt->ioc_page2->NumActivePhysDisks, 1956 mpt->ioc_page2->NumActivePhysDisks != 1 1957 ? "s " : " ", 1958 mpt->ioc_page2->MaxPhysDisks); 1959 } 1960 } 1961 1962 len = mpt->ioc_page2->MaxVolumes * sizeof(struct mpt_raid_volume); 1963 mpt->raid_volumes = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1964 if (mpt->raid_volumes == NULL) { 1965 mpt_prt(mpt, "Could not allocate RAID volume data\n"); 1966 mpt_raid_free_mem(mpt); 1967 return (ENOMEM); 1968 } 1969 1970 /* 1971 * Copy critical data out of ioc_page2 so that we can 1972 * safely refresh the page without windows of unreliable 1973 * data. 1974 */ 1975 mpt->raid_max_volumes = mpt->ioc_page2->MaxVolumes; 1976 1977 len = sizeof(*mpt->raid_volumes->config_page) + 1978 (sizeof (RAID_VOL0_PHYS_DISK) * (mpt->ioc_page2->MaxPhysDisks - 1)); 1979 for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) { 1980 mpt_raid = &mpt->raid_volumes[i]; 1981 mpt_raid->config_page = 1982 malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1983 if (mpt_raid->config_page == NULL) { 1984 mpt_prt(mpt, "Could not allocate RAID page data\n"); 1985 mpt_raid_free_mem(mpt); 1986 return (ENOMEM); 1987 } 1988 } 1989 mpt->raid_page0_len = len; 1990 1991 len = mpt->ioc_page2->MaxPhysDisks * sizeof(struct mpt_raid_disk); 1992 mpt->raid_disks = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1993 if (mpt->raid_disks == NULL) { 1994 mpt_prt(mpt, "Could not allocate RAID disk data\n"); 1995 mpt_raid_free_mem(mpt); 1996 return (ENOMEM); 1997 } 1998 mpt->raid_max_disks = mpt->ioc_page2->MaxPhysDisks; 1999 2000 /* 2001 * Load page 3. 2002 */ 2003 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 2004 3, 0, &hdr, FALSE, 5000); 2005 if (rv) { 2006 mpt_raid_free_mem(mpt); 2007 return (EIO); 2008 } 2009 2010 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 3 Header: %x %x %x %x\n", 2011 hdr.PageVersion, hdr.PageLength, hdr.PageNumber, hdr.PageType); 2012 2013 len = hdr.PageLength * sizeof(uint32_t); 2014 mpt->ioc_page3 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 2015 if (mpt->ioc_page3 == NULL) { 2016 mpt_prt(mpt, "unable to allocate memory for IOC page 3\n"); 2017 mpt_raid_free_mem(mpt); 2018 return (ENOMEM); 2019 } 2020 memcpy(&mpt->ioc_page3->Header, &hdr, sizeof(hdr)); 2021 rv = mpt_read_cur_cfg_page(mpt, 0, 2022 &mpt->ioc_page3->Header, len, FALSE, 5000); 2023 if (rv) { 2024 mpt_raid_free_mem(mpt); 2025 return (EIO); 2026 } 2027 mpt2host_config_page_ioc3(mpt->ioc_page3); 2028 mpt_raid_wakeup(mpt); 2029 return (0); 2030} 2031 2032/* 2033 * Enable IOC port 2034 */ 2035static int 2036mpt_send_port_enable(struct mpt_softc *mpt, int port) 2037{ 2038 request_t *req; 2039 MSG_PORT_ENABLE *enable_req; 2040 int error; 2041 2042 req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 2043 if (req == NULL) 2044 return (-1); 2045 2046 enable_req = req->req_vbuf; 2047 memset(enable_req, 0, MPT_RQSL(mpt)); 2048 2049 enable_req->Function = MPI_FUNCTION_PORT_ENABLE; 2050 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 2051 enable_req->PortNumber = port; 2052 2053 mpt_check_doorbell(mpt); 2054 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling port %d\n", port); 2055 2056 mpt_send_cmd(mpt, req); 2057 error = mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 2058 FALSE, (mpt->is_sas || mpt->is_fc)? 30000 : 3000); 2059 if (error != 0) { 2060 mpt_prt(mpt, "port %d enable timed out\n", port); 2061 return (-1); 2062 } 2063 mpt_free_request(mpt, req); 2064 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabled port %d\n", port); 2065 return (0); 2066} 2067 2068/* 2069 * Enable/Disable asynchronous event reporting. 2070 */ 2071static int 2072mpt_send_event_request(struct mpt_softc *mpt, int onoff) 2073{ 2074 request_t *req; 2075 MSG_EVENT_NOTIFY *enable_req; 2076 2077 req = mpt_get_request(mpt, FALSE); 2078 if (req == NULL) { 2079 return (ENOMEM); 2080 } 2081 enable_req = req->req_vbuf; 2082 memset(enable_req, 0, sizeof *enable_req); 2083 2084 enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION; 2085 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_EVENTS); 2086 enable_req->Switch = onoff; 2087 2088 mpt_check_doorbell(mpt); 2089 mpt_lprt(mpt, MPT_PRT_DEBUG, "%sabling async events\n", 2090 onoff ? "en" : "dis"); 2091 /* 2092 * Send the command off, but don't wait for it. 2093 */ 2094 mpt_send_cmd(mpt, req); 2095 return (0); 2096} 2097 2098/* 2099 * Un-mask the interrupts on the chip. 2100 */ 2101void 2102mpt_enable_ints(struct mpt_softc *mpt) 2103{ 2104 /* Unmask every thing except door bell int */ 2105 mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK); 2106} 2107 2108/* 2109 * Mask the interrupts on the chip. 2110 */ 2111void 2112mpt_disable_ints(struct mpt_softc *mpt) 2113{ 2114 /* Mask all interrupts */ 2115 mpt_write(mpt, MPT_OFFSET_INTR_MASK, 2116 MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK); 2117} 2118 2119static void 2120mpt_sysctl_attach(struct mpt_softc *mpt) 2121{ 2122#if __FreeBSD_version >= 500000 2123 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(mpt->dev); 2124 struct sysctl_oid *tree = device_get_sysctl_tree(mpt->dev); 2125 2126 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 2127 "debug", CTLFLAG_RW, &mpt->verbose, 0, 2128 "Debugging/Verbose level"); 2129 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 2130 "role", CTLFLAG_RD, &mpt->role, 0, 2131 "HBA role"); 2132#ifdef MPT_TEST_MULTIPATH 2133 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 2134 "failure_id", CTLFLAG_RW, &mpt->failure_id, -1, 2135 "Next Target to Fail"); 2136#endif 2137#endif 2138} 2139 2140int 2141mpt_attach(struct mpt_softc *mpt) 2142{ 2143 struct mpt_personality *pers; 2144 int i; 2145 int error; 2146 2147 mpt_core_attach(mpt); 2148 mpt_core_enable(mpt); 2149 2150 TAILQ_INSERT_TAIL(&mpt_tailq, mpt, links); 2151 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 2152 pers = mpt_personalities[i]; 2153 if (pers == NULL) { 2154 continue; 2155 } 2156 if (pers->probe(mpt) == 0) { 2157 error = pers->attach(mpt); 2158 if (error != 0) { 2159 mpt_detach(mpt); 2160 return (error); 2161 } 2162 mpt->mpt_pers_mask |= (0x1 << pers->id); 2163 pers->use_count++; 2164 } 2165 } 2166 2167 /* 2168 * Now that we've attached everything, do the enable function 2169 * for all of the personalities. This allows the personalities 2170 * to do setups that are appropriate for them prior to enabling 2171 * any ports. 2172 */ 2173 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 2174 pers = mpt_personalities[i]; 2175 if (pers != NULL && MPT_PERS_ATTACHED(pers, mpt) != 0) { 2176 error = pers->enable(mpt); 2177 if (error != 0) { 2178 mpt_prt(mpt, "personality %s attached but would" 2179 " not enable (%d)\n", pers->name, error); 2180 mpt_detach(mpt); 2181 return (error); 2182 } 2183 } 2184 } 2185 return (0); 2186} 2187 2188int 2189mpt_shutdown(struct mpt_softc *mpt) 2190{ 2191 struct mpt_personality *pers; 2192 2193 MPT_PERS_FOREACH_REVERSE(mpt, pers) { 2194 pers->shutdown(mpt); 2195 } 2196 return (0); 2197} 2198 2199int 2200mpt_detach(struct mpt_softc *mpt) 2201{ 2202 struct mpt_personality *pers; 2203 2204 MPT_PERS_FOREACH_REVERSE(mpt, pers) { 2205 pers->detach(mpt); 2206 mpt->mpt_pers_mask &= ~(0x1 << pers->id); 2207 pers->use_count--; 2208 } 2209 TAILQ_REMOVE(&mpt_tailq, mpt, links); 2210 return (0); 2211} 2212 2213int 2214mpt_core_load(struct mpt_personality *pers) 2215{ 2216 int i; 2217 2218 /* 2219 * Setup core handlers and insert the default handler 2220 * into all "empty slots". 2221 */ 2222 for (i = 0; i < MPT_NUM_REPLY_HANDLERS; i++) { 2223 mpt_reply_handlers[i] = mpt_default_reply_handler; 2224 } 2225 2226 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_EVENTS)] = 2227 mpt_event_reply_handler; 2228 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_CONFIG)] = 2229 mpt_config_reply_handler; 2230 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_HANDSHAKE)] = 2231 mpt_handshake_reply_handler; 2232 return (0); 2233} 2234 2235/* 2236 * Initialize per-instance driver data and perform 2237 * initial controller configuration. 2238 */ 2239int 2240mpt_core_attach(struct mpt_softc *mpt) 2241{ 2242 int val, error; 2243 2244 LIST_INIT(&mpt->ack_frames); 2245 /* Put all request buffers on the free list */ 2246 TAILQ_INIT(&mpt->request_pending_list); 2247 TAILQ_INIT(&mpt->request_free_list); 2248 TAILQ_INIT(&mpt->request_timeout_list); 2249 MPT_LOCK(mpt); 2250 for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) { 2251 request_t *req = &mpt->request_pool[val]; 2252 req->state = REQ_STATE_ALLOCATED; 2253 mpt_callout_init(mpt, &req->callout); 2254 mpt_free_request(mpt, req); 2255 } 2256 MPT_UNLOCK(mpt); 2257 for (val = 0; val < MPT_MAX_LUNS; val++) { 2258 STAILQ_INIT(&mpt->trt[val].atios); 2259 STAILQ_INIT(&mpt->trt[val].inots); 2260 } 2261 STAILQ_INIT(&mpt->trt_wildcard.atios); 2262 STAILQ_INIT(&mpt->trt_wildcard.inots); 2263#ifdef MPT_TEST_MULTIPATH 2264 mpt->failure_id = -1; 2265#endif 2266 mpt->scsi_tgt_handler_id = MPT_HANDLER_ID_NONE; 2267 mpt_sysctl_attach(mpt); 2268 mpt_lprt(mpt, MPT_PRT_DEBUG, "doorbell req = %s\n", 2269 mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL))); 2270 2271 MPT_LOCK(mpt); 2272 error = mpt_configure_ioc(mpt, 0, 0); 2273 MPT_UNLOCK(mpt); 2274 2275 return (error); 2276} 2277 2278int 2279mpt_core_enable(struct mpt_softc *mpt) 2280{ 2281 /* 2282 * We enter with the IOC enabled, but async events 2283 * not enabled, ports not enabled and interrupts 2284 * not enabled. 2285 */ 2286 MPT_LOCK(mpt); 2287 2288 /* 2289 * Enable asynchronous event reporting- all personalities 2290 * have attached so that they should be able to now field 2291 * async events. 2292 */ 2293 mpt_send_event_request(mpt, 1); 2294 2295 /* 2296 * Catch any pending interrupts 2297 * 2298 * This seems to be crucial- otherwise 2299 * the portenable below times out. 2300 */ 2301 mpt_intr(mpt); 2302 2303 /* 2304 * Enable Interrupts 2305 */ 2306 mpt_enable_ints(mpt); 2307 2308 /* 2309 * Catch any pending interrupts 2310 * 2311 * This seems to be crucial- otherwise 2312 * the portenable below times out. 2313 */ 2314 mpt_intr(mpt); 2315 2316 /* 2317 * Enable the port. 2318 */ 2319 if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2320 mpt_prt(mpt, "failed to enable port 0\n"); 2321 MPT_UNLOCK(mpt); 2322 return (ENXIO); 2323 } 2324 MPT_UNLOCK(mpt); 2325 return (0); 2326} 2327 2328void 2329mpt_core_shutdown(struct mpt_softc *mpt) 2330{ 2331 mpt_disable_ints(mpt); 2332} 2333 2334void 2335mpt_core_detach(struct mpt_softc *mpt) 2336{ 2337 int val; 2338 2339 /* 2340 * XXX: FREE MEMORY 2341 */ 2342 mpt_disable_ints(mpt); 2343 2344 /* Make sure no request has pending timeouts. */ 2345 for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) { 2346 request_t *req = &mpt->request_pool[val]; 2347 mpt_callout_drain(mpt, &req->callout); 2348 } 2349} 2350 2351int 2352mpt_core_unload(struct mpt_personality *pers) 2353{ 2354 /* Unload is always successfull. */ 2355 return (0); 2356} 2357 2358#define FW_UPLOAD_REQ_SIZE \ 2359 (sizeof(MSG_FW_UPLOAD) - sizeof(SGE_MPI_UNION) \ 2360 + sizeof(FW_UPLOAD_TCSGE) + sizeof(SGE_SIMPLE32)) 2361 2362static int 2363mpt_upload_fw(struct mpt_softc *mpt) 2364{ 2365 uint8_t fw_req_buf[FW_UPLOAD_REQ_SIZE]; 2366 MSG_FW_UPLOAD_REPLY fw_reply; 2367 MSG_FW_UPLOAD *fw_req; 2368 FW_UPLOAD_TCSGE *tsge; 2369 SGE_SIMPLE32 *sge; 2370 uint32_t flags; 2371 int error; 2372 2373 memset(&fw_req_buf, 0, sizeof(fw_req_buf)); 2374 fw_req = (MSG_FW_UPLOAD *)fw_req_buf; 2375 fw_req->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM; 2376 fw_req->Function = MPI_FUNCTION_FW_UPLOAD; 2377 fw_req->MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 2378 tsge = (FW_UPLOAD_TCSGE *)&fw_req->SGL; 2379 tsge->DetailsLength = 12; 2380 tsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT; 2381 tsge->ImageSize = htole32(mpt->fw_image_size); 2382 sge = (SGE_SIMPLE32 *)(tsge + 1); 2383 flags = (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER 2384 | MPI_SGE_FLAGS_END_OF_LIST | MPI_SGE_FLAGS_SIMPLE_ELEMENT 2385 | MPI_SGE_FLAGS_32_BIT_ADDRESSING | MPI_SGE_FLAGS_IOC_TO_HOST); 2386 flags <<= MPI_SGE_FLAGS_SHIFT; 2387 sge->FlagsLength = htole32(flags | mpt->fw_image_size); 2388 sge->Address = htole32(mpt->fw_phys); 2389 error = mpt_send_handshake_cmd(mpt, sizeof(fw_req_buf), &fw_req_buf); 2390 if (error) 2391 return(error); 2392 error = mpt_recv_handshake_reply(mpt, sizeof(fw_reply), &fw_reply); 2393 return (error); 2394} 2395 2396static void 2397mpt_diag_outsl(struct mpt_softc *mpt, uint32_t addr, 2398 uint32_t *data, bus_size_t len) 2399{ 2400 uint32_t *data_end; 2401 2402 data_end = data + (roundup2(len, sizeof(uint32_t)) / 4); 2403 if (mpt->is_sas) { 2404 pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2405 } 2406 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, addr); 2407 while (data != data_end) { 2408 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, *data); 2409 data++; 2410 } 2411 if (mpt->is_sas) { 2412 pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2413 } 2414} 2415 2416static int 2417mpt_download_fw(struct mpt_softc *mpt) 2418{ 2419 MpiFwHeader_t *fw_hdr; 2420 int error; 2421 uint32_t ext_offset; 2422 uint32_t data; 2423 2424 mpt_prt(mpt, "Downloading Firmware - Image Size %d\n", 2425 mpt->fw_image_size); 2426 2427 error = mpt_enable_diag_mode(mpt); 2428 if (error != 0) { 2429 mpt_prt(mpt, "Could not enter diagnostic mode!\n"); 2430 return (EIO); 2431 } 2432 2433 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, 2434 MPI_DIAG_RW_ENABLE|MPI_DIAG_DISABLE_ARM); 2435 2436 fw_hdr = (MpiFwHeader_t *)mpt->fw_image; 2437 mpt_diag_outsl(mpt, fw_hdr->LoadStartAddress, (uint32_t*)fw_hdr, 2438 fw_hdr->ImageSize); 2439 2440 ext_offset = fw_hdr->NextImageHeaderOffset; 2441 while (ext_offset != 0) { 2442 MpiExtImageHeader_t *ext; 2443 2444 ext = (MpiExtImageHeader_t *)((uintptr_t)fw_hdr + ext_offset); 2445 ext_offset = ext->NextImageHeaderOffset; 2446 2447 mpt_diag_outsl(mpt, ext->LoadStartAddress, (uint32_t*)ext, 2448 ext->ImageSize); 2449 } 2450 2451 if (mpt->is_sas) { 2452 pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2453 } 2454 /* Setup the address to jump to on reset. */ 2455 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, fw_hdr->IopResetRegAddr); 2456 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, fw_hdr->IopResetVectorValue); 2457 2458 /* 2459 * The controller sets the "flash bad" status after attempting 2460 * to auto-boot from flash. Clear the status so that the controller 2461 * will continue the boot process with our newly installed firmware. 2462 */ 2463 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2464 data = mpt_pio_read(mpt, MPT_OFFSET_DIAG_DATA) | MPT_DIAG_MEM_CFG_BADFL; 2465 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2466 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, data); 2467 2468 if (mpt->is_sas) { 2469 pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2470 } 2471 2472 /* 2473 * Re-enable the processor and clear the boot halt flag. 2474 */ 2475 data = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 2476 data &= ~(MPI_DIAG_PREVENT_IOC_BOOT|MPI_DIAG_DISABLE_ARM); 2477 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, data); 2478 2479 mpt_disable_diag_mode(mpt); 2480 return (0); 2481} 2482 2483/* 2484 * Allocate/Initialize data structures for the controller. Called 2485 * once at instance startup. 2486 */ 2487static int 2488mpt_configure_ioc(struct mpt_softc *mpt, int tn, int needreset) 2489{ 2490 PTR_MSG_PORT_FACTS_REPLY pfp; 2491 int error, port; 2492 size_t len; 2493 2494 if (tn == MPT_MAX_TRYS) { 2495 return (-1); 2496 } 2497 2498 /* 2499 * No need to reset if the IOC is already in the READY state. 2500 * 2501 * Force reset if initialization failed previously. 2502 * Note that a hard_reset of the second channel of a '929 2503 * will stop operation of the first channel. Hopefully, if the 2504 * first channel is ok, the second will not require a hard 2505 * reset. 2506 */ 2507 if (needreset || MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_READY) { 2508 if (mpt_reset(mpt, FALSE) != MPT_OK) { 2509 return (mpt_configure_ioc(mpt, tn++, 1)); 2510 } 2511 needreset = 0; 2512 } 2513 2514 if (mpt_get_iocfacts(mpt, &mpt->ioc_facts) != MPT_OK) { 2515 mpt_prt(mpt, "mpt_get_iocfacts failed\n"); 2516 return (mpt_configure_ioc(mpt, tn++, 1)); 2517 } 2518 mpt2host_iocfacts_reply(&mpt->ioc_facts); 2519 2520 mpt_prt(mpt, "MPI Version=%d.%d.%d.%d\n", 2521 mpt->ioc_facts.MsgVersion >> 8, 2522 mpt->ioc_facts.MsgVersion & 0xFF, 2523 mpt->ioc_facts.HeaderVersion >> 8, 2524 mpt->ioc_facts.HeaderVersion & 0xFF); 2525 2526 /* 2527 * Now that we know request frame size, we can calculate 2528 * the actual (reasonable) segment limit for read/write I/O. 2529 * 2530 * This limit is constrained by: 2531 * 2532 * + The size of each area we allocate per command (and how 2533 * many chain segments we can fit into it). 2534 * + The total number of areas we've set up. 2535 * + The actual chain depth the card will allow. 2536 * 2537 * The first area's segment count is limited by the I/O request 2538 * at the head of it. We cannot allocate realistically more 2539 * than MPT_MAX_REQUESTS areas. Therefore, to account for both 2540 * conditions, we'll just start out with MPT_MAX_REQUESTS-2. 2541 * 2542 */ 2543 /* total number of request areas we (can) allocate */ 2544 mpt->max_seg_cnt = MPT_MAX_REQUESTS(mpt) - 2; 2545 2546 /* converted to the number of chain areas possible */ 2547 mpt->max_seg_cnt *= MPT_NRFM(mpt); 2548 2549 /* limited by the number of chain areas the card will support */ 2550 if (mpt->max_seg_cnt > mpt->ioc_facts.MaxChainDepth) { 2551 mpt_lprt(mpt, MPT_PRT_DEBUG, 2552 "chain depth limited to %u (from %u)\n", 2553 mpt->ioc_facts.MaxChainDepth, mpt->max_seg_cnt); 2554 mpt->max_seg_cnt = mpt->ioc_facts.MaxChainDepth; 2555 } 2556 2557 /* converted to the number of simple sges in chain segments. */ 2558 mpt->max_seg_cnt *= (MPT_NSGL(mpt) - 1); 2559 2560 mpt_lprt(mpt, MPT_PRT_DEBUG, "Maximum Segment Count: %u\n", 2561 mpt->max_seg_cnt); 2562 mpt_lprt(mpt, MPT_PRT_DEBUG, "MsgLength=%u IOCNumber = %d\n", 2563 mpt->ioc_facts.MsgLength, mpt->ioc_facts.IOCNumber); 2564 mpt_lprt(mpt, MPT_PRT_DEBUG, 2565 "IOCFACTS: GlobalCredits=%d BlockSize=%u bytes " 2566 "Request Frame Size %u bytes Max Chain Depth %u\n", 2567 mpt->ioc_facts.GlobalCredits, mpt->ioc_facts.BlockSize, 2568 mpt->ioc_facts.RequestFrameSize << 2, 2569 mpt->ioc_facts.MaxChainDepth); 2570 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOCFACTS: Num Ports %d, FWImageSize %d, " 2571 "Flags=%#x\n", mpt->ioc_facts.NumberOfPorts, 2572 mpt->ioc_facts.FWImageSize, mpt->ioc_facts.Flags); 2573 2574 len = mpt->ioc_facts.NumberOfPorts * sizeof (MSG_PORT_FACTS_REPLY); 2575 mpt->port_facts = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 2576 if (mpt->port_facts == NULL) { 2577 mpt_prt(mpt, "unable to allocate memory for port facts\n"); 2578 return (ENOMEM); 2579 } 2580 2581 2582 if ((mpt->ioc_facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) && 2583 (mpt->fw_uploaded == 0)) { 2584 struct mpt_map_info mi; 2585 2586 /* 2587 * In some configurations, the IOC's firmware is 2588 * stored in a shared piece of system NVRAM that 2589 * is only accessable via the BIOS. In this 2590 * case, the firmware keeps a copy of firmware in 2591 * RAM until the OS driver retrieves it. Once 2592 * retrieved, we are responsible for re-downloading 2593 * the firmware after any hard-reset. 2594 */ 2595 mpt->fw_image_size = mpt->ioc_facts.FWImageSize; 2596 error = mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 0, 2597 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 2598 mpt->fw_image_size, 1, mpt->fw_image_size, 0, 2599 &mpt->fw_dmat); 2600 if (error != 0) { 2601 mpt_prt(mpt, "cannot create firmwarew dma tag\n"); 2602 return (ENOMEM); 2603 } 2604 error = bus_dmamem_alloc(mpt->fw_dmat, 2605 (void **)&mpt->fw_image, BUS_DMA_NOWAIT, &mpt->fw_dmap); 2606 if (error != 0) { 2607 mpt_prt(mpt, "cannot allocate firmware memory\n"); 2608 bus_dma_tag_destroy(mpt->fw_dmat); 2609 return (ENOMEM); 2610 } 2611 mi.mpt = mpt; 2612 mi.error = 0; 2613 bus_dmamap_load(mpt->fw_dmat, mpt->fw_dmap, 2614 mpt->fw_image, mpt->fw_image_size, mpt_map_rquest, &mi, 0); 2615 mpt->fw_phys = mi.phys; 2616 2617 error = mpt_upload_fw(mpt); 2618 if (error != 0) { 2619 mpt_prt(mpt, "firmware upload failed.\n"); 2620 bus_dmamap_unload(mpt->fw_dmat, mpt->fw_dmap); 2621 bus_dmamem_free(mpt->fw_dmat, mpt->fw_image, 2622 mpt->fw_dmap); 2623 bus_dma_tag_destroy(mpt->fw_dmat); 2624 mpt->fw_image = NULL; 2625 return (EIO); 2626 } 2627 mpt->fw_uploaded = 1; 2628 } 2629 2630 for (port = 0; port < mpt->ioc_facts.NumberOfPorts; port++) { 2631 pfp = &mpt->port_facts[port]; 2632 error = mpt_get_portfacts(mpt, 0, pfp); 2633 if (error != MPT_OK) { 2634 mpt_prt(mpt, 2635 "mpt_get_portfacts on port %d failed\n", port); 2636 free(mpt->port_facts, M_DEVBUF); 2637 mpt->port_facts = NULL; 2638 return (mpt_configure_ioc(mpt, tn++, 1)); 2639 } 2640 mpt2host_portfacts_reply(pfp); 2641 2642 if (port > 0) { 2643 error = MPT_PRT_INFO; 2644 } else { 2645 error = MPT_PRT_DEBUG; 2646 } 2647 mpt_lprt(mpt, error, 2648 "PORTFACTS[%d]: Type %x PFlags %x IID %d MaxDev %d\n", 2649 port, pfp->PortType, pfp->ProtocolFlags, pfp->PortSCSIID, 2650 pfp->MaxDevices); 2651 2652 } 2653 2654 /* 2655 * XXX: Not yet supporting more than port 0 2656 */ 2657 pfp = &mpt->port_facts[0]; 2658 if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_FC) { 2659 mpt->is_fc = 1; 2660 mpt->is_sas = 0; 2661 mpt->is_spi = 0; 2662 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_SAS) { 2663 mpt->is_fc = 0; 2664 mpt->is_sas = 1; 2665 mpt->is_spi = 0; 2666 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_SCSI) { 2667 mpt->is_fc = 0; 2668 mpt->is_sas = 0; 2669 mpt->is_spi = 1; 2670 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_ISCSI) { 2671 mpt_prt(mpt, "iSCSI not supported yet\n"); 2672 return (ENXIO); 2673 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_INACTIVE) { 2674 mpt_prt(mpt, "Inactive Port\n"); 2675 return (ENXIO); 2676 } else { 2677 mpt_prt(mpt, "unknown Port Type %#x\n", pfp->PortType); 2678 return (ENXIO); 2679 } 2680 2681 /* 2682 * Set our role with what this port supports. 2683 * 2684 * Note this might be changed later in different modules 2685 * if this is different from what is wanted. 2686 */ 2687 mpt->role = MPT_ROLE_NONE; 2688 if (pfp->ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) { 2689 mpt->role |= MPT_ROLE_INITIATOR; 2690 } 2691 if (pfp->ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) { 2692 mpt->role |= MPT_ROLE_TARGET; 2693 } 2694 2695 /* 2696 * Enable the IOC 2697 */ 2698 if (mpt_enable_ioc(mpt, 1) != MPT_OK) { 2699 mpt_prt(mpt, "unable to initialize IOC\n"); 2700 return (ENXIO); 2701 } 2702 2703 /* 2704 * Read IOC configuration information. 2705 * 2706 * We need this to determine whether or not we have certain 2707 * settings for Integrated Mirroring (e.g.). 2708 */ 2709 mpt_read_config_info_ioc(mpt); 2710 2711 return (0); 2712} 2713 2714static int 2715mpt_enable_ioc(struct mpt_softc *mpt, int portenable) 2716{ 2717 uint32_t pptr; 2718 int val; 2719 2720 if (mpt_send_ioc_init(mpt, MPI_WHOINIT_HOST_DRIVER) != MPT_OK) { 2721 mpt_prt(mpt, "mpt_send_ioc_init failed\n"); 2722 return (EIO); 2723 } 2724 2725 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_send_ioc_init ok\n"); 2726 2727 if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) { 2728 mpt_prt(mpt, "IOC failed to go to run state\n"); 2729 return (ENXIO); 2730 } 2731 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC now at RUNSTATE\n"); 2732 2733 /* 2734 * Give it reply buffers 2735 * 2736 * Do *not* exceed global credits. 2737 */ 2738 for (val = 0, pptr = mpt->reply_phys; 2739 (pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE); 2740 pptr += MPT_REPLY_SIZE) { 2741 mpt_free_reply(mpt, pptr); 2742 if (++val == mpt->ioc_facts.GlobalCredits - 1) 2743 break; 2744 } 2745 2746 2747 /* 2748 * Enable the port if asked. This is only done if we're resetting 2749 * the IOC after initial startup. 2750 */ 2751 if (portenable) { 2752 /* 2753 * Enable asynchronous event reporting 2754 */ 2755 mpt_send_event_request(mpt, 1); 2756 2757 if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2758 mpt_prt(mpt, "failed to enable port 0\n"); 2759 return (ENXIO); 2760 } 2761 } 2762 return (MPT_OK); 2763} 2764 2765/* 2766 * Endian Conversion Functions- only used on Big Endian machines 2767 */ 2768#if _BYTE_ORDER == _BIG_ENDIAN 2769void 2770mpt2host_sge_simple_union(SGE_SIMPLE_UNION *sge) 2771{ 2772 2773 MPT_2_HOST32(sge, FlagsLength); 2774 MPT_2_HOST32(sge, u.Address64.Low); 2775 MPT_2_HOST32(sge, u.Address64.High); 2776} 2777 2778void 2779mpt2host_iocfacts_reply(MSG_IOC_FACTS_REPLY *rp) 2780{ 2781 2782 MPT_2_HOST16(rp, MsgVersion); 2783 MPT_2_HOST16(rp, HeaderVersion); 2784 MPT_2_HOST32(rp, MsgContext); 2785 MPT_2_HOST16(rp, IOCExceptions); 2786 MPT_2_HOST16(rp, IOCStatus); 2787 MPT_2_HOST32(rp, IOCLogInfo); 2788 MPT_2_HOST16(rp, ReplyQueueDepth); 2789 MPT_2_HOST16(rp, RequestFrameSize); 2790 MPT_2_HOST16(rp, Reserved_0101_FWVersion); 2791 MPT_2_HOST16(rp, ProductID); 2792 MPT_2_HOST32(rp, CurrentHostMfaHighAddr); 2793 MPT_2_HOST16(rp, GlobalCredits); 2794 MPT_2_HOST32(rp, CurrentSenseBufferHighAddr); 2795 MPT_2_HOST16(rp, CurReplyFrameSize); 2796 MPT_2_HOST32(rp, FWImageSize); 2797 MPT_2_HOST32(rp, IOCCapabilities); 2798 MPT_2_HOST32(rp, FWVersion.Word); 2799 MPT_2_HOST16(rp, HighPriorityQueueDepth); 2800 MPT_2_HOST16(rp, Reserved2); 2801 mpt2host_sge_simple_union(&rp->HostPageBufferSGE); 2802 MPT_2_HOST32(rp, ReplyFifoHostSignalingAddr); 2803} 2804 2805void 2806mpt2host_portfacts_reply(MSG_PORT_FACTS_REPLY *pfp) 2807{ 2808 2809 MPT_2_HOST16(pfp, Reserved); 2810 MPT_2_HOST16(pfp, Reserved1); 2811 MPT_2_HOST32(pfp, MsgContext); 2812 MPT_2_HOST16(pfp, Reserved2); 2813 MPT_2_HOST16(pfp, IOCStatus); 2814 MPT_2_HOST32(pfp, IOCLogInfo); 2815 MPT_2_HOST16(pfp, MaxDevices); 2816 MPT_2_HOST16(pfp, PortSCSIID); 2817 MPT_2_HOST16(pfp, ProtocolFlags); 2818 MPT_2_HOST16(pfp, MaxPostedCmdBuffers); 2819 MPT_2_HOST16(pfp, MaxPersistentIDs); 2820 MPT_2_HOST16(pfp, MaxLanBuckets); 2821 MPT_2_HOST16(pfp, Reserved4); 2822 MPT_2_HOST32(pfp, Reserved5); 2823} 2824 2825void 2826mpt2host_config_page_ioc2(CONFIG_PAGE_IOC_2 *ioc2) 2827{ 2828 int i; 2829 2830 MPT_2_HOST32(ioc2, CapabilitiesFlags); 2831 for (i = 0; i < MPI_IOC_PAGE_2_RAID_VOLUME_MAX; i++) { 2832 MPT_2_HOST16(ioc2, RaidVolume[i].Reserved3); 2833 } 2834} 2835 2836void 2837mpt2host_config_page_ioc3(CONFIG_PAGE_IOC_3 *ioc3) 2838{ 2839 2840 MPT_2_HOST16(ioc3, Reserved2); 2841} 2842 2843void 2844mpt2host_config_page_scsi_port_0(CONFIG_PAGE_SCSI_PORT_0 *sp0) 2845{ 2846 2847 MPT_2_HOST32(sp0, Capabilities); 2848 MPT_2_HOST32(sp0, PhysicalInterface); 2849} 2850 2851void 2852mpt2host_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 *sp1) 2853{ 2854 2855 MPT_2_HOST32(sp1, Configuration); 2856 MPT_2_HOST32(sp1, OnBusTimerValue); 2857 MPT_2_HOST16(sp1, IDConfig); 2858} 2859 2860void 2861host2mpt_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 *sp1) 2862{ 2863 2864 HOST_2_MPT32(sp1, Configuration); 2865 HOST_2_MPT32(sp1, OnBusTimerValue); 2866 HOST_2_MPT16(sp1, IDConfig); 2867} 2868 2869void 2870mpt2host_config_page_scsi_port_2(CONFIG_PAGE_SCSI_PORT_2 *sp2) 2871{ 2872 int i; 2873 2874 MPT_2_HOST32(sp2, PortFlags); 2875 MPT_2_HOST32(sp2, PortSettings); 2876 for (i = 0; i < sizeof(sp2->DeviceSettings) / 2877 sizeof(*sp2->DeviceSettings); i++) { 2878 MPT_2_HOST16(sp2, DeviceSettings[i].DeviceFlags); 2879 } 2880} 2881 2882void 2883mpt2host_config_page_scsi_device_0(CONFIG_PAGE_SCSI_DEVICE_0 *sd0) 2884{ 2885 2886 MPT_2_HOST32(sd0, NegotiatedParameters); 2887 MPT_2_HOST32(sd0, Information); 2888} 2889 2890void 2891mpt2host_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 *sd1) 2892{ 2893 2894 MPT_2_HOST32(sd1, RequestedParameters); 2895 MPT_2_HOST32(sd1, Reserved); 2896 MPT_2_HOST32(sd1, Configuration); 2897} 2898 2899void 2900host2mpt_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 *sd1) 2901{ 2902 2903 HOST_2_MPT32(sd1, RequestedParameters); 2904 HOST_2_MPT32(sd1, Reserved); 2905 HOST_2_MPT32(sd1, Configuration); 2906} 2907 2908void 2909mpt2host_config_page_fc_port_0(CONFIG_PAGE_FC_PORT_0 *fp0) 2910{ 2911 2912 MPT_2_HOST32(fp0, Flags); 2913 MPT_2_HOST32(fp0, PortIdentifier); 2914 MPT_2_HOST32(fp0, WWNN.Low); 2915 MPT_2_HOST32(fp0, WWNN.High); 2916 MPT_2_HOST32(fp0, WWPN.Low); 2917 MPT_2_HOST32(fp0, WWPN.High); 2918 MPT_2_HOST32(fp0, SupportedServiceClass); 2919 MPT_2_HOST32(fp0, SupportedSpeeds); 2920 MPT_2_HOST32(fp0, CurrentSpeed); 2921 MPT_2_HOST32(fp0, MaxFrameSize); 2922 MPT_2_HOST32(fp0, FabricWWNN.Low); 2923 MPT_2_HOST32(fp0, FabricWWNN.High); 2924 MPT_2_HOST32(fp0, FabricWWPN.Low); 2925 MPT_2_HOST32(fp0, FabricWWPN.High); 2926 MPT_2_HOST32(fp0, DiscoveredPortsCount); 2927 MPT_2_HOST32(fp0, MaxInitiators); 2928} 2929 2930void 2931mpt2host_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 *fp1) 2932{ 2933 2934 MPT_2_HOST32(fp1, Flags); 2935 MPT_2_HOST32(fp1, NoSEEPROMWWNN.Low); 2936 MPT_2_HOST32(fp1, NoSEEPROMWWNN.High); 2937 MPT_2_HOST32(fp1, NoSEEPROMWWPN.Low); 2938 MPT_2_HOST32(fp1, NoSEEPROMWWPN.High); 2939} 2940 2941void 2942host2mpt_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 *fp1) 2943{ 2944 2945 HOST_2_MPT32(fp1, Flags); 2946 HOST_2_MPT32(fp1, NoSEEPROMWWNN.Low); 2947 HOST_2_MPT32(fp1, NoSEEPROMWWNN.High); 2948 HOST_2_MPT32(fp1, NoSEEPROMWWPN.Low); 2949 HOST_2_MPT32(fp1, NoSEEPROMWWPN.High); 2950} 2951 2952void 2953mpt2host_config_page_raid_vol_0(CONFIG_PAGE_RAID_VOL_0 *volp) 2954{ 2955 int i; 2956 2957 MPT_2_HOST16(volp, VolumeStatus.Reserved); 2958 MPT_2_HOST16(volp, VolumeSettings.Settings); 2959 MPT_2_HOST32(volp, MaxLBA); 2960 MPT_2_HOST32(volp, MaxLBAHigh); 2961 MPT_2_HOST32(volp, StripeSize); 2962 MPT_2_HOST32(volp, Reserved2); 2963 MPT_2_HOST32(volp, Reserved3); 2964 for (i = 0; i < MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX; i++) { 2965 MPT_2_HOST16(volp, PhysDisk[i].Reserved); 2966 } 2967} 2968 2969void 2970mpt2host_config_page_raid_phys_disk_0(CONFIG_PAGE_RAID_PHYS_DISK_0 *rpd0) 2971{ 2972 2973 MPT_2_HOST32(rpd0, Reserved1); 2974 MPT_2_HOST16(rpd0, PhysDiskStatus.Reserved); 2975 MPT_2_HOST32(rpd0, MaxLBA); 2976 MPT_2_HOST16(rpd0, ErrorData.Reserved); 2977 MPT_2_HOST16(rpd0, ErrorData.ErrorCount); 2978 MPT_2_HOST16(rpd0, ErrorData.SmartCount); 2979} 2980 2981void 2982mpt2host_mpi_raid_vol_indicator(MPI_RAID_VOL_INDICATOR *vi) 2983{ 2984 2985 MPT_2_HOST16(vi, TotalBlocks.High); 2986 MPT_2_HOST16(vi, TotalBlocks.Low); 2987 MPT_2_HOST16(vi, BlocksRemaining.High); 2988 MPT_2_HOST16(vi, BlocksRemaining.Low); 2989} 2990#endif 2991