mpt.c revision 157117
1/*- 2 * Generic routines for LSI Fusion adapters. 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice immediately at the beginning of the file, without modification, 12 * this list of conditions, and the following disclaimer. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28/*- 29 * Copyright (c) 2002, 2006 by Matthew Jacob 30 * All rights reserved. 31 * 32 * Redistribution and use in source and binary forms, with or without 33 * modification, are permitted provided that the following conditions are 34 * met: 35 * 1. Redistributions of source code must retain the above copyright 36 * notice, this list of conditions and the following disclaimer. 37 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 38 * substantially similar to the "NO WARRANTY" disclaimer below 39 * ("Disclaimer") and any redistribution must be conditioned upon including 40 * a substantially similar Disclaimer requirement for further binary 41 * redistribution. 42 * 3. Neither the names of the above listed copyright holders nor the names 43 * of any contributors may be used to endorse or promote products derived 44 * from this software without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 47 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 49 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 50 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 56 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 * 58 * Support from Chris Ellsworth in order to make SAS adapters work 59 * is gratefully acknowledged. 60 */ 61/*- 62 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 63 * Copyright (c) 2005, WHEEL Sp. z o.o. 64 * Copyright (c) 2004, 2005 Justin T. Gibbs 65 * All rights reserved. 66 * 67 * Redistribution and use in source and binary forms, with or without 68 * modification, are permitted provided that the following conditions are 69 * met: 70 * 1. Redistributions of source code must retain the above copyright 71 * notice, this list of conditions and the following disclaimer. 72 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 73 * substantially similar to the "NO WARRANTY" disclaimer below 74 * ("Disclaimer") and any redistribution must be conditioned upon including 75 * a substantially similar Disclaimer requirement for further binary 76 * redistribution. 77 * 3. Neither the names of the above listed copyright holders nor the names 78 * of any contributors may be used to endorse or promote products derived 79 * from this software without specific prior written permission. 80 * 81 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 82 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 83 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 84 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 85 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 86 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 87 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 88 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 89 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 90 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 91 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 92 */ 93 94#include <sys/cdefs.h> 95__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt.c 157117 2006-03-25 07:08:27Z mjacob $"); 96 97#include <dev/mpt/mpt.h> 98#include <dev/mpt/mpt_cam.h> /* XXX For static handler registration */ 99#include <dev/mpt/mpt_raid.h> /* XXX For static handler registration */ 100 101#include <dev/mpt/mpilib/mpi.h> 102#include <dev/mpt/mpilib/mpi_ioc.h> 103#include <dev/mpt/mpilib/mpi_fc.h> 104#include <dev/mpt/mpilib/mpi_targ.h> 105 106#include <sys/sysctl.h> 107 108#define MPT_MAX_TRYS 3 109#define MPT_MAX_WAIT 300000 110 111static int maxwait_ack = 0; 112static int maxwait_int = 0; 113static int maxwait_state = 0; 114 115TAILQ_HEAD(, mpt_softc) mpt_tailq = TAILQ_HEAD_INITIALIZER(mpt_tailq); 116mpt_reply_handler_t *mpt_reply_handlers[MPT_NUM_REPLY_HANDLERS]; 117 118static mpt_reply_handler_t mpt_default_reply_handler; 119static mpt_reply_handler_t mpt_config_reply_handler; 120static mpt_reply_handler_t mpt_handshake_reply_handler; 121static mpt_reply_handler_t mpt_event_reply_handler; 122static void mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 123 MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context); 124static int mpt_send_event_request(struct mpt_softc *mpt, int onoff); 125static int mpt_soft_reset(struct mpt_softc *mpt); 126static void mpt_hard_reset(struct mpt_softc *mpt); 127static int mpt_configure_ioc(struct mpt_softc *mpt); 128static int mpt_enable_ioc(struct mpt_softc *mpt, int); 129 130/************************* Personality Module Support *************************/ 131/* 132 * We include one extra entry that is guaranteed to be NULL 133 * to simplify our itterator. 134 */ 135static struct mpt_personality *mpt_personalities[MPT_MAX_PERSONALITIES + 1]; 136static __inline struct mpt_personality* 137 mpt_pers_find(struct mpt_softc *, u_int); 138static __inline struct mpt_personality* 139 mpt_pers_find_reverse(struct mpt_softc *, u_int); 140 141static __inline struct mpt_personality * 142mpt_pers_find(struct mpt_softc *mpt, u_int start_at) 143{ 144 KASSERT(start_at <= MPT_MAX_PERSONALITIES, 145 ("mpt_pers_find: starting position out of range\n")); 146 147 while (start_at < MPT_MAX_PERSONALITIES 148 && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 149 start_at++; 150 } 151 return (mpt_personalities[start_at]); 152} 153 154/* 155 * Used infrequently, so no need to optimize like a forward 156 * traversal where we use the MAX+1 is guaranteed to be NULL 157 * trick. 158 */ 159static __inline struct mpt_personality * 160mpt_pers_find_reverse(struct mpt_softc *mpt, u_int start_at) 161{ 162 while (start_at < MPT_MAX_PERSONALITIES 163 && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 164 start_at--; 165 } 166 if (start_at < MPT_MAX_PERSONALITIES) 167 return (mpt_personalities[start_at]); 168 return (NULL); 169} 170 171#define MPT_PERS_FOREACH(mpt, pers) \ 172 for (pers = mpt_pers_find(mpt, /*start_at*/0); \ 173 pers != NULL; \ 174 pers = mpt_pers_find(mpt, /*start_at*/pers->id+1)) 175 176#define MPT_PERS_FOREACH_REVERSE(mpt, pers) \ 177 for (pers = mpt_pers_find_reverse(mpt, MPT_MAX_PERSONALITIES-1);\ 178 pers != NULL; \ 179 pers = mpt_pers_find_reverse(mpt, /*start_at*/pers->id-1)) 180 181static mpt_load_handler_t mpt_stdload; 182static mpt_probe_handler_t mpt_stdprobe; 183static mpt_attach_handler_t mpt_stdattach; 184static mpt_enable_handler_t mpt_stdenable; 185static mpt_event_handler_t mpt_stdevent; 186static mpt_reset_handler_t mpt_stdreset; 187static mpt_shutdown_handler_t mpt_stdshutdown; 188static mpt_detach_handler_t mpt_stddetach; 189static mpt_unload_handler_t mpt_stdunload; 190static struct mpt_personality mpt_default_personality = 191{ 192 .load = mpt_stdload, 193 .probe = mpt_stdprobe, 194 .attach = mpt_stdattach, 195 .enable = mpt_stdenable, 196 .event = mpt_stdevent, 197 .reset = mpt_stdreset, 198 .shutdown = mpt_stdshutdown, 199 .detach = mpt_stddetach, 200 .unload = mpt_stdunload 201}; 202 203static mpt_load_handler_t mpt_core_load; 204static mpt_attach_handler_t mpt_core_attach; 205static mpt_enable_handler_t mpt_core_enable; 206static mpt_reset_handler_t mpt_core_ioc_reset; 207static mpt_event_handler_t mpt_core_event; 208static mpt_shutdown_handler_t mpt_core_shutdown; 209static mpt_shutdown_handler_t mpt_core_detach; 210static mpt_unload_handler_t mpt_core_unload; 211static struct mpt_personality mpt_core_personality = 212{ 213 .name = "mpt_core", 214 .load = mpt_core_load, 215 .attach = mpt_core_attach, 216 .enable = mpt_core_enable, 217 .event = mpt_core_event, 218 .reset = mpt_core_ioc_reset, 219 .shutdown = mpt_core_shutdown, 220 .detach = mpt_core_detach, 221 .unload = mpt_core_unload, 222}; 223 224/* 225 * Manual declaration so that DECLARE_MPT_PERSONALITY doesn't need 226 * ordering information. We want the core to always register FIRST. 227 * other modules are set to SI_ORDER_SECOND. 228 */ 229static moduledata_t mpt_core_mod = { 230 "mpt_core", mpt_modevent, &mpt_core_personality 231}; 232DECLARE_MODULE(mpt_core, mpt_core_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST); 233MODULE_VERSION(mpt_core, 1); 234 235#define MPT_PERS_ATTACHED(pers, mpt) ((mpt)->mpt_pers_mask & (0x1 << pers->id)) 236 237 238int 239mpt_modevent(module_t mod, int type, void *data) 240{ 241 struct mpt_personality *pers; 242 int error; 243 244 pers = (struct mpt_personality *)data; 245 246 error = 0; 247 switch (type) { 248 case MOD_LOAD: 249 { 250 mpt_load_handler_t **def_handler; 251 mpt_load_handler_t **pers_handler; 252 int i; 253 254 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 255 if (mpt_personalities[i] == NULL) 256 break; 257 } 258 if (i >= MPT_MAX_PERSONALITIES) { 259 error = ENOMEM; 260 break; 261 } 262 pers->id = i; 263 mpt_personalities[i] = pers; 264 265 /* Install standard/noop handlers for any NULL entries. */ 266 def_handler = MPT_PERS_FIRST_HANDLER(&mpt_default_personality); 267 pers_handler = MPT_PERS_FIRST_HANDLER(pers); 268 while (pers_handler <= MPT_PERS_LAST_HANDLER(pers)) { 269 if (*pers_handler == NULL) 270 *pers_handler = *def_handler; 271 pers_handler++; 272 def_handler++; 273 } 274 275 error = (pers->load(pers)); 276 if (error != 0) 277 mpt_personalities[i] = NULL; 278 break; 279 } 280 case MOD_SHUTDOWN: 281 break; 282#if __FreeBSD_version >= 500000 283 case MOD_QUIESCE: 284 break; 285#endif 286 case MOD_UNLOAD: 287 error = pers->unload(pers); 288 mpt_personalities[pers->id] = NULL; 289 break; 290 default: 291 error = EINVAL; 292 break; 293 } 294 return (error); 295} 296 297int 298mpt_stdload(struct mpt_personality *pers) 299{ 300 /* Load is always successfull. */ 301 return (0); 302} 303 304int 305mpt_stdprobe(struct mpt_softc *mpt) 306{ 307 /* Probe is always successfull. */ 308 return (0); 309} 310 311int 312mpt_stdattach(struct mpt_softc *mpt) 313{ 314 /* Attach is always successfull. */ 315 return (0); 316} 317 318int 319mpt_stdenable(struct mpt_softc *mpt) 320{ 321 /* Enable is always successfull. */ 322 return (0); 323} 324 325int 326mpt_stdevent(struct mpt_softc *mpt, request_t *req, MSG_EVENT_NOTIFY_REPLY *msg) 327{ 328 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_stdevent: 0x%x\n", msg->Event & 0xFF); 329 /* Event was not for us. */ 330 return (0); 331} 332 333void 334mpt_stdreset(struct mpt_softc *mpt, int type) 335{ 336} 337 338void 339mpt_stdshutdown(struct mpt_softc *mpt) 340{ 341} 342 343void 344mpt_stddetach(struct mpt_softc *mpt) 345{ 346} 347 348int 349mpt_stdunload(struct mpt_personality *pers) 350{ 351 /* Unload is always successfull. */ 352 return (0); 353} 354 355/******************************* Bus DMA Support ******************************/ 356void 357mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error) 358{ 359 struct mpt_map_info *map_info; 360 361 map_info = (struct mpt_map_info *)arg; 362 map_info->error = error; 363 map_info->phys = segs->ds_addr; 364} 365 366/**************************** Reply/Event Handling ****************************/ 367int 368mpt_register_handler(struct mpt_softc *mpt, mpt_handler_type type, 369 mpt_handler_t handler, uint32_t *phandler_id) 370{ 371 372 switch (type) { 373 case MPT_HANDLER_REPLY: 374 { 375 u_int cbi; 376 u_int free_cbi; 377 378 if (phandler_id == NULL) 379 return (EINVAL); 380 381 free_cbi = MPT_HANDLER_ID_NONE; 382 for (cbi = 0; cbi < MPT_NUM_REPLY_HANDLERS; cbi++) { 383 /* 384 * If the same handler is registered multiple 385 * times, don't error out. Just return the 386 * index of the original registration. 387 */ 388 if (mpt_reply_handlers[cbi] == handler.reply_handler) { 389 *phandler_id = MPT_CBI_TO_HID(cbi); 390 return (0); 391 } 392 393 /* 394 * Fill from the front in the hope that 395 * all registered handlers consume only a 396 * single cache line. 397 * 398 * We don't break on the first empty slot so 399 * that the full table is checked to see if 400 * this handler was previously registered. 401 */ 402 if (free_cbi == MPT_HANDLER_ID_NONE && 403 (mpt_reply_handlers[cbi] 404 == mpt_default_reply_handler)) 405 free_cbi = cbi; 406 } 407 if (free_cbi == MPT_HANDLER_ID_NONE) { 408 return (ENOMEM); 409 } 410 mpt_reply_handlers[free_cbi] = handler.reply_handler; 411 *phandler_id = MPT_CBI_TO_HID(free_cbi); 412 break; 413 } 414 default: 415 mpt_prt(mpt, "mpt_register_handler unknown type %d\n", type); 416 return (EINVAL); 417 } 418 return (0); 419} 420 421int 422mpt_deregister_handler(struct mpt_softc *mpt, mpt_handler_type type, 423 mpt_handler_t handler, uint32_t handler_id) 424{ 425 426 switch (type) { 427 case MPT_HANDLER_REPLY: 428 { 429 u_int cbi; 430 431 cbi = MPT_CBI(handler_id); 432 if (cbi >= MPT_NUM_REPLY_HANDLERS 433 || mpt_reply_handlers[cbi] != handler.reply_handler) 434 return (ENOENT); 435 mpt_reply_handlers[cbi] = mpt_default_reply_handler; 436 break; 437 } 438 default: 439 mpt_prt(mpt, "mpt_deregister_handler unknown type %d\n", type); 440 return (EINVAL); 441 } 442 return (0); 443} 444 445static int 446mpt_default_reply_handler(struct mpt_softc *mpt, request_t *req, 447 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 448{ 449 mpt_prt(mpt, 450 "Default Handler Called: req=%p:%u reply_descriptor=%x frame=%p\n", 451 req, req->serno, reply_desc, reply_frame); 452 453 if (reply_frame != NULL) 454 mpt_dump_reply_frame(mpt, reply_frame); 455 456 mpt_prt(mpt, "Reply Frame Ignored\n"); 457 458 return (/*free_reply*/TRUE); 459} 460 461static int 462mpt_config_reply_handler(struct mpt_softc *mpt, request_t *req, 463 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 464{ 465 if (req != NULL) { 466 467 if (reply_frame != NULL) { 468 MSG_CONFIG *cfgp; 469 MSG_CONFIG_REPLY *reply; 470 471 cfgp = (MSG_CONFIG *)req->req_vbuf; 472 reply = (MSG_CONFIG_REPLY *)reply_frame; 473 req->IOCStatus = le16toh(reply_frame->IOCStatus); 474 bcopy(&reply->Header, &cfgp->Header, 475 sizeof(cfgp->Header)); 476 } 477 req->state &= ~REQ_STATE_QUEUED; 478 req->state |= REQ_STATE_DONE; 479 TAILQ_REMOVE(&mpt->request_pending_list, req, links); 480 481 if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) 482 wakeup(req); 483 } 484 485 return (/*free_reply*/TRUE); 486} 487 488static int 489mpt_handshake_reply_handler(struct mpt_softc *mpt, request_t *req, 490 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 491{ 492 /* Nothing to be done. */ 493 return (/*free_reply*/TRUE); 494} 495 496static int 497mpt_event_reply_handler(struct mpt_softc *mpt, request_t *req, 498 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 499{ 500 int free_reply; 501 502 if (reply_frame == NULL) { 503 mpt_prt(mpt, "Event Handler: req %p:%u - Unexpected NULL reply\n", 504 req, req->serno); 505 return (/*free_reply*/TRUE); 506 } 507 508 free_reply = TRUE; 509 switch (reply_frame->Function) { 510 case MPI_FUNCTION_EVENT_NOTIFICATION: 511 { 512 MSG_EVENT_NOTIFY_REPLY *msg; 513 struct mpt_personality *pers; 514 u_int handled; 515 516 handled = 0; 517 msg = (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 518 MPT_PERS_FOREACH(mpt, pers) 519 handled += pers->event(mpt, req, msg); 520 521 if (handled == 0 && mpt->mpt_pers_mask == 0) { 522 mpt_lprt(mpt, MPT_PRT_INFO, 523 "No Handlers For Any Event Notify Frames. " 524 "Event %#x (ACK %sequired).\n", 525 msg->Event, msg->AckRequired? "r" : "not r"); 526 } else if (handled == 0) { 527 mpt_lprt(mpt, MPT_PRT_WARN, 528 "Unhandled Event Notify Frame. Event %#x " 529 "(ACK %sequired).\n", 530 msg->Event, msg->AckRequired? "r" : "not r"); 531 } 532 533 if (msg->AckRequired) { 534 request_t *ack_req; 535 uint32_t context; 536 537 context = htole32(req->index|MPT_REPLY_HANDLER_EVENTS); 538 ack_req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 539 if (ack_req == NULL) { 540 struct mpt_evtf_record *evtf; 541 542 evtf = (struct mpt_evtf_record *)reply_frame; 543 evtf->context = context; 544 LIST_INSERT_HEAD(&mpt->ack_frames, evtf, links); 545 free_reply = FALSE; 546 break; 547 } 548 mpt_send_event_ack(mpt, ack_req, msg, context); 549 } 550 break; 551 } 552 case MPI_FUNCTION_PORT_ENABLE: 553 mpt_lprt(mpt, MPT_PRT_DEBUG, "enable port reply\n"); 554 break; 555 case MPI_FUNCTION_EVENT_ACK: 556 break; 557 default: 558 mpt_prt(mpt, "Unknown Event Function: %x\n", 559 reply_frame->Function); 560 break; 561 } 562 563 if (req != NULL 564 && (reply_frame->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) == 0) { 565 566 req->state &= ~REQ_STATE_QUEUED; 567 req->state |= REQ_STATE_DONE; 568 TAILQ_REMOVE(&mpt->request_pending_list, req, links); 569 570 if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) 571 wakeup(req); 572 else 573 mpt_free_request(mpt, req); 574 } 575 return (free_reply); 576} 577 578/* 579 * Process an asynchronous event from the IOC. 580 */ 581static int 582mpt_core_event(struct mpt_softc *mpt, request_t *req, 583 MSG_EVENT_NOTIFY_REPLY *msg) 584{ 585 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_core_event: 0x%x\n", 586 msg->Event & 0xFF); 587 switch(msg->Event & 0xFF) { 588 case MPI_EVENT_NONE: 589 break; 590 case MPI_EVENT_LOG_DATA: 591 { 592 int i; 593 594 /* Some error occured that LSI wants logged */ 595 mpt_prt(mpt, "EvtLogData: IOCLogInfo: 0x%08x\n", 596 msg->IOCLogInfo); 597 mpt_prt(mpt, "\tEvtLogData: Event Data:"); 598 for (i = 0; i < msg->EventDataLength; i++) 599 mpt_prtc(mpt, " %08x", msg->Data[i]); 600 mpt_prtc(mpt, "\n"); 601 break; 602 } 603 case MPI_EVENT_EVENT_CHANGE: 604 /* 605 * This is just an acknowledgement 606 * of our mpt_send_event_request. 607 */ 608 break; 609 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE: 610 break; 611 default: 612 return (/*handled*/0); 613 break; 614 } 615 return (/*handled*/1); 616} 617 618static void 619mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 620 MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context) 621{ 622 MSG_EVENT_ACK *ackp; 623 624 ackp = (MSG_EVENT_ACK *)ack_req->req_vbuf; 625 bzero(ackp, sizeof *ackp); 626 ackp->Function = MPI_FUNCTION_EVENT_ACK; 627 ackp->Event = msg->Event; 628 ackp->EventContext = msg->EventContext; 629 ackp->MsgContext = context; 630 mpt_check_doorbell(mpt); 631 mpt_send_cmd(mpt, ack_req); 632} 633 634/***************************** Interrupt Handling *****************************/ 635void 636mpt_intr(void *arg) 637{ 638 struct mpt_softc *mpt; 639 uint32_t reply_desc; 640 int ntrips = 0; 641 642 mpt = (struct mpt_softc *)arg; 643 while ((reply_desc = mpt_pop_reply_queue(mpt)) != MPT_REPLY_EMPTY) { 644 request_t *req; 645 MSG_DEFAULT_REPLY *reply_frame; 646 uint32_t reply_baddr; 647 uint32_t ctxt_idx; 648 u_int cb_index; 649 u_int req_index; 650 int free_rf; 651 652 req = NULL; 653 reply_frame = NULL; 654 reply_baddr = 0; 655 if ((reply_desc & MPI_ADDRESS_REPLY_A_BIT) != 0) { 656 u_int offset; 657 /* 658 * Insure that the reply frame is coherent. 659 */ 660 reply_baddr = (reply_desc << 1); 661 offset = reply_baddr - (mpt->reply_phys & 0xFFFFFFFF); 662 bus_dmamap_sync_range(mpt->reply_dmat, 663 mpt->reply_dmap, offset, MPT_REPLY_SIZE, 664 BUS_DMASYNC_POSTREAD); 665 reply_frame = MPT_REPLY_OTOV(mpt, offset); 666 ctxt_idx = le32toh(reply_frame->MsgContext); 667 } else { 668 uint32_t type; 669 670 type = MPI_GET_CONTEXT_REPLY_TYPE(reply_desc); 671 ctxt_idx = reply_desc; 672 mpt_lprt(mpt, MPT_PRT_DEBUG1, "Context Reply: 0x%08x\n", 673 reply_desc); 674 675 switch (type) { 676 case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT: 677 ctxt_idx &= MPI_CONTEXT_REPLY_CONTEXT_MASK; 678 break; 679 case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET: 680 ctxt_idx = GET_IO_INDEX(reply_desc); 681 if (mpt->tgt_cmd_ptrs == NULL) { 682 mpt_prt(mpt, 683 "mpt_intr: no target cmd ptrs\n"); 684 reply_desc = MPT_REPLY_EMPTY; 685 break; 686 } 687 if (ctxt_idx >= mpt->tgt_cmds_allocated) { 688 mpt_prt(mpt, 689 "mpt_intr: bad tgt cmd ctxt %u\n", 690 ctxt_idx); 691 reply_desc = MPT_REPLY_EMPTY; 692 ntrips = 1000; 693 break; 694 } 695 req = mpt->tgt_cmd_ptrs[ctxt_idx]; 696 if (req == NULL) { 697 mpt_prt(mpt, "no request backpointer " 698 "at index %u", ctxt_idx); 699 reply_desc = MPT_REPLY_EMPTY; 700 ntrips = 1000; 701 break; 702 } 703 /* 704 * Reformulate ctxt_idx to be just as if 705 * it were another type of context reply 706 * so the code below will find the request 707 * via indexing into the pool. 708 */ 709 ctxt_idx = 710 req->index | mpt->scsi_tgt_handler_id; 711 req = NULL; 712 break; 713 case MPI_CONTEXT_REPLY_TYPE_LAN: 714 mpt_prt(mpt, "LAN CONTEXT REPLY: 0x%08x\n", 715 reply_desc); 716 reply_desc = MPT_REPLY_EMPTY; 717 break; 718 default: 719 mpt_prt(mpt, "Context Reply 0x%08x?\n", type); 720 reply_desc = MPT_REPLY_EMPTY; 721 break; 722 } 723 if (reply_desc == MPT_REPLY_EMPTY) { 724 if (ntrips++ > 1000) { 725 break; 726 } 727 continue; 728 } 729 } 730 731 cb_index = MPT_CONTEXT_TO_CBI(ctxt_idx); 732 req_index = MPT_CONTEXT_TO_REQI(ctxt_idx); 733 if (req_index < MPT_MAX_REQUESTS(mpt)) { 734 req = &mpt->request_pool[req_index]; 735 } 736 737 free_rf = mpt_reply_handlers[cb_index](mpt, req, 738 reply_desc, reply_frame); 739 740 if (reply_frame != NULL && free_rf) 741 mpt_free_reply(mpt, reply_baddr); 742 743 /* 744 * If we got ourselves disabled, don't get stuck in a loop 745 */ 746 if (mpt->disabled) { 747 mpt_disable_ints(mpt); 748 break; 749 } 750 if (ntrips++ > 1000) { 751 break; 752 } 753 } 754} 755 756/******************************* Error Recovery *******************************/ 757void 758mpt_complete_request_chain(struct mpt_softc *mpt, struct req_queue *chain, 759 u_int iocstatus) 760{ 761 MSG_DEFAULT_REPLY ioc_status_frame; 762 request_t *req; 763 764 bzero(&ioc_status_frame, sizeof(ioc_status_frame)); 765 ioc_status_frame.MsgLength = roundup2(sizeof(ioc_status_frame), 4); 766 ioc_status_frame.IOCStatus = iocstatus; 767 while((req = TAILQ_FIRST(chain)) != NULL) { 768 MSG_REQUEST_HEADER *msg_hdr; 769 u_int cb_index; 770 TAILQ_REMOVE(chain, req, links); 771 msg_hdr = (MSG_REQUEST_HEADER *)req->req_vbuf; 772 ioc_status_frame.Function = msg_hdr->Function; 773 ioc_status_frame.MsgContext = msg_hdr->MsgContext; 774 cb_index = MPT_CONTEXT_TO_CBI(le32toh(msg_hdr->MsgContext)); 775 mpt_reply_handlers[cb_index](mpt, req, msg_hdr->MsgContext, 776 &ioc_status_frame); 777 } 778} 779 780/********************************* Diagnostics ********************************/ 781/* 782 * Perform a diagnostic dump of a reply frame. 783 */ 784void 785mpt_dump_reply_frame(struct mpt_softc *mpt, MSG_DEFAULT_REPLY *reply_frame) 786{ 787 788 mpt_prt(mpt, "Address Reply:\n"); 789 mpt_print_reply(reply_frame); 790} 791 792/******************************* Doorbell Access ******************************/ 793static __inline uint32_t mpt_rd_db(struct mpt_softc *mpt); 794static __inline uint32_t mpt_rd_intr(struct mpt_softc *mpt); 795 796static __inline uint32_t 797mpt_rd_db(struct mpt_softc *mpt) 798{ 799 return mpt_read(mpt, MPT_OFFSET_DOORBELL); 800} 801 802static __inline uint32_t 803mpt_rd_intr(struct mpt_softc *mpt) 804{ 805 return mpt_read(mpt, MPT_OFFSET_INTR_STATUS); 806} 807 808/* Busy wait for a door bell to be read by IOC */ 809static int 810mpt_wait_db_ack(struct mpt_softc *mpt) 811{ 812 int i; 813 for (i=0; i < MPT_MAX_WAIT; i++) { 814 if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) { 815 maxwait_ack = i > maxwait_ack ? i : maxwait_ack; 816 return (MPT_OK); 817 } 818 DELAY(200); 819 } 820 return (MPT_FAIL); 821} 822 823/* Busy wait for a door bell interrupt */ 824static int 825mpt_wait_db_int(struct mpt_softc *mpt) 826{ 827 int i; 828 for (i=0; i < MPT_MAX_WAIT; i++) { 829 if (MPT_DB_INTR(mpt_rd_intr(mpt))) { 830 maxwait_int = i > maxwait_int ? i : maxwait_int; 831 return MPT_OK; 832 } 833 DELAY(100); 834 } 835 return (MPT_FAIL); 836} 837 838/* Wait for IOC to transition to a give state */ 839void 840mpt_check_doorbell(struct mpt_softc *mpt) 841{ 842 uint32_t db = mpt_rd_db(mpt); 843 if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) { 844 mpt_prt(mpt, "Device not running\n"); 845 mpt_print_db(db); 846 } 847} 848 849/* Wait for IOC to transition to a give state */ 850static int 851mpt_wait_state(struct mpt_softc *mpt, enum DB_STATE_BITS state) 852{ 853 int i; 854 855 for (i = 0; i < MPT_MAX_WAIT; i++) { 856 uint32_t db = mpt_rd_db(mpt); 857 if (MPT_STATE(db) == state) { 858 maxwait_state = i > maxwait_state ? i : maxwait_state; 859 return (MPT_OK); 860 } 861 DELAY(100); 862 } 863 return (MPT_FAIL); 864} 865 866 867/************************* Intialization/Configuration ************************/ 868static int mpt_download_fw(struct mpt_softc *mpt); 869 870/* Issue the reset COMMAND to the IOC */ 871static int 872mpt_soft_reset(struct mpt_softc *mpt) 873{ 874 mpt_lprt(mpt, MPT_PRT_DEBUG, "soft reset\n"); 875 876 /* Have to use hard reset if we are not in Running state */ 877 if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) { 878 mpt_prt(mpt, "soft reset failed: device not running\n"); 879 return (MPT_FAIL); 880 } 881 882 /* If door bell is in use we don't have a chance of getting 883 * a word in since the IOC probably crashed in message 884 * processing. So don't waste our time. 885 */ 886 if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) { 887 mpt_prt(mpt, "soft reset failed: doorbell wedged\n"); 888 return (MPT_FAIL); 889 } 890 891 /* Send the reset request to the IOC */ 892 mpt_write(mpt, MPT_OFFSET_DOORBELL, 893 MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT); 894 if (mpt_wait_db_ack(mpt) != MPT_OK) { 895 mpt_prt(mpt, "soft reset failed: ack timeout\n"); 896 return (MPT_FAIL); 897 } 898 899 /* Wait for the IOC to reload and come out of reset state */ 900 if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) { 901 mpt_prt(mpt, "soft reset failed: device did not restart\n"); 902 return (MPT_FAIL); 903 } 904 905 return MPT_OK; 906} 907 908static int 909mpt_enable_diag_mode(struct mpt_softc *mpt) 910{ 911 int try; 912 913 try = 20; 914 while (--try) { 915 916 if ((mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC) & MPI_DIAG_DRWE) != 0) 917 break; 918 919 /* Enable diagnostic registers */ 920 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF); 921 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_1ST_KEY_VALUE); 922 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_2ND_KEY_VALUE); 923 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_3RD_KEY_VALUE); 924 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_4TH_KEY_VALUE); 925 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_5TH_KEY_VALUE); 926 927 DELAY(100000); 928 } 929 if (try == 0) 930 return (EIO); 931 return (0); 932} 933 934static void 935mpt_disable_diag_mode(struct mpt_softc *mpt) 936{ 937 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFFFFFFFF); 938} 939 940/* This is a magic diagnostic reset that resets all the ARM 941 * processors in the chip. 942 */ 943static void 944mpt_hard_reset(struct mpt_softc *mpt) 945{ 946 int error; 947 int wait; 948 uint32_t diagreg; 949 950 mpt_lprt(mpt, MPT_PRT_DEBUG, "hard reset\n"); 951 952 error = mpt_enable_diag_mode(mpt); 953 if (error) { 954 mpt_prt(mpt, "WARNING - Could not enter diagnostic mode !\n"); 955 mpt_prt(mpt, "Trying to reset anyway.\n"); 956 } 957 958 diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 959 960 /* 961 * This appears to be a workaround required for some 962 * firmware or hardware revs. 963 */ 964 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_DISABLE_ARM); 965 DELAY(1000); 966 967 /* Diag. port is now active so we can now hit the reset bit */ 968 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_RESET_ADAPTER); 969 970 /* 971 * Ensure that the reset has finished. We delay 1ms 972 * prior to reading the register to make sure the chip 973 * has sufficiently completed its reset to handle register 974 * accesses. 975 */ 976 wait = 5000; 977 do { 978 DELAY(1000); 979 diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 980 } while (--wait && (diagreg & MPI_DIAG_RESET_ADAPTER) == 0); 981 982 if (wait == 0) { 983 mpt_prt(mpt, "WARNING - Failed hard reset! " 984 "Trying to initialize anyway.\n"); 985 } 986 987 /* 988 * If we have firmware to download, it must be loaded before 989 * the controller will become operational. Do so now. 990 */ 991 if (mpt->fw_image != NULL) { 992 993 error = mpt_download_fw(mpt); 994 995 if (error) { 996 mpt_prt(mpt, "WARNING - Firmware Download Failed!\n"); 997 mpt_prt(mpt, "Trying to initialize anyway.\n"); 998 } 999 } 1000 1001 /* 1002 * Reseting the controller should have disabled write 1003 * access to the diagnostic registers, but disable 1004 * manually to be sure. 1005 */ 1006 mpt_disable_diag_mode(mpt); 1007} 1008 1009static void 1010mpt_core_ioc_reset(struct mpt_softc *mpt, int type) 1011{ 1012 /* 1013 * Complete all pending requests with a status 1014 * appropriate for an IOC reset. 1015 */ 1016 mpt_complete_request_chain(mpt, &mpt->request_pending_list, 1017 MPI_IOCSTATUS_INVALID_STATE); 1018} 1019 1020 1021/* 1022 * Reset the IOC when needed. Try software command first then if needed 1023 * poke at the magic diagnostic reset. Note that a hard reset resets 1024 * *both* IOCs on dual function chips (FC929 && LSI1030) as well as 1025 * fouls up the PCI configuration registers. 1026 */ 1027int 1028mpt_reset(struct mpt_softc *mpt, int reinit) 1029{ 1030 struct mpt_personality *pers; 1031 int ret; 1032 int retry_cnt = 0; 1033 1034 /* 1035 * Try a soft reset. If that fails, get out the big hammer. 1036 */ 1037 again: 1038 if ((ret = mpt_soft_reset(mpt)) != MPT_OK) { 1039 int cnt; 1040 for (cnt = 0; cnt < 5; cnt++) { 1041 /* Failed; do a hard reset */ 1042 mpt_hard_reset(mpt); 1043 1044 /* 1045 * Wait for the IOC to reload 1046 * and come out of reset state 1047 */ 1048 ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 1049 if (ret == MPT_OK) { 1050 break; 1051 } 1052 /* 1053 * Okay- try to check again... 1054 */ 1055 ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 1056 if (ret == MPT_OK) { 1057 break; 1058 } 1059 mpt_prt(mpt, "mpt_reset: failed hard reset (%d:%d)\n", 1060 retry_cnt, cnt); 1061 } 1062 } 1063 1064 if (retry_cnt == 0) { 1065 /* 1066 * Invoke reset handlers. We bump the reset count so 1067 * that mpt_wait_req() understands that regardless of 1068 * the specified wait condition, it should stop its wait. 1069 */ 1070 mpt->reset_cnt++; 1071 MPT_PERS_FOREACH(mpt, pers) 1072 pers->reset(mpt, ret); 1073 } 1074 1075 if (reinit != 0) { 1076 ret = mpt_enable_ioc(mpt, 1); 1077 if (ret == MPT_OK) { 1078 mpt_enable_ints(mpt); 1079 } 1080 } 1081 if (ret != MPT_OK && retry_cnt++ < 2) { 1082 goto again; 1083 } 1084 return ret; 1085} 1086 1087/* Return a command buffer to the free queue */ 1088void 1089mpt_free_request(struct mpt_softc *mpt, request_t *req) 1090{ 1091 request_t *nxt; 1092 struct mpt_evtf_record *record; 1093 uint32_t reply_baddr; 1094 1095 if (req == NULL || req != &mpt->request_pool[req->index]) { 1096 panic("mpt_free_request bad req ptr\n"); 1097 return; 1098 } 1099 if ((nxt = req->chain) != NULL) { 1100 req->chain = NULL; 1101 mpt_free_request(mpt, nxt); /* NB: recursion */ 1102 } 1103 req->serno = 0; 1104 req->ccb = NULL; 1105 req->state = REQ_STATE_FREE; 1106 if (LIST_EMPTY(&mpt->ack_frames)) { 1107 /* 1108 * Insert free ones at the tail 1109 */ 1110 TAILQ_INSERT_TAIL(&mpt->request_free_list, req, links); 1111 if (mpt->getreqwaiter != 0) { 1112 mpt->getreqwaiter = 0; 1113 wakeup(&mpt->request_free_list); 1114 } 1115 return; 1116 } 1117 1118 /* 1119 * Process an ack frame deferred due to resource shortage. 1120 */ 1121 record = LIST_FIRST(&mpt->ack_frames); 1122 LIST_REMOVE(record, links); 1123 mpt_send_event_ack(mpt, req, &record->reply, record->context); 1124 reply_baddr = (uint32_t)((uint8_t *)record - mpt->reply) 1125 + (mpt->reply_phys & 0xFFFFFFFF); 1126 mpt_free_reply(mpt, reply_baddr); 1127} 1128 1129/* Get a command buffer from the free queue */ 1130request_t * 1131mpt_get_request(struct mpt_softc *mpt, int sleep_ok) 1132{ 1133 request_t *req; 1134 1135retry: 1136 req = TAILQ_FIRST(&mpt->request_free_list); 1137 if (req != NULL) { 1138 KASSERT(req == &mpt->request_pool[req->index], 1139 ("mpt_get_request: corrupted request free list\n")); 1140 TAILQ_REMOVE(&mpt->request_free_list, req, links); 1141 req->state = REQ_STATE_ALLOCATED; 1142 req->chain = NULL; 1143 req->serno = mpt->sequence++; 1144 } else if (sleep_ok != 0) { 1145 mpt->getreqwaiter = 1; 1146 mpt_sleep(mpt, &mpt->request_free_list, PUSER, "mptgreq", 0); 1147 goto retry; 1148 } 1149 return req; 1150} 1151 1152/* Pass the command to the IOC */ 1153void 1154mpt_send_cmd(struct mpt_softc *mpt, request_t *req) 1155{ 1156 uint32_t *pReq; 1157 1158 pReq = req->req_vbuf; 1159 if (mpt->verbose > MPT_PRT_TRACE) { 1160 int offset; 1161#if __FreeBSD_version >= 500000 1162 mpt_prt(mpt, "Send Request %d (%jx):", 1163 req->index, (uintmax_t) req->req_pbuf); 1164#else 1165 mpt_prt(mpt, "Send Request %d (%llx):", 1166 req->index, (unsigned long long) req->req_pbuf); 1167#endif 1168 for (offset = 0; offset < mpt->request_frame_size; offset++) { 1169 if ((offset & 0x7) == 0) { 1170 mpt_prtc(mpt, "\n"); 1171 mpt_prt(mpt, " "); 1172 } 1173 mpt_prtc(mpt, " %08x", pReq[offset]); 1174 } 1175 mpt_prtc(mpt, "\n"); 1176 } 1177 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 1178 BUS_DMASYNC_PREWRITE); 1179 req->state |= REQ_STATE_QUEUED; 1180 TAILQ_INSERT_HEAD(&mpt->request_pending_list, req, links); 1181 mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (uint32_t) req->req_pbuf); 1182} 1183 1184/* 1185 * Wait for a request to complete. 1186 * 1187 * Inputs: 1188 * mpt softc of controller executing request 1189 * req request to wait for 1190 * sleep_ok nonzero implies may sleep in this context 1191 * time_ms timeout in ms. 0 implies no timeout. 1192 * 1193 * Return Values: 1194 * 0 Request completed 1195 * non-0 Timeout fired before request completion. 1196 */ 1197int 1198mpt_wait_req(struct mpt_softc *mpt, request_t *req, 1199 mpt_req_state_t state, mpt_req_state_t mask, 1200 int sleep_ok, int time_ms) 1201{ 1202 int error; 1203 int timeout; 1204 u_int saved_cnt; 1205 1206 /* 1207 * timeout is in ms. 0 indicates infinite wait. 1208 * Convert to ticks or 500us units depending on 1209 * our sleep mode. 1210 */ 1211 if (sleep_ok != 0) { 1212 timeout = (time_ms * hz) / 1000; 1213 } else { 1214 timeout = time_ms * 2; 1215 } 1216 req->state |= REQ_STATE_NEED_WAKEUP; 1217 mask &= ~REQ_STATE_NEED_WAKEUP; 1218 saved_cnt = mpt->reset_cnt; 1219 while ((req->state & mask) != state && mpt->reset_cnt == saved_cnt) { 1220 if (sleep_ok != 0) { 1221 error = mpt_sleep(mpt, req, PUSER, "mptreq", timeout); 1222 if (error == EWOULDBLOCK) { 1223 timeout = 0; 1224 break; 1225 } 1226 } else { 1227 if (time_ms != 0 && --timeout == 0) { 1228 break; 1229 } 1230 DELAY(500); 1231 mpt_intr(mpt); 1232 } 1233 } 1234 req->state &= ~REQ_STATE_NEED_WAKEUP; 1235 if (mpt->reset_cnt != saved_cnt) { 1236 return (EIO); 1237 } 1238 if (time_ms && timeout <= 0) { 1239 MSG_REQUEST_HEADER *msg_hdr = req->req_vbuf; 1240 mpt_prt(mpt, "mpt_wait_req(%x) timed out\n", msg_hdr->Function); 1241 return (ETIMEDOUT); 1242 } 1243 return (0); 1244} 1245 1246/* 1247 * Send a command to the IOC via the handshake register. 1248 * 1249 * Only done at initialization time and for certain unusual 1250 * commands such as device/bus reset as specified by LSI. 1251 */ 1252int 1253mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd) 1254{ 1255 int i; 1256 uint32_t data, *data32; 1257 1258 /* Check condition of the IOC */ 1259 data = mpt_rd_db(mpt); 1260 if ((MPT_STATE(data) != MPT_DB_STATE_READY 1261 && MPT_STATE(data) != MPT_DB_STATE_RUNNING 1262 && MPT_STATE(data) != MPT_DB_STATE_FAULT) 1263 || MPT_DB_IS_IN_USE(data)) { 1264 mpt_prt(mpt, "handshake aborted - invalid doorbell state\n"); 1265 mpt_print_db(data); 1266 return (EBUSY); 1267 } 1268 1269 /* We move things in 32 bit chunks */ 1270 len = (len + 3) >> 2; 1271 data32 = cmd; 1272 1273 /* Clear any left over pending doorbell interupts */ 1274 if (MPT_DB_INTR(mpt_rd_intr(mpt))) 1275 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1276 1277 /* 1278 * Tell the handshake reg. we are going to send a command 1279 * and how long it is going to be. 1280 */ 1281 data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) | 1282 (len << MPI_DOORBELL_ADD_DWORDS_SHIFT); 1283 mpt_write(mpt, MPT_OFFSET_DOORBELL, data); 1284 1285 /* Wait for the chip to notice */ 1286 if (mpt_wait_db_int(mpt) != MPT_OK) { 1287 mpt_prt(mpt, "mpt_send_handshake_cmd timeout1\n"); 1288 return (ETIMEDOUT); 1289 } 1290 1291 /* Clear the interrupt */ 1292 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1293 1294 if (mpt_wait_db_ack(mpt) != MPT_OK) { 1295 mpt_prt(mpt, "mpt_send_handshake_cmd timeout2\n"); 1296 return (ETIMEDOUT); 1297 } 1298 1299 /* Send the command */ 1300 for (i = 0; i < len; i++) { 1301 mpt_write(mpt, MPT_OFFSET_DOORBELL, *data32++); 1302 if (mpt_wait_db_ack(mpt) != MPT_OK) { 1303 mpt_prt(mpt, 1304 "mpt_send_handshake_cmd timeout! index = %d\n", 1305 i); 1306 return (ETIMEDOUT); 1307 } 1308 } 1309 return MPT_OK; 1310} 1311 1312/* Get the response from the handshake register */ 1313int 1314mpt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply) 1315{ 1316 int left, reply_left; 1317 u_int16_t *data16; 1318 MSG_DEFAULT_REPLY *hdr; 1319 1320 /* We move things out in 16 bit chunks */ 1321 reply_len >>= 1; 1322 data16 = (u_int16_t *)reply; 1323 1324 hdr = (MSG_DEFAULT_REPLY *)reply; 1325 1326 /* Get first word */ 1327 if (mpt_wait_db_int(mpt) != MPT_OK) { 1328 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout1\n"); 1329 return ETIMEDOUT; 1330 } 1331 *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK; 1332 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1333 1334 /* Get Second Word */ 1335 if (mpt_wait_db_int(mpt) != MPT_OK) { 1336 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout2\n"); 1337 return ETIMEDOUT; 1338 } 1339 *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK; 1340 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1341 1342 /* With the second word, we can now look at the length */ 1343 if (((reply_len >> 1) != hdr->MsgLength)) { 1344 mpt_prt(mpt, "reply length does not match message length: " 1345 "got 0x%02x, expected 0x%02x\n", 1346 hdr->MsgLength << 2, reply_len << 1); 1347 } 1348 1349 /* Get rest of the reply; but don't overflow the provided buffer */ 1350 left = (hdr->MsgLength << 1) - 2; 1351 reply_left = reply_len - 2; 1352 while (left--) { 1353 u_int16_t datum; 1354 1355 if (mpt_wait_db_int(mpt) != MPT_OK) { 1356 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout3\n"); 1357 return ETIMEDOUT; 1358 } 1359 datum = mpt_read(mpt, MPT_OFFSET_DOORBELL); 1360 1361 if (reply_left-- > 0) 1362 *data16++ = datum & MPT_DB_DATA_MASK; 1363 1364 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1365 } 1366 1367 /* One more wait & clear at the end */ 1368 if (mpt_wait_db_int(mpt) != MPT_OK) { 1369 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout4\n"); 1370 return ETIMEDOUT; 1371 } 1372 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1373 1374 if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1375 if (mpt->verbose >= MPT_PRT_TRACE) 1376 mpt_print_reply(hdr); 1377 return (MPT_FAIL | hdr->IOCStatus); 1378 } 1379 1380 return (0); 1381} 1382 1383static int 1384mpt_get_iocfacts(struct mpt_softc *mpt, MSG_IOC_FACTS_REPLY *freplp) 1385{ 1386 MSG_IOC_FACTS f_req; 1387 int error; 1388 1389 bzero(&f_req, sizeof f_req); 1390 f_req.Function = MPI_FUNCTION_IOC_FACTS; 1391 f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1392 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 1393 if (error) 1394 return(error); 1395 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 1396 return (error); 1397} 1398 1399static int 1400mpt_get_portfacts(struct mpt_softc *mpt, MSG_PORT_FACTS_REPLY *freplp) 1401{ 1402 MSG_PORT_FACTS f_req; 1403 int error; 1404 1405 /* XXX: Only getting PORT FACTS for Port 0 */ 1406 memset(&f_req, 0, sizeof f_req); 1407 f_req.Function = MPI_FUNCTION_PORT_FACTS; 1408 f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1409 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 1410 if (error) 1411 return(error); 1412 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 1413 return (error); 1414} 1415 1416/* 1417 * Send the initialization request. This is where we specify how many 1418 * SCSI busses and how many devices per bus we wish to emulate. 1419 * This is also the command that specifies the max size of the reply 1420 * frames from the IOC that we will be allocating. 1421 */ 1422static int 1423mpt_send_ioc_init(struct mpt_softc *mpt, uint32_t who) 1424{ 1425 int error = 0; 1426 MSG_IOC_INIT init; 1427 MSG_IOC_INIT_REPLY reply; 1428 1429 bzero(&init, sizeof init); 1430 init.WhoInit = who; 1431 init.Function = MPI_FUNCTION_IOC_INIT; 1432 if (mpt->is_fc) { 1433 init.MaxDevices = 255; 1434 } else if (mpt->is_sas) { 1435 init.MaxDevices = mpt->mpt_max_devices; 1436 } else { 1437 init.MaxDevices = 16; 1438 } 1439 init.MaxBuses = 1; 1440 1441 init.MsgVersion = htole16(MPI_VERSION); 1442 init.HeaderVersion = htole16(MPI_HEADER_VERSION); 1443 init.ReplyFrameSize = htole16(MPT_REPLY_SIZE); 1444 init.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1445 1446 if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) { 1447 return(error); 1448 } 1449 1450 error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply); 1451 return (error); 1452} 1453 1454 1455/* 1456 * Utiltity routine to read configuration headers and pages 1457 */ 1458int 1459mpt_issue_cfg_req(struct mpt_softc *mpt, request_t *req, u_int Action, 1460 u_int PageVersion, u_int PageLength, u_int PageNumber, 1461 u_int PageType, uint32_t PageAddress, bus_addr_t addr, 1462 bus_size_t len, int sleep_ok, int timeout_ms) 1463{ 1464 MSG_CONFIG *cfgp; 1465 SGE_SIMPLE32 *se; 1466 1467 cfgp = req->req_vbuf; 1468 memset(cfgp, 0, sizeof *cfgp); 1469 cfgp->Action = Action; 1470 cfgp->Function = MPI_FUNCTION_CONFIG; 1471 cfgp->Header.PageVersion = PageVersion; 1472 cfgp->Header.PageLength = PageLength; 1473 cfgp->Header.PageNumber = PageNumber; 1474 cfgp->Header.PageType = PageType; 1475 cfgp->PageAddress = PageAddress; 1476 se = (SGE_SIMPLE32 *)&cfgp->PageBufferSGE; 1477 se->Address = addr; 1478 MPI_pSGE_SET_LENGTH(se, len); 1479 MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT | 1480 MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER | 1481 MPI_SGE_FLAGS_END_OF_LIST | 1482 ((Action == MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT 1483 || Action == MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM) 1484 ? MPI_SGE_FLAGS_HOST_TO_IOC : MPI_SGE_FLAGS_IOC_TO_HOST))); 1485 cfgp->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 1486 1487 mpt_check_doorbell(mpt); 1488 mpt_send_cmd(mpt, req); 1489 return (mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1490 sleep_ok, timeout_ms)); 1491} 1492 1493 1494int 1495mpt_read_cfg_header(struct mpt_softc *mpt, int PageType, int PageNumber, 1496 uint32_t PageAddress, CONFIG_PAGE_HEADER *rslt, 1497 int sleep_ok, int timeout_ms) 1498{ 1499 request_t *req; 1500 MSG_CONFIG *cfgp; 1501 int error; 1502 1503 req = mpt_get_request(mpt, sleep_ok); 1504 if (req == NULL) { 1505 mpt_prt(mpt, "mpt_read_cfg_header: Get request failed!\n"); 1506 return (ENOMEM); 1507 } 1508 1509 error = mpt_issue_cfg_req(mpt, req, MPI_CONFIG_ACTION_PAGE_HEADER, 1510 /*PageVersion*/0, /*PageLength*/0, PageNumber, 1511 PageType, PageAddress, /*addr*/0, /*len*/0, 1512 sleep_ok, timeout_ms); 1513 if (error != 0) { 1514 mpt_free_request(mpt, req); 1515 mpt_prt(mpt, "read_cfg_header timed out\n"); 1516 return (ETIMEDOUT); 1517 } 1518 1519 switch (req->IOCStatus & MPI_IOCSTATUS_MASK) { 1520 case MPI_IOCSTATUS_SUCCESS: 1521 cfgp = req->req_vbuf; 1522 bcopy(&cfgp->Header, rslt, sizeof(*rslt)); 1523 error = 0; 1524 break; 1525 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: 1526 mpt_lprt(mpt, MPT_PRT_DEBUG, 1527 "Invalid Page Type %d Number %d Addr 0x%0x\n", 1528 PageType, PageNumber, PageAddress); 1529 error = EINVAL; 1530 break; 1531 default: 1532 mpt_prt(mpt, "mpt_read_cfg_header: Config Info Status %x\n", 1533 req->IOCStatus); 1534 error = EIO; 1535 break; 1536 } 1537 mpt_free_request(mpt, req); 1538 return (error); 1539} 1540 1541int 1542mpt_read_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1543 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1544 int timeout_ms) 1545{ 1546 request_t *req; 1547 int error; 1548 1549 req = mpt_get_request(mpt, sleep_ok); 1550 if (req == NULL) { 1551 mpt_prt(mpt, "mpt_read_cfg_page: Get request failed!\n"); 1552 return (-1); 1553 } 1554 1555 error = mpt_issue_cfg_req(mpt, req, Action, hdr->PageVersion, 1556 hdr->PageLength, hdr->PageNumber, 1557 hdr->PageType & MPI_CONFIG_PAGETYPE_MASK, 1558 PageAddress, req->req_pbuf + MPT_RQSL(mpt), 1559 len, sleep_ok, timeout_ms); 1560 if (error != 0) { 1561 mpt_prt(mpt, "read_cfg_page(%d) timed out\n", Action); 1562 return (-1); 1563 } 1564 1565 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1566 mpt_prt(mpt, "mpt_read_cfg_page: Config Info Status %x\n", 1567 req->IOCStatus); 1568 mpt_free_request(mpt, req); 1569 return (-1); 1570 } 1571 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 1572 BUS_DMASYNC_POSTREAD); 1573 memcpy(hdr, ((uint8_t *)req->req_vbuf)+MPT_RQSL(mpt), len); 1574 mpt_free_request(mpt, req); 1575 return (0); 1576} 1577 1578int 1579mpt_write_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1580 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1581 int timeout_ms) 1582{ 1583 request_t *req; 1584 u_int hdr_attr; 1585 int error; 1586 1587 hdr_attr = hdr->PageType & MPI_CONFIG_PAGEATTR_MASK; 1588 if (hdr_attr != MPI_CONFIG_PAGEATTR_CHANGEABLE && 1589 hdr_attr != MPI_CONFIG_PAGEATTR_PERSISTENT) { 1590 mpt_prt(mpt, "page type 0x%x not changeable\n", 1591 hdr->PageType & MPI_CONFIG_PAGETYPE_MASK); 1592 return (-1); 1593 } 1594 hdr->PageType &= MPI_CONFIG_PAGETYPE_MASK, 1595 1596 req = mpt_get_request(mpt, sleep_ok); 1597 if (req == NULL) 1598 return (-1); 1599 1600 memcpy(((caddr_t)req->req_vbuf)+MPT_RQSL(mpt), hdr, len); 1601 /* Restore stripped out attributes */ 1602 hdr->PageType |= hdr_attr; 1603 1604 error = mpt_issue_cfg_req(mpt, req, Action, hdr->PageVersion, 1605 hdr->PageLength, hdr->PageNumber, 1606 hdr->PageType & MPI_CONFIG_PAGETYPE_MASK, 1607 PageAddress, req->req_pbuf + MPT_RQSL(mpt), 1608 len, sleep_ok, timeout_ms); 1609 if (error != 0) { 1610 mpt_prt(mpt, "mpt_write_cfg_page timed out\n"); 1611 return (-1); 1612 } 1613 1614 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1615 mpt_prt(mpt, "mpt_write_cfg_page: Config Info Status %x\n", 1616 req->IOCStatus); 1617 mpt_free_request(mpt, req); 1618 return (-1); 1619 } 1620 mpt_free_request(mpt, req); 1621 return (0); 1622} 1623 1624/* 1625 * Read IOC configuration information 1626 */ 1627static int 1628mpt_read_config_info_ioc(struct mpt_softc *mpt) 1629{ 1630 CONFIG_PAGE_HEADER hdr; 1631 struct mpt_raid_volume *mpt_raid; 1632 int rv; 1633 int i; 1634 size_t len; 1635 1636 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1637 /*PageNumber*/2, /*PageAddress*/0, &hdr, 1638 /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1639 /* 1640 * If it's an invalid page, so what? Not a supported function.... 1641 */ 1642 if (rv == EINVAL) 1643 return (0); 1644 if (rv) 1645 return (rv); 1646 1647 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 2 Header: ver %x, len %x, " 1648 "num %x, type %x\n", hdr.PageVersion, 1649 hdr.PageLength * sizeof(uint32_t), 1650 hdr.PageNumber, hdr.PageType); 1651 1652 len = hdr.PageLength * sizeof(uint32_t); 1653 mpt->ioc_page2 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1654 if (mpt->ioc_page2 == NULL) 1655 return (ENOMEM); 1656 memcpy(&mpt->ioc_page2->Header, &hdr, sizeof(hdr)); 1657 rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1658 &mpt->ioc_page2->Header, len, 1659 /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1660 if (rv) { 1661 mpt_prt(mpt, "failed to read IOC Page 2\n"); 1662 } else if (mpt->ioc_page2->CapabilitiesFlags != 0) { 1663 uint32_t mask; 1664 1665 mpt_prt(mpt, "Capabilities: ("); 1666 for (mask = 1; mask != 0; mask <<= 1) { 1667 if ((mpt->ioc_page2->CapabilitiesFlags & mask) == 0) 1668 continue; 1669 1670 switch (mask) { 1671 case MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT: 1672 mpt_prtc(mpt, " RAID-0"); 1673 break; 1674 case MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT: 1675 mpt_prtc(mpt, " RAID-1E"); 1676 break; 1677 case MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT: 1678 mpt_prtc(mpt, " RAID-1"); 1679 break; 1680 case MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT: 1681 mpt_prtc(mpt, " SES"); 1682 break; 1683 case MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT: 1684 mpt_prtc(mpt, " SAFTE"); 1685 break; 1686 case MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT: 1687 mpt_prtc(mpt, " Multi-Channel-Arrays"); 1688 default: 1689 break; 1690 } 1691 } 1692 mpt_prtc(mpt, " )\n"); 1693 if ((mpt->ioc_page2->CapabilitiesFlags 1694 & (MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT 1695 | MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT 1696 | MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT)) != 0) { 1697 mpt_prt(mpt, "%d Active Volume%s(%d Max)\n", 1698 mpt->ioc_page2->NumActiveVolumes, 1699 mpt->ioc_page2->NumActiveVolumes != 1 1700 ? "s " : " ", 1701 mpt->ioc_page2->MaxVolumes); 1702 mpt_prt(mpt, "%d Hidden Drive Member%s(%d Max)\n", 1703 mpt->ioc_page2->NumActivePhysDisks, 1704 mpt->ioc_page2->NumActivePhysDisks != 1 1705 ? "s " : " ", 1706 mpt->ioc_page2->MaxPhysDisks); 1707 } 1708 } 1709 1710 len = mpt->ioc_page2->MaxVolumes * sizeof(struct mpt_raid_volume); 1711 mpt->raid_volumes = malloc(len, M_DEVBUF, M_NOWAIT); 1712 if (mpt->raid_volumes == NULL) { 1713 mpt_prt(mpt, "Could not allocate RAID volume data\n"); 1714 } else { 1715 memset(mpt->raid_volumes, 0, len); 1716 } 1717 1718 /* 1719 * Copy critical data out of ioc_page2 so that we can 1720 * safely refresh the page without windows of unreliable 1721 * data. 1722 */ 1723 mpt->raid_max_volumes = mpt->ioc_page2->MaxVolumes; 1724 1725 len = sizeof(*mpt->raid_volumes->config_page) 1726 + (sizeof(RAID_VOL0_PHYS_DISK)*(mpt->ioc_page2->MaxPhysDisks - 1)); 1727 for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) { 1728 mpt_raid = &mpt->raid_volumes[i]; 1729 mpt_raid->config_page = malloc(len, M_DEVBUF, M_NOWAIT); 1730 if (mpt_raid->config_page == NULL) { 1731 mpt_prt(mpt, "Could not allocate RAID page data\n"); 1732 break; 1733 } 1734 memset(mpt_raid->config_page, 0, len); 1735 } 1736 mpt->raid_page0_len = len; 1737 1738 len = mpt->ioc_page2->MaxPhysDisks * sizeof(struct mpt_raid_disk); 1739 mpt->raid_disks = malloc(len, M_DEVBUF, M_NOWAIT); 1740 if (mpt->raid_disks == NULL) { 1741 mpt_prt(mpt, "Could not allocate RAID disk data\n"); 1742 } else { 1743 memset(mpt->raid_disks, 0, len); 1744 } 1745 1746 mpt->raid_max_disks = mpt->ioc_page2->MaxPhysDisks; 1747 1748 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1749 /*PageNumber*/3, /*PageAddress*/0, &hdr, 1750 /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1751 if (rv) 1752 return (EIO); 1753 1754 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 3 Header: %x %x %x %x\n", 1755 hdr.PageVersion, hdr.PageLength, hdr.PageNumber, hdr.PageType); 1756 1757 if (mpt->ioc_page3 != NULL) 1758 free(mpt->ioc_page3, M_DEVBUF); 1759 len = hdr.PageLength * sizeof(uint32_t); 1760 mpt->ioc_page3 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1761 if (mpt->ioc_page3 == NULL) 1762 return (-1); 1763 memcpy(&mpt->ioc_page3->Header, &hdr, sizeof(hdr)); 1764 rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1765 &mpt->ioc_page3->Header, len, 1766 /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1767 if (rv) { 1768 mpt_prt(mpt, "failed to read IOC Page 3\n"); 1769 } 1770 1771 mpt_raid_wakeup(mpt); 1772 1773 return (0); 1774} 1775 1776/* 1777 * Enable IOC port 1778 */ 1779static int 1780mpt_send_port_enable(struct mpt_softc *mpt, int port) 1781{ 1782 request_t *req; 1783 MSG_PORT_ENABLE *enable_req; 1784 int error; 1785 1786 req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 1787 if (req == NULL) 1788 return (-1); 1789 1790 enable_req = req->req_vbuf; 1791 bzero(enable_req, MPT_RQSL(mpt)); 1792 1793 enable_req->Function = MPI_FUNCTION_PORT_ENABLE; 1794 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 1795 enable_req->PortNumber = port; 1796 1797 mpt_check_doorbell(mpt); 1798 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling port %d\n", port); 1799 1800 mpt_send_cmd(mpt, req); 1801 error = mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1802 /*sleep_ok*/FALSE, 1803 /*time_ms*/(mpt->is_sas || mpt->is_fc)? 30000 : 3000); 1804 if (error != 0) { 1805 mpt_prt(mpt, "port %d enable timed out\n", port); 1806 return (-1); 1807 } 1808 mpt_free_request(mpt, req); 1809 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabled port %d\n", port); 1810 return (0); 1811} 1812 1813/* 1814 * Enable/Disable asynchronous event reporting. 1815 * 1816 * NB: this is the first command we send via shared memory 1817 * instead of the handshake register. 1818 */ 1819static int 1820mpt_send_event_request(struct mpt_softc *mpt, int onoff) 1821{ 1822 request_t *req; 1823 MSG_EVENT_NOTIFY *enable_req; 1824 1825 req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 1826 1827 enable_req = req->req_vbuf; 1828 bzero(enable_req, sizeof *enable_req); 1829 1830 enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION; 1831 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_EVENTS); 1832 enable_req->Switch = onoff; 1833 1834 mpt_check_doorbell(mpt); 1835 mpt_lprt(mpt, MPT_PRT_DEBUG, 1836 "%sabling async events\n", onoff ? "en" : "dis"); 1837 mpt_send_cmd(mpt, req); 1838 1839 return (0); 1840} 1841 1842/* 1843 * Un-mask the interupts on the chip. 1844 */ 1845void 1846mpt_enable_ints(struct mpt_softc *mpt) 1847{ 1848 /* Unmask every thing except door bell int */ 1849 mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK); 1850} 1851 1852/* 1853 * Mask the interupts on the chip. 1854 */ 1855void 1856mpt_disable_ints(struct mpt_softc *mpt) 1857{ 1858 /* Mask all interrupts */ 1859 mpt_write(mpt, MPT_OFFSET_INTR_MASK, 1860 MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK); 1861} 1862 1863static void 1864mpt_sysctl_attach(struct mpt_softc *mpt) 1865{ 1866#if __FreeBSD_version >= 500000 1867 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(mpt->dev); 1868 struct sysctl_oid *tree = device_get_sysctl_tree(mpt->dev); 1869 1870 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1871 "debug", CTLFLAG_RW, &mpt->verbose, 0, 1872 "Debugging/Verbose level"); 1873#endif 1874} 1875 1876int 1877mpt_attach(struct mpt_softc *mpt) 1878{ 1879 struct mpt_personality *pers; 1880 int i; 1881 int error; 1882 1883 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 1884 pers = mpt_personalities[i]; 1885 if (pers == NULL) { 1886 continue; 1887 } 1888 if (pers->probe(mpt) == 0) { 1889 error = pers->attach(mpt); 1890 if (error != 0) { 1891 mpt_detach(mpt); 1892 return (error); 1893 } 1894 mpt->mpt_pers_mask |= (0x1 << pers->id); 1895 pers->use_count++; 1896 } 1897 } 1898 1899 /* 1900 * Now that we've attached everything, do the enable function 1901 * for all of the personalities. This allows the personalities 1902 * to do setups that are appropriate for them prior to enabling 1903 * any ports. 1904 */ 1905 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 1906 pers = mpt_personalities[i]; 1907 if (pers != NULL && MPT_PERS_ATTACHED(pers, mpt) != 0) { 1908 error = pers->enable(mpt); 1909 if (error != 0) { 1910 mpt_prt(mpt, "personality %s attached but would" 1911 " not enable (%d)\n", pers->name, error); 1912 mpt_detach(mpt); 1913 return (error); 1914 } 1915 } 1916 } 1917 return (0); 1918} 1919 1920int 1921mpt_shutdown(struct mpt_softc *mpt) 1922{ 1923 struct mpt_personality *pers; 1924 1925 MPT_PERS_FOREACH_REVERSE(mpt, pers) { 1926 pers->shutdown(mpt); 1927 } 1928 return (0); 1929} 1930 1931int 1932mpt_detach(struct mpt_softc *mpt) 1933{ 1934 struct mpt_personality *pers; 1935 1936 MPT_PERS_FOREACH_REVERSE(mpt, pers) { 1937 pers->detach(mpt); 1938 mpt->mpt_pers_mask &= ~(0x1 << pers->id); 1939 pers->use_count--; 1940 } 1941 1942 return (0); 1943} 1944 1945int 1946mpt_core_load(struct mpt_personality *pers) 1947{ 1948 int i; 1949 1950 /* 1951 * Setup core handlers and insert the default handler 1952 * into all "empty slots". 1953 */ 1954 for (i = 0; i < MPT_NUM_REPLY_HANDLERS; i++) { 1955 mpt_reply_handlers[i] = mpt_default_reply_handler; 1956 } 1957 1958 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_EVENTS)] = 1959 mpt_event_reply_handler; 1960 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_CONFIG)] = 1961 mpt_config_reply_handler; 1962 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_HANDSHAKE)] = 1963 mpt_handshake_reply_handler; 1964 return (0); 1965} 1966 1967/* 1968 * Initialize per-instance driver data and perform 1969 * initial controller configuration. 1970 */ 1971int 1972mpt_core_attach(struct mpt_softc *mpt) 1973{ 1974 int val; 1975 int error; 1976 1977 1978 LIST_INIT(&mpt->ack_frames); 1979 1980 /* Put all request buffers on the free list */ 1981 TAILQ_INIT(&mpt->request_pending_list); 1982 TAILQ_INIT(&mpt->request_free_list); 1983 for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) { 1984 mpt_free_request(mpt, &mpt->request_pool[val]); 1985 } 1986 1987 for (val = 0; val < MPT_MAX_LUNS; val++) { 1988 STAILQ_INIT(&mpt->trt[val].atios); 1989 STAILQ_INIT(&mpt->trt[val].inots); 1990 } 1991 STAILQ_INIT(&mpt->trt_wildcard.atios); 1992 STAILQ_INIT(&mpt->trt_wildcard.inots); 1993 1994 mpt->scsi_tgt_handler_id = MPT_HANDLER_ID_NONE; 1995 1996 mpt_sysctl_attach(mpt); 1997 1998 mpt_lprt(mpt, MPT_PRT_DEBUG, "doorbell req = %s\n", 1999 mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL))); 2000 2001 error = mpt_configure_ioc(mpt); 2002 2003 return (error); 2004} 2005 2006int 2007mpt_core_enable(struct mpt_softc *mpt) 2008{ 2009 /* 2010 * We enter with the IOC enabled, but async events 2011 * not enabled, ports not enabled and interrupts 2012 * not enabled. 2013 */ 2014 2015 /* 2016 * Enable asynchronous event reporting- all personalities 2017 * have attached so that they should be able to now field 2018 * async events. 2019 */ 2020 mpt_send_event_request(mpt, 1); 2021 2022 /* 2023 * Catch any pending interrupts 2024 * 2025 * This seems to be crucial- otherwise 2026 * the portenable below times out. 2027 */ 2028 mpt_intr(mpt); 2029 2030 /* 2031 * Enable Interrupts 2032 */ 2033 mpt_enable_ints(mpt); 2034 2035 /* 2036 * Catch any pending interrupts 2037 * 2038 * This seems to be crucial- otherwise 2039 * the portenable below times out. 2040 */ 2041 mpt_intr(mpt); 2042 2043 /* 2044 * Enable the port- but only if we are not MPT_ROLE_NONE. 2045 */ 2046 if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2047 mpt_prt(mpt, "failed to enable port 0\n"); 2048 return (ENXIO); 2049 } 2050 return (0); 2051} 2052 2053void 2054mpt_core_shutdown(struct mpt_softc *mpt) 2055{ 2056 mpt_disable_ints(mpt); 2057} 2058 2059void 2060mpt_core_detach(struct mpt_softc *mpt) 2061{ 2062 mpt_disable_ints(mpt); 2063} 2064 2065int 2066mpt_core_unload(struct mpt_personality *pers) 2067{ 2068 /* Unload is always successfull. */ 2069 return (0); 2070} 2071 2072#define FW_UPLOAD_REQ_SIZE \ 2073 (sizeof(MSG_FW_UPLOAD) - sizeof(SGE_MPI_UNION) \ 2074 + sizeof(FW_UPLOAD_TCSGE) + sizeof(SGE_SIMPLE32)) 2075 2076static int 2077mpt_upload_fw(struct mpt_softc *mpt) 2078{ 2079 uint8_t fw_req_buf[FW_UPLOAD_REQ_SIZE]; 2080 MSG_FW_UPLOAD_REPLY fw_reply; 2081 MSG_FW_UPLOAD *fw_req; 2082 FW_UPLOAD_TCSGE *tsge; 2083 SGE_SIMPLE32 *sge; 2084 uint32_t flags; 2085 int error; 2086 2087 memset(&fw_req_buf, 0, sizeof(fw_req_buf)); 2088 fw_req = (MSG_FW_UPLOAD *)fw_req_buf; 2089 fw_req->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM; 2090 fw_req->Function = MPI_FUNCTION_FW_UPLOAD; 2091 fw_req->MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 2092 tsge = (FW_UPLOAD_TCSGE *)&fw_req->SGL; 2093 tsge->DetailsLength = 12; 2094 tsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT; 2095 tsge->ImageSize = htole32(mpt->fw_image_size); 2096 sge = (SGE_SIMPLE32 *)(tsge + 1); 2097 flags = (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER 2098 | MPI_SGE_FLAGS_END_OF_LIST | MPI_SGE_FLAGS_SIMPLE_ELEMENT 2099 | MPI_SGE_FLAGS_32_BIT_ADDRESSING | MPI_SGE_FLAGS_IOC_TO_HOST); 2100 flags <<= MPI_SGE_FLAGS_SHIFT; 2101 sge->FlagsLength = htole32(flags | mpt->fw_image_size); 2102 sge->Address = htole32(mpt->fw_phys); 2103 error = mpt_send_handshake_cmd(mpt, sizeof(fw_req_buf), &fw_req_buf); 2104 if (error) 2105 return(error); 2106 error = mpt_recv_handshake_reply(mpt, sizeof(fw_reply), &fw_reply); 2107 return (error); 2108} 2109 2110static void 2111mpt_diag_outsl(struct mpt_softc *mpt, uint32_t addr, 2112 uint32_t *data, bus_size_t len) 2113{ 2114 uint32_t *data_end; 2115 2116 data_end = data + (roundup2(len, sizeof(uint32_t)) / 4); 2117 pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2118 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, addr); 2119 while (data != data_end) { 2120 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, *data); 2121 data++; 2122 } 2123 pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2124} 2125 2126static int 2127mpt_download_fw(struct mpt_softc *mpt) 2128{ 2129 MpiFwHeader_t *fw_hdr; 2130 int error; 2131 uint32_t ext_offset; 2132 uint32_t data; 2133 2134 mpt_prt(mpt, "Downloading Firmware - Image Size %d\n", 2135 mpt->fw_image_size); 2136 2137 error = mpt_enable_diag_mode(mpt); 2138 if (error != 0) { 2139 mpt_prt(mpt, "Could not enter diagnostic mode!\n"); 2140 return (EIO); 2141 } 2142 2143 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, 2144 MPI_DIAG_RW_ENABLE|MPI_DIAG_DISABLE_ARM); 2145 2146 fw_hdr = (MpiFwHeader_t *)mpt->fw_image; 2147 mpt_diag_outsl(mpt, fw_hdr->LoadStartAddress, (uint32_t*)fw_hdr, 2148 fw_hdr->ImageSize); 2149 2150 ext_offset = fw_hdr->NextImageHeaderOffset; 2151 while (ext_offset != 0) { 2152 MpiExtImageHeader_t *ext; 2153 2154 ext = (MpiExtImageHeader_t *)((uintptr_t)fw_hdr + ext_offset); 2155 ext_offset = ext->NextImageHeaderOffset; 2156 2157 mpt_diag_outsl(mpt, ext->LoadStartAddress, (uint32_t*)ext, 2158 ext->ImageSize); 2159 } 2160 2161 pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2162 /* Setup the address to jump to on reset. */ 2163 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, fw_hdr->IopResetRegAddr); 2164 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, fw_hdr->IopResetVectorValue); 2165 2166 /* 2167 * The controller sets the "flash bad" status after attempting 2168 * to auto-boot from flash. Clear the status so that the controller 2169 * will continue the boot process with our newly installed firmware. 2170 */ 2171 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2172 data = mpt_pio_read(mpt, MPT_OFFSET_DIAG_DATA) | MPT_DIAG_MEM_CFG_BADFL; 2173 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2174 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, data); 2175 2176 pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2177 2178 /* 2179 * Re-enable the processor and clear the boot halt flag. 2180 */ 2181 data = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 2182 data &= ~(MPI_DIAG_PREVENT_IOC_BOOT|MPI_DIAG_DISABLE_ARM); 2183 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, data); 2184 2185 mpt_disable_diag_mode(mpt); 2186 return (0); 2187} 2188 2189/* 2190 * Allocate/Initialize data structures for the controller. Called 2191 * once at instance startup. 2192 */ 2193static int 2194mpt_configure_ioc(struct mpt_softc *mpt) 2195{ 2196 MSG_PORT_FACTS_REPLY pfp; 2197 MSG_IOC_FACTS_REPLY facts; 2198 int try; 2199 int needreset; 2200 uint32_t max_chain_depth; 2201 2202 needreset = 0; 2203 for (try = 0; try < MPT_MAX_TRYS; try++) { 2204 2205 /* 2206 * No need to reset if the IOC is already in the READY state. 2207 * 2208 * Force reset if initialization failed previously. 2209 * Note that a hard_reset of the second channel of a '929 2210 * will stop operation of the first channel. Hopefully, if the 2211 * first channel is ok, the second will not require a hard 2212 * reset. 2213 */ 2214 if (needreset || MPT_STATE(mpt_rd_db(mpt)) != 2215 MPT_DB_STATE_READY) { 2216 if (mpt_reset(mpt, FALSE) != MPT_OK) { 2217 continue; 2218 } 2219 } 2220 needreset = 0; 2221 2222 if (mpt_get_iocfacts(mpt, &facts) != MPT_OK) { 2223 mpt_prt(mpt, "mpt_get_iocfacts failed\n"); 2224 needreset = 1; 2225 continue; 2226 } 2227 2228 mpt->mpt_global_credits = le16toh(facts.GlobalCredits); 2229 mpt->request_frame_size = le16toh(facts.RequestFrameSize); 2230 mpt->ioc_facts_flags = facts.Flags; 2231 mpt_prt(mpt, "MPI Version=%d.%d.%d.%d\n", 2232 le16toh(facts.MsgVersion) >> 8, 2233 le16toh(facts.MsgVersion) & 0xFF, 2234 le16toh(facts.HeaderVersion) >> 8, 2235 le16toh(facts.HeaderVersion) & 0xFF); 2236 2237 /* 2238 * Now that we know request frame size, we can calculate 2239 * the actual (reasonable) segment limit for read/write I/O. 2240 * 2241 * This limit is constrained by: 2242 * 2243 * + The size of each area we allocate per command (and how 2244 * many chain segments we can fit into it). 2245 * + The total number of areas we've set up. 2246 * + The actual chain depth the card will allow. 2247 * 2248 * The first area's segment count is limited by the I/O request 2249 * at the head of it. We cannot allocate realistically more 2250 * than MPT_MAX_REQUESTS areas. Therefore, to account for both 2251 * conditions, we'll just start out with MPT_MAX_REQUESTS-2. 2252 * 2253 */ 2254 max_chain_depth = facts.MaxChainDepth; 2255 2256 /* total number of request areas we (can) allocate */ 2257 mpt->max_seg_cnt = MPT_MAX_REQUESTS(mpt) - 2; 2258 2259 /* converted to the number of chain areas possible */ 2260 mpt->max_seg_cnt *= MPT_NRFM(mpt); 2261 2262 /* limited by the number of chain areas the card will support */ 2263 if (mpt->max_seg_cnt > max_chain_depth) { 2264 mpt_lprt(mpt, MPT_PRT_DEBUG, 2265 "chain depth limited to %u (from %u)\n", 2266 max_chain_depth, mpt->max_seg_cnt); 2267 mpt->max_seg_cnt = max_chain_depth; 2268 } 2269 2270 /* converted to the number of simple sges in chain segments. */ 2271 mpt->max_seg_cnt *= (MPT_NSGL(mpt) - 1); 2272 2273 mpt_lprt(mpt, MPT_PRT_DEBUG, 2274 "Maximum Segment Count: %u\n", mpt->max_seg_cnt); 2275 mpt_lprt(mpt, MPT_PRT_DEBUG, 2276 "MsgLength=%u IOCNumber = %d\n", 2277 facts.MsgLength, facts.IOCNumber); 2278 mpt_lprt(mpt, MPT_PRT_DEBUG, 2279 "IOCFACTS: GlobalCredits=%d BlockSize=%u bytes " 2280 "Request Frame Size %u bytes Max Chain Depth %u\n", 2281 mpt->mpt_global_credits, facts.BlockSize, 2282 mpt->request_frame_size << 2, max_chain_depth); 2283 mpt_lprt(mpt, MPT_PRT_DEBUG, 2284 "IOCFACTS: Num Ports %d, FWImageSize %d, " 2285 "Flags=%#x\n", facts.NumberOfPorts, 2286 le32toh(facts.FWImageSize), facts.Flags); 2287 2288 2289 if ((facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) != 0) { 2290 struct mpt_map_info mi; 2291 int error; 2292 2293 /* 2294 * In some configurations, the IOC's firmware is 2295 * stored in a shared piece of system NVRAM that 2296 * is only accessable via the BIOS. In this 2297 * case, the firmware keeps a copy of firmware in 2298 * RAM until the OS driver retrieves it. Once 2299 * retrieved, we are responsible for re-downloading 2300 * the firmware after any hard-reset. 2301 */ 2302 mpt->fw_image_size = le32toh(facts.FWImageSize); 2303 error = mpt_dma_tag_create(mpt, mpt->parent_dmat, 2304 /*alignment*/1, /*boundary*/0, 2305 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 2306 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, 2307 /*filterarg*/NULL, mpt->fw_image_size, 2308 /*nsegments*/1, /*maxsegsz*/mpt->fw_image_size, 2309 /*flags*/0, &mpt->fw_dmat); 2310 if (error != 0) { 2311 mpt_prt(mpt, "cannot create fw dma tag\n"); 2312 return (ENOMEM); 2313 } 2314 error = bus_dmamem_alloc(mpt->fw_dmat, 2315 (void **)&mpt->fw_image, BUS_DMA_NOWAIT, 2316 &mpt->fw_dmap); 2317 if (error != 0) { 2318 mpt_prt(mpt, "cannot allocate fw mem.\n"); 2319 bus_dma_tag_destroy(mpt->fw_dmat); 2320 return (ENOMEM); 2321 } 2322 mi.mpt = mpt; 2323 mi.error = 0; 2324 bus_dmamap_load(mpt->fw_dmat, mpt->fw_dmap, 2325 mpt->fw_image, mpt->fw_image_size, mpt_map_rquest, 2326 &mi, 0); 2327 mpt->fw_phys = mi.phys; 2328 2329 error = mpt_upload_fw(mpt); 2330 if (error != 0) { 2331 mpt_prt(mpt, "fw upload failed.\n"); 2332 bus_dmamap_unload(mpt->fw_dmat, mpt->fw_dmap); 2333 bus_dmamem_free(mpt->fw_dmat, mpt->fw_image, 2334 mpt->fw_dmap); 2335 bus_dma_tag_destroy(mpt->fw_dmat); 2336 mpt->fw_image = NULL; 2337 return (EIO); 2338 } 2339 } 2340 2341 if (mpt_get_portfacts(mpt, &pfp) != MPT_OK) { 2342 mpt_prt(mpt, "mpt_get_portfacts failed\n"); 2343 needreset = 1; 2344 continue; 2345 } 2346 2347 mpt_lprt(mpt, MPT_PRT_DEBUG, 2348 "PORTFACTS: Type %x PFlags %x IID %d MaxDev %d\n", 2349 pfp.PortType, pfp.ProtocolFlags, pfp.PortSCSIID, 2350 pfp.MaxDevices); 2351 2352 mpt->mpt_port_type = pfp.PortType; 2353 mpt->mpt_proto_flags = pfp.ProtocolFlags; 2354 if (pfp.PortType != MPI_PORTFACTS_PORTTYPE_SCSI && 2355 pfp.PortType != MPI_PORTFACTS_PORTTYPE_SAS && 2356 pfp.PortType != MPI_PORTFACTS_PORTTYPE_FC) { 2357 mpt_prt(mpt, "Unsupported Port Type (%x)\n", 2358 pfp.PortType); 2359 return (ENXIO); 2360 } 2361 mpt->mpt_max_tgtcmds = le16toh(pfp.MaxPostedCmdBuffers); 2362 2363 if (pfp.PortType == MPI_PORTFACTS_PORTTYPE_FC) { 2364 mpt->is_fc = 1; 2365 mpt->is_sas = 0; 2366 } else if (pfp.PortType == MPI_PORTFACTS_PORTTYPE_SAS) { 2367 mpt->is_fc = 0; 2368 mpt->is_sas = 1; 2369 } else { 2370 mpt->is_fc = 0; 2371 mpt->is_sas = 0; 2372 } 2373 mpt->mpt_ini_id = pfp.PortSCSIID; 2374 mpt->mpt_max_devices = pfp.MaxDevices; 2375 2376 /* 2377 * Match our expected role with what this port supports. 2378 * 2379 * We only do this to meet expectations. That is, if the 2380 * user has specified they want initiator role, and we 2381 * don't support it, that's an error we return back upstream. 2382 */ 2383 2384 mpt->cap = MPT_ROLE_NONE; 2385 if (pfp.ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) { 2386 mpt->cap |= MPT_ROLE_INITIATOR; 2387 } 2388 if (pfp.ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) { 2389 mpt->cap |= MPT_ROLE_TARGET; 2390 } 2391 if (mpt->cap == MPT_ROLE_NONE) { 2392 mpt_prt(mpt, "port does not support either target or " 2393 "initiator role\n"); 2394 return (ENXIO); 2395 } 2396 2397 if ((mpt->role & MPT_ROLE_INITIATOR) && 2398 (mpt->cap & MPT_ROLE_INITIATOR) == 0) { 2399 mpt_prt(mpt, "port does not support initiator role\n"); 2400 return (ENXIO); 2401 } 2402 2403 if ((mpt->role & MPT_ROLE_TARGET) && 2404 (mpt->cap & MPT_ROLE_TARGET) == 0) { 2405 mpt_prt(mpt, "port does not support target role\n"); 2406 return (ENXIO); 2407 } 2408 2409 if (mpt_enable_ioc(mpt, 0) != MPT_OK) { 2410 mpt_prt(mpt, "unable to initialize IOC\n"); 2411 return (ENXIO); 2412 } 2413 2414 /* 2415 * Read IOC configuration information. 2416 */ 2417 mpt_read_config_info_ioc(mpt); 2418 2419 /* Everything worked */ 2420 break; 2421 } 2422 2423 if (try >= MPT_MAX_TRYS) { 2424 mpt_prt(mpt, "failed to initialize IOC"); 2425 return (EIO); 2426 } 2427 2428 return (0); 2429} 2430 2431static int 2432mpt_enable_ioc(struct mpt_softc *mpt, int portenable) 2433{ 2434 uint32_t pptr; 2435 int val; 2436 2437 if (mpt_send_ioc_init(mpt, MPI_WHOINIT_HOST_DRIVER) != MPT_OK) { 2438 mpt_prt(mpt, "mpt_send_ioc_init failed\n"); 2439 return (EIO); 2440 } 2441 2442 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_send_ioc_init ok\n"); 2443 2444 if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) { 2445 mpt_prt(mpt, "IOC failed to go to run state\n"); 2446 return (ENXIO); 2447 } 2448 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC now at RUNSTATE\n"); 2449 2450 /* 2451 * Give it reply buffers 2452 * 2453 * Do *not* exceed global credits. 2454 */ 2455 for (val = 0, pptr = mpt->reply_phys; 2456 (pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE); 2457 pptr += MPT_REPLY_SIZE) { 2458 mpt_free_reply(mpt, pptr); 2459 if (++val == mpt->mpt_global_credits - 1) 2460 break; 2461 } 2462 2463 2464 /* 2465 * Enable the port if asked 2466 */ 2467 if (portenable) { 2468 /* 2469 * Enable asynchronous event reporting 2470 */ 2471 mpt_send_event_request(mpt, 1); 2472 2473 if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2474 mpt_prt(mpt, "failed to enable port 0\n"); 2475 return (ENXIO); 2476 } 2477 } 2478 return (MPT_OK); 2479} 2480