mpt.c revision 103871
1/* $FreeBSD: head/sys/dev/mpt/mpt.c 103871 2002-09-23 19:41:10Z mjacob $ */ 2/* 3 * Generic routines for LSI '909 FC adapters. 4 * FreeBSD Version. 5 * 6 * Copyright (c) 2000, 2001 by Greg Ansley 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29/* 30 * Additional Copyright (c) 2002 by Matthew Jacob under same license. 31 */ 32 33#include <dev/mpt/mpt_freebsd.h> 34 35#define MPT_MAX_TRYS 3 36#define MPT_MAX_WAIT 300000 37 38static int maxwait_ack = 0; 39static int maxwait_int = 0; 40static int maxwait_state = 0; 41 42static __inline u_int32_t mpt_rd_db(mpt_softc_t *mpt); 43static __inline u_int32_t mpt_rd_intr(mpt_softc_t *mpt); 44 45static __inline u_int32_t 46mpt_rd_db(mpt_softc_t *mpt) 47{ 48 return mpt_read(mpt, MPT_OFFSET_DOORBELL); 49} 50 51static __inline u_int32_t 52mpt_rd_intr(mpt_softc_t *mpt) 53{ 54 return mpt_read(mpt, MPT_OFFSET_INTR_STATUS); 55} 56 57/* Busy wait for a door bell to be read by IOC */ 58static int 59mpt_wait_db_ack(mpt_softc_t *mpt) 60{ 61 int i; 62 for (i=0; i < MPT_MAX_WAIT; i++) { 63 if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) { 64 maxwait_ack = i > maxwait_ack ? i : maxwait_ack; 65 return MPT_OK; 66 } 67 68 DELAY(100); 69 } 70 return MPT_FAIL; 71} 72 73/* Busy wait for a door bell interrupt */ 74static int 75mpt_wait_db_int(mpt_softc_t *mpt) 76{ 77 int i; 78 for (i=0; i < MPT_MAX_WAIT; i++) { 79 if (MPT_DB_INTR(mpt_rd_intr(mpt))) { 80 maxwait_int = i > maxwait_int ? i : maxwait_int; 81 return MPT_OK; 82 } 83 DELAY(100); 84 } 85 return MPT_FAIL; 86} 87 88/* Wait for IOC to transition to a give state */ 89void 90mpt_check_doorbell(mpt_softc_t *mpt) 91{ 92 u_int32_t db = mpt_rd_db(mpt); 93 if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) { 94 device_printf(mpt->dev, "Device not running!\n"); 95 mpt_print_db(db); 96 } 97} 98 99/* Wait for IOC to transition to a give state */ 100static int 101mpt_wait_state(mpt_softc_t *mpt, enum DB_STATE_BITS state) 102{ 103 int i; 104 105 for (i = 0; i < MPT_MAX_WAIT; i++) { 106 u_int32_t db = mpt_rd_db(mpt); 107 if (MPT_STATE(db) == state) { 108 maxwait_state = i > maxwait_state ? i : maxwait_state; 109 return (MPT_OK); 110 } 111 DELAY(100); 112 } 113 return (MPT_FAIL); 114} 115 116 117/* Issue the reset COMMAND to the IOC */ 118int 119mpt_soft_reset(mpt_softc_t *mpt) 120{ 121 if (mpt->verbose) { 122 device_printf(mpt->dev,"soft reset\n"); 123 } 124 125 /* Have to use hard reset if we are not in Running state */ 126 if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) { 127 device_printf(mpt->dev, 128 "soft reset failed: device not running\n"); 129 return MPT_FAIL; 130 } 131 132 /* If door bell is in use we don't have a chance of getting 133 * a word in since the IOC probably crashed in message 134 * processing. So don't waste our time. 135 */ 136 if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) { 137 device_printf(mpt->dev, "soft reset failed: doorbell wedged\n"); 138 return MPT_FAIL; 139 } 140 141 /* Send the reset request to the IOC */ 142 mpt_write(mpt, MPT_OFFSET_DOORBELL, 143 MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT); 144 if (mpt_wait_db_ack(mpt) != MPT_OK) { 145 device_printf(mpt->dev, "soft reset failed: ack timeout\n"); 146 return MPT_FAIL; 147 } 148 149 /* Wait for the IOC to reload and come out of reset state */ 150 if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) { 151 device_printf(mpt->dev, 152 "soft reset failed: device did not start running\n"); 153 return MPT_FAIL; 154 } 155 156 return MPT_OK; 157} 158 159/* This is a magic diagnostic reset that resets all the ARM 160 * processors in the chip. 161 */ 162void 163mpt_hard_reset(mpt_softc_t *mpt) 164{ 165 /* This extra read comes for the Linux source 166 * released by LSI. It's function is undocumented! 167 */ 168 if (mpt->verbose) { 169 device_printf(mpt->dev, "hard reset\n"); 170 } 171 mpt_read(mpt, MPT_OFFSET_FUBAR); 172 173 /* Enable diagnostic registers */ 174 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPT_DIAG_SEQUENCE_1); 175 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPT_DIAG_SEQUENCE_2); 176 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPT_DIAG_SEQUENCE_3); 177 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPT_DIAG_SEQUENCE_4); 178 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPT_DIAG_SEQUENCE_5); 179 180 /* Diag. port is now active so we can now hit the reset bit */ 181 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, MPT_DIAG_RESET_IOC); 182 183 DELAY(10000); 184 185 /* Disable Diagnostic Register */ 186 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF); 187 188 /* Restore the config register values */ 189 /* Hard resets are known to screw up the BAR for diagnostic 190 memory accesses (Mem1). */ 191 mpt_set_config_regs(mpt); 192 if (mpt->mpt2 != NULL) { 193 mpt_set_config_regs(mpt->mpt2); 194 } 195 196 /* Note that if there is no valid firmware to run, the doorbell will 197 remain in the reset state (0x00000000) */ 198} 199 200/* 201 * Reset the IOC when needed. Try software command first then if needed 202 * poke at the magic diagnostic reset. Note that a hard reset resets 203 * *both* IOCs on dual function chips (FC929 && LSI1030) as well as 204 * fouls up the PCI configuration registers. 205 */ 206int 207mpt_reset(mpt_softc_t *mpt) 208{ 209 int ret; 210 211 /* Try a soft reset */ 212 if ((ret = mpt_soft_reset(mpt)) != MPT_OK) { 213 /* Failed; do a hard reset */ 214 mpt_hard_reset(mpt); 215 216 /* Wait for the IOC to reload and come out of reset state */ 217 ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 218 if (ret != MPT_OK) { 219 device_printf(mpt->dev, "failed to reset device\n"); 220 } 221 } 222 223 return ret; 224} 225 226/* Return a command buffer to the free queue */ 227void 228mpt_free_request(mpt_softc_t *mpt, request_t *req) 229{ 230 if (req == NULL || req != &mpt->request_pool[req->index]) { 231 panic("mpt_free_request bad req ptr\n"); 232 return; 233 } 234 req->sequence = 0; 235 req->ccb = NULL; 236 req->debug = REQ_FREE; 237 SLIST_INSERT_HEAD(&mpt->request_free_list, req, link); 238} 239 240/* Get a command buffer from the free queue */ 241request_t * 242mpt_get_request(mpt_softc_t *mpt) 243{ 244 request_t *req; 245 req = SLIST_FIRST(&mpt->request_free_list); 246 if (req != NULL) { 247 if (req != &mpt->request_pool[req->index]) { 248 panic("mpt_get_request: corrupted request free list\n"); 249 } 250 if (req->ccb != NULL) { 251 panic("mpt_get_request: corrupted request free list (ccb)\n"); 252 } 253 SLIST_REMOVE_HEAD(&mpt->request_free_list, link); 254 req->debug = REQ_IN_PROGRESS; 255 } 256 return req; 257} 258 259/* Pass the command to the IOC */ 260void 261mpt_send_cmd(mpt_softc_t *mpt, request_t *req) 262{ 263 req->sequence = mpt->sequence++; 264 if (mpt->verbose > 1) { 265 u_int32_t *pReq; 266 pReq = req->req_vbuf; 267 device_printf(mpt->dev, "Send Request %d (0x%lx):\n", 268 req->index, (long) req->req_pbuf); 269 device_printf(mpt->dev, "%08X %08X %08X %08X\n", 270 pReq[0], pReq[1], pReq[2], pReq[3]); 271 device_printf(mpt->dev, "%08X %08X %08X %08X\n", 272 pReq[4], pReq[5], pReq[6], pReq[7]); 273 device_printf(mpt->dev, "%08X %08X %08X %08X\n", 274 pReq[8], pReq[9], pReq[10], pReq[11]); 275 device_printf(mpt->dev, "%08X %08X %08X %08X\n", 276 pReq[12], pReq[13], pReq[14], pReq[15]); 277 } 278 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 279 BUS_DMASYNC_PREWRITE); 280 req->debug = REQ_ON_CHIP; 281 mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (u_int32_t) req->req_pbuf); 282} 283 284/* 285 * Give the reply buffer back to the IOC after we have 286 * finished processing it. 287 */ 288void 289mpt_free_reply(mpt_softc_t *mpt, u_int32_t ptr) 290{ 291 mpt_write(mpt, MPT_OFFSET_REPLY_Q, ptr); 292} 293 294/* Get a reply from the IOC */ 295u_int32_t 296mpt_pop_reply_queue(mpt_softc_t *mpt) 297{ 298 return mpt_read(mpt, MPT_OFFSET_REPLY_Q); 299} 300 301/* 302 * Send a command to the IOC via the handshake register. 303 * 304 * Only done at initialization time and for certain unusual 305 * commands such as device/bus reset as specified by LSI. 306 */ 307int 308mpt_send_handshake_cmd(mpt_softc_t *mpt, size_t len, void *cmd) 309{ 310 int i; 311 u_int32_t data, *data32; 312 313 /* Check condition of the IOC */ 314 data = mpt_rd_db(mpt); 315 if (((MPT_STATE(data) != MPT_DB_STATE_READY) && 316 (MPT_STATE(data) != MPT_DB_STATE_RUNNING) && 317 (MPT_STATE(data) != MPT_DB_STATE_FAULT)) || 318 ( MPT_DB_IS_IN_USE(data) )) { 319 device_printf(mpt->dev, 320 "handshake aborted due to invalid doorbell state\n"); 321 mpt_print_db(data); 322 return(EBUSY); 323 } 324 325 /* We move things in 32 bit chunks */ 326 len = (len + 3) >> 2; 327 data32 = cmd; 328 329 /* Clear any left over pending doorbell interupts */ 330 if (MPT_DB_INTR(mpt_rd_intr(mpt))) 331 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 332 333 /* 334 * Tell the handshake reg. we are going to send a command 335 * and how long it is going to be. 336 */ 337 data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) | 338 (len << MPI_DOORBELL_ADD_DWORDS_SHIFT); 339 mpt_write(mpt, MPT_OFFSET_DOORBELL, data); 340 341 /* Wait for the chip to notice */ 342 if (mpt_wait_db_int(mpt) != MPT_OK) { 343 device_printf(mpt->dev, "mpt_send_handshake_cmd timeout1!\n"); 344 return ETIMEDOUT; 345 } 346 347 /* Clear the interrupt */ 348 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 349 350 if (mpt_wait_db_ack(mpt) != MPT_OK) { 351 device_printf(mpt->dev, "mpt_send_handshake_cmd timeout2!\n"); 352 return ETIMEDOUT; 353 } 354 355 /* Send the command */ 356 for (i = 0; i < len; i++) { 357 mpt_write(mpt, MPT_OFFSET_DOORBELL, *data32++); 358 if (mpt_wait_db_ack(mpt) != MPT_OK) { 359 device_printf(mpt->dev, 360 "mpt_send_handshake_cmd timeout! index = %d\n", i); 361 return ETIMEDOUT; 362 } 363 } 364 return MPT_OK; 365} 366 367/* Get the response from the handshake register */ 368int 369mpt_recv_handshake_reply(mpt_softc_t *mpt, size_t reply_len, void *reply) 370{ 371 int left, reply_left; 372 u_int16_t *data16; 373 MSG_DEFAULT_REPLY *hdr; 374 375 /* We move things out in 16 bit chunks */ 376 reply_len >>= 1; 377 data16 = (u_int16_t *)reply; 378 379 hdr = (MSG_DEFAULT_REPLY *)reply; 380 381 /* Get first word */ 382 if (mpt_wait_db_int(mpt) != MPT_OK) { 383 device_printf(mpt->dev, "mpt_recv_handshake_cmd timeout1!\n"); 384 return ETIMEDOUT; 385 } 386 *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK; 387 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 388 389 /* Get Second Word */ 390 if (mpt_wait_db_int(mpt) != MPT_OK) { 391 device_printf(mpt->dev, "mpt_recv_handshake_cmd timeout2!\n"); 392 return ETIMEDOUT; 393 } 394 *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK; 395 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 396 397 /* With the second word, we can now look at the length */ 398 if (mpt->verbose > 1 && ((reply_len >> 1) != hdr->MsgLength)) { 399 device_printf(mpt->dev, 400 "reply length does not match message length: " 401 "got 0x%02x, expected 0x%02lx\n", 402 hdr->MsgLength << 2, (long) (reply_len << 1)); 403 } 404 405 /* Get rest of the reply; but don't overflow the provided buffer */ 406 left = (hdr->MsgLength << 1) - 2; 407 reply_left = reply_len - 2; 408 while (left--) { 409 u_int16_t datum; 410 411 if (mpt_wait_db_int(mpt) != MPT_OK) { 412 device_printf(mpt->dev, 413 "mpt_recv_handshake_cmd timeout3!\n"); 414 return ETIMEDOUT; 415 } 416 datum = mpt_read(mpt, MPT_OFFSET_DOORBELL); 417 418 if (reply_left-- > 0) 419 *data16++ = datum & MPT_DB_DATA_MASK; 420 421 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 422 } 423 424 /* One more wait & clear at the end */ 425 if (mpt_wait_db_int(mpt) != MPT_OK) { 426 device_printf(mpt->dev, "mpt_recv_handshake_cmd timeout4!\n"); 427 return ETIMEDOUT; 428 } 429 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 430 431 if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 432 if (mpt->verbose > 1) 433 mpt_print_reply(hdr); 434 return (MPT_FAIL | hdr->IOCStatus); 435 } 436 437 return (0); 438} 439 440static int 441mpt_get_iocfacts(mpt_softc_t *mpt, MSG_IOC_FACTS_REPLY *freplp) 442{ 443 MSG_IOC_FACTS f_req; 444 int error; 445 446 bzero(&f_req, sizeof f_req); 447 f_req.Function = MPI_FUNCTION_IOC_FACTS; 448 f_req.MsgContext = 0x12071942; 449 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 450 if (error) 451 return(error); 452 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 453 return (error); 454} 455 456static int 457mpt_get_portfacts(mpt_softc_t *mpt, MSG_PORT_FACTS_REPLY *freplp) 458{ 459 MSG_PORT_FACTS f_req; 460 int error; 461 462 /* XXX: Only getting PORT FACTS for Port 0 */ 463 bzero(&f_req, sizeof f_req); 464 f_req.Function = MPI_FUNCTION_PORT_FACTS; 465 f_req.MsgContext = 0x12071943; 466 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 467 if (error) 468 return(error); 469 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 470 return (error); 471} 472 473/* 474 * Send the initialization request. This is where we specify how many 475 * SCSI busses and how many devices per bus we wish to emulate. 476 * This is also the command that specifies the max size of the reply 477 * frames from the IOC that we will be allocating. 478 */ 479static int 480mpt_send_ioc_init(mpt_softc_t *mpt, u_int32_t who) 481{ 482 int error = 0; 483 MSG_IOC_INIT init; 484 MSG_IOC_INIT_REPLY reply; 485 486 bzero(&init, sizeof init); 487 init.WhoInit = who; 488 init.Function = MPI_FUNCTION_IOC_INIT; 489 if (mpt->is_fc) { 490 init.MaxDevices = 255; 491 } else { 492 init.MaxDevices = 16; 493 } 494 init.MaxBuses = 1; 495 init.ReplyFrameSize = MPT_REPLY_SIZE; 496 init.MsgContext = 0x12071941; 497 498 if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) { 499 return(error); 500 } 501 502 error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply); 503 return (error); 504} 505 506 507/* 508 * Utiltity routine to read configuration headers and pages 509 */ 510 511static int 512mpt_read_cfg_header(mpt_softc_t *, int, int, int, fCONFIG_PAGE_HEADER *); 513 514static int 515mpt_read_cfg_header(mpt_softc_t *mpt, int PageType, int PageNumber, 516 int PageAddress, fCONFIG_PAGE_HEADER *rslt) 517{ 518 int count; 519 request_t *req; 520 MSG_CONFIG *cfgp; 521 MSG_CONFIG_REPLY *reply; 522 523 req = mpt_get_request(mpt); 524 525 cfgp = req->req_vbuf; 526 bzero(cfgp, sizeof *cfgp); 527 528 cfgp->Action = MPI_CONFIG_ACTION_PAGE_HEADER; 529 cfgp->Function = MPI_FUNCTION_CONFIG; 530 cfgp->Header.PageNumber = (U8) PageNumber; 531 cfgp->Header.PageType = (U8) PageType; 532 cfgp->PageAddress = PageAddress; 533 MPI_pSGE_SET_FLAGS(((SGE_SIMPLE32 *) &cfgp->PageBufferSGE), 534 (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER | 535 MPI_SGE_FLAGS_SIMPLE_ELEMENT | MPI_SGE_FLAGS_END_OF_LIST)); 536 cfgp->MsgContext = req->index | 0x80000000; 537 538 mpt_check_doorbell(mpt); 539 mpt_send_cmd(mpt, req); 540 count = 0; 541 do { 542 DELAY(500); 543 mpt_intr(mpt); 544 if (++count == 1000) { 545 device_printf(mpt->dev, "read_cfg_header timed out\n"); 546 return (-1); 547 } 548 } while (req->debug == REQ_ON_CHIP); 549 550 reply = (MSG_CONFIG_REPLY *) MPT_REPLY_PTOV(mpt, req->sequence); 551 if ((reply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 552 device_printf(mpt->dev, 553 "mpt_read_cfg_header: Config Info Status %x\n", 554 reply->IOCStatus); 555 return (-1); 556 } 557 bcopy(&reply->Header, rslt, sizeof (fCONFIG_PAGE_HEADER)); 558 mpt_free_reply(mpt, (req->sequence << 1)); 559 mpt_free_request(mpt, req); 560 return (0); 561} 562 563#define CFG_DATA_OFF 128 564 565int 566mpt_read_cfg_page(mpt_softc_t *mpt, int PageAddress, fCONFIG_PAGE_HEADER *hdr) 567{ 568 int count; 569 request_t *req; 570 SGE_SIMPLE32 *se; 571 MSG_CONFIG *cfgp; 572 size_t amt; 573 MSG_CONFIG_REPLY *reply; 574 575 req = mpt_get_request(mpt); 576 577 cfgp = req->req_vbuf; 578 amt = (cfgp->Header.PageLength * sizeof (uint32_t)); 579 bzero(cfgp, MPT_REQUEST_AREA); 580 cfgp->Action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; 581 cfgp->Function = MPI_FUNCTION_CONFIG; 582 cfgp->Header = *hdr; 583 cfgp->Header.PageType &= MPI_CONFIG_PAGETYPE_MASK; 584 cfgp->PageAddress = PageAddress; 585 se = (SGE_SIMPLE32 *) &cfgp->PageBufferSGE; 586 se->Address = req->req_pbuf + CFG_DATA_OFF; 587 MPI_pSGE_SET_LENGTH(se, amt); 588 MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT | 589 MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER | 590 MPI_SGE_FLAGS_END_OF_LIST)); 591 592 cfgp->MsgContext = req->index | 0x80000000; 593 594 mpt_check_doorbell(mpt); 595 mpt_send_cmd(mpt, req); 596 count = 0; 597 do { 598 DELAY(500); 599 mpt_intr(mpt); 600 if (++count == 1000) { 601 device_printf(mpt->dev, "read_cfg_page timed out\n"); 602 return (-1); 603 } 604 } while (req->debug == REQ_ON_CHIP); 605 606 reply = (MSG_CONFIG_REPLY *) MPT_REPLY_PTOV(mpt, req->sequence); 607 if ((reply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 608 device_printf(mpt->dev, 609 "mpt_read_cfg_page: Config Info Status %x\n", 610 reply->IOCStatus); 611 return (-1); 612 } 613 mpt_free_reply(mpt, (req->sequence << 1)); 614 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 615 BUS_DMASYNC_POSTREAD); 616 if (cfgp->Header.PageType == MPI_CONFIG_PAGETYPE_SCSI_PORT && 617 cfgp->Header.PageNumber == 0) { 618 amt = sizeof (fCONFIG_PAGE_SCSI_PORT_0); 619 } else if (cfgp->Header.PageType == MPI_CONFIG_PAGETYPE_SCSI_PORT && 620 cfgp->Header.PageNumber == 1) { 621 amt = sizeof (fCONFIG_PAGE_SCSI_PORT_1); 622 } else if (cfgp->Header.PageType == MPI_CONFIG_PAGETYPE_SCSI_PORT && 623 cfgp->Header.PageNumber == 2) { 624 amt = sizeof (fCONFIG_PAGE_SCSI_PORT_2); 625 } else if (cfgp->Header.PageType == MPI_CONFIG_PAGETYPE_SCSI_DEVICE && 626 cfgp->Header.PageNumber == 0) { 627 amt = sizeof (fCONFIG_PAGE_SCSI_DEVICE_0); 628 } else if (cfgp->Header.PageType == MPI_CONFIG_PAGETYPE_SCSI_DEVICE && 629 cfgp->Header.PageNumber == 1) { 630 amt = sizeof (fCONFIG_PAGE_SCSI_DEVICE_1); 631 } 632 bcopy(((caddr_t)req->req_vbuf)+CFG_DATA_OFF, hdr, amt); 633 mpt_free_request(mpt, req); 634 return (0); 635} 636 637int 638mpt_write_cfg_page(mpt_softc_t *mpt, int PageAddress, fCONFIG_PAGE_HEADER *hdr) 639{ 640 int count, hdr_attr; 641 request_t *req; 642 SGE_SIMPLE32 *se; 643 MSG_CONFIG *cfgp; 644 size_t amt; 645 MSG_CONFIG_REPLY *reply; 646 647 req = mpt_get_request(mpt); 648 649 cfgp = req->req_vbuf; 650 bzero(cfgp, sizeof *cfgp); 651 652 hdr_attr = hdr->PageType & MPI_CONFIG_PAGEATTR_MASK; 653 if (hdr_attr != MPI_CONFIG_PAGEATTR_CHANGEABLE && 654 hdr_attr != MPI_CONFIG_PAGEATTR_PERSISTENT) { 655 device_printf(mpt->dev, "page type 0x%x not changeable\n", 656 hdr->PageType & MPI_CONFIG_PAGETYPE_MASK); 657 return (-1); 658 } 659 hdr->PageType &= MPI_CONFIG_PAGETYPE_MASK; 660 661 amt = (cfgp->Header.PageLength * sizeof (uint32_t)); 662 cfgp->Action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT; 663 cfgp->Function = MPI_FUNCTION_CONFIG; 664 cfgp->Header = *hdr; 665 cfgp->PageAddress = PageAddress; 666 667 se = (SGE_SIMPLE32 *) &cfgp->PageBufferSGE; 668 se->Address = req->req_pbuf + CFG_DATA_OFF; 669 MPI_pSGE_SET_LENGTH(se, amt); 670 MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT | 671 MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER | 672 MPI_SGE_FLAGS_END_OF_LIST | MPI_SGE_FLAGS_HOST_TO_IOC)); 673 674 cfgp->MsgContext = req->index | 0x80000000; 675 676 if (cfgp->Header.PageType == MPI_CONFIG_PAGETYPE_SCSI_PORT && 677 cfgp->Header.PageNumber == 0) { 678 amt = sizeof (fCONFIG_PAGE_SCSI_PORT_0); 679 } else if (cfgp->Header.PageType == MPI_CONFIG_PAGETYPE_SCSI_PORT && 680 cfgp->Header.PageNumber == 1) { 681 amt = sizeof (fCONFIG_PAGE_SCSI_PORT_1); 682 } else if (cfgp->Header.PageType == MPI_CONFIG_PAGETYPE_SCSI_PORT && 683 cfgp->Header.PageNumber == 2) { 684 amt = sizeof (fCONFIG_PAGE_SCSI_PORT_2); 685 } else if (cfgp->Header.PageType == MPI_CONFIG_PAGETYPE_SCSI_DEVICE && 686 cfgp->Header.PageNumber == 0) { 687 amt = sizeof (fCONFIG_PAGE_SCSI_DEVICE_0); 688 } else if (cfgp->Header.PageType == MPI_CONFIG_PAGETYPE_SCSI_DEVICE && 689 cfgp->Header.PageNumber == 1) { 690 amt = sizeof (fCONFIG_PAGE_SCSI_DEVICE_1); 691 } 692 bcopy(hdr, ((caddr_t)req->req_vbuf)+CFG_DATA_OFF, amt); 693 694 mpt_check_doorbell(mpt); 695 mpt_send_cmd(mpt, req); 696 count = 0; 697 do { 698 DELAY(500); 699 mpt_intr(mpt); 700 if (++count == 1000) { 701 hdr->PageType |= hdr_attr; 702 device_printf(mpt->dev, 703 "mpt_write_cfg_page timed out\n"); 704 return (-1); 705 } 706 } while (req->debug == REQ_ON_CHIP); 707 708 reply = (MSG_CONFIG_REPLY *) MPT_REPLY_PTOV(mpt, req->sequence); 709 if ((reply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 710 device_printf(mpt->dev, 711 "mpt_write_cfg_page: Config Info Status %x\n", 712 reply->IOCStatus); 713 return (-1); 714 } 715 mpt_free_reply(mpt, (req->sequence << 1)); 716 717 /* 718 * Restore stripped out attributes 719 */ 720 hdr->PageType |= hdr_attr; 721 mpt_free_request(mpt, req); 722 return (0); 723} 724 725/* 726 * Read SCSI configuration information 727 */ 728static int 729mpt_read_config_info_spi(mpt_softc_t *mpt) 730{ 731 int rv, i; 732 733 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 0, 734 0, &mpt->mpt_port_page0.Header); 735 if (rv) { 736 return (-1); 737 } 738 if (mpt->verbose > 1) { 739 device_printf(mpt->dev, "SPI Port Page 0 Header: %x %x %x %x\n", 740 mpt->mpt_port_page0.Header.PageVersion, 741 mpt->mpt_port_page0.Header.PageLength, 742 mpt->mpt_port_page0.Header.PageNumber, 743 mpt->mpt_port_page0.Header.PageType); 744 } 745 746 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 1, 747 0, &mpt->mpt_port_page1.Header); 748 if (rv) { 749 return (-1); 750 } 751 if (mpt->verbose > 1) { 752 device_printf(mpt->dev, "SPI Port Page 1 Header: %x %x %x %x\n", 753 mpt->mpt_port_page1.Header.PageVersion, 754 mpt->mpt_port_page1.Header.PageLength, 755 mpt->mpt_port_page1.Header.PageNumber, 756 mpt->mpt_port_page1.Header.PageType); 757 } 758 759 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 2, 760 0, &mpt->mpt_port_page2.Header); 761 if (rv) { 762 return (-1); 763 } 764 765 if (mpt->verbose > 1) { 766 device_printf(mpt->dev, "SPI Port Page 2 Header: %x %x %x %x\n", 767 mpt->mpt_port_page1.Header.PageVersion, 768 mpt->mpt_port_page1.Header.PageLength, 769 mpt->mpt_port_page1.Header.PageNumber, 770 mpt->mpt_port_page1.Header.PageType); 771 } 772 773 for (i = 0; i < 16; i++) { 774 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_DEVICE, 775 0, i, &mpt->mpt_dev_page0[i].Header); 776 if (rv) { 777 return (-1); 778 } 779 if (mpt->verbose > 1) { 780 device_printf(mpt->dev, 781 "SPI Target %d Device Page 0 Header: %x %x %x %x\n", 782 i, mpt->mpt_dev_page0[i].Header.PageVersion, 783 mpt->mpt_dev_page0[i].Header.PageLength, 784 mpt->mpt_dev_page0[i].Header.PageNumber, 785 mpt->mpt_dev_page0[i].Header.PageType); 786 } 787 788 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_DEVICE, 789 1, i, &mpt->mpt_dev_page1[i].Header); 790 if (rv) { 791 return (-1); 792 } 793 if (mpt->verbose > 1) { 794 device_printf(mpt->dev, 795 "SPI Target %d Device Page 1 Header: %x %x %x %x\n", 796 i, mpt->mpt_dev_page1[i].Header.PageVersion, 797 mpt->mpt_dev_page1[i].Header.PageLength, 798 mpt->mpt_dev_page1[i].Header.PageNumber, 799 mpt->mpt_dev_page1[i].Header.PageType); 800 } 801 } 802 803 /* 804 * At this point, we don't *have* to fail. As long as we have 805 * valid config header information, we can (barely) lurch 806 * along. 807 */ 808 809 rv = mpt_read_cfg_page(mpt, 0, &mpt->mpt_port_page0.Header); 810 if (rv) { 811 device_printf(mpt->dev, "failed to read SPI Port Page 0\n"); 812 } else if (mpt->verbose > 1) { 813 device_printf(mpt->dev, 814 "SPI Port Page 0: Capabilities %x PhysicalInterface %x\n", 815 mpt->mpt_port_page0.Capabilities, 816 mpt->mpt_port_page0.PhysicalInterface); 817 } 818 819 rv = mpt_read_cfg_page(mpt, 0, &mpt->mpt_port_page1.Header); 820 if (rv) { 821 device_printf(mpt->dev, "failed to read SPI Port Page 1\n"); 822 } else if (mpt->verbose > 1) { 823 device_printf(mpt->dev, 824 "SPI Port Page 1: Configuration %x OnBusTimerValue %x\n", 825 mpt->mpt_port_page1.Configuration, 826 mpt->mpt_port_page1.OnBusTimerValue); 827 } 828 829 rv = mpt_read_cfg_page(mpt, 0, &mpt->mpt_port_page2.Header); 830 if (rv) { 831 device_printf(mpt->dev, "failed to read SPI Port Page 2\n"); 832 } else if (mpt->verbose > 1) { 833 device_printf(mpt->dev, 834 "SPI Port Page 2: Flags %x Settings %x\n", 835 mpt->mpt_port_page2.PortFlags, 836 mpt->mpt_port_page2.PortSettings); 837 for (i = 0; i < 16; i++) { 838 device_printf(mpt->dev, 839 "SPI Port Page 2 Tgt %d: timo %x SF %x Flags %x\n", 840 i, mpt->mpt_port_page2.DeviceSettings[i].Timeout, 841 mpt->mpt_port_page2.DeviceSettings[i].SyncFactor, 842 mpt->mpt_port_page2.DeviceSettings[i].DeviceFlags); 843 } 844 } 845 846 for (i = 0; i < 16; i++) { 847 rv = mpt_read_cfg_page(mpt, i, &mpt->mpt_dev_page0[i].Header); 848 if (rv) { 849 device_printf(mpt->dev, 850 "cannot read SPI Tgt %d Device Page 0\n", i); 851 continue; 852 } 853 if (mpt->verbose > 1) { 854 device_printf(mpt->dev, 855 "SPI Tgt %d Page 0: NParms %x Information %x\n", 856 i, mpt->mpt_dev_page0[i].NegotiatedParameters, 857 mpt->mpt_dev_page0[i].Information); 858 } 859 rv = mpt_read_cfg_page(mpt, i, &mpt->mpt_dev_page1[i].Header); 860 if (rv) { 861 device_printf(mpt->dev, 862 "cannot read SPI Tgt %d Device Page 1\n", i); 863 continue; 864 } 865 if (mpt->verbose > 1) { 866 device_printf(mpt->dev, 867 "SPI Tgt %d Page 1: RParms %x Configuration %x\n", 868 i, mpt->mpt_dev_page1[i].RequestedParameters, 869 mpt->mpt_dev_page1[i].Configuration); 870 } 871 } 872 return (0); 873} 874 875/* 876 * Validate SPI configuration information. 877 * 878 * In particular, validate SPI Port Page 1. 879 */ 880static int 881mpt_set_initial_config_spi(mpt_softc_t *mpt) 882{ 883 int i, pp1val = ((1 << mpt->mpt_ini_id) << 16) | mpt->mpt_ini_id; 884 885 mpt->mpt_disc_enable = 0xff; 886 mpt->mpt_tag_enable = 0; 887 888 if (mpt->mpt_port_page1.Configuration != pp1val) { 889 fCONFIG_PAGE_SCSI_PORT_1 tmp; 890 device_printf(mpt->dev, 891 "SPI Port Page 1 Config value bad (%x)- should be %x\n", 892 mpt->mpt_port_page1.Configuration, pp1val); 893 tmp = mpt->mpt_port_page1; 894 tmp.Configuration = pp1val; 895 if (mpt_write_cfg_page(mpt, 0, &tmp.Header)) { 896 return (-1); 897 } 898 if (mpt_read_cfg_page(mpt, 0, &tmp.Header)) { 899 return (-1); 900 } 901 if (tmp.Configuration != pp1val) { 902 device_printf(mpt->dev, 903 "failed to reset SPI Port Page 1 Config value\n"); 904 return (-1); 905 } 906 mpt->mpt_port_page1 = tmp; 907 } 908 909 for (i = 0; i < 16; i++) { 910 fCONFIG_PAGE_SCSI_DEVICE_1 tmp; 911 tmp = mpt->mpt_dev_page1[i]; 912 tmp.RequestedParameters = 0; 913 tmp.Configuration = 0; 914 if (mpt->verbose > 1) { 915 device_printf(mpt->dev, 916 "Set Tgt %d SPI DevicePage 1 values to %x 0 %x\n", 917 i, tmp.RequestedParameters, tmp.Configuration); 918 } 919 if (mpt_write_cfg_page(mpt, i, &tmp.Header)) { 920 return (-1); 921 } 922 if (mpt_read_cfg_page(mpt, i, &tmp.Header)) { 923 return (-1); 924 } 925 mpt->mpt_dev_page1[i] = tmp; 926 if (mpt->verbose > 1) { 927 device_printf(mpt->dev, 928 "SPI Tgt %d Page 1: RParm %x Configuration %x\n", i, 929 mpt->mpt_dev_page1[i].RequestedParameters, 930 mpt->mpt_dev_page1[i].Configuration); 931 } 932 } 933 934 /* 935 * If the BIOS hasn't been enabled, the SCSI Port Page2 device 936 * parameter are apparently complete nonsense. I've had partially 937 * sensible Page2 settings on *one* bus, but nothing on another- 938 * it's ridiculous. 939 * 940 * For that matter, the Port Page 0 parameters are *also* nonsense, 941 * so the offset and period and currently connected physical interface 942 * is also nonsense. 943 * 944 * This makes it very difficult to try and figure out what maximum 945 * settings we could have. Therefore, we'll synthesize the maximums 946 * here. 947 */ 948 for (i = 0; i < 16; i++) { 949 mpt->mpt_port_page2.DeviceSettings[i].DeviceFlags = 950 MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE | 951 MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE; 952 } 953 mpt->mpt_port_page0.Capabilities = 954 MPI_SCSIPORTPAGE0_CAP_IU | 955 MPI_SCSIPORTPAGE0_CAP_DT | 956 MPI_SCSIPORTPAGE0_CAP_QAS | 957 MPI_SCSIPORTPAGE0_CAP_WIDE | 958 (31 << 16) | /* offset */ 959 (8 << 8); /* period */ 960 mpt->mpt_port_page0.PhysicalInterface = 961 MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD; 962 return (0); 963} 964 965/* 966 * Enable IOC port 967 */ 968static int 969mpt_send_port_enable(mpt_softc_t *mpt, int port) 970{ 971 int count; 972 request_t *req; 973 MSG_PORT_ENABLE *enable_req; 974 975 req = mpt_get_request(mpt); 976 977 enable_req = req->req_vbuf; 978 bzero(enable_req, sizeof *enable_req); 979 980 enable_req->Function = MPI_FUNCTION_PORT_ENABLE; 981 enable_req->MsgContext = req->index | 0x80000000; 982 enable_req->PortNumber = port; 983 984 mpt_check_doorbell(mpt); 985 if (mpt->verbose > 1) { 986 device_printf(mpt->dev, "enabling port %d\n", port); 987 } 988 mpt_send_cmd(mpt, req); 989 990 count = 0; 991 do { 992 DELAY(500); 993 mpt_intr(mpt); 994 if (++count == 100000) { 995 device_printf(mpt->dev, "port enable timed out\n"); 996 return (-1); 997 } 998 } while (req->debug == REQ_ON_CHIP); 999 mpt_free_request(mpt, req); 1000 return (0); 1001} 1002 1003/* 1004 * Enable/Disable asynchronous event reporting. 1005 * 1006 * NB: this is the first command we send via shared memory 1007 * instead of the handshake register. 1008 */ 1009static int 1010mpt_send_event_request(mpt_softc_t *mpt, int onoff) 1011{ 1012 request_t *req; 1013 MSG_EVENT_NOTIFY *enable_req; 1014 1015 req = mpt_get_request(mpt); 1016 1017 enable_req = req->req_vbuf; 1018 bzero(enable_req, sizeof *enable_req); 1019 1020 enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION; 1021 enable_req->MsgContext = req->index | 0x80000000; 1022 enable_req->Switch = onoff; 1023 1024 mpt_check_doorbell(mpt); 1025 if (mpt->verbose > 1) { 1026 device_printf(mpt->dev, "%sabling async events\n", 1027 onoff? "en" : "dis"); 1028 } 1029 mpt_send_cmd(mpt, req); 1030 1031 return (0); 1032} 1033 1034/* 1035 * Un-mask the interupts on the chip. 1036 */ 1037void 1038mpt_enable_ints(mpt_softc_t *mpt) 1039{ 1040 /* Unmask every thing except door bell int */ 1041 mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK); 1042} 1043 1044/* 1045 * Mask the interupts on the chip. 1046 */ 1047void 1048mpt_disable_ints(mpt_softc_t *mpt) 1049{ 1050 /* Mask all interrupts */ 1051 mpt_write(mpt, MPT_OFFSET_INTR_MASK, 1052 MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK); 1053} 1054 1055/* (Re)Initialize the chip for use */ 1056int 1057mpt_init(mpt_softc_t *mpt, u_int32_t who) 1058{ 1059 int try; 1060 MSG_IOC_FACTS_REPLY facts; 1061 MSG_PORT_FACTS_REPLY pfp; 1062 u_int32_t pptr; 1063 int val; 1064 1065 /* Put all request buffers (back) on the free list */ 1066 SLIST_INIT(&mpt->request_free_list); 1067 for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) { 1068 mpt_free_request(mpt, &mpt->request_pool[val]); 1069 } 1070 1071 if (mpt->verbose > 1) { 1072 device_printf(mpt->dev, "doorbell req = %s\n", 1073 mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL))); 1074 } 1075 1076 /* 1077 * Start by making sure we're not at FAULT or RESET state 1078 */ 1079 switch (mpt_rd_db(mpt) & MPT_DB_STATE_MASK) { 1080 case MPT_DB_STATE_RESET: 1081 case MPT_DB_STATE_FAULT: 1082 if (mpt_reset(mpt) != MPT_OK) { 1083 return (EIO); 1084 } 1085 default: 1086 break; 1087 } 1088 1089 for (try = 0; try < MPT_MAX_TRYS; try++) { 1090 /* 1091 * No need to reset if the IOC is already in the READY state. 1092 * 1093 * Force reset if initialization failed previously. 1094 * Note that a hard_reset of the second channel of a '929 1095 * will stop operation of the first channel. Hopefully, if the 1096 * first channel is ok, the second will not require a hard 1097 * reset. 1098 */ 1099 if ((mpt_rd_db(mpt) & MPT_DB_STATE_MASK) != 1100 MPT_DB_STATE_READY) { 1101 if (mpt_reset(mpt) != MPT_OK) { 1102 DELAY(10000); 1103 continue; 1104 } 1105 } 1106 1107 if (mpt_get_iocfacts(mpt, &facts) != MPT_OK) { 1108 device_printf(mpt->dev, "mpt_get_iocfacts failed\n"); 1109 continue; 1110 } 1111 1112 if (mpt->verbose > 1) { 1113 device_printf(mpt->dev, 1114 "IOCFACTS: GlobalCredits=%d BlockSize=%u " 1115 "Request Frame Size %u\n", facts.GlobalCredits, 1116 facts.BlockSize, facts.RequestFrameSize); 1117 } 1118 mpt->mpt_global_credits = facts.GlobalCredits; 1119 mpt->request_frame_size = facts.RequestFrameSize; 1120 1121 if (mpt_get_portfacts(mpt, &pfp) != MPT_OK) { 1122 device_printf(mpt->dev, "mpt_get_portfacts failed\n"); 1123 continue; 1124 } 1125 1126 if (mpt->verbose > 1) { 1127 device_printf(mpt->dev, 1128 "PORTFACTS: Type %x PFlags %x IID %d MaxDev %d\n", 1129 pfp.PortType, pfp.ProtocolFlags, pfp.PortSCSIID, 1130 pfp.MaxDevices); 1131 } 1132 1133 if (pfp.PortType != MPI_PORTFACTS_PORTTYPE_SCSI && 1134 pfp.PortType != MPI_PORTFACTS_PORTTYPE_FC) { 1135 device_printf(mpt->dev, "Unsupported Port Type (%x)\n", 1136 pfp.PortType); 1137 return (ENXIO); 1138 } 1139 if (!(pfp.ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR)) { 1140 device_printf(mpt->dev, "initiator role unsupported\n"); 1141 return (ENXIO); 1142 } 1143 if (pfp.PortType == MPI_PORTFACTS_PORTTYPE_FC) { 1144 mpt->is_fc = 1; 1145 } else { 1146 mpt->is_fc = 0; 1147 } 1148 mpt->mpt_ini_id = pfp.PortSCSIID; 1149 1150 if (mpt_send_ioc_init(mpt, who) != MPT_OK) { 1151 device_printf(mpt->dev, "mpt_send_ioc_init failed\n"); 1152 continue; 1153 } 1154 1155 if (mpt->verbose > 1) { 1156 device_printf(mpt->dev, "mpt_send_ioc_init ok\n"); 1157 } 1158 1159 if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) { 1160 device_printf(mpt->dev, 1161 "IOC failed to go to run state\n"); 1162 continue; 1163 } 1164 if (mpt->verbose > 1) { 1165 device_printf(mpt->dev, "IOC now at RUNSTATE\n"); 1166 } 1167 1168 /* 1169 * Give it reply buffers 1170 * 1171 * Do *not* except global credits. 1172 */ 1173 for (val = 0, pptr = mpt->reply_phys; 1174 (pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE); 1175 pptr += MPT_REPLY_SIZE) { 1176 mpt_free_reply(mpt, pptr); 1177 if (++val == mpt->mpt_global_credits - 1) 1178 break; 1179 } 1180 1181 /* 1182 * Enable asynchronous event reporting 1183 */ 1184 mpt_send_event_request(mpt, 1); 1185 1186 1187 /* 1188 * Read set up initial configuration information 1189 * (SPI only for now) 1190 */ 1191 1192 if (mpt->is_fc == 0) { 1193 if (mpt_read_config_info_spi(mpt)) { 1194 return (EIO); 1195 } 1196 if (mpt_set_initial_config_spi(mpt)) { 1197 return (EIO); 1198 } 1199 } 1200 1201 /* 1202 * Now enable the port 1203 */ 1204 if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 1205 device_printf(mpt->dev, "failed to enable port 0\n"); 1206 continue; 1207 } 1208 1209 if (mpt->verbose > 1) { 1210 device_printf(mpt->dev, "enabled port 0\n"); 1211 } 1212 1213 /* Everything worked */ 1214 break; 1215 } 1216 1217 if (try >= MPT_MAX_TRYS) { 1218 device_printf(mpt->dev, "failed to initialize IOC\n"); 1219 return (EIO); 1220 } 1221 1222 if (mpt->verbose > 1) { 1223 device_printf(mpt->dev, "enabling interrupts\n"); 1224 } 1225 1226 mpt_enable_ints(mpt); 1227 return (0); 1228} 1229