1230920Sken/*- 2237876Sken * Copyright (c) 2011, 2012 LSI Corp. 3230920Sken * All rights reserved. 4230920Sken * 5230920Sken * Redistribution and use in source and binary forms, with or without 6230920Sken * modification, are permitted provided that the following conditions 7230920Sken * are met: 8230920Sken * 1. Redistributions of source code must retain the above copyright 9230920Sken * notice, this list of conditions and the following disclaimer. 10230920Sken * 2. Redistributions in binary form must reproduce the above copyright 11230920Sken * notice, this list of conditions and the following disclaimer in the 12230920Sken * documentation and/or other materials provided with the distribution. 13230920Sken * 14230920Sken * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15230920Sken * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16230920Sken * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17230920Sken * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18230920Sken * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19230920Sken * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20230920Sken * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21230920Sken * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22230920Sken * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23230920Sken * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24230920Sken * SUCH DAMAGE. 25230920Sken * 26230920Sken * LSI MPT-Fusion Host Adapter FreeBSD 27230920Sken * 28230920Sken * $FreeBSD$ 29230920Sken */ 30230920Sken 31212420Sken/* 32237876Sken * Copyright (c) 2000-2012 LSI Corporation. 33212420Sken * 34212420Sken * 35212420Sken * Name: mpi2_cnfg.h 36212420Sken * Title: MPI Configuration messages and pages 37212420Sken * Creation Date: November 10, 2006 38212420Sken * 39230920Sken * mpi2_cnfg.h Version: 02.00.17 40212420Sken * 41212420Sken * Version History 42212420Sken * --------------- 43212420Sken * 44212420Sken * Date Version Description 45212420Sken * -------- -------- ------------------------------------------------------ 46212420Sken * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 47212420Sken * 06-04-07 02.00.01 Added defines for SAS IO Unit Page 2 PhyFlags. 48212420Sken * Added Manufacturing Page 11. 49212420Sken * Added MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE 50212420Sken * define. 51212420Sken * 06-26-07 02.00.02 Adding generic structure for product-specific 52212420Sken * Manufacturing pages: MPI2_CONFIG_PAGE_MANUFACTURING_PS. 53212420Sken * Rework of BIOS Page 2 configuration page. 54212420Sken * Fixed MPI2_BIOSPAGE2_BOOT_DEVICE to be a union of the 55212420Sken * forms. 56212420Sken * Added configuration pages IOC Page 8 and Driver 57212420Sken * Persistent Mapping Page 0. 58212420Sken * 08-31-07 02.00.03 Modified configuration pages dealing with Integrated 59212420Sken * RAID (Manufacturing Page 4, RAID Volume Pages 0 and 1, 60212420Sken * RAID Physical Disk Pages 0 and 1, RAID Configuration 61212420Sken * Page 0). 62212420Sken * Added new value for AccessStatus field of SAS Device 63212420Sken * Page 0 (_SATA_NEEDS_INITIALIZATION). 64212420Sken * 10-31-07 02.00.04 Added missing SEPDevHandle field to 65212420Sken * MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0. 66212420Sken * 12-18-07 02.00.05 Modified IO Unit Page 0 to use 32-bit version fields for 67212420Sken * NVDATA. 68212420Sken * Modified IOC Page 7 to use masks and added field for 69212420Sken * SASBroadcastPrimitiveMasks. 70212420Sken * Added MPI2_CONFIG_PAGE_BIOS_4. 71212420Sken * Added MPI2_CONFIG_PAGE_LOG_0. 72212420Sken * 02-29-08 02.00.06 Modified various names to make them 32-character unique. 73212420Sken * Added SAS Device IDs. 74212420Sken * Updated Integrated RAID configuration pages including 75212420Sken * Manufacturing Page 4, IOC Page 6, and RAID Configuration 76212420Sken * Page 0. 77212420Sken * 05-21-08 02.00.07 Added define MPI2_MANPAGE4_MIX_SSD_SAS_SATA. 78212420Sken * Added define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION. 79212420Sken * Fixed define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING. 80212420Sken * Added missing MaxNumRoutedSasAddresses field to 81212420Sken * MPI2_CONFIG_PAGE_EXPANDER_0. 82212420Sken * Added SAS Port Page 0. 83212420Sken * Modified structure layout for 84212420Sken * MPI2_CONFIG_PAGE_DRIVER_MAPPING_0. 85212420Sken * 06-27-08 02.00.08 Changed MPI2_CONFIG_PAGE_RD_PDISK_1 to use 86212420Sken * MPI2_RAID_PHYS_DISK1_PATH_MAX to size the array. 87212420Sken * 10-02-08 02.00.09 Changed MPI2_RAID_PGAD_CONFIGNUM_MASK from 0x0000FFFF 88212420Sken * to 0x000000FF. 89212420Sken * Added two new values for the Physical Disk Coercion Size 90212420Sken * bits in the Flags field of Manufacturing Page 4. 91212420Sken * Added product-specific Manufacturing pages 16 to 31. 92212420Sken * Modified Flags bits for controlling write cache on SATA 93212420Sken * drives in IO Unit Page 1. 94212420Sken * Added new bit to AdditionalControlFlags of SAS IO Unit 95212420Sken * Page 1 to control Invalid Topology Correction. 96212420Sken * Added additional defines for RAID Volume Page 0 97212420Sken * VolumeStatusFlags field. 98212420Sken * Modified meaning of RAID Volume Page 0 VolumeSettings 99212420Sken * define for auto-configure of hot-swap drives. 100212420Sken * Added SupportedPhysDisks field to RAID Volume Page 1 and 101212420Sken * added related defines. 102212420Sken * Added PhysDiskAttributes field (and related defines) to 103212420Sken * RAID Physical Disk Page 0. 104212420Sken * Added MPI2_SAS_PHYINFO_PHY_VACANT define. 105212420Sken * Added three new DiscoveryStatus bits for SAS IO Unit 106212420Sken * Page 0 and SAS Expander Page 0. 107212420Sken * Removed multiplexing information from SAS IO Unit pages. 108212420Sken * Added BootDeviceWaitTime field to SAS IO Unit Page 4. 109212420Sken * Removed Zone Address Resolved bit from PhyInfo and from 110212420Sken * Expander Page 0 Flags field. 111212420Sken * Added two new AccessStatus values to SAS Device Page 0 112212420Sken * for indicating routing problems. Added 3 reserved words 113212420Sken * to this page. 114212420Sken * 01-19-09 02.00.10 Fixed defines for GPIOVal field of IO Unit Page 3. 115212420Sken * Inserted missing reserved field into structure for IOC 116212420Sken * Page 6. 117212420Sken * Added more pending task bits to RAID Volume Page 0 118212420Sken * VolumeStatusFlags defines. 119212420Sken * Added MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED define. 120212420Sken * Added a new DiscoveryStatus bit for SAS IO Unit Page 0 121212420Sken * and SAS Expander Page 0 to flag a downstream initiator 122212420Sken * when in simplified routing mode. 123212420Sken * Removed SATA Init Failure defines for DiscoveryStatus 124212420Sken * fields of SAS IO Unit Page 0 and SAS Expander Page 0. 125212420Sken * Added MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED define. 126212420Sken * Added PortGroups, DmaGroup, and ControlGroup fields to 127212420Sken * SAS Device Page 0. 128212420Sken * 05-06-09 02.00.11 Added structures and defines for IO Unit Page 5 and IO 129212420Sken * Unit Page 6. 130212420Sken * Added expander reduced functionality data to SAS 131212420Sken * Expander Page 0. 132212420Sken * Added SAS PHY Page 2 and SAS PHY Page 3. 133212420Sken * 07-30-09 02.00.12 Added IO Unit Page 7. 134212420Sken * Added new device ids. 135212420Sken * Added SAS IO Unit Page 5. 136212420Sken * Added partial and slumber power management capable flags 137212420Sken * to SAS Device Page 0 Flags field. 138212420Sken * Added PhyInfo defines for power condition. 139212420Sken * Added Ethernet configuration pages. 140212420Sken * 10-28-09 02.00.13 Added MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY. 141212420Sken * Added SAS PHY Page 4 structure and defines. 142230920Sken * 02-10-10 02.00.14 Modified the comments for the configuration page 143230920Sken * structures that contain an array of data. The host 144230920Sken * should use the "count" field in the page data (e.g. the 145230920Sken * NumPhys field) to determine the number of valid elements 146230920Sken * in the array. 147230920Sken * Added/modified some MPI2_MFGPAGE_DEVID_SAS defines. 148230920Sken * Added PowerManagementCapabilities to IO Unit Page 7. 149230920Sken * Added PortWidthModGroup field to 150230920Sken * MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS. 151230920Sken * Added MPI2_CONFIG_PAGE_SASIOUNIT_6 and related defines. 152230920Sken * Added MPI2_CONFIG_PAGE_SASIOUNIT_7 and related defines. 153230920Sken * Added MPI2_CONFIG_PAGE_SASIOUNIT_8 and related defines. 154230920Sken * 05-12-10 02.00.15 Added MPI2_RAIDVOL0_STATUS_FLAG_VOL_NOT_CONSISTENT 155230920Sken * define. 156230920Sken * Added MPI2_PHYSDISK0_INCOMPATIBLE_MEDIA_TYPE define. 157230920Sken * Added MPI2_SAS_NEG_LINK_RATE_UNSUPPORTED_PHY define. 158230920Sken * 08-11-10 02.00.16 Removed IO Unit Page 1 device path (multi-pathing) 159230920Sken * defines. 160230920Sken * 11-10-10 02.00.17 Added ReceptacleID field (replacing Reserved1) to 161230920Sken * MPI2_MANPAGE7_CONNECTOR_INFO and reworked defines for 162230920Sken * the Pinout field. 163230920Sken * Added BoardTemperature and BoardTemperatureUnits fields 164230920Sken * to MPI2_CONFIG_PAGE_IO_UNIT_7. 165230920Sken * Added MPI2_CONFIG_EXTPAGETYPE_EXT_MANUFACTURING define 166230920Sken * and MPI2_CONFIG_PAGE_EXT_MAN_PS structure. 167212420Sken * -------------------------------------------------------------------------- 168212420Sken */ 169212420Sken 170212420Sken#ifndef MPI2_CNFG_H 171212420Sken#define MPI2_CNFG_H 172212420Sken 173212420Sken/***************************************************************************** 174212420Sken* Configuration Page Header and defines 175212420Sken*****************************************************************************/ 176212420Sken 177212420Sken/* Config Page Header */ 178212420Skentypedef struct _MPI2_CONFIG_PAGE_HEADER 179212420Sken{ 180212420Sken U8 PageVersion; /* 0x00 */ 181212420Sken U8 PageLength; /* 0x01 */ 182212420Sken U8 PageNumber; /* 0x02 */ 183212420Sken U8 PageType; /* 0x03 */ 184212420Sken} MPI2_CONFIG_PAGE_HEADER, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_HEADER, 185212420Sken Mpi2ConfigPageHeader_t, MPI2_POINTER pMpi2ConfigPageHeader_t; 186212420Sken 187212420Skentypedef union _MPI2_CONFIG_PAGE_HEADER_UNION 188212420Sken{ 189212420Sken MPI2_CONFIG_PAGE_HEADER Struct; 190212420Sken U8 Bytes[4]; 191212420Sken U16 Word16[2]; 192212420Sken U32 Word32; 193212420Sken} MPI2_CONFIG_PAGE_HEADER_UNION, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_HEADER_UNION, 194212420Sken Mpi2ConfigPageHeaderUnion, MPI2_POINTER pMpi2ConfigPageHeaderUnion; 195212420Sken 196212420Sken/* Extended Config Page Header */ 197212420Skentypedef struct _MPI2_CONFIG_EXTENDED_PAGE_HEADER 198212420Sken{ 199212420Sken U8 PageVersion; /* 0x00 */ 200212420Sken U8 Reserved1; /* 0x01 */ 201212420Sken U8 PageNumber; /* 0x02 */ 202212420Sken U8 PageType; /* 0x03 */ 203212420Sken U16 ExtPageLength; /* 0x04 */ 204212420Sken U8 ExtPageType; /* 0x06 */ 205212420Sken U8 Reserved2; /* 0x07 */ 206212420Sken} MPI2_CONFIG_EXTENDED_PAGE_HEADER, 207212420Sken MPI2_POINTER PTR_MPI2_CONFIG_EXTENDED_PAGE_HEADER, 208212420Sken Mpi2ConfigExtendedPageHeader_t, MPI2_POINTER pMpi2ConfigExtendedPageHeader_t; 209212420Sken 210212420Skentypedef union _MPI2_CONFIG_EXT_PAGE_HEADER_UNION 211212420Sken{ 212212420Sken MPI2_CONFIG_PAGE_HEADER Struct; 213212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Ext; 214212420Sken U8 Bytes[8]; 215212420Sken U16 Word16[4]; 216212420Sken U32 Word32[2]; 217212420Sken} MPI2_CONFIG_EXT_PAGE_HEADER_UNION, MPI2_POINTER PTR_MPI2_CONFIG_EXT_PAGE_HEADER_UNION, 218212420Sken Mpi2ConfigPageExtendedHeaderUnion, MPI2_POINTER pMpi2ConfigPageExtendedHeaderUnion; 219212420Sken 220212420Sken 221212420Sken/* PageType field values */ 222212420Sken#define MPI2_CONFIG_PAGEATTR_READ_ONLY (0x00) 223212420Sken#define MPI2_CONFIG_PAGEATTR_CHANGEABLE (0x10) 224212420Sken#define MPI2_CONFIG_PAGEATTR_PERSISTENT (0x20) 225212420Sken#define MPI2_CONFIG_PAGEATTR_MASK (0xF0) 226212420Sken 227212420Sken#define MPI2_CONFIG_PAGETYPE_IO_UNIT (0x00) 228212420Sken#define MPI2_CONFIG_PAGETYPE_IOC (0x01) 229212420Sken#define MPI2_CONFIG_PAGETYPE_BIOS (0x02) 230212420Sken#define MPI2_CONFIG_PAGETYPE_RAID_VOLUME (0x08) 231212420Sken#define MPI2_CONFIG_PAGETYPE_MANUFACTURING (0x09) 232212420Sken#define MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A) 233212420Sken#define MPI2_CONFIG_PAGETYPE_EXTENDED (0x0F) 234212420Sken#define MPI2_CONFIG_PAGETYPE_MASK (0x0F) 235212420Sken 236212420Sken#define MPI2_CONFIG_TYPENUM_MASK (0x0FFF) 237212420Sken 238212420Sken 239212420Sken/* ExtPageType field values */ 240212420Sken#define MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT (0x10) 241212420Sken#define MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11) 242212420Sken#define MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12) 243212420Sken#define MPI2_CONFIG_EXTPAGETYPE_SAS_PHY (0x13) 244212420Sken#define MPI2_CONFIG_EXTPAGETYPE_LOG (0x14) 245212420Sken#define MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15) 246212420Sken#define MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG (0x16) 247212420Sken#define MPI2_CONFIG_EXTPAGETYPE_DRIVER_MAPPING (0x17) 248212420Sken#define MPI2_CONFIG_EXTPAGETYPE_SAS_PORT (0x18) 249212420Sken#define MPI2_CONFIG_EXTPAGETYPE_ETHERNET (0x19) 250230920Sken#define MPI2_CONFIG_EXTPAGETYPE_EXT_MANUFACTURING (0x1A) 251212420Sken 252212420Sken 253212420Sken/***************************************************************************** 254212420Sken* PageAddress defines 255212420Sken*****************************************************************************/ 256212420Sken 257212420Sken/* RAID Volume PageAddress format */ 258212420Sken#define MPI2_RAID_VOLUME_PGAD_FORM_MASK (0xF0000000) 259212420Sken#define MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) 260212420Sken#define MPI2_RAID_VOLUME_PGAD_FORM_HANDLE (0x10000000) 261212420Sken 262212420Sken#define MPI2_RAID_VOLUME_PGAD_HANDLE_MASK (0x0000FFFF) 263212420Sken 264212420Sken 265212420Sken/* RAID Physical Disk PageAddress format */ 266212420Sken#define MPI2_PHYSDISK_PGAD_FORM_MASK (0xF0000000) 267212420Sken#define MPI2_PHYSDISK_PGAD_FORM_GET_NEXT_PHYSDISKNUM (0x00000000) 268212420Sken#define MPI2_PHYSDISK_PGAD_FORM_PHYSDISKNUM (0x10000000) 269212420Sken#define MPI2_PHYSDISK_PGAD_FORM_DEVHANDLE (0x20000000) 270212420Sken 271212420Sken#define MPI2_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF) 272212420Sken#define MPI2_PHYSDISK_PGAD_DEVHANDLE_MASK (0x0000FFFF) 273212420Sken 274212420Sken 275212420Sken/* SAS Expander PageAddress format */ 276212420Sken#define MPI2_SAS_EXPAND_PGAD_FORM_MASK (0xF0000000) 277212420Sken#define MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL (0x00000000) 278212420Sken#define MPI2_SAS_EXPAND_PGAD_FORM_HNDL_PHY_NUM (0x10000000) 279212420Sken#define MPI2_SAS_EXPAND_PGAD_FORM_HNDL (0x20000000) 280212420Sken 281212420Sken#define MPI2_SAS_EXPAND_PGAD_HANDLE_MASK (0x0000FFFF) 282212420Sken#define MPI2_SAS_EXPAND_PGAD_PHYNUM_MASK (0x00FF0000) 283212420Sken#define MPI2_SAS_EXPAND_PGAD_PHYNUM_SHIFT (16) 284212420Sken 285212420Sken 286212420Sken/* SAS Device PageAddress format */ 287212420Sken#define MPI2_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000) 288212420Sken#define MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) 289212420Sken#define MPI2_SAS_DEVICE_PGAD_FORM_HANDLE (0x20000000) 290212420Sken 291212420Sken#define MPI2_SAS_DEVICE_PGAD_HANDLE_MASK (0x0000FFFF) 292212420Sken 293212420Sken 294212420Sken/* SAS PHY PageAddress format */ 295212420Sken#define MPI2_SAS_PHY_PGAD_FORM_MASK (0xF0000000) 296212420Sken#define MPI2_SAS_PHY_PGAD_FORM_PHY_NUMBER (0x00000000) 297212420Sken#define MPI2_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX (0x10000000) 298212420Sken 299212420Sken#define MPI2_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x000000FF) 300212420Sken#define MPI2_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK (0x0000FFFF) 301212420Sken 302212420Sken 303212420Sken/* SAS Port PageAddress format */ 304212420Sken#define MPI2_SASPORT_PGAD_FORM_MASK (0xF0000000) 305212420Sken#define MPI2_SASPORT_PGAD_FORM_GET_NEXT_PORT (0x00000000) 306212420Sken#define MPI2_SASPORT_PGAD_FORM_PORT_NUM (0x10000000) 307212420Sken 308212420Sken#define MPI2_SASPORT_PGAD_PORTNUMBER_MASK (0x00000FFF) 309212420Sken 310212420Sken 311212420Sken/* SAS Enclosure PageAddress format */ 312212420Sken#define MPI2_SAS_ENCLOS_PGAD_FORM_MASK (0xF0000000) 313212420Sken#define MPI2_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) 314212420Sken#define MPI2_SAS_ENCLOS_PGAD_FORM_HANDLE (0x10000000) 315212420Sken 316212420Sken#define MPI2_SAS_ENCLOS_PGAD_HANDLE_MASK (0x0000FFFF) 317212420Sken 318212420Sken 319212420Sken/* RAID Configuration PageAddress format */ 320212420Sken#define MPI2_RAID_PGAD_FORM_MASK (0xF0000000) 321212420Sken#define MPI2_RAID_PGAD_FORM_GET_NEXT_CONFIGNUM (0x00000000) 322212420Sken#define MPI2_RAID_PGAD_FORM_CONFIGNUM (0x10000000) 323212420Sken#define MPI2_RAID_PGAD_FORM_ACTIVE_CONFIG (0x20000000) 324212420Sken 325212420Sken#define MPI2_RAID_PGAD_CONFIGNUM_MASK (0x000000FF) 326212420Sken 327212420Sken 328212420Sken/* Driver Persistent Mapping PageAddress format */ 329212420Sken#define MPI2_DPM_PGAD_FORM_MASK (0xF0000000) 330212420Sken#define MPI2_DPM_PGAD_FORM_ENTRY_RANGE (0x00000000) 331212420Sken 332212420Sken#define MPI2_DPM_PGAD_ENTRY_COUNT_MASK (0x0FFF0000) 333212420Sken#define MPI2_DPM_PGAD_ENTRY_COUNT_SHIFT (16) 334212420Sken#define MPI2_DPM_PGAD_START_ENTRY_MASK (0x0000FFFF) 335212420Sken 336212420Sken 337212420Sken/* Ethernet PageAddress format */ 338212420Sken#define MPI2_ETHERNET_PGAD_FORM_MASK (0xF0000000) 339212420Sken#define MPI2_ETHERNET_PGAD_FORM_IF_NUM (0x00000000) 340212420Sken 341212420Sken#define MPI2_ETHERNET_PGAD_IF_NUMBER_MASK (0x000000FF) 342212420Sken 343212420Sken 344212420Sken 345212420Sken/**************************************************************************** 346212420Sken* Configuration messages 347212420Sken****************************************************************************/ 348212420Sken 349212420Sken/* Configuration Request Message */ 350212420Skentypedef struct _MPI2_CONFIG_REQUEST 351212420Sken{ 352212420Sken U8 Action; /* 0x00 */ 353212420Sken U8 SGLFlags; /* 0x01 */ 354212420Sken U8 ChainOffset; /* 0x02 */ 355212420Sken U8 Function; /* 0x03 */ 356212420Sken U16 ExtPageLength; /* 0x04 */ 357212420Sken U8 ExtPageType; /* 0x06 */ 358212420Sken U8 MsgFlags; /* 0x07 */ 359212420Sken U8 VP_ID; /* 0x08 */ 360212420Sken U8 VF_ID; /* 0x09 */ 361212420Sken U16 Reserved1; /* 0x0A */ 362212420Sken U32 Reserved2; /* 0x0C */ 363212420Sken U32 Reserved3; /* 0x10 */ 364212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x14 */ 365212420Sken U32 PageAddress; /* 0x18 */ 366212420Sken MPI2_SGE_IO_UNION PageBufferSGE; /* 0x1C */ 367212420Sken} MPI2_CONFIG_REQUEST, MPI2_POINTER PTR_MPI2_CONFIG_REQUEST, 368212420Sken Mpi2ConfigRequest_t, MPI2_POINTER pMpi2ConfigRequest_t; 369212420Sken 370212420Sken/* values for the Action field */ 371212420Sken#define MPI2_CONFIG_ACTION_PAGE_HEADER (0x00) 372212420Sken#define MPI2_CONFIG_ACTION_PAGE_READ_CURRENT (0x01) 373212420Sken#define MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02) 374212420Sken#define MPI2_CONFIG_ACTION_PAGE_DEFAULT (0x03) 375212420Sken#define MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04) 376212420Sken#define MPI2_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05) 377212420Sken#define MPI2_CONFIG_ACTION_PAGE_READ_NVRAM (0x06) 378212420Sken#define MPI2_CONFIG_ACTION_PAGE_GET_CHANGEABLE (0x07) 379212420Sken 380230920Sken/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */ 381212420Sken 382212420Sken 383212420Sken/* Config Reply Message */ 384212420Skentypedef struct _MPI2_CONFIG_REPLY 385212420Sken{ 386212420Sken U8 Action; /* 0x00 */ 387212420Sken U8 SGLFlags; /* 0x01 */ 388212420Sken U8 MsgLength; /* 0x02 */ 389212420Sken U8 Function; /* 0x03 */ 390212420Sken U16 ExtPageLength; /* 0x04 */ 391212420Sken U8 ExtPageType; /* 0x06 */ 392212420Sken U8 MsgFlags; /* 0x07 */ 393212420Sken U8 VP_ID; /* 0x08 */ 394212420Sken U8 VF_ID; /* 0x09 */ 395212420Sken U16 Reserved1; /* 0x0A */ 396212420Sken U16 Reserved2; /* 0x0C */ 397212420Sken U16 IOCStatus; /* 0x0E */ 398212420Sken U32 IOCLogInfo; /* 0x10 */ 399212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x14 */ 400212420Sken} MPI2_CONFIG_REPLY, MPI2_POINTER PTR_MPI2_CONFIG_REPLY, 401212420Sken Mpi2ConfigReply_t, MPI2_POINTER pMpi2ConfigReply_t; 402212420Sken 403212420Sken 404212420Sken 405212420Sken/***************************************************************************** 406212420Sken* 407212420Sken* C o n f i g u r a t i o n P a g e s 408212420Sken* 409212420Sken*****************************************************************************/ 410212420Sken 411212420Sken/**************************************************************************** 412212420Sken* Manufacturing Config pages 413212420Sken****************************************************************************/ 414212420Sken 415212420Sken#define MPI2_MFGPAGE_VENDORID_LSI (0x1000) 416212420Sken 417212420Sken/* SAS */ 418212420Sken#define MPI2_MFGPAGE_DEVID_SAS2004 (0x0070) 419212420Sken#define MPI2_MFGPAGE_DEVID_SAS2008 (0x0072) 420212420Sken#define MPI2_MFGPAGE_DEVID_SAS2108_1 (0x0074) 421212420Sken#define MPI2_MFGPAGE_DEVID_SAS2108_2 (0x0076) 422212420Sken#define MPI2_MFGPAGE_DEVID_SAS2108_3 (0x0077) 423212420Sken#define MPI2_MFGPAGE_DEVID_SAS2116_1 (0x0064) 424212420Sken#define MPI2_MFGPAGE_DEVID_SAS2116_2 (0x0065) 425212420Sken 426230920Sken#define MPI2_MFGPAGE_DEVID_SSS6200 (0x007E) 427230920Sken 428212420Sken#define MPI2_MFGPAGE_DEVID_SAS2208_1 (0x0080) 429212420Sken#define MPI2_MFGPAGE_DEVID_SAS2208_2 (0x0081) 430212420Sken#define MPI2_MFGPAGE_DEVID_SAS2208_3 (0x0082) 431212420Sken#define MPI2_MFGPAGE_DEVID_SAS2208_4 (0x0083) 432212420Sken#define MPI2_MFGPAGE_DEVID_SAS2208_5 (0x0084) 433212420Sken#define MPI2_MFGPAGE_DEVID_SAS2208_6 (0x0085) 434230920Sken#define MPI2_MFGPAGE_DEVID_SAS2308_1 (0x0086) 435230920Sken#define MPI2_MFGPAGE_DEVID_SAS2308_2 (0x0087) 436230920Sken#define MPI2_MFGPAGE_DEVID_SAS2308_3 (0x006E) 437212420Sken 438212420Sken 439230920Sken 440230920Sken 441212420Sken/* Manufacturing Page 0 */ 442212420Sken 443212420Skentypedef struct _MPI2_CONFIG_PAGE_MAN_0 444212420Sken{ 445212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 446212420Sken U8 ChipName[16]; /* 0x04 */ 447212420Sken U8 ChipRevision[8]; /* 0x14 */ 448212420Sken U8 BoardName[16]; /* 0x1C */ 449212420Sken U8 BoardAssembly[16]; /* 0x2C */ 450212420Sken U8 BoardTracerNumber[16]; /* 0x3C */ 451212420Sken} MPI2_CONFIG_PAGE_MAN_0, 452212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_0, 453212420Sken Mpi2ManufacturingPage0_t, MPI2_POINTER pMpi2ManufacturingPage0_t; 454212420Sken 455212420Sken#define MPI2_MANUFACTURING0_PAGEVERSION (0x00) 456212420Sken 457212420Sken 458212420Sken/* Manufacturing Page 1 */ 459212420Sken 460212420Skentypedef struct _MPI2_CONFIG_PAGE_MAN_1 461212420Sken{ 462212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 463212420Sken U8 VPD[256]; /* 0x04 */ 464212420Sken} MPI2_CONFIG_PAGE_MAN_1, 465212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_1, 466212420Sken Mpi2ManufacturingPage1_t, MPI2_POINTER pMpi2ManufacturingPage1_t; 467212420Sken 468212420Sken#define MPI2_MANUFACTURING1_PAGEVERSION (0x00) 469212420Sken 470212420Sken 471212420Skentypedef struct _MPI2_CHIP_REVISION_ID 472212420Sken{ 473212420Sken U16 DeviceID; /* 0x00 */ 474212420Sken U8 PCIRevisionID; /* 0x02 */ 475212420Sken U8 Reserved; /* 0x03 */ 476212420Sken} MPI2_CHIP_REVISION_ID, MPI2_POINTER PTR_MPI2_CHIP_REVISION_ID, 477212420Sken Mpi2ChipRevisionId_t, MPI2_POINTER pMpi2ChipRevisionId_t; 478212420Sken 479212420Sken 480212420Sken/* Manufacturing Page 2 */ 481212420Sken 482212420Sken/* 483212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 484212420Sken * one and check Header.PageLength at runtime. 485212420Sken */ 486212420Sken#ifndef MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS 487212420Sken#define MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS (1) 488212420Sken#endif 489212420Sken 490212420Skentypedef struct _MPI2_CONFIG_PAGE_MAN_2 491212420Sken{ 492212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 493212420Sken MPI2_CHIP_REVISION_ID ChipId; /* 0x04 */ 494212420Sken U32 HwSettings[MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 0x08 */ 495212420Sken} MPI2_CONFIG_PAGE_MAN_2, 496212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_2, 497212420Sken Mpi2ManufacturingPage2_t, MPI2_POINTER pMpi2ManufacturingPage2_t; 498212420Sken 499212420Sken#define MPI2_MANUFACTURING2_PAGEVERSION (0x00) 500212420Sken 501212420Sken 502212420Sken/* Manufacturing Page 3 */ 503212420Sken 504212420Sken/* 505212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 506212420Sken * one and check Header.PageLength at runtime. 507212420Sken */ 508212420Sken#ifndef MPI2_MAN_PAGE_3_INFO_WORDS 509212420Sken#define MPI2_MAN_PAGE_3_INFO_WORDS (1) 510212420Sken#endif 511212420Sken 512212420Skentypedef struct _MPI2_CONFIG_PAGE_MAN_3 513212420Sken{ 514212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 515212420Sken MPI2_CHIP_REVISION_ID ChipId; /* 0x04 */ 516212420Sken U32 Info[MPI2_MAN_PAGE_3_INFO_WORDS];/* 0x08 */ 517212420Sken} MPI2_CONFIG_PAGE_MAN_3, 518212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_3, 519212420Sken Mpi2ManufacturingPage3_t, MPI2_POINTER pMpi2ManufacturingPage3_t; 520212420Sken 521212420Sken#define MPI2_MANUFACTURING3_PAGEVERSION (0x00) 522212420Sken 523212420Sken 524212420Sken/* Manufacturing Page 4 */ 525212420Sken 526212420Skentypedef struct _MPI2_MANPAGE4_PWR_SAVE_SETTINGS 527212420Sken{ 528212420Sken U8 PowerSaveFlags; /* 0x00 */ 529212420Sken U8 InternalOperationsSleepTime; /* 0x01 */ 530212420Sken U8 InternalOperationsRunTime; /* 0x02 */ 531212420Sken U8 HostIdleTime; /* 0x03 */ 532212420Sken} MPI2_MANPAGE4_PWR_SAVE_SETTINGS, 533212420Sken MPI2_POINTER PTR_MPI2_MANPAGE4_PWR_SAVE_SETTINGS, 534212420Sken Mpi2ManPage4PwrSaveSettings_t, MPI2_POINTER pMpi2ManPage4PwrSaveSettings_t; 535212420Sken 536212420Sken/* defines for the PowerSaveFlags field */ 537212420Sken#define MPI2_MANPAGE4_MASK_POWERSAVE_MODE (0x03) 538212420Sken#define MPI2_MANPAGE4_POWERSAVE_MODE_DISABLED (0x00) 539212420Sken#define MPI2_MANPAGE4_CUSTOM_POWERSAVE_MODE (0x01) 540212420Sken#define MPI2_MANPAGE4_FULL_POWERSAVE_MODE (0x02) 541212420Sken 542212420Skentypedef struct _MPI2_CONFIG_PAGE_MAN_4 543212420Sken{ 544212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 545212420Sken U32 Reserved1; /* 0x04 */ 546212420Sken U32 Flags; /* 0x08 */ 547212420Sken U8 InquirySize; /* 0x0C */ 548212420Sken U8 Reserved2; /* 0x0D */ 549212420Sken U16 Reserved3; /* 0x0E */ 550212420Sken U8 InquiryData[56]; /* 0x10 */ 551212420Sken U32 RAID0VolumeSettings; /* 0x48 */ 552212420Sken U32 RAID1EVolumeSettings; /* 0x4C */ 553212420Sken U32 RAID1VolumeSettings; /* 0x50 */ 554212420Sken U32 RAID10VolumeSettings; /* 0x54 */ 555212420Sken U32 Reserved4; /* 0x58 */ 556212420Sken U32 Reserved5; /* 0x5C */ 557212420Sken MPI2_MANPAGE4_PWR_SAVE_SETTINGS PowerSaveSettings; /* 0x60 */ 558212420Sken U8 MaxOCEDisks; /* 0x64 */ 559212420Sken U8 ResyncRate; /* 0x65 */ 560212420Sken U16 DataScrubDuration; /* 0x66 */ 561212420Sken U8 MaxHotSpares; /* 0x68 */ 562212420Sken U8 MaxPhysDisksPerVol; /* 0x69 */ 563212420Sken U8 MaxPhysDisks; /* 0x6A */ 564212420Sken U8 MaxVolumes; /* 0x6B */ 565212420Sken} MPI2_CONFIG_PAGE_MAN_4, 566212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_4, 567212420Sken Mpi2ManufacturingPage4_t, MPI2_POINTER pMpi2ManufacturingPage4_t; 568212420Sken 569212420Sken#define MPI2_MANUFACTURING4_PAGEVERSION (0x0A) 570212420Sken 571212420Sken/* Manufacturing Page 4 Flags field */ 572212420Sken#define MPI2_MANPAGE4_METADATA_SIZE_MASK (0x00030000) 573212420Sken#define MPI2_MANPAGE4_METADATA_512MB (0x00000000) 574212420Sken 575212420Sken#define MPI2_MANPAGE4_MIX_SSD_SAS_SATA (0x00008000) 576212420Sken#define MPI2_MANPAGE4_MIX_SSD_AND_NON_SSD (0x00004000) 577212420Sken#define MPI2_MANPAGE4_HIDE_PHYSDISK_NON_IR (0x00002000) 578212420Sken 579212420Sken#define MPI2_MANPAGE4_MASK_PHYSDISK_COERCION (0x00001C00) 580212420Sken#define MPI2_MANPAGE4_PHYSDISK_COERCION_1GB (0x00000000) 581212420Sken#define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION (0x00000400) 582212420Sken#define MPI2_MANPAGE4_PHYSDISK_ADAPTIVE_COERCION (0x00000800) 583212420Sken#define MPI2_MANPAGE4_PHYSDISK_ZERO_COERCION (0x00000C00) 584212420Sken 585212420Sken#define MPI2_MANPAGE4_MASK_BAD_BLOCK_MARKING (0x00000300) 586212420Sken#define MPI2_MANPAGE4_DEFAULT_BAD_BLOCK_MARKING (0x00000000) 587212420Sken#define MPI2_MANPAGE4_TABLE_BAD_BLOCK_MARKING (0x00000100) 588212420Sken#define MPI2_MANPAGE4_WRITE_LONG_BAD_BLOCK_MARKING (0x00000200) 589212420Sken 590212420Sken#define MPI2_MANPAGE4_FORCE_OFFLINE_FAILOVER (0x00000080) 591212420Sken#define MPI2_MANPAGE4_RAID10_DISABLE (0x00000040) 592212420Sken#define MPI2_MANPAGE4_RAID1E_DISABLE (0x00000020) 593212420Sken#define MPI2_MANPAGE4_RAID1_DISABLE (0x00000010) 594212420Sken#define MPI2_MANPAGE4_RAID0_DISABLE (0x00000008) 595212420Sken#define MPI2_MANPAGE4_IR_MODEPAGE8_DISABLE (0x00000004) 596212420Sken#define MPI2_MANPAGE4_IM_RESYNC_CACHE_ENABLE (0x00000002) 597212420Sken#define MPI2_MANPAGE4_IR_NO_MIX_SAS_SATA (0x00000001) 598212420Sken 599212420Sken 600212420Sken/* Manufacturing Page 5 */ 601212420Sken 602212420Sken/* 603212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 604230920Sken * one and check the value returned for NumPhys at runtime. 605212420Sken */ 606212420Sken#ifndef MPI2_MAN_PAGE_5_PHY_ENTRIES 607212420Sken#define MPI2_MAN_PAGE_5_PHY_ENTRIES (1) 608212420Sken#endif 609212420Sken 610212420Skentypedef struct _MPI2_MANUFACTURING5_ENTRY 611212420Sken{ 612212420Sken U64 WWID; /* 0x00 */ 613212420Sken U64 DeviceName; /* 0x08 */ 614212420Sken} MPI2_MANUFACTURING5_ENTRY, MPI2_POINTER PTR_MPI2_MANUFACTURING5_ENTRY, 615212420Sken Mpi2Manufacturing5Entry_t, MPI2_POINTER pMpi2Manufacturing5Entry_t; 616212420Sken 617212420Skentypedef struct _MPI2_CONFIG_PAGE_MAN_5 618212420Sken{ 619212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 620212420Sken U8 NumPhys; /* 0x04 */ 621212420Sken U8 Reserved1; /* 0x05 */ 622212420Sken U16 Reserved2; /* 0x06 */ 623212420Sken U32 Reserved3; /* 0x08 */ 624212420Sken U32 Reserved4; /* 0x0C */ 625212420Sken MPI2_MANUFACTURING5_ENTRY Phy[MPI2_MAN_PAGE_5_PHY_ENTRIES];/* 0x08 */ 626212420Sken} MPI2_CONFIG_PAGE_MAN_5, 627212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_5, 628212420Sken Mpi2ManufacturingPage5_t, MPI2_POINTER pMpi2ManufacturingPage5_t; 629212420Sken 630212420Sken#define MPI2_MANUFACTURING5_PAGEVERSION (0x03) 631212420Sken 632212420Sken 633212420Sken/* Manufacturing Page 6 */ 634212420Sken 635212420Skentypedef struct _MPI2_CONFIG_PAGE_MAN_6 636212420Sken{ 637212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 638212420Sken U32 ProductSpecificInfo;/* 0x04 */ 639212420Sken} MPI2_CONFIG_PAGE_MAN_6, 640212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_6, 641212420Sken Mpi2ManufacturingPage6_t, MPI2_POINTER pMpi2ManufacturingPage6_t; 642212420Sken 643212420Sken#define MPI2_MANUFACTURING6_PAGEVERSION (0x00) 644212420Sken 645212420Sken 646212420Sken/* Manufacturing Page 7 */ 647212420Sken 648212420Skentypedef struct _MPI2_MANPAGE7_CONNECTOR_INFO 649212420Sken{ 650212420Sken U32 Pinout; /* 0x00 */ 651212420Sken U8 Connector[16]; /* 0x04 */ 652212420Sken U8 Location; /* 0x14 */ 653230920Sken U8 ReceptacleID; /* 0x15 */ 654212420Sken U16 Slot; /* 0x16 */ 655212420Sken U32 Reserved2; /* 0x18 */ 656212420Sken} MPI2_MANPAGE7_CONNECTOR_INFO, MPI2_POINTER PTR_MPI2_MANPAGE7_CONNECTOR_INFO, 657212420Sken Mpi2ManPage7ConnectorInfo_t, MPI2_POINTER pMpi2ManPage7ConnectorInfo_t; 658212420Sken 659212420Sken/* defines for the Pinout field */ 660230920Sken#define MPI2_MANPAGE7_PINOUT_LANE_MASK (0x0000FF00) 661230920Sken#define MPI2_MANPAGE7_PINOUT_LANE_SHIFT (8) 662212420Sken 663230920Sken#define MPI2_MANPAGE7_PINOUT_TYPE_MASK (0x000000FF) 664230920Sken#define MPI2_MANPAGE7_PINOUT_TYPE_UNKNOWN (0x00) 665230920Sken#define MPI2_MANPAGE7_PINOUT_SATA_SINGLE (0x01) 666230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8482 (0x02) 667230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8486 (0x03) 668230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8484 (0x04) 669230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8087 (0x05) 670230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8643_4I (0x06) 671230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8643_8I (0x07) 672230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8470 (0x08) 673230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8088 (0x09) 674230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8644_4X (0x0A) 675230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8644_8X (0x0B) 676230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8644_16X (0x0C) 677230920Sken#define MPI2_MANPAGE7_PINOUT_SFF_8436 (0x0D) 678230920Sken 679212420Sken/* defines for the Location field */ 680212420Sken#define MPI2_MANPAGE7_LOCATION_UNKNOWN (0x01) 681212420Sken#define MPI2_MANPAGE7_LOCATION_INTERNAL (0x02) 682212420Sken#define MPI2_MANPAGE7_LOCATION_EXTERNAL (0x04) 683212420Sken#define MPI2_MANPAGE7_LOCATION_SWITCHABLE (0x08) 684212420Sken#define MPI2_MANPAGE7_LOCATION_AUTO (0x10) 685212420Sken#define MPI2_MANPAGE7_LOCATION_NOT_PRESENT (0x20) 686212420Sken#define MPI2_MANPAGE7_LOCATION_NOT_CONNECTED (0x80) 687212420Sken 688212420Sken/* 689212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 690230920Sken * one and check the value returned for NumPhys at runtime. 691212420Sken */ 692212420Sken#ifndef MPI2_MANPAGE7_CONNECTOR_INFO_MAX 693212420Sken#define MPI2_MANPAGE7_CONNECTOR_INFO_MAX (1) 694212420Sken#endif 695212420Sken 696212420Skentypedef struct _MPI2_CONFIG_PAGE_MAN_7 697212420Sken{ 698212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 699212420Sken U32 Reserved1; /* 0x04 */ 700212420Sken U32 Reserved2; /* 0x08 */ 701212420Sken U32 Flags; /* 0x0C */ 702212420Sken U8 EnclosureName[16]; /* 0x10 */ 703212420Sken U8 NumPhys; /* 0x20 */ 704212420Sken U8 Reserved3; /* 0x21 */ 705212420Sken U16 Reserved4; /* 0x22 */ 706212420Sken MPI2_MANPAGE7_CONNECTOR_INFO ConnectorInfo[MPI2_MANPAGE7_CONNECTOR_INFO_MAX]; /* 0x24 */ 707212420Sken} MPI2_CONFIG_PAGE_MAN_7, 708212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_7, 709212420Sken Mpi2ManufacturingPage7_t, MPI2_POINTER pMpi2ManufacturingPage7_t; 710212420Sken 711230920Sken#define MPI2_MANUFACTURING7_PAGEVERSION (0x01) 712212420Sken 713212420Sken/* defines for the Flags field */ 714212420Sken#define MPI2_MANPAGE7_FLAG_USE_SLOT_INFO (0x00000001) 715212420Sken 716212420Sken 717212420Sken/* 718212420Sken * Generic structure to use for product-specific manufacturing pages 719212420Sken * (currently Manufacturing Page 8 through Manufacturing Page 31). 720212420Sken */ 721212420Sken 722212420Skentypedef struct _MPI2_CONFIG_PAGE_MAN_PS 723212420Sken{ 724212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 725212420Sken U32 ProductSpecificInfo;/* 0x04 */ 726212420Sken} MPI2_CONFIG_PAGE_MAN_PS, 727212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_PS, 728212420Sken Mpi2ManufacturingPagePS_t, MPI2_POINTER pMpi2ManufacturingPagePS_t; 729212420Sken 730212420Sken#define MPI2_MANUFACTURING8_PAGEVERSION (0x00) 731212420Sken#define MPI2_MANUFACTURING9_PAGEVERSION (0x00) 732212420Sken#define MPI2_MANUFACTURING10_PAGEVERSION (0x00) 733212420Sken#define MPI2_MANUFACTURING11_PAGEVERSION (0x00) 734212420Sken#define MPI2_MANUFACTURING12_PAGEVERSION (0x00) 735212420Sken#define MPI2_MANUFACTURING13_PAGEVERSION (0x00) 736212420Sken#define MPI2_MANUFACTURING14_PAGEVERSION (0x00) 737212420Sken#define MPI2_MANUFACTURING15_PAGEVERSION (0x00) 738212420Sken#define MPI2_MANUFACTURING16_PAGEVERSION (0x00) 739212420Sken#define MPI2_MANUFACTURING17_PAGEVERSION (0x00) 740212420Sken#define MPI2_MANUFACTURING18_PAGEVERSION (0x00) 741212420Sken#define MPI2_MANUFACTURING19_PAGEVERSION (0x00) 742212420Sken#define MPI2_MANUFACTURING20_PAGEVERSION (0x00) 743212420Sken#define MPI2_MANUFACTURING21_PAGEVERSION (0x00) 744212420Sken#define MPI2_MANUFACTURING22_PAGEVERSION (0x00) 745212420Sken#define MPI2_MANUFACTURING23_PAGEVERSION (0x00) 746212420Sken#define MPI2_MANUFACTURING24_PAGEVERSION (0x00) 747212420Sken#define MPI2_MANUFACTURING25_PAGEVERSION (0x00) 748212420Sken#define MPI2_MANUFACTURING26_PAGEVERSION (0x00) 749212420Sken#define MPI2_MANUFACTURING27_PAGEVERSION (0x00) 750212420Sken#define MPI2_MANUFACTURING28_PAGEVERSION (0x00) 751212420Sken#define MPI2_MANUFACTURING29_PAGEVERSION (0x00) 752212420Sken#define MPI2_MANUFACTURING30_PAGEVERSION (0x00) 753212420Sken#define MPI2_MANUFACTURING31_PAGEVERSION (0x00) 754212420Sken 755212420Sken 756212420Sken/**************************************************************************** 757212420Sken* IO Unit Config Pages 758212420Sken****************************************************************************/ 759212420Sken 760212420Sken/* IO Unit Page 0 */ 761212420Sken 762212420Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_0 763212420Sken{ 764212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 765212420Sken U64 UniqueValue; /* 0x04 */ 766212420Sken MPI2_VERSION_UNION NvdataVersionDefault; /* 0x08 */ 767212420Sken MPI2_VERSION_UNION NvdataVersionPersistent; /* 0x0A */ 768212420Sken} MPI2_CONFIG_PAGE_IO_UNIT_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_0, 769212420Sken Mpi2IOUnitPage0_t, MPI2_POINTER pMpi2IOUnitPage0_t; 770212420Sken 771212420Sken#define MPI2_IOUNITPAGE0_PAGEVERSION (0x02) 772212420Sken 773212420Sken 774212420Sken/* IO Unit Page 1 */ 775212420Sken 776212420Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_1 777212420Sken{ 778212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 779212420Sken U32 Flags; /* 0x04 */ 780212420Sken} MPI2_CONFIG_PAGE_IO_UNIT_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_1, 781212420Sken Mpi2IOUnitPage1_t, MPI2_POINTER pMpi2IOUnitPage1_t; 782212420Sken 783212420Sken#define MPI2_IOUNITPAGE1_PAGEVERSION (0x04) 784212420Sken 785212420Sken/* IO Unit Page 1 Flags defines */ 786212420Sken#define MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY (0x00000800) 787212420Sken#define MPI2_IOUNITPAGE1_MASK_SATA_WRITE_CACHE (0x00000600) 788230920Sken#define MPI2_IOUNITPAGE1_SATA_WRITE_CACHE_SHIFT (9) 789212420Sken#define MPI2_IOUNITPAGE1_ENABLE_SATA_WRITE_CACHE (0x00000000) 790212420Sken#define MPI2_IOUNITPAGE1_DISABLE_SATA_WRITE_CACHE (0x00000200) 791212420Sken#define MPI2_IOUNITPAGE1_UNCHANGED_SATA_WRITE_CACHE (0x00000400) 792212420Sken#define MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100) 793212420Sken#define MPI2_IOUNITPAGE1_DISABLE_IR (0x00000040) 794212420Sken#define MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING (0x00000020) 795212420Sken#define MPI2_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004) 796212420Sken 797212420Sken 798212420Sken/* IO Unit Page 3 */ 799212420Sken 800212420Sken/* 801212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 802230920Sken * one and check the value returned for GPIOCount at runtime. 803212420Sken */ 804212420Sken#ifndef MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX 805212420Sken#define MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1) 806212420Sken#endif 807212420Sken 808212420Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_3 809212420Sken{ 810212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 811212420Sken U8 GPIOCount; /* 0x04 */ 812212420Sken U8 Reserved1; /* 0x05 */ 813212420Sken U16 Reserved2; /* 0x06 */ 814212420Sken U16 GPIOVal[MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX];/* 0x08 */ 815212420Sken} MPI2_CONFIG_PAGE_IO_UNIT_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_3, 816212420Sken Mpi2IOUnitPage3_t, MPI2_POINTER pMpi2IOUnitPage3_t; 817212420Sken 818212420Sken#define MPI2_IOUNITPAGE3_PAGEVERSION (0x01) 819212420Sken 820212420Sken/* defines for IO Unit Page 3 GPIOVal field */ 821212420Sken#define MPI2_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFFFC) 822212420Sken#define MPI2_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2) 823212420Sken#define MPI2_IOUNITPAGE3_GPIO_SETTING_OFF (0x0000) 824212420Sken#define MPI2_IOUNITPAGE3_GPIO_SETTING_ON (0x0001) 825212420Sken 826212420Sken 827212420Sken/* IO Unit Page 5 */ 828212420Sken 829212420Sken/* 830212420Sken * Upper layer code (drivers, utilities, etc.) should leave this define set to 831230920Sken * one and check the value returned for NumDmaEngines at runtime. 832212420Sken */ 833212420Sken#ifndef MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES 834212420Sken#define MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES (1) 835212420Sken#endif 836212420Sken 837212420Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_5 838212420Sken{ 839212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 840212420Sken U64 RaidAcceleratorBufferBaseAddress; /* 0x04 */ 841212420Sken U64 RaidAcceleratorBufferSize; /* 0x0C */ 842212420Sken U64 RaidAcceleratorControlBaseAddress; /* 0x14 */ 843212420Sken U8 RAControlSize; /* 0x1C */ 844212420Sken U8 NumDmaEngines; /* 0x1D */ 845212420Sken U8 RAMinControlSize; /* 0x1E */ 846212420Sken U8 RAMaxControlSize; /* 0x1F */ 847212420Sken U32 Reserved1; /* 0x20 */ 848212420Sken U32 Reserved2; /* 0x24 */ 849212420Sken U32 Reserved3; /* 0x28 */ 850212420Sken U32 DmaEngineCapabilities[MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES]; /* 0x2C */ 851212420Sken} MPI2_CONFIG_PAGE_IO_UNIT_5, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_5, 852212420Sken Mpi2IOUnitPage5_t, MPI2_POINTER pMpi2IOUnitPage5_t; 853212420Sken 854212420Sken#define MPI2_IOUNITPAGE5_PAGEVERSION (0x00) 855212420Sken 856212420Sken/* defines for IO Unit Page 5 DmaEngineCapabilities field */ 857212420Sken#define MPI2_IOUNITPAGE5_DMA_CAP_MASK_MAX_REQUESTS (0xFF00) 858212420Sken#define MPI2_IOUNITPAGE5_DMA_CAP_SHIFT_MAX_REQUESTS (16) 859212420Sken 860212420Sken#define MPI2_IOUNITPAGE5_DMA_CAP_EEDP (0x0008) 861212420Sken#define MPI2_IOUNITPAGE5_DMA_CAP_PARITY_GENERATION (0x0004) 862212420Sken#define MPI2_IOUNITPAGE5_DMA_CAP_HASHING (0x0002) 863212420Sken#define MPI2_IOUNITPAGE5_DMA_CAP_ENCRYPTION (0x0001) 864212420Sken 865212420Sken 866212420Sken/* IO Unit Page 6 */ 867212420Sken 868212420Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_6 869212420Sken{ 870212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 871212420Sken U16 Flags; /* 0x04 */ 872212420Sken U8 RAHostControlSize; /* 0x06 */ 873212420Sken U8 Reserved0; /* 0x07 */ 874212420Sken U64 RaidAcceleratorHostControlBaseAddress; /* 0x08 */ 875212420Sken U32 Reserved1; /* 0x10 */ 876212420Sken U32 Reserved2; /* 0x14 */ 877212420Sken U32 Reserved3; /* 0x18 */ 878212420Sken} MPI2_CONFIG_PAGE_IO_UNIT_6, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_6, 879212420Sken Mpi2IOUnitPage6_t, MPI2_POINTER pMpi2IOUnitPage6_t; 880212420Sken 881212420Sken#define MPI2_IOUNITPAGE6_PAGEVERSION (0x00) 882212420Sken 883212420Sken/* defines for IO Unit Page 6 Flags field */ 884212420Sken#define MPI2_IOUNITPAGE6_FLAGS_ENABLE_RAID_ACCELERATOR (0x0001) 885212420Sken 886212420Sken 887212420Sken/* IO Unit Page 7 */ 888212420Sken 889212420Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_7 890212420Sken{ 891212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 892212420Sken U16 Reserved1; /* 0x04 */ 893212420Sken U8 PCIeWidth; /* 0x06 */ 894212420Sken U8 PCIeSpeed; /* 0x07 */ 895212420Sken U32 ProcessorState; /* 0x08 */ 896230920Sken U32 PowerManagementCapabilities; /* 0x0C */ 897212420Sken U16 IOCTemperature; /* 0x10 */ 898212420Sken U8 IOCTemperatureUnits; /* 0x12 */ 899212420Sken U8 IOCSpeed; /* 0x13 */ 900230920Sken U16 BoardTemperature; /* 0x14 */ 901230920Sken U8 BoardTemperatureUnits; /* 0x16 */ 902230920Sken U8 Reserved3; /* 0x17 */ 903212420Sken} MPI2_CONFIG_PAGE_IO_UNIT_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_7, 904212420Sken Mpi2IOUnitPage7_t, MPI2_POINTER pMpi2IOUnitPage7_t; 905212420Sken 906230920Sken#define MPI2_IOUNITPAGE7_PAGEVERSION (0x02) 907212420Sken 908212420Sken/* defines for IO Unit Page 7 PCIeWidth field */ 909212420Sken#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X1 (0x01) 910212420Sken#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X2 (0x02) 911212420Sken#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X4 (0x04) 912212420Sken#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X8 (0x08) 913212420Sken 914212420Sken/* defines for IO Unit Page 7 PCIeSpeed field */ 915212420Sken#define MPI2_IOUNITPAGE7_PCIE_SPEED_2_5_GBPS (0x00) 916212420Sken#define MPI2_IOUNITPAGE7_PCIE_SPEED_5_0_GBPS (0x01) 917212420Sken#define MPI2_IOUNITPAGE7_PCIE_SPEED_8_0_GBPS (0x02) 918212420Sken 919212420Sken/* defines for IO Unit Page 7 ProcessorState field */ 920212420Sken#define MPI2_IOUNITPAGE7_PSTATE_MASK_SECOND (0x0000000F) 921212420Sken#define MPI2_IOUNITPAGE7_PSTATE_SHIFT_SECOND (0) 922212420Sken 923212420Sken#define MPI2_IOUNITPAGE7_PSTATE_NOT_PRESENT (0x00) 924212420Sken#define MPI2_IOUNITPAGE7_PSTATE_DISABLED (0x01) 925212420Sken#define MPI2_IOUNITPAGE7_PSTATE_ENABLED (0x02) 926212420Sken 927230920Sken/* defines for IO Unit Page 7 PowerManagementCapabilities field */ 928230920Sken#define MPI2_IOUNITPAGE7_PMCAP_12_5_PCT_IOCSPEED (0x00000400) 929230920Sken#define MPI2_IOUNITPAGE7_PMCAP_25_0_PCT_IOCSPEED (0x00000200) 930230920Sken#define MPI2_IOUNITPAGE7_PMCAP_50_0_PCT_IOCSPEED (0x00000100) 931230920Sken#define MPI2_IOUNITPAGE7_PMCAP_PCIE_WIDTH_CHANGE (0x00000008) 932230920Sken#define MPI2_IOUNITPAGE7_PMCAP_PCIE_SPEED_CHANGE (0x00000004) 933230920Sken 934212420Sken/* defines for IO Unit Page 7 IOCTemperatureUnits field */ 935212420Sken#define MPI2_IOUNITPAGE7_IOC_TEMP_NOT_PRESENT (0x00) 936212420Sken#define MPI2_IOUNITPAGE7_IOC_TEMP_FAHRENHEIT (0x01) 937212420Sken#define MPI2_IOUNITPAGE7_IOC_TEMP_CELSIUS (0x02) 938212420Sken 939212420Sken/* defines for IO Unit Page 7 IOCSpeed field */ 940212420Sken#define MPI2_IOUNITPAGE7_IOC_SPEED_FULL (0x01) 941212420Sken#define MPI2_IOUNITPAGE7_IOC_SPEED_HALF (0x02) 942212420Sken#define MPI2_IOUNITPAGE7_IOC_SPEED_QUARTER (0x04) 943212420Sken#define MPI2_IOUNITPAGE7_IOC_SPEED_EIGHTH (0x08) 944212420Sken 945230920Sken/* defines for IO Unit Page 7 BoardTemperatureUnits field */ 946230920Sken#define MPI2_IOUNITPAGE7_BOARD_TEMP_NOT_PRESENT (0x00) 947230920Sken#define MPI2_IOUNITPAGE7_BOARD_TEMP_FAHRENHEIT (0x01) 948230920Sken#define MPI2_IOUNITPAGE7_BOARD_TEMP_CELSIUS (0x02) 949212420Sken 950212420Sken 951230920Sken 952212420Sken/**************************************************************************** 953212420Sken* IOC Config Pages 954212420Sken****************************************************************************/ 955212420Sken 956212420Sken/* IOC Page 0 */ 957212420Sken 958212420Skentypedef struct _MPI2_CONFIG_PAGE_IOC_0 959212420Sken{ 960212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 961212420Sken U32 Reserved1; /* 0x04 */ 962212420Sken U32 Reserved2; /* 0x08 */ 963212420Sken U16 VendorID; /* 0x0C */ 964212420Sken U16 DeviceID; /* 0x0E */ 965212420Sken U8 RevisionID; /* 0x10 */ 966212420Sken U8 Reserved3; /* 0x11 */ 967212420Sken U16 Reserved4; /* 0x12 */ 968212420Sken U32 ClassCode; /* 0x14 */ 969212420Sken U16 SubsystemVendorID; /* 0x18 */ 970212420Sken U16 SubsystemID; /* 0x1A */ 971212420Sken} MPI2_CONFIG_PAGE_IOC_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_0, 972212420Sken Mpi2IOCPage0_t, MPI2_POINTER pMpi2IOCPage0_t; 973212420Sken 974212420Sken#define MPI2_IOCPAGE0_PAGEVERSION (0x02) 975212420Sken 976212420Sken 977212420Sken/* IOC Page 1 */ 978212420Sken 979212420Skentypedef struct _MPI2_CONFIG_PAGE_IOC_1 980212420Sken{ 981212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 982212420Sken U32 Flags; /* 0x04 */ 983212420Sken U32 CoalescingTimeout; /* 0x08 */ 984212420Sken U8 CoalescingDepth; /* 0x0C */ 985212420Sken U8 PCISlotNum; /* 0x0D */ 986212420Sken U8 PCIBusNum; /* 0x0E */ 987212420Sken U8 PCIDomainSegment; /* 0x0F */ 988212420Sken U32 Reserved1; /* 0x10 */ 989212420Sken U32 Reserved2; /* 0x14 */ 990212420Sken} MPI2_CONFIG_PAGE_IOC_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_1, 991212420Sken Mpi2IOCPage1_t, MPI2_POINTER pMpi2IOCPage1_t; 992212420Sken 993212420Sken#define MPI2_IOCPAGE1_PAGEVERSION (0x05) 994212420Sken 995212420Sken/* defines for IOC Page 1 Flags field */ 996212420Sken#define MPI2_IOCPAGE1_REPLY_COALESCING (0x00000001) 997212420Sken 998212420Sken#define MPI2_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF) 999212420Sken#define MPI2_IOCPAGE1_PCIBUSNUM_UNKNOWN (0xFF) 1000212420Sken#define MPI2_IOCPAGE1_PCIDOMAIN_UNKNOWN (0xFF) 1001212420Sken 1002212420Sken/* IOC Page 6 */ 1003212420Sken 1004212420Skentypedef struct _MPI2_CONFIG_PAGE_IOC_6 1005212420Sken{ 1006212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1007212420Sken U32 CapabilitiesFlags; /* 0x04 */ 1008212420Sken U8 MaxDrivesRAID0; /* 0x08 */ 1009212420Sken U8 MaxDrivesRAID1; /* 0x09 */ 1010212420Sken U8 MaxDrivesRAID1E; /* 0x0A */ 1011212420Sken U8 MaxDrivesRAID10; /* 0x0B */ 1012212420Sken U8 MinDrivesRAID0; /* 0x0C */ 1013212420Sken U8 MinDrivesRAID1; /* 0x0D */ 1014212420Sken U8 MinDrivesRAID1E; /* 0x0E */ 1015212420Sken U8 MinDrivesRAID10; /* 0x0F */ 1016212420Sken U32 Reserved1; /* 0x10 */ 1017212420Sken U8 MaxGlobalHotSpares; /* 0x14 */ 1018212420Sken U8 MaxPhysDisks; /* 0x15 */ 1019212420Sken U8 MaxVolumes; /* 0x16 */ 1020212420Sken U8 MaxConfigs; /* 0x17 */ 1021212420Sken U8 MaxOCEDisks; /* 0x18 */ 1022212420Sken U8 Reserved2; /* 0x19 */ 1023212420Sken U16 Reserved3; /* 0x1A */ 1024212420Sken U32 SupportedStripeSizeMapRAID0; /* 0x1C */ 1025212420Sken U32 SupportedStripeSizeMapRAID1E; /* 0x20 */ 1026212420Sken U32 SupportedStripeSizeMapRAID10; /* 0x24 */ 1027212420Sken U32 Reserved4; /* 0x28 */ 1028212420Sken U32 Reserved5; /* 0x2C */ 1029212420Sken U16 DefaultMetadataSize; /* 0x30 */ 1030212420Sken U16 Reserved6; /* 0x32 */ 1031212420Sken U16 MaxBadBlockTableEntries; /* 0x34 */ 1032212420Sken U16 Reserved7; /* 0x36 */ 1033212420Sken U32 IRNvsramVersion; /* 0x38 */ 1034212420Sken} MPI2_CONFIG_PAGE_IOC_6, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_6, 1035212420Sken Mpi2IOCPage6_t, MPI2_POINTER pMpi2IOCPage6_t; 1036212420Sken 1037212420Sken#define MPI2_IOCPAGE6_PAGEVERSION (0x04) 1038212420Sken 1039212420Sken/* defines for IOC Page 6 CapabilitiesFlags */ 1040212420Sken#define MPI2_IOCPAGE6_CAP_FLAGS_RAID10_SUPPORT (0x00000010) 1041212420Sken#define MPI2_IOCPAGE6_CAP_FLAGS_RAID1_SUPPORT (0x00000008) 1042212420Sken#define MPI2_IOCPAGE6_CAP_FLAGS_RAID1E_SUPPORT (0x00000004) 1043212420Sken#define MPI2_IOCPAGE6_CAP_FLAGS_RAID0_SUPPORT (0x00000002) 1044212420Sken#define MPI2_IOCPAGE6_CAP_FLAGS_GLOBAL_HOT_SPARE (0x00000001) 1045212420Sken 1046212420Sken 1047212420Sken/* IOC Page 7 */ 1048212420Sken 1049212420Sken#define MPI2_IOCPAGE7_EVENTMASK_WORDS (4) 1050212420Sken 1051212420Skentypedef struct _MPI2_CONFIG_PAGE_IOC_7 1052212420Sken{ 1053212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1054212420Sken U32 Reserved1; /* 0x04 */ 1055212420Sken U32 EventMasks[MPI2_IOCPAGE7_EVENTMASK_WORDS];/* 0x08 */ 1056212420Sken U16 SASBroadcastPrimitiveMasks; /* 0x18 */ 1057212420Sken U16 Reserved2; /* 0x1A */ 1058212420Sken U32 Reserved3; /* 0x1C */ 1059212420Sken} MPI2_CONFIG_PAGE_IOC_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_7, 1060212420Sken Mpi2IOCPage7_t, MPI2_POINTER pMpi2IOCPage7_t; 1061212420Sken 1062212420Sken#define MPI2_IOCPAGE7_PAGEVERSION (0x01) 1063212420Sken 1064212420Sken 1065212420Sken/* IOC Page 8 */ 1066212420Sken 1067212420Skentypedef struct _MPI2_CONFIG_PAGE_IOC_8 1068212420Sken{ 1069212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1070212420Sken U8 NumDevsPerEnclosure; /* 0x04 */ 1071212420Sken U8 Reserved1; /* 0x05 */ 1072212420Sken U16 Reserved2; /* 0x06 */ 1073212420Sken U16 MaxPersistentEntries; /* 0x08 */ 1074212420Sken U16 MaxNumPhysicalMappedIDs; /* 0x0A */ 1075212420Sken U16 Flags; /* 0x0C */ 1076212420Sken U16 Reserved3; /* 0x0E */ 1077212420Sken U16 IRVolumeMappingFlags; /* 0x10 */ 1078212420Sken U16 Reserved4; /* 0x12 */ 1079212420Sken U32 Reserved5; /* 0x14 */ 1080212420Sken} MPI2_CONFIG_PAGE_IOC_8, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_8, 1081212420Sken Mpi2IOCPage8_t, MPI2_POINTER pMpi2IOCPage8_t; 1082212420Sken 1083212420Sken#define MPI2_IOCPAGE8_PAGEVERSION (0x00) 1084212420Sken 1085212420Sken/* defines for IOC Page 8 Flags field */ 1086212420Sken#define MPI2_IOCPAGE8_FLAGS_DA_START_SLOT_1 (0x00000020) 1087212420Sken#define MPI2_IOCPAGE8_FLAGS_RESERVED_TARGETID_0 (0x00000010) 1088212420Sken 1089212420Sken#define MPI2_IOCPAGE8_FLAGS_MASK_MAPPING_MODE (0x0000000E) 1090212420Sken#define MPI2_IOCPAGE8_FLAGS_DEVICE_PERSISTENCE_MAPPING (0x00000000) 1091212420Sken#define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING (0x00000002) 1092212420Sken 1093212420Sken#define MPI2_IOCPAGE8_FLAGS_DISABLE_PERSISTENT_MAPPING (0x00000001) 1094212420Sken#define MPI2_IOCPAGE8_FLAGS_ENABLE_PERSISTENT_MAPPING (0x00000000) 1095212420Sken 1096212420Sken/* defines for IOC Page 8 IRVolumeMappingFlags */ 1097212420Sken#define MPI2_IOCPAGE8_IRFLAGS_MASK_VOLUME_MAPPING_MODE (0x00000003) 1098212420Sken#define MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING (0x00000000) 1099212420Sken#define MPI2_IOCPAGE8_IRFLAGS_HIGH_VOLUME_MAPPING (0x00000001) 1100212420Sken 1101212420Sken 1102212420Sken/**************************************************************************** 1103212420Sken* BIOS Config Pages 1104212420Sken****************************************************************************/ 1105212420Sken 1106212420Sken/* BIOS Page 1 */ 1107212420Sken 1108212420Skentypedef struct _MPI2_CONFIG_PAGE_BIOS_1 1109212420Sken{ 1110212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1111212420Sken U32 BiosOptions; /* 0x04 */ 1112212420Sken U32 IOCSettings; /* 0x08 */ 1113212420Sken U32 Reserved1; /* 0x0C */ 1114212420Sken U32 DeviceSettings; /* 0x10 */ 1115212420Sken U16 NumberOfDevices; /* 0x14 */ 1116212420Sken U16 Reserved2; /* 0x16 */ 1117212420Sken U16 IOTimeoutBlockDevicesNonRM; /* 0x18 */ 1118212420Sken U16 IOTimeoutSequential; /* 0x1A */ 1119212420Sken U16 IOTimeoutOther; /* 0x1C */ 1120212420Sken U16 IOTimeoutBlockDevicesRM; /* 0x1E */ 1121212420Sken} MPI2_CONFIG_PAGE_BIOS_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_1, 1122212420Sken Mpi2BiosPage1_t, MPI2_POINTER pMpi2BiosPage1_t; 1123212420Sken 1124212420Sken#define MPI2_BIOSPAGE1_PAGEVERSION (0x04) 1125212420Sken 1126212420Sken/* values for BIOS Page 1 BiosOptions field */ 1127212420Sken#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001) 1128212420Sken 1129212420Sken/* values for BIOS Page 1 IOCSettings field */ 1130212420Sken#define MPI2_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000) 1131212420Sken#define MPI2_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000) 1132212420Sken#define MPI2_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000) 1133212420Sken 1134212420Sken#define MPI2_BIOSPAGE1_IOCSET_MASK_RM_SETTING (0x000000C0) 1135212420Sken#define MPI2_BIOSPAGE1_IOCSET_NONE_RM_SETTING (0x00000000) 1136212420Sken#define MPI2_BIOSPAGE1_IOCSET_BOOT_RM_SETTING (0x00000040) 1137212420Sken#define MPI2_BIOSPAGE1_IOCSET_MEDIA_RM_SETTING (0x00000080) 1138212420Sken 1139212420Sken#define MPI2_BIOSPAGE1_IOCSET_MASK_ADAPTER_SUPPORT (0x00000030) 1140212420Sken#define MPI2_BIOSPAGE1_IOCSET_NO_SUPPORT (0x00000000) 1141212420Sken#define MPI2_BIOSPAGE1_IOCSET_BIOS_SUPPORT (0x00000010) 1142212420Sken#define MPI2_BIOSPAGE1_IOCSET_OS_SUPPORT (0x00000020) 1143212420Sken#define MPI2_BIOSPAGE1_IOCSET_ALL_SUPPORT (0x00000030) 1144212420Sken 1145212420Sken#define MPI2_BIOSPAGE1_IOCSET_ALTERNATE_CHS (0x00000008) 1146212420Sken 1147212420Sken/* values for BIOS Page 1 DeviceSettings field */ 1148212420Sken#define MPI2_BIOSPAGE1_DEVSET_DISABLE_SMART_POLLING (0x00000010) 1149212420Sken#define MPI2_BIOSPAGE1_DEVSET_DISABLE_SEQ_LUN (0x00000008) 1150212420Sken#define MPI2_BIOSPAGE1_DEVSET_DISABLE_RM_LUN (0x00000004) 1151212420Sken#define MPI2_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002) 1152212420Sken#define MPI2_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001) 1153212420Sken 1154212420Sken 1155212420Sken/* BIOS Page 2 */ 1156212420Sken 1157212420Skentypedef struct _MPI2_BOOT_DEVICE_ADAPTER_ORDER 1158212420Sken{ 1159212420Sken U32 Reserved1; /* 0x00 */ 1160212420Sken U32 Reserved2; /* 0x04 */ 1161212420Sken U32 Reserved3; /* 0x08 */ 1162212420Sken U32 Reserved4; /* 0x0C */ 1163212420Sken U32 Reserved5; /* 0x10 */ 1164212420Sken U32 Reserved6; /* 0x14 */ 1165212420Sken} MPI2_BOOT_DEVICE_ADAPTER_ORDER, 1166212420Sken MPI2_POINTER PTR_MPI2_BOOT_DEVICE_ADAPTER_ORDER, 1167212420Sken Mpi2BootDeviceAdapterOrder_t, MPI2_POINTER pMpi2BootDeviceAdapterOrder_t; 1168212420Sken 1169212420Skentypedef struct _MPI2_BOOT_DEVICE_SAS_WWID 1170212420Sken{ 1171212420Sken U64 SASAddress; /* 0x00 */ 1172212420Sken U8 LUN[8]; /* 0x08 */ 1173212420Sken U32 Reserved1; /* 0x10 */ 1174212420Sken U32 Reserved2; /* 0x14 */ 1175212420Sken} MPI2_BOOT_DEVICE_SAS_WWID, MPI2_POINTER PTR_MPI2_BOOT_DEVICE_SAS_WWID, 1176212420Sken Mpi2BootDeviceSasWwid_t, MPI2_POINTER pMpi2BootDeviceSasWwid_t; 1177212420Sken 1178212420Skentypedef struct _MPI2_BOOT_DEVICE_ENCLOSURE_SLOT 1179212420Sken{ 1180212420Sken U64 EnclosureLogicalID; /* 0x00 */ 1181212420Sken U32 Reserved1; /* 0x08 */ 1182212420Sken U32 Reserved2; /* 0x0C */ 1183212420Sken U16 SlotNumber; /* 0x10 */ 1184212420Sken U16 Reserved3; /* 0x12 */ 1185212420Sken U32 Reserved4; /* 0x14 */ 1186212420Sken} MPI2_BOOT_DEVICE_ENCLOSURE_SLOT, 1187212420Sken MPI2_POINTER PTR_MPI2_BOOT_DEVICE_ENCLOSURE_SLOT, 1188212420Sken Mpi2BootDeviceEnclosureSlot_t, MPI2_POINTER pMpi2BootDeviceEnclosureSlot_t; 1189212420Sken 1190212420Skentypedef struct _MPI2_BOOT_DEVICE_DEVICE_NAME 1191212420Sken{ 1192212420Sken U64 DeviceName; /* 0x00 */ 1193212420Sken U8 LUN[8]; /* 0x08 */ 1194212420Sken U32 Reserved1; /* 0x10 */ 1195212420Sken U32 Reserved2; /* 0x14 */ 1196212420Sken} MPI2_BOOT_DEVICE_DEVICE_NAME, MPI2_POINTER PTR_MPI2_BOOT_DEVICE_DEVICE_NAME, 1197212420Sken Mpi2BootDeviceDeviceName_t, MPI2_POINTER pMpi2BootDeviceDeviceName_t; 1198212420Sken 1199212420Skentypedef union _MPI2_MPI2_BIOSPAGE2_BOOT_DEVICE 1200212420Sken{ 1201212420Sken MPI2_BOOT_DEVICE_ADAPTER_ORDER AdapterOrder; 1202212420Sken MPI2_BOOT_DEVICE_SAS_WWID SasWwid; 1203212420Sken MPI2_BOOT_DEVICE_ENCLOSURE_SLOT EnclosureSlot; 1204212420Sken MPI2_BOOT_DEVICE_DEVICE_NAME DeviceName; 1205212420Sken} MPI2_BIOSPAGE2_BOOT_DEVICE, MPI2_POINTER PTR_MPI2_BIOSPAGE2_BOOT_DEVICE, 1206212420Sken Mpi2BiosPage2BootDevice_t, MPI2_POINTER pMpi2BiosPage2BootDevice_t; 1207212420Sken 1208212420Skentypedef struct _MPI2_CONFIG_PAGE_BIOS_2 1209212420Sken{ 1210212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1211212420Sken U32 Reserved1; /* 0x04 */ 1212212420Sken U32 Reserved2; /* 0x08 */ 1213212420Sken U32 Reserved3; /* 0x0C */ 1214212420Sken U32 Reserved4; /* 0x10 */ 1215212420Sken U32 Reserved5; /* 0x14 */ 1216212420Sken U32 Reserved6; /* 0x18 */ 1217212420Sken U8 ReqBootDeviceForm; /* 0x1C */ 1218212420Sken U8 Reserved7; /* 0x1D */ 1219212420Sken U16 Reserved8; /* 0x1E */ 1220212420Sken MPI2_BIOSPAGE2_BOOT_DEVICE RequestedBootDevice; /* 0x20 */ 1221212420Sken U8 ReqAltBootDeviceForm; /* 0x38 */ 1222212420Sken U8 Reserved9; /* 0x39 */ 1223212420Sken U16 Reserved10; /* 0x3A */ 1224212420Sken MPI2_BIOSPAGE2_BOOT_DEVICE RequestedAltBootDevice; /* 0x3C */ 1225212420Sken U8 CurrentBootDeviceForm; /* 0x58 */ 1226212420Sken U8 Reserved11; /* 0x59 */ 1227212420Sken U16 Reserved12; /* 0x5A */ 1228212420Sken MPI2_BIOSPAGE2_BOOT_DEVICE CurrentBootDevice; /* 0x58 */ 1229212420Sken} MPI2_CONFIG_PAGE_BIOS_2, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_2, 1230212420Sken Mpi2BiosPage2_t, MPI2_POINTER pMpi2BiosPage2_t; 1231212420Sken 1232212420Sken#define MPI2_BIOSPAGE2_PAGEVERSION (0x04) 1233212420Sken 1234212420Sken/* values for BIOS Page 2 BootDeviceForm fields */ 1235212420Sken#define MPI2_BIOSPAGE2_FORM_MASK (0x0F) 1236212420Sken#define MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED (0x00) 1237212420Sken#define MPI2_BIOSPAGE2_FORM_SAS_WWID (0x05) 1238212420Sken#define MPI2_BIOSPAGE2_FORM_ENCLOSURE_SLOT (0x06) 1239212420Sken#define MPI2_BIOSPAGE2_FORM_DEVICE_NAME (0x07) 1240212420Sken 1241212420Sken 1242212420Sken/* BIOS Page 3 */ 1243212420Sken 1244212420Skentypedef struct _MPI2_ADAPTER_INFO 1245212420Sken{ 1246212420Sken U8 PciBusNumber; /* 0x00 */ 1247212420Sken U8 PciDeviceAndFunctionNumber; /* 0x01 */ 1248212420Sken U16 AdapterFlags; /* 0x02 */ 1249212420Sken} MPI2_ADAPTER_INFO, MPI2_POINTER PTR_MPI2_ADAPTER_INFO, 1250212420Sken Mpi2AdapterInfo_t, MPI2_POINTER pMpi2AdapterInfo_t; 1251212420Sken 1252212420Sken#define MPI2_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001) 1253212420Sken#define MPI2_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002) 1254212420Sken 1255212420Skentypedef struct _MPI2_CONFIG_PAGE_BIOS_3 1256212420Sken{ 1257212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1258212420Sken U32 GlobalFlags; /* 0x04 */ 1259212420Sken U32 BiosVersion; /* 0x08 */ 1260212420Sken MPI2_ADAPTER_INFO AdapterOrder[4]; /* 0x0C */ 1261212420Sken U32 Reserved1; /* 0x1C */ 1262212420Sken} MPI2_CONFIG_PAGE_BIOS_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_3, 1263212420Sken Mpi2BiosPage3_t, MPI2_POINTER pMpi2BiosPage3_t; 1264212420Sken 1265212420Sken#define MPI2_BIOSPAGE3_PAGEVERSION (0x00) 1266212420Sken 1267212420Sken/* values for BIOS Page 3 GlobalFlags */ 1268212420Sken#define MPI2_BIOSPAGE3_FLAGS_PAUSE_ON_ERROR (0x00000002) 1269212420Sken#define MPI2_BIOSPAGE3_FLAGS_VERBOSE_ENABLE (0x00000004) 1270212420Sken#define MPI2_BIOSPAGE3_FLAGS_HOOK_INT_40_DISABLE (0x00000010) 1271212420Sken 1272212420Sken#define MPI2_BIOSPAGE3_FLAGS_DEV_LIST_DISPLAY_MASK (0x000000E0) 1273212420Sken#define MPI2_BIOSPAGE3_FLAGS_INSTALLED_DEV_DISPLAY (0x00000000) 1274212420Sken#define MPI2_BIOSPAGE3_FLAGS_ADAPTER_DISPLAY (0x00000020) 1275212420Sken#define MPI2_BIOSPAGE3_FLAGS_ADAPTER_DEV_DISPLAY (0x00000040) 1276212420Sken 1277212420Sken 1278212420Sken/* BIOS Page 4 */ 1279212420Sken 1280212420Sken/* 1281212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1282230920Sken * one and check the value returned for NumPhys at runtime. 1283212420Sken */ 1284212420Sken#ifndef MPI2_BIOS_PAGE_4_PHY_ENTRIES 1285212420Sken#define MPI2_BIOS_PAGE_4_PHY_ENTRIES (1) 1286212420Sken#endif 1287212420Sken 1288212420Skentypedef struct _MPI2_BIOS4_ENTRY 1289212420Sken{ 1290212420Sken U64 ReassignmentWWID; /* 0x00 */ 1291212420Sken U64 ReassignmentDeviceName; /* 0x08 */ 1292212420Sken} MPI2_BIOS4_ENTRY, MPI2_POINTER PTR_MPI2_BIOS4_ENTRY, 1293212420Sken Mpi2MBios4Entry_t, MPI2_POINTER pMpi2Bios4Entry_t; 1294212420Sken 1295212420Skentypedef struct _MPI2_CONFIG_PAGE_BIOS_4 1296212420Sken{ 1297212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1298212420Sken U8 NumPhys; /* 0x04 */ 1299212420Sken U8 Reserved1; /* 0x05 */ 1300212420Sken U16 Reserved2; /* 0x06 */ 1301212420Sken MPI2_BIOS4_ENTRY Phy[MPI2_BIOS_PAGE_4_PHY_ENTRIES]; /* 0x08 */ 1302212420Sken} MPI2_CONFIG_PAGE_BIOS_4, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_4, 1303212420Sken Mpi2BiosPage4_t, MPI2_POINTER pMpi2BiosPage4_t; 1304212420Sken 1305212420Sken#define MPI2_BIOSPAGE4_PAGEVERSION (0x01) 1306212420Sken 1307212420Sken 1308212420Sken/**************************************************************************** 1309212420Sken* RAID Volume Config Pages 1310212420Sken****************************************************************************/ 1311212420Sken 1312212420Sken/* RAID Volume Page 0 */ 1313212420Sken 1314212420Skentypedef struct _MPI2_RAIDVOL0_PHYS_DISK 1315212420Sken{ 1316212420Sken U8 RAIDSetNum; /* 0x00 */ 1317212420Sken U8 PhysDiskMap; /* 0x01 */ 1318212420Sken U8 PhysDiskNum; /* 0x02 */ 1319212420Sken U8 Reserved; /* 0x03 */ 1320212420Sken} MPI2_RAIDVOL0_PHYS_DISK, MPI2_POINTER PTR_MPI2_RAIDVOL0_PHYS_DISK, 1321212420Sken Mpi2RaidVol0PhysDisk_t, MPI2_POINTER pMpi2RaidVol0PhysDisk_t; 1322212420Sken 1323212420Sken/* defines for the PhysDiskMap field */ 1324212420Sken#define MPI2_RAIDVOL0_PHYSDISK_PRIMARY (0x01) 1325212420Sken#define MPI2_RAIDVOL0_PHYSDISK_SECONDARY (0x02) 1326212420Sken 1327212420Skentypedef struct _MPI2_RAIDVOL0_SETTINGS 1328212420Sken{ 1329212420Sken U16 Settings; /* 0x00 */ 1330212420Sken U8 HotSparePool; /* 0x01 */ 1331212420Sken U8 Reserved; /* 0x02 */ 1332212420Sken} MPI2_RAIDVOL0_SETTINGS, MPI2_POINTER PTR_MPI2_RAIDVOL0_SETTINGS, 1333212420Sken Mpi2RaidVol0Settings_t, MPI2_POINTER pMpi2RaidVol0Settings_t; 1334212420Sken 1335212420Sken/* RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk */ 1336212420Sken#define MPI2_RAID_HOT_SPARE_POOL_0 (0x01) 1337212420Sken#define MPI2_RAID_HOT_SPARE_POOL_1 (0x02) 1338212420Sken#define MPI2_RAID_HOT_SPARE_POOL_2 (0x04) 1339212420Sken#define MPI2_RAID_HOT_SPARE_POOL_3 (0x08) 1340212420Sken#define MPI2_RAID_HOT_SPARE_POOL_4 (0x10) 1341212420Sken#define MPI2_RAID_HOT_SPARE_POOL_5 (0x20) 1342212420Sken#define MPI2_RAID_HOT_SPARE_POOL_6 (0x40) 1343212420Sken#define MPI2_RAID_HOT_SPARE_POOL_7 (0x80) 1344212420Sken 1345212420Sken/* RAID Volume Page 0 VolumeSettings defines */ 1346212420Sken#define MPI2_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0008) 1347212420Sken#define MPI2_RAIDVOL0_SETTING_AUTO_CONFIG_HSWAP_DISABLE (0x0004) 1348212420Sken 1349212420Sken#define MPI2_RAIDVOL0_SETTING_MASK_WRITE_CACHING (0x0003) 1350212420Sken#define MPI2_RAIDVOL0_SETTING_UNCHANGED (0x0000) 1351212420Sken#define MPI2_RAIDVOL0_SETTING_DISABLE_WRITE_CACHING (0x0001) 1352212420Sken#define MPI2_RAIDVOL0_SETTING_ENABLE_WRITE_CACHING (0x0002) 1353212420Sken 1354212420Sken/* 1355212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1356230920Sken * one and check the value returned for NumPhysDisks at runtime. 1357212420Sken */ 1358212420Sken#ifndef MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX 1359212420Sken#define MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX (1) 1360212420Sken#endif 1361212420Sken 1362212420Skentypedef struct _MPI2_CONFIG_PAGE_RAID_VOL_0 1363212420Sken{ 1364212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1365212420Sken U16 DevHandle; /* 0x04 */ 1366212420Sken U8 VolumeState; /* 0x06 */ 1367212420Sken U8 VolumeType; /* 0x07 */ 1368212420Sken U32 VolumeStatusFlags; /* 0x08 */ 1369212420Sken MPI2_RAIDVOL0_SETTINGS VolumeSettings; /* 0x0C */ 1370212420Sken U64 MaxLBA; /* 0x10 */ 1371212420Sken U32 StripeSize; /* 0x18 */ 1372212420Sken U16 BlockSize; /* 0x1C */ 1373212420Sken U16 Reserved1; /* 0x1E */ 1374212420Sken U8 SupportedPhysDisks; /* 0x20 */ 1375212420Sken U8 ResyncRate; /* 0x21 */ 1376212420Sken U16 DataScrubDuration; /* 0x22 */ 1377212420Sken U8 NumPhysDisks; /* 0x24 */ 1378212420Sken U8 Reserved2; /* 0x25 */ 1379212420Sken U8 Reserved3; /* 0x26 */ 1380212420Sken U8 InactiveStatus; /* 0x27 */ 1381212420Sken MPI2_RAIDVOL0_PHYS_DISK PhysDisk[MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX]; /* 0x28 */ 1382212420Sken} MPI2_CONFIG_PAGE_RAID_VOL_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_VOL_0, 1383212420Sken Mpi2RaidVolPage0_t, MPI2_POINTER pMpi2RaidVolPage0_t; 1384212420Sken 1385212420Sken#define MPI2_RAIDVOLPAGE0_PAGEVERSION (0x0A) 1386212420Sken 1387212420Sken/* values for RAID VolumeState */ 1388212420Sken#define MPI2_RAID_VOL_STATE_MISSING (0x00) 1389212420Sken#define MPI2_RAID_VOL_STATE_FAILED (0x01) 1390212420Sken#define MPI2_RAID_VOL_STATE_INITIALIZING (0x02) 1391212420Sken#define MPI2_RAID_VOL_STATE_ONLINE (0x03) 1392212420Sken#define MPI2_RAID_VOL_STATE_DEGRADED (0x04) 1393212420Sken#define MPI2_RAID_VOL_STATE_OPTIMAL (0x05) 1394212420Sken 1395212420Sken/* values for RAID VolumeType */ 1396212420Sken#define MPI2_RAID_VOL_TYPE_RAID0 (0x00) 1397212420Sken#define MPI2_RAID_VOL_TYPE_RAID1E (0x01) 1398212420Sken#define MPI2_RAID_VOL_TYPE_RAID1 (0x02) 1399212420Sken#define MPI2_RAID_VOL_TYPE_RAID10 (0x05) 1400212420Sken#define MPI2_RAID_VOL_TYPE_UNKNOWN (0xFF) 1401212420Sken 1402212420Sken/* values for RAID Volume Page 0 VolumeStatusFlags field */ 1403212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_PENDING_RESYNC (0x02000000) 1404212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_BACKG_INIT_PENDING (0x01000000) 1405212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_MDC_PENDING (0x00800000) 1406212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_USER_CONSIST_PENDING (0x00400000) 1407212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_MAKE_DATA_CONSISTENT (0x00200000) 1408212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB (0x00100000) 1409212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK (0x00080000) 1410212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION (0x00040000) 1411212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT (0x00020000) 1412212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x00010000) 1413230920Sken#define MPI2_RAIDVOL0_STATUS_FLAG_VOL_NOT_CONSISTENT (0x00000080) 1414212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_OCE_ALLOWED (0x00000040) 1415212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_BGI_COMPLETE (0x00000020) 1416212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_1E_OFFSET_MIRROR (0x00000000) 1417212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_1E_ADJACENT_MIRROR (0x00000010) 1418212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL (0x00000008) 1419212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE (0x00000004) 1420212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_QUIESCED (0x00000002) 1421212420Sken#define MPI2_RAIDVOL0_STATUS_FLAG_ENABLED (0x00000001) 1422212420Sken 1423212420Sken/* values for RAID Volume Page 0 SupportedPhysDisks field */ 1424212420Sken#define MPI2_RAIDVOL0_SUPPORT_SOLID_STATE_DISKS (0x08) 1425212420Sken#define MPI2_RAIDVOL0_SUPPORT_HARD_DISKS (0x04) 1426212420Sken#define MPI2_RAIDVOL0_SUPPORT_SAS_PROTOCOL (0x02) 1427212420Sken#define MPI2_RAIDVOL0_SUPPORT_SATA_PROTOCOL (0x01) 1428212420Sken 1429212420Sken/* values for RAID Volume Page 0 InactiveStatus field */ 1430212420Sken#define MPI2_RAIDVOLPAGE0_UNKNOWN_INACTIVE (0x00) 1431212420Sken#define MPI2_RAIDVOLPAGE0_STALE_METADATA_INACTIVE (0x01) 1432212420Sken#define MPI2_RAIDVOLPAGE0_FOREIGN_VOLUME_INACTIVE (0x02) 1433212420Sken#define MPI2_RAIDVOLPAGE0_INSUFFICIENT_RESOURCE_INACTIVE (0x03) 1434212420Sken#define MPI2_RAIDVOLPAGE0_CLONE_VOLUME_INACTIVE (0x04) 1435212420Sken#define MPI2_RAIDVOLPAGE0_INSUFFICIENT_METADATA_INACTIVE (0x05) 1436212420Sken#define MPI2_RAIDVOLPAGE0_PREVIOUSLY_DELETED (0x06) 1437212420Sken 1438212420Sken 1439212420Sken/* RAID Volume Page 1 */ 1440212420Sken 1441212420Skentypedef struct _MPI2_CONFIG_PAGE_RAID_VOL_1 1442212420Sken{ 1443212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1444212420Sken U16 DevHandle; /* 0x04 */ 1445212420Sken U16 Reserved0; /* 0x06 */ 1446212420Sken U8 GUID[24]; /* 0x08 */ 1447212420Sken U8 Name[16]; /* 0x20 */ 1448212420Sken U64 WWID; /* 0x30 */ 1449212420Sken U32 Reserved1; /* 0x38 */ 1450212420Sken U32 Reserved2; /* 0x3C */ 1451212420Sken} MPI2_CONFIG_PAGE_RAID_VOL_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_VOL_1, 1452212420Sken Mpi2RaidVolPage1_t, MPI2_POINTER pMpi2RaidVolPage1_t; 1453212420Sken 1454212420Sken#define MPI2_RAIDVOLPAGE1_PAGEVERSION (0x03) 1455212420Sken 1456212420Sken 1457212420Sken/**************************************************************************** 1458212420Sken* RAID Physical Disk Config Pages 1459212420Sken****************************************************************************/ 1460212420Sken 1461212420Sken/* RAID Physical Disk Page 0 */ 1462212420Sken 1463212420Skentypedef struct _MPI2_RAIDPHYSDISK0_SETTINGS 1464212420Sken{ 1465212420Sken U16 Reserved1; /* 0x00 */ 1466212420Sken U8 HotSparePool; /* 0x02 */ 1467212420Sken U8 Reserved2; /* 0x03 */ 1468212420Sken} MPI2_RAIDPHYSDISK0_SETTINGS, MPI2_POINTER PTR_MPI2_RAIDPHYSDISK0_SETTINGS, 1469212420Sken Mpi2RaidPhysDisk0Settings_t, MPI2_POINTER pMpi2RaidPhysDisk0Settings_t; 1470212420Sken 1471212420Sken/* use MPI2_RAID_HOT_SPARE_POOL_ defines for the HotSparePool field */ 1472212420Sken 1473212420Skentypedef struct _MPI2_RAIDPHYSDISK0_INQUIRY_DATA 1474212420Sken{ 1475212420Sken U8 VendorID[8]; /* 0x00 */ 1476212420Sken U8 ProductID[16]; /* 0x08 */ 1477212420Sken U8 ProductRevLevel[4]; /* 0x18 */ 1478212420Sken U8 SerialNum[32]; /* 0x1C */ 1479212420Sken} MPI2_RAIDPHYSDISK0_INQUIRY_DATA, 1480212420Sken MPI2_POINTER PTR_MPI2_RAIDPHYSDISK0_INQUIRY_DATA, 1481212420Sken Mpi2RaidPhysDisk0InquiryData_t, MPI2_POINTER pMpi2RaidPhysDisk0InquiryData_t; 1482212420Sken 1483212420Skentypedef struct _MPI2_CONFIG_PAGE_RD_PDISK_0 1484212420Sken{ 1485212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1486212420Sken U16 DevHandle; /* 0x04 */ 1487212420Sken U8 Reserved1; /* 0x06 */ 1488212420Sken U8 PhysDiskNum; /* 0x07 */ 1489212420Sken MPI2_RAIDPHYSDISK0_SETTINGS PhysDiskSettings; /* 0x08 */ 1490212420Sken U32 Reserved2; /* 0x0C */ 1491212420Sken MPI2_RAIDPHYSDISK0_INQUIRY_DATA InquiryData; /* 0x10 */ 1492212420Sken U32 Reserved3; /* 0x4C */ 1493212420Sken U8 PhysDiskState; /* 0x50 */ 1494212420Sken U8 OfflineReason; /* 0x51 */ 1495212420Sken U8 IncompatibleReason; /* 0x52 */ 1496212420Sken U8 PhysDiskAttributes; /* 0x53 */ 1497212420Sken U32 PhysDiskStatusFlags; /* 0x54 */ 1498212420Sken U64 DeviceMaxLBA; /* 0x58 */ 1499212420Sken U64 HostMaxLBA; /* 0x60 */ 1500212420Sken U64 CoercedMaxLBA; /* 0x68 */ 1501212420Sken U16 BlockSize; /* 0x70 */ 1502212420Sken U16 Reserved5; /* 0x72 */ 1503212420Sken U32 Reserved6; /* 0x74 */ 1504212420Sken} MPI2_CONFIG_PAGE_RD_PDISK_0, 1505212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RD_PDISK_0, 1506212420Sken Mpi2RaidPhysDiskPage0_t, MPI2_POINTER pMpi2RaidPhysDiskPage0_t; 1507212420Sken 1508212420Sken#define MPI2_RAIDPHYSDISKPAGE0_PAGEVERSION (0x05) 1509212420Sken 1510212420Sken/* PhysDiskState defines */ 1511212420Sken#define MPI2_RAID_PD_STATE_NOT_CONFIGURED (0x00) 1512212420Sken#define MPI2_RAID_PD_STATE_NOT_COMPATIBLE (0x01) 1513212420Sken#define MPI2_RAID_PD_STATE_OFFLINE (0x02) 1514212420Sken#define MPI2_RAID_PD_STATE_ONLINE (0x03) 1515212420Sken#define MPI2_RAID_PD_STATE_HOT_SPARE (0x04) 1516212420Sken#define MPI2_RAID_PD_STATE_DEGRADED (0x05) 1517212420Sken#define MPI2_RAID_PD_STATE_REBUILDING (0x06) 1518212420Sken#define MPI2_RAID_PD_STATE_OPTIMAL (0x07) 1519212420Sken 1520212420Sken/* OfflineReason defines */ 1521212420Sken#define MPI2_PHYSDISK0_ONLINE (0x00) 1522212420Sken#define MPI2_PHYSDISK0_OFFLINE_MISSING (0x01) 1523212420Sken#define MPI2_PHYSDISK0_OFFLINE_FAILED (0x03) 1524212420Sken#define MPI2_PHYSDISK0_OFFLINE_INITIALIZING (0x04) 1525212420Sken#define MPI2_PHYSDISK0_OFFLINE_REQUESTED (0x05) 1526212420Sken#define MPI2_PHYSDISK0_OFFLINE_FAILED_REQUESTED (0x06) 1527212420Sken#define MPI2_PHYSDISK0_OFFLINE_OTHER (0xFF) 1528212420Sken 1529212420Sken/* IncompatibleReason defines */ 1530212420Sken#define MPI2_PHYSDISK0_COMPATIBLE (0x00) 1531212420Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_PROTOCOL (0x01) 1532212420Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_BLOCKSIZE (0x02) 1533212420Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_MAX_LBA (0x03) 1534212420Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_SATA_EXTENDED_CMD (0x04) 1535212420Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_REMOVEABLE_MEDIA (0x05) 1536230920Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_MEDIA_TYPE (0x06) 1537212420Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_UNKNOWN (0xFF) 1538212420Sken 1539212420Sken/* PhysDiskAttributes defines */ 1540230920Sken#define MPI2_PHYSDISK0_ATTRIB_MEDIA_MASK (0x0C) 1541212420Sken#define MPI2_PHYSDISK0_ATTRIB_SOLID_STATE_DRIVE (0x08) 1542212420Sken#define MPI2_PHYSDISK0_ATTRIB_HARD_DISK_DRIVE (0x04) 1543230920Sken 1544230920Sken#define MPI2_PHYSDISK0_ATTRIB_PROTOCOL_MASK (0x03) 1545212420Sken#define MPI2_PHYSDISK0_ATTRIB_SAS_PROTOCOL (0x02) 1546212420Sken#define MPI2_PHYSDISK0_ATTRIB_SATA_PROTOCOL (0x01) 1547212420Sken 1548212420Sken/* PhysDiskStatusFlags defines */ 1549212420Sken#define MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED (0x00000040) 1550212420Sken#define MPI2_PHYSDISK0_STATUS_FLAG_OCE_TARGET (0x00000020) 1551212420Sken#define MPI2_PHYSDISK0_STATUS_FLAG_WRITE_CACHE_ENABLED (0x00000010) 1552212420Sken#define MPI2_PHYSDISK0_STATUS_FLAG_OPTIMAL_PREVIOUS (0x00000000) 1553212420Sken#define MPI2_PHYSDISK0_STATUS_FLAG_NOT_OPTIMAL_PREVIOUS (0x00000008) 1554212420Sken#define MPI2_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME (0x00000004) 1555212420Sken#define MPI2_PHYSDISK0_STATUS_FLAG_QUIESCED (0x00000002) 1556212420Sken#define MPI2_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x00000001) 1557212420Sken 1558212420Sken 1559212420Sken/* RAID Physical Disk Page 1 */ 1560212420Sken 1561212420Sken/* 1562212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1563230920Sken * one and check the value returned for NumPhysDiskPaths at runtime. 1564212420Sken */ 1565212420Sken#ifndef MPI2_RAID_PHYS_DISK1_PATH_MAX 1566212420Sken#define MPI2_RAID_PHYS_DISK1_PATH_MAX (1) 1567212420Sken#endif 1568212420Sken 1569212420Skentypedef struct _MPI2_RAIDPHYSDISK1_PATH 1570212420Sken{ 1571212420Sken U16 DevHandle; /* 0x00 */ 1572212420Sken U16 Reserved1; /* 0x02 */ 1573212420Sken U64 WWID; /* 0x04 */ 1574212420Sken U64 OwnerWWID; /* 0x0C */ 1575212420Sken U8 OwnerIdentifier; /* 0x14 */ 1576212420Sken U8 Reserved2; /* 0x15 */ 1577212420Sken U16 Flags; /* 0x16 */ 1578212420Sken} MPI2_RAIDPHYSDISK1_PATH, MPI2_POINTER PTR_MPI2_RAIDPHYSDISK1_PATH, 1579212420Sken Mpi2RaidPhysDisk1Path_t, MPI2_POINTER pMpi2RaidPhysDisk1Path_t; 1580212420Sken 1581212420Sken/* RAID Physical Disk Page 1 Physical Disk Path Flags field defines */ 1582212420Sken#define MPI2_RAID_PHYSDISK1_FLAG_PRIMARY (0x0004) 1583212420Sken#define MPI2_RAID_PHYSDISK1_FLAG_BROKEN (0x0002) 1584212420Sken#define MPI2_RAID_PHYSDISK1_FLAG_INVALID (0x0001) 1585212420Sken 1586212420Skentypedef struct _MPI2_CONFIG_PAGE_RD_PDISK_1 1587212420Sken{ 1588212420Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1589212420Sken U8 NumPhysDiskPaths; /* 0x04 */ 1590212420Sken U8 PhysDiskNum; /* 0x05 */ 1591212420Sken U16 Reserved1; /* 0x06 */ 1592212420Sken U32 Reserved2; /* 0x08 */ 1593212420Sken MPI2_RAIDPHYSDISK1_PATH PhysicalDiskPath[MPI2_RAID_PHYS_DISK1_PATH_MAX];/* 0x0C */ 1594212420Sken} MPI2_CONFIG_PAGE_RD_PDISK_1, 1595212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RD_PDISK_1, 1596212420Sken Mpi2RaidPhysDiskPage1_t, MPI2_POINTER pMpi2RaidPhysDiskPage1_t; 1597212420Sken 1598212420Sken#define MPI2_RAIDPHYSDISKPAGE1_PAGEVERSION (0x02) 1599212420Sken 1600212420Sken 1601212420Sken/**************************************************************************** 1602212420Sken* values for fields used by several types of SAS Config Pages 1603212420Sken****************************************************************************/ 1604212420Sken 1605212420Sken/* values for NegotiatedLinkRates fields */ 1606212420Sken#define MPI2_SAS_NEG_LINK_RATE_MASK_LOGICAL (0xF0) 1607212420Sken#define MPI2_SAS_NEG_LINK_RATE_SHIFT_LOGICAL (4) 1608212420Sken#define MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL (0x0F) 1609212420Sken/* link rates used for Negotiated Physical and Logical Link Rate */ 1610212420Sken#define MPI2_SAS_NEG_LINK_RATE_UNKNOWN_LINK_RATE (0x00) 1611212420Sken#define MPI2_SAS_NEG_LINK_RATE_PHY_DISABLED (0x01) 1612212420Sken#define MPI2_SAS_NEG_LINK_RATE_NEGOTIATION_FAILED (0x02) 1613212420Sken#define MPI2_SAS_NEG_LINK_RATE_SATA_OOB_COMPLETE (0x03) 1614212420Sken#define MPI2_SAS_NEG_LINK_RATE_PORT_SELECTOR (0x04) 1615212420Sken#define MPI2_SAS_NEG_LINK_RATE_SMP_RESET_IN_PROGRESS (0x05) 1616230920Sken#define MPI2_SAS_NEG_LINK_RATE_UNSUPPORTED_PHY (0x06) 1617212420Sken#define MPI2_SAS_NEG_LINK_RATE_1_5 (0x08) 1618212420Sken#define MPI2_SAS_NEG_LINK_RATE_3_0 (0x09) 1619212420Sken#define MPI2_SAS_NEG_LINK_RATE_6_0 (0x0A) 1620212420Sken 1621212420Sken 1622212420Sken/* values for AttachedPhyInfo fields */ 1623212420Sken#define MPI2_SAS_APHYINFO_INSIDE_ZPSDS_PERSISTENT (0x00000040) 1624212420Sken#define MPI2_SAS_APHYINFO_REQUESTED_INSIDE_ZPSDS (0x00000020) 1625212420Sken#define MPI2_SAS_APHYINFO_BREAK_REPLY_CAPABLE (0x00000010) 1626212420Sken 1627212420Sken#define MPI2_SAS_APHYINFO_REASON_MASK (0x0000000F) 1628212420Sken#define MPI2_SAS_APHYINFO_REASON_UNKNOWN (0x00000000) 1629212420Sken#define MPI2_SAS_APHYINFO_REASON_POWER_ON (0x00000001) 1630212420Sken#define MPI2_SAS_APHYINFO_REASON_HARD_RESET (0x00000002) 1631212420Sken#define MPI2_SAS_APHYINFO_REASON_SMP_PHY_CONTROL (0x00000003) 1632212420Sken#define MPI2_SAS_APHYINFO_REASON_LOSS_OF_SYNC (0x00000004) 1633212420Sken#define MPI2_SAS_APHYINFO_REASON_MULTIPLEXING_SEQ (0x00000005) 1634212420Sken#define MPI2_SAS_APHYINFO_REASON_IT_NEXUS_LOSS_TIMER (0x00000006) 1635212420Sken#define MPI2_SAS_APHYINFO_REASON_BREAK_TIMEOUT (0x00000007) 1636212420Sken#define MPI2_SAS_APHYINFO_REASON_PHY_TEST_STOPPED (0x00000008) 1637212420Sken 1638212420Sken 1639212420Sken/* values for PhyInfo fields */ 1640212420Sken#define MPI2_SAS_PHYINFO_PHY_VACANT (0x80000000) 1641212420Sken 1642212420Sken#define MPI2_SAS_PHYINFO_PHY_POWER_CONDITION_MASK (0x18000000) 1643230920Sken#define MPI2_SAS_PHYINFO_SHIFT_PHY_POWER_CONDITION (27) 1644212420Sken#define MPI2_SAS_PHYINFO_PHY_POWER_ACTIVE (0x00000000) 1645212420Sken#define MPI2_SAS_PHYINFO_PHY_POWER_PARTIAL (0x08000000) 1646212420Sken#define MPI2_SAS_PHYINFO_PHY_POWER_SLUMBER (0x10000000) 1647212420Sken 1648212420Sken#define MPI2_SAS_PHYINFO_CHANGED_REQ_INSIDE_ZPSDS (0x04000000) 1649212420Sken#define MPI2_SAS_PHYINFO_INSIDE_ZPSDS_PERSISTENT (0x02000000) 1650212420Sken#define MPI2_SAS_PHYINFO_REQ_INSIDE_ZPSDS (0x01000000) 1651212420Sken#define MPI2_SAS_PHYINFO_ZONE_GROUP_PERSISTENT (0x00400000) 1652212420Sken#define MPI2_SAS_PHYINFO_INSIDE_ZPSDS (0x00200000) 1653212420Sken#define MPI2_SAS_PHYINFO_ZONING_ENABLED (0x00100000) 1654212420Sken 1655212420Sken#define MPI2_SAS_PHYINFO_REASON_MASK (0x000F0000) 1656212420Sken#define MPI2_SAS_PHYINFO_REASON_UNKNOWN (0x00000000) 1657212420Sken#define MPI2_SAS_PHYINFO_REASON_POWER_ON (0x00010000) 1658212420Sken#define MPI2_SAS_PHYINFO_REASON_HARD_RESET (0x00020000) 1659212420Sken#define MPI2_SAS_PHYINFO_REASON_SMP_PHY_CONTROL (0x00030000) 1660212420Sken#define MPI2_SAS_PHYINFO_REASON_LOSS_OF_SYNC (0x00040000) 1661212420Sken#define MPI2_SAS_PHYINFO_REASON_MULTIPLEXING_SEQ (0x00050000) 1662212420Sken#define MPI2_SAS_PHYINFO_REASON_IT_NEXUS_LOSS_TIMER (0x00060000) 1663212420Sken#define MPI2_SAS_PHYINFO_REASON_BREAK_TIMEOUT (0x00070000) 1664212420Sken#define MPI2_SAS_PHYINFO_REASON_PHY_TEST_STOPPED (0x00080000) 1665212420Sken 1666212420Sken#define MPI2_SAS_PHYINFO_MULTIPLEXING_SUPPORTED (0x00008000) 1667212420Sken#define MPI2_SAS_PHYINFO_SATA_PORT_ACTIVE (0x00004000) 1668212420Sken#define MPI2_SAS_PHYINFO_SATA_PORT_SELECTOR_PRESENT (0x00002000) 1669212420Sken#define MPI2_SAS_PHYINFO_VIRTUAL_PHY (0x00001000) 1670212420Sken 1671212420Sken#define MPI2_SAS_PHYINFO_MASK_PARTIAL_PATHWAY_TIME (0x00000F00) 1672212420Sken#define MPI2_SAS_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME (8) 1673212420Sken 1674212420Sken#define MPI2_SAS_PHYINFO_MASK_ROUTING_ATTRIBUTE (0x000000F0) 1675212420Sken#define MPI2_SAS_PHYINFO_DIRECT_ROUTING (0x00000000) 1676212420Sken#define MPI2_SAS_PHYINFO_SUBTRACTIVE_ROUTING (0x00000010) 1677212420Sken#define MPI2_SAS_PHYINFO_TABLE_ROUTING (0x00000020) 1678212420Sken 1679212420Sken 1680212420Sken/* values for SAS ProgrammedLinkRate fields */ 1681212420Sken#define MPI2_SAS_PRATE_MAX_RATE_MASK (0xF0) 1682212420Sken#define MPI2_SAS_PRATE_MAX_RATE_NOT_PROGRAMMABLE (0x00) 1683212420Sken#define MPI2_SAS_PRATE_MAX_RATE_1_5 (0x80) 1684212420Sken#define MPI2_SAS_PRATE_MAX_RATE_3_0 (0x90) 1685212420Sken#define MPI2_SAS_PRATE_MAX_RATE_6_0 (0xA0) 1686212420Sken#define MPI2_SAS_PRATE_MIN_RATE_MASK (0x0F) 1687212420Sken#define MPI2_SAS_PRATE_MIN_RATE_NOT_PROGRAMMABLE (0x00) 1688212420Sken#define MPI2_SAS_PRATE_MIN_RATE_1_5 (0x08) 1689212420Sken#define MPI2_SAS_PRATE_MIN_RATE_3_0 (0x09) 1690212420Sken#define MPI2_SAS_PRATE_MIN_RATE_6_0 (0x0A) 1691212420Sken 1692212420Sken 1693212420Sken/* values for SAS HwLinkRate fields */ 1694212420Sken#define MPI2_SAS_HWRATE_MAX_RATE_MASK (0xF0) 1695212420Sken#define MPI2_SAS_HWRATE_MAX_RATE_1_5 (0x80) 1696212420Sken#define MPI2_SAS_HWRATE_MAX_RATE_3_0 (0x90) 1697212420Sken#define MPI2_SAS_HWRATE_MAX_RATE_6_0 (0xA0) 1698212420Sken#define MPI2_SAS_HWRATE_MIN_RATE_MASK (0x0F) 1699212420Sken#define MPI2_SAS_HWRATE_MIN_RATE_1_5 (0x08) 1700212420Sken#define MPI2_SAS_HWRATE_MIN_RATE_3_0 (0x09) 1701212420Sken#define MPI2_SAS_HWRATE_MIN_RATE_6_0 (0x0A) 1702212420Sken 1703212420Sken 1704212420Sken 1705212420Sken/**************************************************************************** 1706212420Sken* SAS IO Unit Config Pages 1707212420Sken****************************************************************************/ 1708212420Sken 1709212420Sken/* SAS IO Unit Page 0 */ 1710212420Sken 1711212420Skentypedef struct _MPI2_SAS_IO_UNIT0_PHY_DATA 1712212420Sken{ 1713212420Sken U8 Port; /* 0x00 */ 1714212420Sken U8 PortFlags; /* 0x01 */ 1715212420Sken U8 PhyFlags; /* 0x02 */ 1716212420Sken U8 NegotiatedLinkRate; /* 0x03 */ 1717212420Sken U32 ControllerPhyDeviceInfo;/* 0x04 */ 1718212420Sken U16 AttachedDevHandle; /* 0x08 */ 1719212420Sken U16 ControllerDevHandle; /* 0x0A */ 1720212420Sken U32 DiscoveryStatus; /* 0x0C */ 1721212420Sken U32 Reserved; /* 0x10 */ 1722212420Sken} MPI2_SAS_IO_UNIT0_PHY_DATA, MPI2_POINTER PTR_MPI2_SAS_IO_UNIT0_PHY_DATA, 1723212420Sken Mpi2SasIOUnit0PhyData_t, MPI2_POINTER pMpi2SasIOUnit0PhyData_t; 1724212420Sken 1725212420Sken/* 1726212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1727230920Sken * one and check the value returned for NumPhys at runtime. 1728212420Sken */ 1729212420Sken#ifndef MPI2_SAS_IOUNIT0_PHY_MAX 1730212420Sken#define MPI2_SAS_IOUNIT0_PHY_MAX (1) 1731212420Sken#endif 1732212420Sken 1733212420Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_0 1734212420Sken{ 1735212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 1736212420Sken U32 Reserved1; /* 0x08 */ 1737212420Sken U8 NumPhys; /* 0x0C */ 1738212420Sken U8 Reserved2; /* 0x0D */ 1739212420Sken U16 Reserved3; /* 0x0E */ 1740212420Sken MPI2_SAS_IO_UNIT0_PHY_DATA PhyData[MPI2_SAS_IOUNIT0_PHY_MAX]; /* 0x10 */ 1741212420Sken} MPI2_CONFIG_PAGE_SASIOUNIT_0, 1742212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_0, 1743212420Sken Mpi2SasIOUnitPage0_t, MPI2_POINTER pMpi2SasIOUnitPage0_t; 1744212420Sken 1745212420Sken#define MPI2_SASIOUNITPAGE0_PAGEVERSION (0x05) 1746212420Sken 1747212420Sken/* values for SAS IO Unit Page 0 PortFlags */ 1748212420Sken#define MPI2_SASIOUNIT0_PORTFLAGS_DISCOVERY_IN_PROGRESS (0x08) 1749212420Sken#define MPI2_SASIOUNIT0_PORTFLAGS_AUTO_PORT_CONFIG (0x01) 1750212420Sken 1751212420Sken/* values for SAS IO Unit Page 0 PhyFlags */ 1752212420Sken#define MPI2_SASIOUNIT0_PHYFLAGS_ZONING_ENABLED (0x10) 1753212420Sken#define MPI2_SASIOUNIT0_PHYFLAGS_PHY_DISABLED (0x08) 1754212420Sken 1755212420Sken/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ 1756212420Sken 1757212420Sken/* see mpi2_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */ 1758212420Sken 1759212420Sken/* values for SAS IO Unit Page 0 DiscoveryStatus */ 1760212420Sken#define MPI2_SASIOUNIT0_DS_MAX_ENCLOSURES_EXCEED (0x80000000) 1761212420Sken#define MPI2_SASIOUNIT0_DS_MAX_EXPANDERS_EXCEED (0x40000000) 1762212420Sken#define MPI2_SASIOUNIT0_DS_MAX_DEVICES_EXCEED (0x20000000) 1763212420Sken#define MPI2_SASIOUNIT0_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) 1764212420Sken#define MPI2_SASIOUNIT0_DS_DOWNSTREAM_INITIATOR (0x08000000) 1765212420Sken#define MPI2_SASIOUNIT0_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) 1766212420Sken#define MPI2_SASIOUNIT0_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) 1767212420Sken#define MPI2_SASIOUNIT0_DS_MULTI_PORT_DOMAIN (0x00002000) 1768212420Sken#define MPI2_SASIOUNIT0_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) 1769212420Sken#define MPI2_SASIOUNIT0_DS_UNSUPPORTED_DEVICE (0x00000800) 1770212420Sken#define MPI2_SASIOUNIT0_DS_TABLE_LINK (0x00000400) 1771212420Sken#define MPI2_SASIOUNIT0_DS_SUBTRACTIVE_LINK (0x00000200) 1772212420Sken#define MPI2_SASIOUNIT0_DS_SMP_CRC_ERROR (0x00000100) 1773212420Sken#define MPI2_SASIOUNIT0_DS_SMP_FUNCTION_FAILED (0x00000080) 1774212420Sken#define MPI2_SASIOUNIT0_DS_INDEX_NOT_EXIST (0x00000040) 1775212420Sken#define MPI2_SASIOUNIT0_DS_OUT_ROUTE_ENTRIES (0x00000020) 1776212420Sken#define MPI2_SASIOUNIT0_DS_SMP_TIMEOUT (0x00000010) 1777212420Sken#define MPI2_SASIOUNIT0_DS_MULTIPLE_PORTS (0x00000004) 1778212420Sken#define MPI2_SASIOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002) 1779212420Sken#define MPI2_SASIOUNIT0_DS_LOOP_DETECTED (0x00000001) 1780212420Sken 1781212420Sken 1782212420Sken/* SAS IO Unit Page 1 */ 1783212420Sken 1784212420Skentypedef struct _MPI2_SAS_IO_UNIT1_PHY_DATA 1785212420Sken{ 1786212420Sken U8 Port; /* 0x00 */ 1787212420Sken U8 PortFlags; /* 0x01 */ 1788212420Sken U8 PhyFlags; /* 0x02 */ 1789212420Sken U8 MaxMinLinkRate; /* 0x03 */ 1790212420Sken U32 ControllerPhyDeviceInfo; /* 0x04 */ 1791212420Sken U16 MaxTargetPortConnectTime; /* 0x08 */ 1792212420Sken U16 Reserved1; /* 0x0A */ 1793212420Sken} MPI2_SAS_IO_UNIT1_PHY_DATA, MPI2_POINTER PTR_MPI2_SAS_IO_UNIT1_PHY_DATA, 1794212420Sken Mpi2SasIOUnit1PhyData_t, MPI2_POINTER pMpi2SasIOUnit1PhyData_t; 1795212420Sken 1796212420Sken/* 1797212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1798230920Sken * one and check the value returned for NumPhys at runtime. 1799212420Sken */ 1800212420Sken#ifndef MPI2_SAS_IOUNIT1_PHY_MAX 1801212420Sken#define MPI2_SAS_IOUNIT1_PHY_MAX (1) 1802212420Sken#endif 1803212420Sken 1804212420Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 1805212420Sken{ 1806212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 1807212420Sken U16 ControlFlags; /* 0x08 */ 1808212420Sken U16 SASNarrowMaxQueueDepth; /* 0x0A */ 1809212420Sken U16 AdditionalControlFlags; /* 0x0C */ 1810212420Sken U16 SASWideMaxQueueDepth; /* 0x0E */ 1811212420Sken U8 NumPhys; /* 0x10 */ 1812212420Sken U8 SATAMaxQDepth; /* 0x11 */ 1813212420Sken U8 ReportDeviceMissingDelay; /* 0x12 */ 1814212420Sken U8 IODeviceMissingDelay; /* 0x13 */ 1815212420Sken MPI2_SAS_IO_UNIT1_PHY_DATA PhyData[MPI2_SAS_IOUNIT1_PHY_MAX]; /* 0x14 */ 1816212420Sken} MPI2_CONFIG_PAGE_SASIOUNIT_1, 1817212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_1, 1818212420Sken Mpi2SasIOUnitPage1_t, MPI2_POINTER pMpi2SasIOUnitPage1_t; 1819212420Sken 1820212420Sken#define MPI2_SASIOUNITPAGE1_PAGEVERSION (0x09) 1821212420Sken 1822212420Sken/* values for SAS IO Unit Page 1 ControlFlags */ 1823212420Sken#define MPI2_SASIOUNIT1_CONTROL_DEVICE_SELF_TEST (0x8000) 1824212420Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_3_0_MAX (0x4000) 1825212420Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_1_5_MAX (0x2000) 1826212420Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_SW_PRESERVE (0x1000) 1827212420Sken 1828212420Sken#define MPI2_SASIOUNIT1_CONTROL_MASK_DEV_SUPPORT (0x0600) 1829212420Sken#define MPI2_SASIOUNIT1_CONTROL_SHIFT_DEV_SUPPORT (9) 1830212420Sken#define MPI2_SASIOUNIT1_CONTROL_DEV_SUPPORT_BOTH (0x0) 1831212420Sken#define MPI2_SASIOUNIT1_CONTROL_DEV_SAS_SUPPORT (0x1) 1832212420Sken#define MPI2_SASIOUNIT1_CONTROL_DEV_SATA_SUPPORT (0x2) 1833212420Sken 1834212420Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_48BIT_LBA_REQUIRED (0x0080) 1835212420Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED (0x0040) 1836212420Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED (0x0020) 1837212420Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED (0x0010) 1838212420Sken#define MPI2_SASIOUNIT1_CONTROL_TABLE_SUBTRACTIVE_ILLEGAL (0x0008) 1839212420Sken#define MPI2_SASIOUNIT1_CONTROL_SUBTRACTIVE_ILLEGAL (0x0004) 1840212420Sken#define MPI2_SASIOUNIT1_CONTROL_FIRST_LVL_DISC_ONLY (0x0002) 1841212420Sken#define MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001) 1842212420Sken 1843212420Sken/* values for SAS IO Unit Page 1 AdditionalControlFlags */ 1844212420Sken#define MPI2_SASIOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL (0x0080) 1845212420Sken#define MPI2_SASIOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION (0x0040) 1846212420Sken#define MPI2_SASIOUNIT1_ACONTROL_INVALID_TOPOLOGY_CORRECTION (0x0020) 1847212420Sken#define MPI2_SASIOUNIT1_ACONTROL_PORT_ENABLE_ONLY_SATA_LINK_RESET (0x0010) 1848212420Sken#define MPI2_SASIOUNIT1_ACONTROL_OTHER_AFFILIATION_SATA_LINK_RESET (0x0008) 1849212420Sken#define MPI2_SASIOUNIT1_ACONTROL_SELF_AFFILIATION_SATA_LINK_RESET (0x0004) 1850212420Sken#define MPI2_SASIOUNIT1_ACONTROL_NO_AFFILIATION_SATA_LINK_RESET (0x0002) 1851212420Sken#define MPI2_SASIOUNIT1_ACONTROL_ALLOW_TABLE_TO_TABLE (0x0001) 1852212420Sken 1853212420Sken/* defines for SAS IO Unit Page 1 ReportDeviceMissingDelay */ 1854212420Sken#define MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK (0x7F) 1855212420Sken#define MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16 (0x80) 1856212420Sken 1857212420Sken/* values for SAS IO Unit Page 1 PortFlags */ 1858212420Sken#define MPI2_SASIOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01) 1859212420Sken 1860212420Sken/* values for SAS IO Unit Page 1 PhyFlags */ 1861212420Sken#define MPI2_SASIOUNIT1_PHYFLAGS_ZONING_ENABLE (0x10) 1862212420Sken#define MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE (0x08) 1863212420Sken 1864212420Sken/* values for SAS IO Unit Page 1 MaxMinLinkRate */ 1865212420Sken#define MPI2_SASIOUNIT1_MAX_RATE_MASK (0xF0) 1866212420Sken#define MPI2_SASIOUNIT1_MAX_RATE_1_5 (0x80) 1867212420Sken#define MPI2_SASIOUNIT1_MAX_RATE_3_0 (0x90) 1868212420Sken#define MPI2_SASIOUNIT1_MAX_RATE_6_0 (0xA0) 1869212420Sken#define MPI2_SASIOUNIT1_MIN_RATE_MASK (0x0F) 1870212420Sken#define MPI2_SASIOUNIT1_MIN_RATE_1_5 (0x08) 1871212420Sken#define MPI2_SASIOUNIT1_MIN_RATE_3_0 (0x09) 1872212420Sken#define MPI2_SASIOUNIT1_MIN_RATE_6_0 (0x0A) 1873212420Sken 1874212420Sken/* see mpi2_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */ 1875212420Sken 1876212420Sken 1877212420Sken/* SAS IO Unit Page 4 */ 1878212420Sken 1879212420Skentypedef struct _MPI2_SAS_IOUNIT4_SPINUP_GROUP 1880212420Sken{ 1881212420Sken U8 MaxTargetSpinup; /* 0x00 */ 1882212420Sken U8 SpinupDelay; /* 0x01 */ 1883212420Sken U16 Reserved1; /* 0x02 */ 1884212420Sken} MPI2_SAS_IOUNIT4_SPINUP_GROUP, MPI2_POINTER PTR_MPI2_SAS_IOUNIT4_SPINUP_GROUP, 1885212420Sken Mpi2SasIOUnit4SpinupGroup_t, MPI2_POINTER pMpi2SasIOUnit4SpinupGroup_t; 1886212420Sken 1887212420Sken/* 1888212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1889230920Sken * one and check the value returned for NumPhys at runtime. 1890212420Sken */ 1891212420Sken#ifndef MPI2_SAS_IOUNIT4_PHY_MAX 1892212420Sken#define MPI2_SAS_IOUNIT4_PHY_MAX (4) 1893212420Sken#endif 1894212420Sken 1895212420Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_4 1896212420Sken{ 1897212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 1898212420Sken MPI2_SAS_IOUNIT4_SPINUP_GROUP SpinupGroupParameters[4]; /* 0x08 */ 1899212420Sken U32 Reserved1; /* 0x18 */ 1900212420Sken U32 Reserved2; /* 0x1C */ 1901212420Sken U32 Reserved3; /* 0x20 */ 1902212420Sken U8 BootDeviceWaitTime; /* 0x24 */ 1903212420Sken U8 Reserved4; /* 0x25 */ 1904212420Sken U16 Reserved5; /* 0x26 */ 1905212420Sken U8 NumPhys; /* 0x28 */ 1906212420Sken U8 PEInitialSpinupDelay; /* 0x29 */ 1907212420Sken U8 PEReplyDelay; /* 0x2A */ 1908212420Sken U8 Flags; /* 0x2B */ 1909212420Sken U8 PHY[MPI2_SAS_IOUNIT4_PHY_MAX]; /* 0x2C */ 1910212420Sken} MPI2_CONFIG_PAGE_SASIOUNIT_4, 1911212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_4, 1912212420Sken Mpi2SasIOUnitPage4_t, MPI2_POINTER pMpi2SasIOUnitPage4_t; 1913212420Sken 1914212420Sken#define MPI2_SASIOUNITPAGE4_PAGEVERSION (0x02) 1915212420Sken 1916212420Sken/* defines for Flags field */ 1917212420Sken#define MPI2_SASIOUNIT4_FLAGS_AUTO_PORTENABLE (0x01) 1918212420Sken 1919212420Sken/* defines for PHY field */ 1920212420Sken#define MPI2_SASIOUNIT4_PHY_SPINUP_GROUP_MASK (0x03) 1921212420Sken 1922212420Sken 1923212420Sken/* SAS IO Unit Page 5 */ 1924212420Sken 1925212420Skentypedef struct _MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS 1926212420Sken{ 1927212420Sken U8 ControlFlags; /* 0x00 */ 1928230920Sken U8 PortWidthModGroup; /* 0x01 */ 1929212420Sken U16 InactivityTimerExponent; /* 0x02 */ 1930212420Sken U8 SATAPartialTimeout; /* 0x04 */ 1931212420Sken U8 Reserved2; /* 0x05 */ 1932212420Sken U8 SATASlumberTimeout; /* 0x06 */ 1933212420Sken U8 Reserved3; /* 0x07 */ 1934212420Sken U8 SASPartialTimeout; /* 0x08 */ 1935212420Sken U8 Reserved4; /* 0x09 */ 1936212420Sken U8 SASSlumberTimeout; /* 0x0A */ 1937212420Sken U8 Reserved5; /* 0x0B */ 1938212420Sken} MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS, 1939212420Sken MPI2_POINTER PTR_MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS, 1940212420Sken Mpi2SasIOUnit5PhyPmSettings_t, MPI2_POINTER pMpi2SasIOUnit5PhyPmSettings_t; 1941212420Sken 1942212420Sken/* defines for ControlFlags field */ 1943212420Sken#define MPI2_SASIOUNIT5_CONTROL_SAS_SLUMBER_ENABLE (0x08) 1944212420Sken#define MPI2_SASIOUNIT5_CONTROL_SAS_PARTIAL_ENABLE (0x04) 1945212420Sken#define MPI2_SASIOUNIT5_CONTROL_SATA_SLUMBER_ENABLE (0x02) 1946212420Sken#define MPI2_SASIOUNIT5_CONTROL_SATA_PARTIAL_ENABLE (0x01) 1947212420Sken 1948230920Sken/* defines for PortWidthModeGroup field */ 1949230920Sken#define MPI2_SASIOUNIT5_PWMG_DISABLE (0xFF) 1950230920Sken 1951212420Sken/* defines for InactivityTimerExponent field */ 1952212420Sken#define MPI2_SASIOUNIT5_ITE_MASK_SAS_SLUMBER (0x7000) 1953212420Sken#define MPI2_SASIOUNIT5_ITE_SHIFT_SAS_SLUMBER (12) 1954212420Sken#define MPI2_SASIOUNIT5_ITE_MASK_SAS_PARTIAL (0x0700) 1955212420Sken#define MPI2_SASIOUNIT5_ITE_SHIFT_SAS_PARTIAL (8) 1956212420Sken#define MPI2_SASIOUNIT5_ITE_MASK_SATA_SLUMBER (0x0070) 1957212420Sken#define MPI2_SASIOUNIT5_ITE_SHIFT_SATA_SLUMBER (4) 1958212420Sken#define MPI2_SASIOUNIT5_ITE_MASK_SATA_PARTIAL (0x0007) 1959212420Sken#define MPI2_SASIOUNIT5_ITE_SHIFT_SATA_PARTIAL (0) 1960212420Sken 1961212420Sken#define MPI2_SASIOUNIT5_ITE_TEN_SECONDS (7) 1962212420Sken#define MPI2_SASIOUNIT5_ITE_ONE_SECOND (6) 1963212420Sken#define MPI2_SASIOUNIT5_ITE_HUNDRED_MILLISECONDS (5) 1964212420Sken#define MPI2_SASIOUNIT5_ITE_TEN_MILLISECONDS (4) 1965212420Sken#define MPI2_SASIOUNIT5_ITE_ONE_MILLISECOND (3) 1966212420Sken#define MPI2_SASIOUNIT5_ITE_HUNDRED_MICROSECONDS (2) 1967212420Sken#define MPI2_SASIOUNIT5_ITE_TEN_MICROSECONDS (1) 1968212420Sken#define MPI2_SASIOUNIT5_ITE_ONE_MICROSECOND (0) 1969212420Sken 1970212420Sken/* 1971212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1972230920Sken * one and check the value returned for NumPhys at runtime. 1973212420Sken */ 1974212420Sken#ifndef MPI2_SAS_IOUNIT5_PHY_MAX 1975212420Sken#define MPI2_SAS_IOUNIT5_PHY_MAX (1) 1976212420Sken#endif 1977212420Sken 1978212420Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_5 1979212420Sken{ 1980212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 1981212420Sken U8 NumPhys; /* 0x08 */ 1982212420Sken U8 Reserved1; /* 0x09 */ 1983212420Sken U16 Reserved2; /* 0x0A */ 1984212420Sken U32 Reserved3; /* 0x0C */ 1985212420Sken MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS SASPhyPowerManagementSettings[MPI2_SAS_IOUNIT5_PHY_MAX]; /* 0x10 */ 1986212420Sken} MPI2_CONFIG_PAGE_SASIOUNIT_5, 1987212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_5, 1988212420Sken Mpi2SasIOUnitPage5_t, MPI2_POINTER pMpi2SasIOUnitPage5_t; 1989212420Sken 1990230920Sken#define MPI2_SASIOUNITPAGE5_PAGEVERSION (0x01) 1991212420Sken 1992212420Sken 1993230920Sken/* SAS IO Unit Page 6 */ 1994212420Sken 1995230920Skentypedef struct _MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS 1996230920Sken{ 1997230920Sken U8 CurrentStatus; /* 0x00 */ 1998230920Sken U8 CurrentModulation; /* 0x01 */ 1999230920Sken U8 CurrentUtilization; /* 0x02 */ 2000230920Sken U8 Reserved1; /* 0x03 */ 2001230920Sken U32 Reserved2; /* 0x04 */ 2002230920Sken} MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS, 2003230920Sken MPI2_POINTER PTR_MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS, 2004230920Sken Mpi2SasIOUnit6PortWidthModGroupStatus_t, 2005230920Sken MPI2_POINTER pMpi2SasIOUnit6PortWidthModGroupStatus_t; 2006212420Sken 2007230920Sken/* defines for CurrentStatus field */ 2008230920Sken#define MPI2_SASIOUNIT6_STATUS_UNAVAILABLE (0x00) 2009230920Sken#define MPI2_SASIOUNIT6_STATUS_UNCONFIGURED (0x01) 2010230920Sken#define MPI2_SASIOUNIT6_STATUS_INVALID_CONFIG (0x02) 2011230920Sken#define MPI2_SASIOUNIT6_STATUS_LINK_DOWN (0x03) 2012230920Sken#define MPI2_SASIOUNIT6_STATUS_OBSERVATION_ONLY (0x04) 2013230920Sken#define MPI2_SASIOUNIT6_STATUS_INACTIVE (0x05) 2014230920Sken#define MPI2_SASIOUNIT6_STATUS_ACTIVE_IOUNIT (0x06) 2015230920Sken#define MPI2_SASIOUNIT6_STATUS_ACTIVE_HOST (0x07) 2016230920Sken 2017230920Sken/* defines for CurrentModulation field */ 2018230920Sken#define MPI2_SASIOUNIT6_MODULATION_25_PERCENT (0x00) 2019230920Sken#define MPI2_SASIOUNIT6_MODULATION_50_PERCENT (0x01) 2020230920Sken#define MPI2_SASIOUNIT6_MODULATION_75_PERCENT (0x02) 2021230920Sken#define MPI2_SASIOUNIT6_MODULATION_100_PERCENT (0x03) 2022230920Sken 2023230920Sken/* 2024230920Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2025230920Sken * one and check the value returned for NumGroups at runtime. 2026230920Sken */ 2027230920Sken#ifndef MPI2_SAS_IOUNIT6_GROUP_MAX 2028230920Sken#define MPI2_SAS_IOUNIT6_GROUP_MAX (1) 2029230920Sken#endif 2030230920Sken 2031230920Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_6 2032230920Sken{ 2033230920Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2034230920Sken U32 Reserved1; /* 0x08 */ 2035230920Sken U32 Reserved2; /* 0x0C */ 2036230920Sken U8 NumGroups; /* 0x10 */ 2037230920Sken U8 Reserved3; /* 0x11 */ 2038230920Sken U16 Reserved4; /* 0x12 */ 2039230920Sken MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS 2040230920Sken PortWidthModulationGroupStatus[MPI2_SAS_IOUNIT6_GROUP_MAX]; /* 0x14 */ 2041230920Sken} MPI2_CONFIG_PAGE_SASIOUNIT_6, 2042230920Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_6, 2043230920Sken Mpi2SasIOUnitPage6_t, MPI2_POINTER pMpi2SasIOUnitPage6_t; 2044230920Sken 2045230920Sken#define MPI2_SASIOUNITPAGE6_PAGEVERSION (0x00) 2046230920Sken 2047230920Sken 2048230920Sken/* SAS IO Unit Page 7 */ 2049230920Sken 2050230920Skentypedef struct _MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS 2051230920Sken{ 2052230920Sken U8 Flags; /* 0x00 */ 2053230920Sken U8 Reserved1; /* 0x01 */ 2054230920Sken U16 Reserved2; /* 0x02 */ 2055230920Sken U8 Threshold75Pct; /* 0x04 */ 2056230920Sken U8 Threshold50Pct; /* 0x05 */ 2057230920Sken U8 Threshold25Pct; /* 0x06 */ 2058230920Sken U8 Reserved3; /* 0x07 */ 2059230920Sken} MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS, 2060230920Sken MPI2_POINTER PTR_MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS, 2061230920Sken Mpi2SasIOUnit7PortWidthModGroupSettings_t, 2062230920Sken MPI2_POINTER pMpi2SasIOUnit7PortWidthModGroupSettings_t; 2063230920Sken 2064230920Sken/* defines for Flags field */ 2065230920Sken#define MPI2_SASIOUNIT7_FLAGS_ENABLE_PORT_WIDTH_MODULATION (0x01) 2066230920Sken 2067230920Sken 2068230920Sken/* 2069230920Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2070230920Sken * one and check the value returned for NumGroups at runtime. 2071230920Sken */ 2072230920Sken#ifndef MPI2_SAS_IOUNIT7_GROUP_MAX 2073230920Sken#define MPI2_SAS_IOUNIT7_GROUP_MAX (1) 2074230920Sken#endif 2075230920Sken 2076230920Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_7 2077230920Sken{ 2078230920Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2079230920Sken U8 SamplingInterval; /* 0x08 */ 2080230920Sken U8 WindowLength; /* 0x09 */ 2081230920Sken U16 Reserved1; /* 0x0A */ 2082230920Sken U32 Reserved2; /* 0x0C */ 2083230920Sken U32 Reserved3; /* 0x10 */ 2084230920Sken U8 NumGroups; /* 0x14 */ 2085230920Sken U8 Reserved4; /* 0x15 */ 2086230920Sken U16 Reserved5; /* 0x16 */ 2087230920Sken MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS 2088230920Sken PortWidthModulationGroupSettings[MPI2_SAS_IOUNIT7_GROUP_MAX]; /* 0x18 */ 2089230920Sken} MPI2_CONFIG_PAGE_SASIOUNIT_7, 2090230920Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_7, 2091230920Sken Mpi2SasIOUnitPage7_t, MPI2_POINTER pMpi2SasIOUnitPage7_t; 2092230920Sken 2093230920Sken#define MPI2_SASIOUNITPAGE7_PAGEVERSION (0x00) 2094230920Sken 2095230920Sken 2096230920Sken/* SAS IO Unit Page 8 */ 2097230920Sken 2098230920Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_8 2099230920Sken{ 2100230920Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2101230920Sken U32 Reserved1; /* 0x08 */ 2102230920Sken U32 PowerManagementCapabilities; /* 0x0C */ 2103230920Sken U32 Reserved2; /* 0x10 */ 2104230920Sken} MPI2_CONFIG_PAGE_SASIOUNIT_8, 2105230920Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_8, 2106230920Sken Mpi2SasIOUnitPage8_t, MPI2_POINTER pMpi2SasIOUnitPage8_t; 2107230920Sken 2108230920Sken#define MPI2_SASIOUNITPAGE8_PAGEVERSION (0x00) 2109230920Sken 2110230920Sken/* defines for PowerManagementCapabilities field */ 2111230920Sken#define MPI2_SASIOUNIT8_PM_HOST_PORT_WIDTH_MOD (0x000001000) 2112230920Sken#define MPI2_SASIOUNIT8_PM_HOST_SAS_SLUMBER_MODE (0x000000800) 2113230920Sken#define MPI2_SASIOUNIT8_PM_HOST_SAS_PARTIAL_MODE (0x000000400) 2114230920Sken#define MPI2_SASIOUNIT8_PM_HOST_SATA_SLUMBER_MODE (0x000000200) 2115230920Sken#define MPI2_SASIOUNIT8_PM_HOST_SATA_PARTIAL_MODE (0x000000100) 2116230920Sken#define MPI2_SASIOUNIT8_PM_IOUNIT_PORT_WIDTH_MOD (0x000000010) 2117230920Sken#define MPI2_SASIOUNIT8_PM_IOUNIT_SAS_SLUMBER_MODE (0x000000008) 2118230920Sken#define MPI2_SASIOUNIT8_PM_IOUNIT_SAS_PARTIAL_MODE (0x000000004) 2119230920Sken#define MPI2_SASIOUNIT8_PM_IOUNIT_SATA_SLUMBER_MODE (0x000000002) 2120230920Sken#define MPI2_SASIOUNIT8_PM_IOUNIT_SATA_PARTIAL_MODE (0x000000001) 2121230920Sken 2122230920Sken 2123230920Sken 2124230920Sken 2125212420Sken/**************************************************************************** 2126212420Sken* SAS Expander Config Pages 2127212420Sken****************************************************************************/ 2128212420Sken 2129212420Sken/* SAS Expander Page 0 */ 2130212420Sken 2131212420Skentypedef struct _MPI2_CONFIG_PAGE_EXPANDER_0 2132212420Sken{ 2133212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2134212420Sken U8 PhysicalPort; /* 0x08 */ 2135212420Sken U8 ReportGenLength; /* 0x09 */ 2136212420Sken U16 EnclosureHandle; /* 0x0A */ 2137212420Sken U64 SASAddress; /* 0x0C */ 2138212420Sken U32 DiscoveryStatus; /* 0x14 */ 2139212420Sken U16 DevHandle; /* 0x18 */ 2140212420Sken U16 ParentDevHandle; /* 0x1A */ 2141212420Sken U16 ExpanderChangeCount; /* 0x1C */ 2142212420Sken U16 ExpanderRouteIndexes; /* 0x1E */ 2143212420Sken U8 NumPhys; /* 0x20 */ 2144212420Sken U8 SASLevel; /* 0x21 */ 2145212420Sken U16 Flags; /* 0x22 */ 2146212420Sken U16 STPBusInactivityTimeLimit; /* 0x24 */ 2147212420Sken U16 STPMaxConnectTimeLimit; /* 0x26 */ 2148212420Sken U16 STP_SMP_NexusLossTime; /* 0x28 */ 2149212420Sken U16 MaxNumRoutedSasAddresses; /* 0x2A */ 2150212420Sken U64 ActiveZoneManagerSASAddress;/* 0x2C */ 2151212420Sken U16 ZoneLockInactivityLimit; /* 0x34 */ 2152212420Sken U16 Reserved1; /* 0x36 */ 2153212420Sken U8 TimeToReducedFunc; /* 0x38 */ 2154212420Sken U8 InitialTimeToReducedFunc; /* 0x39 */ 2155212420Sken U8 MaxReducedFuncTime; /* 0x3A */ 2156212420Sken U8 Reserved2; /* 0x3B */ 2157212420Sken} MPI2_CONFIG_PAGE_EXPANDER_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXPANDER_0, 2158212420Sken Mpi2ExpanderPage0_t, MPI2_POINTER pMpi2ExpanderPage0_t; 2159212420Sken 2160212420Sken#define MPI2_SASEXPANDER0_PAGEVERSION (0x06) 2161212420Sken 2162212420Sken/* values for SAS Expander Page 0 DiscoveryStatus field */ 2163212420Sken#define MPI2_SAS_EXPANDER0_DS_MAX_ENCLOSURES_EXCEED (0x80000000) 2164212420Sken#define MPI2_SAS_EXPANDER0_DS_MAX_EXPANDERS_EXCEED (0x40000000) 2165212420Sken#define MPI2_SAS_EXPANDER0_DS_MAX_DEVICES_EXCEED (0x20000000) 2166212420Sken#define MPI2_SAS_EXPANDER0_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) 2167212420Sken#define MPI2_SAS_EXPANDER0_DS_DOWNSTREAM_INITIATOR (0x08000000) 2168212420Sken#define MPI2_SAS_EXPANDER0_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) 2169212420Sken#define MPI2_SAS_EXPANDER0_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) 2170212420Sken#define MPI2_SAS_EXPANDER0_DS_MULTI_PORT_DOMAIN (0x00002000) 2171212420Sken#define MPI2_SAS_EXPANDER0_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) 2172212420Sken#define MPI2_SAS_EXPANDER0_DS_UNSUPPORTED_DEVICE (0x00000800) 2173212420Sken#define MPI2_SAS_EXPANDER0_DS_TABLE_LINK (0x00000400) 2174212420Sken#define MPI2_SAS_EXPANDER0_DS_SUBTRACTIVE_LINK (0x00000200) 2175212420Sken#define MPI2_SAS_EXPANDER0_DS_SMP_CRC_ERROR (0x00000100) 2176212420Sken#define MPI2_SAS_EXPANDER0_DS_SMP_FUNCTION_FAILED (0x00000080) 2177212420Sken#define MPI2_SAS_EXPANDER0_DS_INDEX_NOT_EXIST (0x00000040) 2178212420Sken#define MPI2_SAS_EXPANDER0_DS_OUT_ROUTE_ENTRIES (0x00000020) 2179212420Sken#define MPI2_SAS_EXPANDER0_DS_SMP_TIMEOUT (0x00000010) 2180212420Sken#define MPI2_SAS_EXPANDER0_DS_MULTIPLE_PORTS (0x00000004) 2181212420Sken#define MPI2_SAS_EXPANDER0_DS_UNADDRESSABLE_DEVICE (0x00000002) 2182212420Sken#define MPI2_SAS_EXPANDER0_DS_LOOP_DETECTED (0x00000001) 2183212420Sken 2184212420Sken/* values for SAS Expander Page 0 Flags field */ 2185212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_REDUCED_FUNCTIONALITY (0x2000) 2186212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_ZONE_LOCKED (0x1000) 2187212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_SUPPORTED_PHYSICAL_PRES (0x0800) 2188212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_ASSERTED_PHYSICAL_PRES (0x0400) 2189212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_ZONING_SUPPORT (0x0200) 2190212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_ENABLED_ZONING (0x0100) 2191212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_TABLE_TO_TABLE_SUPPORT (0x0080) 2192212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE (0x0010) 2193212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_OTHERS_CONFIG (0x0004) 2194212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x0002) 2195212420Sken#define MPI2_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x0001) 2196212420Sken 2197212420Sken 2198212420Sken/* SAS Expander Page 1 */ 2199212420Sken 2200212420Skentypedef struct _MPI2_CONFIG_PAGE_EXPANDER_1 2201212420Sken{ 2202212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2203212420Sken U8 PhysicalPort; /* 0x08 */ 2204212420Sken U8 Reserved1; /* 0x09 */ 2205212420Sken U16 Reserved2; /* 0x0A */ 2206212420Sken U8 NumPhys; /* 0x0C */ 2207212420Sken U8 Phy; /* 0x0D */ 2208212420Sken U16 NumTableEntriesProgrammed; /* 0x0E */ 2209212420Sken U8 ProgrammedLinkRate; /* 0x10 */ 2210212420Sken U8 HwLinkRate; /* 0x11 */ 2211212420Sken U16 AttachedDevHandle; /* 0x12 */ 2212212420Sken U32 PhyInfo; /* 0x14 */ 2213212420Sken U32 AttachedDeviceInfo; /* 0x18 */ 2214212420Sken U16 ExpanderDevHandle; /* 0x1C */ 2215212420Sken U8 ChangeCount; /* 0x1E */ 2216212420Sken U8 NegotiatedLinkRate; /* 0x1F */ 2217212420Sken U8 PhyIdentifier; /* 0x20 */ 2218212420Sken U8 AttachedPhyIdentifier; /* 0x21 */ 2219212420Sken U8 Reserved3; /* 0x22 */ 2220212420Sken U8 DiscoveryInfo; /* 0x23 */ 2221212420Sken U32 AttachedPhyInfo; /* 0x24 */ 2222212420Sken U8 ZoneGroup; /* 0x28 */ 2223212420Sken U8 SelfConfigStatus; /* 0x29 */ 2224212420Sken U16 Reserved4; /* 0x2A */ 2225212420Sken} MPI2_CONFIG_PAGE_EXPANDER_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXPANDER_1, 2226212420Sken Mpi2ExpanderPage1_t, MPI2_POINTER pMpi2ExpanderPage1_t; 2227212420Sken 2228212420Sken#define MPI2_SASEXPANDER1_PAGEVERSION (0x02) 2229212420Sken 2230212420Sken/* use MPI2_SAS_PRATE_ defines for the ProgrammedLinkRate field */ 2231212420Sken 2232212420Sken/* use MPI2_SAS_HWRATE_ defines for the HwLinkRate field */ 2233212420Sken 2234212420Sken/* use MPI2_SAS_PHYINFO_ for the PhyInfo field */ 2235212420Sken 2236212420Sken/* see mpi2_sas.h for the MPI2_SAS_DEVICE_INFO_ defines used for the AttachedDeviceInfo field */ 2237212420Sken 2238212420Sken/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ 2239212420Sken 2240212420Sken/* use MPI2_SAS_APHYINFO_ defines for AttachedPhyInfo field */ 2241212420Sken 2242212420Sken/* values for SAS Expander Page 1 DiscoveryInfo field */ 2243212420Sken#define MPI2_SAS_EXPANDER1_DISCINFO_BAD_PHY_DISABLED (0x04) 2244212420Sken#define MPI2_SAS_EXPANDER1_DISCINFO_LINK_STATUS_CHANGE (0x02) 2245212420Sken#define MPI2_SAS_EXPANDER1_DISCINFO_NO_ROUTING_ENTRIES (0x01) 2246212420Sken 2247212420Sken 2248212420Sken/**************************************************************************** 2249212420Sken* SAS Device Config Pages 2250212420Sken****************************************************************************/ 2251212420Sken 2252212420Sken/* SAS Device Page 0 */ 2253212420Sken 2254212420Skentypedef struct _MPI2_CONFIG_PAGE_SAS_DEV_0 2255212420Sken{ 2256212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2257212420Sken U16 Slot; /* 0x08 */ 2258212420Sken U16 EnclosureHandle; /* 0x0A */ 2259212420Sken U64 SASAddress; /* 0x0C */ 2260212420Sken U16 ParentDevHandle; /* 0x14 */ 2261212420Sken U8 PhyNum; /* 0x16 */ 2262212420Sken U8 AccessStatus; /* 0x17 */ 2263212420Sken U16 DevHandle; /* 0x18 */ 2264212420Sken U8 AttachedPhyIdentifier; /* 0x1A */ 2265212420Sken U8 ZoneGroup; /* 0x1B */ 2266212420Sken U32 DeviceInfo; /* 0x1C */ 2267212420Sken U16 Flags; /* 0x20 */ 2268212420Sken U8 PhysicalPort; /* 0x22 */ 2269212420Sken U8 MaxPortConnections; /* 0x23 */ 2270212420Sken U64 DeviceName; /* 0x24 */ 2271212420Sken U8 PortGroups; /* 0x2C */ 2272212420Sken U8 DmaGroup; /* 0x2D */ 2273212420Sken U8 ControlGroup; /* 0x2E */ 2274212420Sken U8 Reserved1; /* 0x2F */ 2275212420Sken U32 Reserved2; /* 0x30 */ 2276212420Sken U32 Reserved3; /* 0x34 */ 2277212420Sken} MPI2_CONFIG_PAGE_SAS_DEV_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_DEV_0, 2278212420Sken Mpi2SasDevicePage0_t, MPI2_POINTER pMpi2SasDevicePage0_t; 2279212420Sken 2280212420Sken#define MPI2_SASDEVICE0_PAGEVERSION (0x08) 2281212420Sken 2282212420Sken/* values for SAS Device Page 0 AccessStatus field */ 2283212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00) 2284212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01) 2285212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02) 2286212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SATA_AFFILIATION_CONFLICT (0x03) 2287212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SATA_NEEDS_INITIALIZATION (0x04) 2288212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_ROUTE_NOT_ADDRESSABLE (0x05) 2289212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SMP_ERROR_NOT_ADDRESSABLE (0x06) 2290212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED (0x07) 2291212420Sken/* specific values for SATA Init failures */ 2292212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_UNKNOWN (0x10) 2293212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_AFFILIATION_CONFLICT (0x11) 2294212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_DIAG (0x12) 2295212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_IDENTIFICATION (0x13) 2296212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_CHECK_POWER (0x14) 2297212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_PIO_SN (0x15) 2298212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_MDMA_SN (0x16) 2299212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_UDMA_SN (0x17) 2300212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_ZONING_VIOLATION (0x18) 2301212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_NOT_ADDRESSABLE (0x19) 2302212420Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_MAX (0x1F) 2303212420Sken 2304212420Sken/* see mpi2_sas.h for values for SAS Device Page 0 DeviceInfo values */ 2305212420Sken 2306212420Sken/* values for SAS Device Page 0 Flags field */ 2307212420Sken#define MPI2_SAS_DEVICE0_FLAGS_SLUMBER_PM_CAPABLE (0x1000) 2308212420Sken#define MPI2_SAS_DEVICE0_FLAGS_PARTIAL_PM_CAPABLE (0x0800) 2309212420Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_ASYNCHRONOUS_NOTIFY (0x0400) 2310212420Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE (0x0200) 2311212420Sken#define MPI2_SAS_DEVICE0_FLAGS_UNSUPPORTED_DEVICE (0x0100) 2312212420Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_48BIT_LBA_SUPPORTED (0x0080) 2313212420Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_SMART_SUPPORTED (0x0040) 2314212420Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020) 2315212420Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010) 2316212420Sken#define MPI2_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008) 2317212420Sken#define MPI2_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001) 2318212420Sken 2319212420Sken 2320212420Sken/* SAS Device Page 1 */ 2321212420Sken 2322212420Skentypedef struct _MPI2_CONFIG_PAGE_SAS_DEV_1 2323212420Sken{ 2324212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2325212420Sken U32 Reserved1; /* 0x08 */ 2326212420Sken U64 SASAddress; /* 0x0C */ 2327212420Sken U32 Reserved2; /* 0x14 */ 2328212420Sken U16 DevHandle; /* 0x18 */ 2329212420Sken U16 Reserved3; /* 0x1A */ 2330212420Sken U8 InitialRegDeviceFIS[20];/* 0x1C */ 2331212420Sken} MPI2_CONFIG_PAGE_SAS_DEV_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_DEV_1, 2332212420Sken Mpi2SasDevicePage1_t, MPI2_POINTER pMpi2SasDevicePage1_t; 2333212420Sken 2334212420Sken#define MPI2_SASDEVICE1_PAGEVERSION (0x01) 2335212420Sken 2336212420Sken 2337212420Sken/**************************************************************************** 2338212420Sken* SAS PHY Config Pages 2339212420Sken****************************************************************************/ 2340212420Sken 2341212420Sken/* SAS PHY Page 0 */ 2342212420Sken 2343212420Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PHY_0 2344212420Sken{ 2345212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2346212420Sken U16 OwnerDevHandle; /* 0x08 */ 2347212420Sken U16 Reserved1; /* 0x0A */ 2348212420Sken U16 AttachedDevHandle; /* 0x0C */ 2349212420Sken U8 AttachedPhyIdentifier; /* 0x0E */ 2350212420Sken U8 Reserved2; /* 0x0F */ 2351212420Sken U32 AttachedPhyInfo; /* 0x10 */ 2352212420Sken U8 ProgrammedLinkRate; /* 0x14 */ 2353212420Sken U8 HwLinkRate; /* 0x15 */ 2354212420Sken U8 ChangeCount; /* 0x16 */ 2355212420Sken U8 Flags; /* 0x17 */ 2356212420Sken U32 PhyInfo; /* 0x18 */ 2357212420Sken U8 NegotiatedLinkRate; /* 0x1C */ 2358212420Sken U8 Reserved3; /* 0x1D */ 2359212420Sken U16 Reserved4; /* 0x1E */ 2360212420Sken} MPI2_CONFIG_PAGE_SAS_PHY_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_0, 2361212420Sken Mpi2SasPhyPage0_t, MPI2_POINTER pMpi2SasPhyPage0_t; 2362212420Sken 2363212420Sken#define MPI2_SASPHY0_PAGEVERSION (0x03) 2364212420Sken 2365212420Sken/* use MPI2_SAS_PRATE_ defines for the ProgrammedLinkRate field */ 2366212420Sken 2367212420Sken/* use MPI2_SAS_HWRATE_ defines for the HwLinkRate field */ 2368212420Sken 2369212420Sken/* values for SAS PHY Page 0 Flags field */ 2370212420Sken#define MPI2_SAS_PHY0_FLAGS_SGPIO_DIRECT_ATTACH_ENC (0x01) 2371212420Sken 2372212420Sken/* use MPI2_SAS_APHYINFO_ defines for AttachedPhyInfo field */ 2373212420Sken 2374212420Sken/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ 2375212420Sken 2376212420Sken/* use MPI2_SAS_PHYINFO_ for the PhyInfo field */ 2377212420Sken 2378212420Sken 2379212420Sken/* SAS PHY Page 1 */ 2380212420Sken 2381212420Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PHY_1 2382212420Sken{ 2383212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2384212420Sken U32 Reserved1; /* 0x08 */ 2385212420Sken U32 InvalidDwordCount; /* 0x0C */ 2386212420Sken U32 RunningDisparityErrorCount; /* 0x10 */ 2387212420Sken U32 LossDwordSynchCount; /* 0x14 */ 2388212420Sken U32 PhyResetProblemCount; /* 0x18 */ 2389212420Sken} MPI2_CONFIG_PAGE_SAS_PHY_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_1, 2390212420Sken Mpi2SasPhyPage1_t, MPI2_POINTER pMpi2SasPhyPage1_t; 2391212420Sken 2392212420Sken#define MPI2_SASPHY1_PAGEVERSION (0x01) 2393212420Sken 2394212420Sken 2395212420Sken/* SAS PHY Page 2 */ 2396212420Sken 2397212420Skentypedef struct _MPI2_SASPHY2_PHY_EVENT 2398212420Sken{ 2399212420Sken U8 PhyEventCode; /* 0x00 */ 2400212420Sken U8 Reserved1; /* 0x01 */ 2401212420Sken U16 Reserved2; /* 0x02 */ 2402212420Sken U32 PhyEventInfo; /* 0x04 */ 2403212420Sken} MPI2_SASPHY2_PHY_EVENT, MPI2_POINTER PTR_MPI2_SASPHY2_PHY_EVENT, 2404212420Sken Mpi2SasPhy2PhyEvent_t, MPI2_POINTER pMpi2SasPhy2PhyEvent_t; 2405212420Sken 2406212420Sken/* use MPI2_SASPHY3_EVENT_CODE_ for the PhyEventCode field */ 2407212420Sken 2408212420Sken 2409212420Sken/* 2410212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2411230920Sken * one and check the value returned for NumPhyEvents at runtime. 2412212420Sken */ 2413212420Sken#ifndef MPI2_SASPHY2_PHY_EVENT_MAX 2414212420Sken#define MPI2_SASPHY2_PHY_EVENT_MAX (1) 2415212420Sken#endif 2416212420Sken 2417212420Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PHY_2 2418212420Sken{ 2419212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2420212420Sken U32 Reserved1; /* 0x08 */ 2421212420Sken U8 NumPhyEvents; /* 0x0C */ 2422212420Sken U8 Reserved2; /* 0x0D */ 2423212420Sken U16 Reserved3; /* 0x0E */ 2424212420Sken MPI2_SASPHY2_PHY_EVENT PhyEvent[MPI2_SASPHY2_PHY_EVENT_MAX]; /* 0x10 */ 2425212420Sken} MPI2_CONFIG_PAGE_SAS_PHY_2, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_2, 2426212420Sken Mpi2SasPhyPage2_t, MPI2_POINTER pMpi2SasPhyPage2_t; 2427212420Sken 2428212420Sken#define MPI2_SASPHY2_PAGEVERSION (0x00) 2429212420Sken 2430212420Sken 2431212420Sken/* SAS PHY Page 3 */ 2432212420Sken 2433212420Skentypedef struct _MPI2_SASPHY3_PHY_EVENT_CONFIG 2434212420Sken{ 2435212420Sken U8 PhyEventCode; /* 0x00 */ 2436212420Sken U8 Reserved1; /* 0x01 */ 2437212420Sken U16 Reserved2; /* 0x02 */ 2438212420Sken U8 CounterType; /* 0x04 */ 2439212420Sken U8 ThresholdWindow; /* 0x05 */ 2440212420Sken U8 TimeUnits; /* 0x06 */ 2441212420Sken U8 Reserved3; /* 0x07 */ 2442212420Sken U32 EventThreshold; /* 0x08 */ 2443212420Sken U16 ThresholdFlags; /* 0x0C */ 2444212420Sken U16 Reserved4; /* 0x0E */ 2445212420Sken} MPI2_SASPHY3_PHY_EVENT_CONFIG, MPI2_POINTER PTR_MPI2_SASPHY3_PHY_EVENT_CONFIG, 2446212420Sken Mpi2SasPhy3PhyEventConfig_t, MPI2_POINTER pMpi2SasPhy3PhyEventConfig_t; 2447212420Sken 2448212420Sken/* values for PhyEventCode field */ 2449212420Sken#define MPI2_SASPHY3_EVENT_CODE_NO_EVENT (0x00) 2450212420Sken#define MPI2_SASPHY3_EVENT_CODE_INVALID_DWORD (0x01) 2451212420Sken#define MPI2_SASPHY3_EVENT_CODE_RUNNING_DISPARITY_ERROR (0x02) 2452212420Sken#define MPI2_SASPHY3_EVENT_CODE_LOSS_DWORD_SYNC (0x03) 2453212420Sken#define MPI2_SASPHY3_EVENT_CODE_PHY_RESET_PROBLEM (0x04) 2454212420Sken#define MPI2_SASPHY3_EVENT_CODE_ELASTICITY_BUF_OVERFLOW (0x05) 2455212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_ERROR (0x06) 2456212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_ADDR_FRAME_ERROR (0x20) 2457212420Sken#define MPI2_SASPHY3_EVENT_CODE_TX_AC_OPEN_REJECT (0x21) 2458212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_AC_OPEN_REJECT (0x22) 2459212420Sken#define MPI2_SASPHY3_EVENT_CODE_TX_RC_OPEN_REJECT (0x23) 2460212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_RC_OPEN_REJECT (0x24) 2461212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_AIP_PARTIAL_WAITING_ON (0x25) 2462212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_AIP_CONNECT_WAITING_ON (0x26) 2463212420Sken#define MPI2_SASPHY3_EVENT_CODE_TX_BREAK (0x27) 2464212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_BREAK (0x28) 2465212420Sken#define MPI2_SASPHY3_EVENT_CODE_BREAK_TIMEOUT (0x29) 2466212420Sken#define MPI2_SASPHY3_EVENT_CODE_CONNECTION (0x2A) 2467212420Sken#define MPI2_SASPHY3_EVENT_CODE_PEAKTX_PATHWAY_BLOCKED (0x2B) 2468212420Sken#define MPI2_SASPHY3_EVENT_CODE_PEAKTX_ARB_WAIT_TIME (0x2C) 2469212420Sken#define MPI2_SASPHY3_EVENT_CODE_PEAK_ARB_WAIT_TIME (0x2D) 2470212420Sken#define MPI2_SASPHY3_EVENT_CODE_PEAK_CONNECT_TIME (0x2E) 2471212420Sken#define MPI2_SASPHY3_EVENT_CODE_TX_SSP_FRAMES (0x40) 2472212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_SSP_FRAMES (0x41) 2473212420Sken#define MPI2_SASPHY3_EVENT_CODE_TX_SSP_ERROR_FRAMES (0x42) 2474212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_SSP_ERROR_FRAMES (0x43) 2475212420Sken#define MPI2_SASPHY3_EVENT_CODE_TX_CREDIT_BLOCKED (0x44) 2476212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_CREDIT_BLOCKED (0x45) 2477212420Sken#define MPI2_SASPHY3_EVENT_CODE_TX_SATA_FRAMES (0x50) 2478212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_SATA_FRAMES (0x51) 2479212420Sken#define MPI2_SASPHY3_EVENT_CODE_SATA_OVERFLOW (0x52) 2480212420Sken#define MPI2_SASPHY3_EVENT_CODE_TX_SMP_FRAMES (0x60) 2481212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_SMP_FRAMES (0x61) 2482212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_SMP_ERROR_FRAMES (0x63) 2483212420Sken#define MPI2_SASPHY3_EVENT_CODE_HOTPLUG_TIMEOUT (0xD0) 2484212420Sken#define MPI2_SASPHY3_EVENT_CODE_MISALIGNED_MUX_PRIMITIVE (0xD1) 2485212420Sken#define MPI2_SASPHY3_EVENT_CODE_RX_AIP (0xD2) 2486212420Sken 2487212420Sken/* values for the CounterType field */ 2488212420Sken#define MPI2_SASPHY3_COUNTER_TYPE_WRAPPING (0x00) 2489212420Sken#define MPI2_SASPHY3_COUNTER_TYPE_SATURATING (0x01) 2490212420Sken#define MPI2_SASPHY3_COUNTER_TYPE_PEAK_VALUE (0x02) 2491212420Sken 2492212420Sken/* values for the TimeUnits field */ 2493212420Sken#define MPI2_SASPHY3_TIME_UNITS_10_MICROSECONDS (0x00) 2494212420Sken#define MPI2_SASPHY3_TIME_UNITS_100_MICROSECONDS (0x01) 2495212420Sken#define MPI2_SASPHY3_TIME_UNITS_1_MILLISECOND (0x02) 2496212420Sken#define MPI2_SASPHY3_TIME_UNITS_10_MILLISECONDS (0x03) 2497212420Sken 2498212420Sken/* values for the ThresholdFlags field */ 2499212420Sken#define MPI2_SASPHY3_TFLAGS_PHY_RESET (0x0002) 2500212420Sken#define MPI2_SASPHY3_TFLAGS_EVENT_NOTIFY (0x0001) 2501212420Sken 2502212420Sken/* 2503212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2504230920Sken * one and check the value returned for NumPhyEvents at runtime. 2505212420Sken */ 2506212420Sken#ifndef MPI2_SASPHY3_PHY_EVENT_MAX 2507212420Sken#define MPI2_SASPHY3_PHY_EVENT_MAX (1) 2508212420Sken#endif 2509212420Sken 2510212420Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PHY_3 2511212420Sken{ 2512212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2513212420Sken U32 Reserved1; /* 0x08 */ 2514212420Sken U8 NumPhyEvents; /* 0x0C */ 2515212420Sken U8 Reserved2; /* 0x0D */ 2516212420Sken U16 Reserved3; /* 0x0E */ 2517212420Sken MPI2_SASPHY3_PHY_EVENT_CONFIG PhyEventConfig[MPI2_SASPHY3_PHY_EVENT_MAX]; /* 0x10 */ 2518212420Sken} MPI2_CONFIG_PAGE_SAS_PHY_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_3, 2519212420Sken Mpi2SasPhyPage3_t, MPI2_POINTER pMpi2SasPhyPage3_t; 2520212420Sken 2521212420Sken#define MPI2_SASPHY3_PAGEVERSION (0x00) 2522212420Sken 2523212420Sken 2524212420Sken/* SAS PHY Page 4 */ 2525212420Sken 2526212420Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PHY_4 2527212420Sken{ 2528212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2529212420Sken U16 Reserved1; /* 0x08 */ 2530212420Sken U8 Reserved2; /* 0x0A */ 2531212420Sken U8 Flags; /* 0x0B */ 2532212420Sken U8 InitialFrame[28]; /* 0x0C */ 2533212420Sken} MPI2_CONFIG_PAGE_SAS_PHY_4, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_4, 2534212420Sken Mpi2SasPhyPage4_t, MPI2_POINTER pMpi2SasPhyPage4_t; 2535212420Sken 2536212420Sken#define MPI2_SASPHY4_PAGEVERSION (0x00) 2537212420Sken 2538212420Sken/* values for the Flags field */ 2539212420Sken#define MPI2_SASPHY4_FLAGS_FRAME_VALID (0x02) 2540212420Sken#define MPI2_SASPHY4_FLAGS_SATA_FRAME (0x01) 2541212420Sken 2542212420Sken 2543212420Sken 2544212420Sken 2545212420Sken/**************************************************************************** 2546212420Sken* SAS Port Config Pages 2547212420Sken****************************************************************************/ 2548212420Sken 2549212420Sken/* SAS Port Page 0 */ 2550212420Sken 2551212420Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PORT_0 2552212420Sken{ 2553212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2554212420Sken U8 PortNumber; /* 0x08 */ 2555212420Sken U8 PhysicalPort; /* 0x09 */ 2556212420Sken U8 PortWidth; /* 0x0A */ 2557212420Sken U8 PhysicalPortWidth; /* 0x0B */ 2558212420Sken U8 ZoneGroup; /* 0x0C */ 2559212420Sken U8 Reserved1; /* 0x0D */ 2560212420Sken U16 Reserved2; /* 0x0E */ 2561212420Sken U64 SASAddress; /* 0x10 */ 2562212420Sken U32 DeviceInfo; /* 0x18 */ 2563212420Sken U32 Reserved3; /* 0x1C */ 2564212420Sken U32 Reserved4; /* 0x20 */ 2565212420Sken} MPI2_CONFIG_PAGE_SAS_PORT_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PORT_0, 2566212420Sken Mpi2SasPortPage0_t, MPI2_POINTER pMpi2SasPortPage0_t; 2567212420Sken 2568212420Sken#define MPI2_SASPORT0_PAGEVERSION (0x00) 2569212420Sken 2570212420Sken/* see mpi2_sas.h for values for SAS Port Page 0 DeviceInfo values */ 2571212420Sken 2572212420Sken 2573212420Sken/**************************************************************************** 2574212420Sken* SAS Enclosure Config Pages 2575212420Sken****************************************************************************/ 2576212420Sken 2577212420Sken/* SAS Enclosure Page 0 */ 2578212420Sken 2579212420Skentypedef struct _MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0 2580212420Sken{ 2581212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2582212420Sken U32 Reserved1; /* 0x08 */ 2583212420Sken U64 EnclosureLogicalID; /* 0x0C */ 2584212420Sken U16 Flags; /* 0x14 */ 2585212420Sken U16 EnclosureHandle; /* 0x16 */ 2586212420Sken U16 NumSlots; /* 0x18 */ 2587212420Sken U16 StartSlot; /* 0x1A */ 2588212420Sken U16 Reserved2; /* 0x1C */ 2589212420Sken U16 SEPDevHandle; /* 0x1E */ 2590212420Sken U32 Reserved3; /* 0x20 */ 2591212420Sken U32 Reserved4; /* 0x24 */ 2592212420Sken} MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0, 2593212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0, 2594212420Sken Mpi2SasEnclosurePage0_t, MPI2_POINTER pMpi2SasEnclosurePage0_t; 2595212420Sken 2596212420Sken#define MPI2_SASENCLOSURE0_PAGEVERSION (0x03) 2597212420Sken 2598212420Sken/* values for SAS Enclosure Page 0 Flags field */ 2599212420Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_MASK (0x000F) 2600212420Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_UNKNOWN (0x0000) 2601212420Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_SES (0x0001) 2602212420Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_SGPIO (0x0002) 2603212420Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_EXP_SGPIO (0x0003) 2604212420Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_SES_ENCLOSURE (0x0004) 2605212420Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_GPIO (0x0005) 2606212420Sken 2607212420Sken 2608212420Sken/**************************************************************************** 2609212420Sken* Log Config Page 2610212420Sken****************************************************************************/ 2611212420Sken 2612212420Sken/* Log Page 0 */ 2613212420Sken 2614212420Sken/* 2615212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2616230920Sken * one and check the value returned for NumLogEntries at runtime. 2617212420Sken */ 2618212420Sken#ifndef MPI2_LOG_0_NUM_LOG_ENTRIES 2619212420Sken#define MPI2_LOG_0_NUM_LOG_ENTRIES (1) 2620212420Sken#endif 2621212420Sken 2622212420Sken#define MPI2_LOG_0_LOG_DATA_LENGTH (0x1C) 2623212420Sken 2624212420Skentypedef struct _MPI2_LOG_0_ENTRY 2625212420Sken{ 2626212420Sken U64 TimeStamp; /* 0x00 */ 2627212420Sken U32 Reserved1; /* 0x08 */ 2628212420Sken U16 LogSequence; /* 0x0C */ 2629212420Sken U16 LogEntryQualifier; /* 0x0E */ 2630212420Sken U8 VP_ID; /* 0x10 */ 2631212420Sken U8 VF_ID; /* 0x11 */ 2632212420Sken U16 Reserved2; /* 0x12 */ 2633212420Sken U8 LogData[MPI2_LOG_0_LOG_DATA_LENGTH];/* 0x14 */ 2634212420Sken} MPI2_LOG_0_ENTRY, MPI2_POINTER PTR_MPI2_LOG_0_ENTRY, 2635212420Sken Mpi2Log0Entry_t, MPI2_POINTER pMpi2Log0Entry_t; 2636212420Sken 2637212420Sken/* values for Log Page 0 LogEntry LogEntryQualifier field */ 2638212420Sken#define MPI2_LOG_0_ENTRY_QUAL_ENTRY_UNUSED (0x0000) 2639212420Sken#define MPI2_LOG_0_ENTRY_QUAL_POWER_ON_RESET (0x0001) 2640212420Sken#define MPI2_LOG_0_ENTRY_QUAL_TIMESTAMP_UPDATE (0x0002) 2641212420Sken#define MPI2_LOG_0_ENTRY_QUAL_MIN_IMPLEMENT_SPEC (0x8000) 2642212420Sken#define MPI2_LOG_0_ENTRY_QUAL_MAX_IMPLEMENT_SPEC (0xFFFF) 2643212420Sken 2644212420Skentypedef struct _MPI2_CONFIG_PAGE_LOG_0 2645212420Sken{ 2646212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2647212420Sken U32 Reserved1; /* 0x08 */ 2648212420Sken U32 Reserved2; /* 0x0C */ 2649212420Sken U16 NumLogEntries; /* 0x10 */ 2650212420Sken U16 Reserved3; /* 0x12 */ 2651212420Sken MPI2_LOG_0_ENTRY LogEntry[MPI2_LOG_0_NUM_LOG_ENTRIES]; /* 0x14 */ 2652212420Sken} MPI2_CONFIG_PAGE_LOG_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_LOG_0, 2653212420Sken Mpi2LogPage0_t, MPI2_POINTER pMpi2LogPage0_t; 2654212420Sken 2655212420Sken#define MPI2_LOG_0_PAGEVERSION (0x02) 2656212420Sken 2657212420Sken 2658212420Sken/**************************************************************************** 2659212420Sken* RAID Config Page 2660212420Sken****************************************************************************/ 2661212420Sken 2662212420Sken/* RAID Page 0 */ 2663212420Sken 2664212420Sken/* 2665212420Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2666230920Sken * one and check the value returned for NumElements at runtime. 2667212420Sken */ 2668212420Sken#ifndef MPI2_RAIDCONFIG0_MAX_ELEMENTS 2669212420Sken#define MPI2_RAIDCONFIG0_MAX_ELEMENTS (1) 2670212420Sken#endif 2671212420Sken 2672212420Skentypedef struct _MPI2_RAIDCONFIG0_CONFIG_ELEMENT 2673212420Sken{ 2674212420Sken U16 ElementFlags; /* 0x00 */ 2675212420Sken U16 VolDevHandle; /* 0x02 */ 2676212420Sken U8 HotSparePool; /* 0x04 */ 2677212420Sken U8 PhysDiskNum; /* 0x05 */ 2678212420Sken U16 PhysDiskDevHandle; /* 0x06 */ 2679212420Sken} MPI2_RAIDCONFIG0_CONFIG_ELEMENT, 2680212420Sken MPI2_POINTER PTR_MPI2_RAIDCONFIG0_CONFIG_ELEMENT, 2681212420Sken Mpi2RaidConfig0ConfigElement_t, MPI2_POINTER pMpi2RaidConfig0ConfigElement_t; 2682212420Sken 2683212420Sken/* values for the ElementFlags field */ 2684212420Sken#define MPI2_RAIDCONFIG0_EFLAGS_MASK_ELEMENT_TYPE (0x000F) 2685212420Sken#define MPI2_RAIDCONFIG0_EFLAGS_VOLUME_ELEMENT (0x0000) 2686212420Sken#define MPI2_RAIDCONFIG0_EFLAGS_VOL_PHYS_DISK_ELEMENT (0x0001) 2687212420Sken#define MPI2_RAIDCONFIG0_EFLAGS_HOT_SPARE_ELEMENT (0x0002) 2688212420Sken#define MPI2_RAIDCONFIG0_EFLAGS_OCE_ELEMENT (0x0003) 2689212420Sken 2690212420Sken 2691212420Skentypedef struct _MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0 2692212420Sken{ 2693212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2694212420Sken U8 NumHotSpares; /* 0x08 */ 2695212420Sken U8 NumPhysDisks; /* 0x09 */ 2696212420Sken U8 NumVolumes; /* 0x0A */ 2697212420Sken U8 ConfigNum; /* 0x0B */ 2698212420Sken U32 Flags; /* 0x0C */ 2699212420Sken U8 ConfigGUID[24]; /* 0x10 */ 2700212420Sken U32 Reserved1; /* 0x28 */ 2701212420Sken U8 NumElements; /* 0x2C */ 2702212420Sken U8 Reserved2; /* 0x2D */ 2703212420Sken U16 Reserved3; /* 0x2E */ 2704212420Sken MPI2_RAIDCONFIG0_CONFIG_ELEMENT ConfigElement[MPI2_RAIDCONFIG0_MAX_ELEMENTS]; /* 0x30 */ 2705212420Sken} MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0, 2706212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0, 2707212420Sken Mpi2RaidConfigurationPage0_t, MPI2_POINTER pMpi2RaidConfigurationPage0_t; 2708212420Sken 2709212420Sken#define MPI2_RAIDCONFIG0_PAGEVERSION (0x00) 2710212420Sken 2711212420Sken/* values for RAID Configuration Page 0 Flags field */ 2712212420Sken#define MPI2_RAIDCONFIG0_FLAG_FOREIGN_CONFIG (0x00000001) 2713212420Sken 2714212420Sken 2715212420Sken/**************************************************************************** 2716212420Sken* Driver Persistent Mapping Config Pages 2717212420Sken****************************************************************************/ 2718212420Sken 2719212420Sken/* Driver Persistent Mapping Page 0 */ 2720212420Sken 2721212420Skentypedef struct _MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY 2722212420Sken{ 2723212420Sken U64 PhysicalIdentifier; /* 0x00 */ 2724212420Sken U16 MappingInformation; /* 0x08 */ 2725212420Sken U16 DeviceIndex; /* 0x0A */ 2726212420Sken U32 PhysicalBitsMapping; /* 0x0C */ 2727212420Sken U32 Reserved1; /* 0x10 */ 2728212420Sken} MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY, 2729212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY, 2730212420Sken Mpi2DriverMap0Entry_t, MPI2_POINTER pMpi2DriverMap0Entry_t; 2731212420Sken 2732212420Skentypedef struct _MPI2_CONFIG_PAGE_DRIVER_MAPPING_0 2733212420Sken{ 2734212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2735212420Sken MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY Entry; /* 0x08 */ 2736212420Sken} MPI2_CONFIG_PAGE_DRIVER_MAPPING_0, 2737212420Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_DRIVER_MAPPING_0, 2738212420Sken Mpi2DriverMappingPage0_t, MPI2_POINTER pMpi2DriverMappingPage0_t; 2739212420Sken 2740212420Sken#define MPI2_DRIVERMAPPING0_PAGEVERSION (0x00) 2741212420Sken 2742212420Sken/* values for Driver Persistent Mapping Page 0 MappingInformation field */ 2743212420Sken#define MPI2_DRVMAP0_MAPINFO_SLOT_MASK (0x07F0) 2744212420Sken#define MPI2_DRVMAP0_MAPINFO_SLOT_SHIFT (4) 2745212420Sken#define MPI2_DRVMAP0_MAPINFO_MISSING_MASK (0x000F) 2746212420Sken 2747212420Sken 2748212420Sken/**************************************************************************** 2749212420Sken* Ethernet Config Pages 2750212420Sken****************************************************************************/ 2751212420Sken 2752212420Sken/* Ethernet Page 0 */ 2753212420Sken 2754212420Sken/* IP address (union of IPv4 and IPv6) */ 2755212420Skentypedef union _MPI2_ETHERNET_IP_ADDR 2756212420Sken{ 2757212420Sken U32 IPv4Addr; 2758212420Sken U32 IPv6Addr[4]; 2759212420Sken} MPI2_ETHERNET_IP_ADDR, MPI2_POINTER PTR_MPI2_ETHERNET_IP_ADDR, 2760212420Sken Mpi2EthernetIpAddr_t, MPI2_POINTER pMpi2EthernetIpAddr_t; 2761212420Sken 2762212420Sken#define MPI2_ETHERNET_HOST_NAME_LENGTH (32) 2763212420Sken 2764212420Skentypedef struct _MPI2_CONFIG_PAGE_ETHERNET_0 2765212420Sken{ 2766212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2767212420Sken U8 NumInterfaces; /* 0x08 */ 2768212420Sken U8 Reserved0; /* 0x09 */ 2769212420Sken U16 Reserved1; /* 0x0A */ 2770212420Sken U32 Status; /* 0x0C */ 2771212420Sken U8 MediaState; /* 0x10 */ 2772212420Sken U8 Reserved2; /* 0x11 */ 2773212420Sken U16 Reserved3; /* 0x12 */ 2774212420Sken U8 MacAddress[6]; /* 0x14 */ 2775212420Sken U8 Reserved4; /* 0x1A */ 2776212420Sken U8 Reserved5; /* 0x1B */ 2777212420Sken MPI2_ETHERNET_IP_ADDR IpAddress; /* 0x1C */ 2778212420Sken MPI2_ETHERNET_IP_ADDR SubnetMask; /* 0x2C */ 2779212420Sken MPI2_ETHERNET_IP_ADDR GatewayIpAddress; /* 0x3C */ 2780212420Sken MPI2_ETHERNET_IP_ADDR DNS1IpAddress; /* 0x4C */ 2781212420Sken MPI2_ETHERNET_IP_ADDR DNS2IpAddress; /* 0x5C */ 2782212420Sken MPI2_ETHERNET_IP_ADDR DhcpIpAddress; /* 0x6C */ 2783212420Sken U8 HostName[MPI2_ETHERNET_HOST_NAME_LENGTH];/* 0x7C */ 2784212420Sken} MPI2_CONFIG_PAGE_ETHERNET_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_ETHERNET_0, 2785212420Sken Mpi2EthernetPage0_t, MPI2_POINTER pMpi2EthernetPage0_t; 2786212420Sken 2787212420Sken#define MPI2_ETHERNETPAGE0_PAGEVERSION (0x00) 2788212420Sken 2789212420Sken/* values for Ethernet Page 0 Status field */ 2790212420Sken#define MPI2_ETHPG0_STATUS_IPV6_CAPABLE (0x80000000) 2791212420Sken#define MPI2_ETHPG0_STATUS_IPV4_CAPABLE (0x40000000) 2792212420Sken#define MPI2_ETHPG0_STATUS_CONSOLE_CONNECTED (0x20000000) 2793212420Sken#define MPI2_ETHPG0_STATUS_DEFAULT_IF (0x00000100) 2794212420Sken#define MPI2_ETHPG0_STATUS_FW_DWNLD_ENABLED (0x00000080) 2795212420Sken#define MPI2_ETHPG0_STATUS_TELNET_ENABLED (0x00000040) 2796212420Sken#define MPI2_ETHPG0_STATUS_SSH2_ENABLED (0x00000020) 2797212420Sken#define MPI2_ETHPG0_STATUS_DHCP_CLIENT_ENABLED (0x00000010) 2798212420Sken#define MPI2_ETHPG0_STATUS_IPV6_ENABLED (0x00000008) 2799212420Sken#define MPI2_ETHPG0_STATUS_IPV4_ENABLED (0x00000004) 2800212420Sken#define MPI2_ETHPG0_STATUS_IPV6_ADDRESSES (0x00000002) 2801212420Sken#define MPI2_ETHPG0_STATUS_ETH_IF_ENABLED (0x00000001) 2802212420Sken 2803212420Sken/* values for Ethernet Page 0 MediaState field */ 2804212420Sken#define MPI2_ETHPG0_MS_DUPLEX_MASK (0x80) 2805212420Sken#define MPI2_ETHPG0_MS_HALF_DUPLEX (0x00) 2806212420Sken#define MPI2_ETHPG0_MS_FULL_DUPLEX (0x80) 2807212420Sken 2808212420Sken#define MPI2_ETHPG0_MS_CONNECT_SPEED_MASK (0x07) 2809212420Sken#define MPI2_ETHPG0_MS_NOT_CONNECTED (0x00) 2810212420Sken#define MPI2_ETHPG0_MS_10MBIT (0x01) 2811212420Sken#define MPI2_ETHPG0_MS_100MBIT (0x02) 2812212420Sken#define MPI2_ETHPG0_MS_1GBIT (0x03) 2813212420Sken 2814212420Sken 2815212420Sken/* Ethernet Page 1 */ 2816212420Sken 2817212420Skentypedef struct _MPI2_CONFIG_PAGE_ETHERNET_1 2818212420Sken{ 2819212420Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2820212420Sken U32 Reserved0; /* 0x08 */ 2821212420Sken U32 Flags; /* 0x0C */ 2822212420Sken U8 MediaState; /* 0x10 */ 2823212420Sken U8 Reserved1; /* 0x11 */ 2824212420Sken U16 Reserved2; /* 0x12 */ 2825212420Sken U8 MacAddress[6]; /* 0x14 */ 2826212420Sken U8 Reserved3; /* 0x1A */ 2827212420Sken U8 Reserved4; /* 0x1B */ 2828212420Sken MPI2_ETHERNET_IP_ADDR StaticIpAddress; /* 0x1C */ 2829212420Sken MPI2_ETHERNET_IP_ADDR StaticSubnetMask; /* 0x2C */ 2830212420Sken MPI2_ETHERNET_IP_ADDR StaticGatewayIpAddress; /* 0x3C */ 2831212420Sken MPI2_ETHERNET_IP_ADDR StaticDNS1IpAddress; /* 0x4C */ 2832212420Sken MPI2_ETHERNET_IP_ADDR StaticDNS2IpAddress; /* 0x5C */ 2833212420Sken U32 Reserved5; /* 0x6C */ 2834212420Sken U32 Reserved6; /* 0x70 */ 2835212420Sken U32 Reserved7; /* 0x74 */ 2836212420Sken U32 Reserved8; /* 0x78 */ 2837212420Sken U8 HostName[MPI2_ETHERNET_HOST_NAME_LENGTH];/* 0x7C */ 2838212420Sken} MPI2_CONFIG_PAGE_ETHERNET_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_ETHERNET_1, 2839212420Sken Mpi2EthernetPage1_t, MPI2_POINTER pMpi2EthernetPage1_t; 2840212420Sken 2841212420Sken#define MPI2_ETHERNETPAGE1_PAGEVERSION (0x00) 2842212420Sken 2843212420Sken/* values for Ethernet Page 1 Flags field */ 2844212420Sken#define MPI2_ETHPG1_FLAG_SET_DEFAULT_IF (0x00000100) 2845212420Sken#define MPI2_ETHPG1_FLAG_ENABLE_FW_DOWNLOAD (0x00000080) 2846212420Sken#define MPI2_ETHPG1_FLAG_ENABLE_TELNET (0x00000040) 2847212420Sken#define MPI2_ETHPG1_FLAG_ENABLE_SSH2 (0x00000020) 2848212420Sken#define MPI2_ETHPG1_FLAG_ENABLE_DHCP_CLIENT (0x00000010) 2849212420Sken#define MPI2_ETHPG1_FLAG_ENABLE_IPV6 (0x00000008) 2850212420Sken#define MPI2_ETHPG1_FLAG_ENABLE_IPV4 (0x00000004) 2851212420Sken#define MPI2_ETHPG1_FLAG_USE_IPV6_ADDRESSES (0x00000002) 2852212420Sken#define MPI2_ETHPG1_FLAG_ENABLE_ETH_IF (0x00000001) 2853212420Sken 2854212420Sken/* values for Ethernet Page 1 MediaState field */ 2855212420Sken#define MPI2_ETHPG1_MS_DUPLEX_MASK (0x80) 2856212420Sken#define MPI2_ETHPG1_MS_HALF_DUPLEX (0x00) 2857212420Sken#define MPI2_ETHPG1_MS_FULL_DUPLEX (0x80) 2858212420Sken 2859212420Sken#define MPI2_ETHPG1_MS_DATA_RATE_MASK (0x07) 2860212420Sken#define MPI2_ETHPG1_MS_DATA_RATE_AUTO (0x00) 2861212420Sken#define MPI2_ETHPG1_MS_DATA_RATE_10MBIT (0x01) 2862212420Sken#define MPI2_ETHPG1_MS_DATA_RATE_100MBIT (0x02) 2863212420Sken#define MPI2_ETHPG1_MS_DATA_RATE_1GBIT (0x03) 2864212420Sken 2865212420Sken 2866230920Sken/**************************************************************************** 2867230920Sken* Extended Manufacturing Config Pages 2868230920Sken****************************************************************************/ 2869230920Sken 2870230920Sken/* 2871230920Sken * Generic structure to use for product-specific extended manufacturing pages 2872230920Sken * (currently Extended Manufacturing Page 40 through Extended Manufacturing 2873230920Sken * Page 60). 2874230920Sken */ 2875230920Sken 2876230920Skentypedef struct _MPI2_CONFIG_PAGE_EXT_MAN_PS 2877230920Sken{ 2878230920Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2879230920Sken U32 ProductSpecificInfo; /* 0x08 */ 2880230920Sken} MPI2_CONFIG_PAGE_EXT_MAN_PS, 2881230920Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXT_MAN_PS, 2882230920Sken Mpi2ExtManufacturingPagePS_t, MPI2_POINTER pMpi2ExtManufacturingPagePS_t; 2883230920Sken 2884230920Sken/* PageVersion should be provided by product-specific code */ 2885230920Sken 2886212420Sken#endif 2887212420Sken 2888