1/*	$NetBSD: nsphy.c,v 1.18 1999/07/14 23:57:36 thorpej Exp $	*/
2
3/*-
4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/*-
34 * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 *    notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 *    notice, this list of conditions and the following disclaimer in the
43 *    documentation and/or other materials provided with the distribution.
44 *
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55 */
56
57#include <sys/cdefs.h>
58__FBSDID("$FreeBSD$");
59
60/*
61 * driver for National Semiconductor's DP83840A ethernet 10/100 PHY
62 * Data Sheet available from www.national.com
63 */
64
65#include <sys/param.h>
66#include <sys/systm.h>
67#include <sys/kernel.h>
68#include <sys/socket.h>
69#include <sys/errno.h>
70#include <sys/module.h>
71#include <sys/bus.h>
72
73#include <net/if.h>
74#include <net/if_media.h>
75
76#include <dev/mii/mii.h>
77#include <dev/mii/miivar.h>
78#include "miidevs.h"
79
80#include <dev/mii/nsphyreg.h>
81
82#include "miibus_if.h"
83
84static int nsphy_probe(device_t);
85static int nsphy_attach(device_t);
86
87static device_method_t nsphy_methods[] = {
88	/* device interface */
89	DEVMETHOD(device_probe,		nsphy_probe),
90	DEVMETHOD(device_attach,	nsphy_attach),
91	DEVMETHOD(device_detach,	mii_phy_detach),
92	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
93	DEVMETHOD_END
94};
95
96static devclass_t nsphy_devclass;
97
98static driver_t nsphy_driver = {
99	"nsphy",
100	nsphy_methods,
101	sizeof(struct mii_softc)
102};
103
104DRIVER_MODULE(nsphy, miibus, nsphy_driver, nsphy_devclass, 0, 0);
105
106static int	nsphy_service(struct mii_softc *, struct mii_data *, int);
107static void	nsphy_status(struct mii_softc *);
108static void	nsphy_reset(struct mii_softc *);
109
110static const struct mii_phydesc nsphys[] = {
111	MII_PHY_DESC(xxNATSEMI, DP83840),
112	MII_PHY_END
113};
114
115static const struct mii_phy_funcs nsphy_funcs = {
116	nsphy_service,
117	nsphy_status,
118	nsphy_reset
119};
120
121static int
122nsphy_probe(device_t dev)
123{
124
125	return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT));
126}
127
128static int
129nsphy_attach(device_t dev)
130{
131	const char *nic;
132	u_int flags;
133
134	nic = device_get_name(device_get_parent(device_get_parent(dev)));
135	flags = MIIF_NOMANPAUSE;
136	/*
137	 * Am79C971 wedge when isolating all of their external PHYs.
138	 */
139	if (strcmp(nic, "pcn") == 0)
140		flags |= MIIF_NOISOLATE;
141	mii_phy_dev_attach(dev, flags, &nsphy_funcs, 1);
142	return (0);
143}
144
145static int
146nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
147{
148	int reg;
149
150	switch (cmd) {
151	case MII_POLLSTAT:
152		break;
153
154	case MII_MEDIACHG:
155		/*
156		 * If the interface is not up, don't do anything.
157		 */
158		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
159			break;
160
161		reg = PHY_READ(sc, MII_NSPHY_PCR);
162
163		/*
164		 * Set up the PCR to use LED4 to indicate full-duplex
165		 * in both 10baseT and 100baseTX modes.
166		 */
167		reg |= PCR_LED4MODE;
168
169		/*
170		 * Make sure Carrier Integrity Monitor function is
171		 * disabled (normal for Node operation, but sometimes
172		 * it's not set?!)
173		 */
174		reg |= PCR_CIMDIS;
175
176		/*
177		 * Make sure "force link good" is set to normal mode.
178		 * It's only intended for debugging.
179		 */
180		reg |= PCR_FLINK100;
181
182		/*
183		 * Mystery bits which are supposedly `reserved',
184		 * but we seem to need to set them when the PHY
185		 * is connected to some interfaces:
186		 *
187		 * 0x0400 is needed for fxp
188		 *        (Intel EtherExpress Pro 10+/100B, 82557 chip)
189		 *        (nsphy with a DP83840 chip)
190		 * 0x0100 may be needed for some other card
191		 */
192		reg |= 0x0100 | 0x0400;
193
194		if (strcmp(mii->mii_ifp->if_dname, "fxp") == 0)
195			PHY_WRITE(sc, MII_NSPHY_PCR, reg);
196
197		mii_phy_setmedia(sc);
198		break;
199
200	case MII_TICK:
201		if (mii_phy_tick(sc) == EJUSTRETURN)
202			return (0);
203		break;
204	}
205
206	/* Update the media status. */
207	PHY_STATUS(sc);
208
209	/* Callback if something changed. */
210	mii_phy_update(sc, cmd);
211	return (0);
212}
213
214static void
215nsphy_status(struct mii_softc *sc)
216{
217	struct mii_data *mii = sc->mii_pdata;
218	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
219	int bmsr, bmcr, par, anlpar;
220
221	mii->mii_media_status = IFM_AVALID;
222	mii->mii_media_active = IFM_ETHER;
223
224	bmsr = PHY_READ(sc, MII_BMSR) |
225	    PHY_READ(sc, MII_BMSR);
226	if (bmsr & BMSR_LINK)
227		mii->mii_media_status |= IFM_ACTIVE;
228
229	bmcr = PHY_READ(sc, MII_BMCR);
230	if (bmcr & BMCR_ISO) {
231		mii->mii_media_active |= IFM_NONE;
232		mii->mii_media_status = 0;
233		return;
234	}
235
236	if (bmcr & BMCR_LOOP)
237		mii->mii_media_active |= IFM_LOOP;
238
239	if (bmcr & BMCR_AUTOEN) {
240		/*
241		 * The PAR status bits are only valid if autonegotiation
242		 * has completed (or it's disabled).
243		 */
244		if ((bmsr & BMSR_ACOMP) == 0) {
245			/* Erg, still trying, I guess... */
246			mii->mii_media_active |= IFM_NONE;
247			return;
248		}
249
250		/*
251		 * Argh.  The PAR doesn't seem to indicate duplex mode
252		 * properly!  Determine media based on link partner's
253		 * advertised capabilities.
254		 */
255		if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
256			anlpar = PHY_READ(sc, MII_ANAR) &
257			    PHY_READ(sc, MII_ANLPAR);
258			if (anlpar & ANLPAR_TX_FD)
259				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
260			else if (anlpar & ANLPAR_T4)
261				mii->mii_media_active |= IFM_100_T4|IFM_HDX;
262			else if (anlpar & ANLPAR_TX)
263				mii->mii_media_active |= IFM_100_TX|IFM_HDX;
264			else if (anlpar & ANLPAR_10_FD)
265				mii->mii_media_active |= IFM_10_T|IFM_FDX;
266			else if (anlpar & ANLPAR_10)
267				mii->mii_media_active |= IFM_10_T|IFM_HDX;
268			else
269				mii->mii_media_active |= IFM_NONE;
270			if ((mii->mii_media_active & IFM_FDX) != 0)
271				mii->mii_media_active |=
272				    mii_phy_flowstatus(sc);
273			return;
274		}
275
276		/*
277		 * Link partner is not capable of autonegotiation.
278		 * We will never be in full-duplex mode if this is
279		 * the case, so reading the PAR is OK.
280		 */
281		par = PHY_READ(sc, MII_NSPHY_PAR);
282		if (par & PAR_10)
283			mii->mii_media_active |= IFM_10_T;
284		else
285			mii->mii_media_active |= IFM_100_TX;
286		mii->mii_media_active |= IFM_HDX;
287	} else
288		mii->mii_media_active = ife->ifm_media;
289}
290
291static void
292nsphy_reset(struct mii_softc *sc)
293{
294	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
295	int reg, i;
296
297	if (sc->mii_flags & MIIF_NOISOLATE)
298		reg = BMCR_RESET;
299	else
300		reg = BMCR_RESET | BMCR_ISO;
301	PHY_WRITE(sc, MII_BMCR, reg);
302
303	/*
304	 * It is best to allow a little time for the reset to settle
305	 * in before we start polling the BMCR again.  Notably, the
306	 * DP83840A manuals state that there should be a 500us delay
307	 * between asserting software reset and attempting MII serial
308	 * operations.  Be conservative.
309	 */
310	DELAY(1000);
311
312	/*
313	 * Wait another 2s for it to complete.
314	 * This is only a little overkill as under normal circumstances
315	 * the PHY can take up to 1s to complete reset.
316	 * This is also a bit odd because after a reset, the BMCR will
317	 * clear the reset bit and simply reports 0 even though the reset
318	 * is not yet complete.
319	 */
320	for (i = 0; i < 1000; i++) {
321		reg = PHY_READ(sc, MII_BMCR);
322		if (reg != 0 && (reg & BMCR_RESET) == 0)
323			break;
324		DELAY(2000);
325	}
326
327	if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
328		if ((ife == NULL && sc->mii_inst != 0) ||
329		    (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))
330			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
331	}
332}
333