mii_physubr.c revision 221407
1/*	$NetBSD: mii_physubr.c,v 1.5 1999/08/03 19:41:49 drochner Exp $	*/
2
3/*-
4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/mii/mii_physubr.c 221407 2011-05-03 19:51:29Z marius $");
35
36/*
37 * Subroutines common to all PHYs.
38 */
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/kernel.h>
43#include <sys/socket.h>
44#include <sys/errno.h>
45#include <sys/module.h>
46#include <sys/bus.h>
47
48#include <net/if.h>
49#include <net/if_media.h>
50
51#include <dev/mii/mii.h>
52#include <dev/mii/miivar.h>
53
54#include "miibus_if.h"
55
56/*
57 * Media to register setting conversion table.  Order matters.
58 */
59static const struct mii_media mii_media_table[MII_NMEDIA] = {
60	/* None */
61	{ BMCR_ISO,		ANAR_CSMA,
62	  0, },
63
64	/* 10baseT */
65	{ BMCR_S10,		ANAR_CSMA|ANAR_10,
66	  0, },
67
68	/* 10baseT-FDX */
69	{ BMCR_S10|BMCR_FDX,	ANAR_CSMA|ANAR_10_FD,
70	  0, },
71
72	/* 100baseT4 */
73	{ BMCR_S100,		ANAR_CSMA|ANAR_T4,
74	  0, },
75
76	/* 100baseTX */
77	{ BMCR_S100,		ANAR_CSMA|ANAR_TX,
78	  0, },
79
80	/* 100baseTX-FDX */
81	{ BMCR_S100|BMCR_FDX,	ANAR_CSMA|ANAR_TX_FD,
82	  0, },
83
84	/* 1000baseX */
85	{ BMCR_S1000,		ANAR_CSMA,
86	  0, },
87
88	/* 1000baseX-FDX */
89	{ BMCR_S1000|BMCR_FDX,	ANAR_CSMA,
90	  0, },
91
92	/* 1000baseT */
93	{ BMCR_S1000,		ANAR_CSMA,
94	  GTCR_ADV_1000THDX },
95
96	/* 1000baseT-FDX */
97	{ BMCR_S1000,		ANAR_CSMA,
98	  GTCR_ADV_1000TFDX },
99};
100
101void
102mii_phy_setmedia(struct mii_softc *sc)
103{
104	struct mii_data *mii = sc->mii_pdata;
105	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
106	int bmcr, anar, gtcr;
107
108	if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) {
109		/*
110		 * Force renegotiation if MIIF_DOPAUSE or MIIF_FORCEANEG.
111		 * The former is necessary as we might switch from flow-
112		 * control advertisement being off to on or vice versa.
113		 */
114		if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
115		    (sc->mii_flags & (MIIF_DOPAUSE | MIIF_FORCEANEG)) != 0)
116			(void)mii_phy_auto(sc);
117		return;
118	}
119
120	/*
121	 * Table index is stored in the media entry.
122	 */
123
124	KASSERT(ife->ifm_data >=0 && ife->ifm_data < MII_NMEDIA,
125	    ("invalid ife->ifm_data (0x%x) in mii_phy_setmedia",
126	    ife->ifm_data));
127
128	anar = mii_media_table[ife->ifm_data].mm_anar;
129	bmcr = mii_media_table[ife->ifm_data].mm_bmcr;
130	gtcr = mii_media_table[ife->ifm_data].mm_gtcr;
131
132	if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
133		gtcr |= GTCR_MAN_MS;
134		if ((ife->ifm_media & IFM_ETH_MASTER) != 0)
135			gtcr |= GTCR_ADV_MS;
136	}
137
138	if ((ife->ifm_media & IFM_FDX) != 0 &&
139	    ((ife->ifm_media & IFM_FLOW) != 0 ||
140	    (sc->mii_flags & MIIF_FORCEPAUSE) != 0)) {
141		if ((sc->mii_flags & MIIF_IS_1000X) != 0)
142			anar |= ANAR_X_PAUSE_TOWARDS;
143		else {
144			anar |= ANAR_FC;
145			/* XXX Only 1000BASE-T has PAUSE_ASYM? */
146			if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0 &&
147			    (sc->mii_extcapabilities &
148			    (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0)
149				anar |= ANAR_X_PAUSE_ASYM;
150		}
151	}
152
153	PHY_WRITE(sc, MII_ANAR, anar);
154	PHY_WRITE(sc, MII_BMCR, bmcr);
155	if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0)
156		PHY_WRITE(sc, MII_100T2CR, gtcr);
157}
158
159int
160mii_phy_auto(struct mii_softc *sc)
161{
162	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
163	int anar, gtcr;
164
165	/*
166	 * Check for 1000BASE-X.  Autonegotiation is a bit
167	 * different on such devices.
168	 */
169	if ((sc->mii_flags & MIIF_IS_1000X) != 0) {
170		anar = 0;
171		if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0)
172			anar |= ANAR_X_FD;
173		if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0)
174			anar |= ANAR_X_HD;
175
176		if ((ife->ifm_media & IFM_FLOW) != 0 ||
177		    (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
178			anar |= ANAR_X_PAUSE_TOWARDS;
179		PHY_WRITE(sc, MII_ANAR, anar);
180	} else {
181		anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
182		    ANAR_CSMA;
183		if ((ife->ifm_media & IFM_FLOW) != 0 ||
184		    (sc->mii_flags & MIIF_FORCEPAUSE) != 0) {
185			if ((sc->mii_capabilities &
186			    (BMSR_10TFDX | BMSR_100TXFDX)) != 0)
187				anar |= ANAR_FC;
188			/* XXX Only 1000BASE-T has PAUSE_ASYM? */
189			if (((sc->mii_flags & MIIF_HAVE_GTCR) != 0) &&
190			    (sc->mii_extcapabilities &
191			    (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0)
192				anar |= ANAR_X_PAUSE_ASYM;
193		}
194		PHY_WRITE(sc, MII_ANAR, anar);
195		if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) {
196			gtcr = 0;
197			if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0)
198				gtcr |= GTCR_ADV_1000TFDX;
199			if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0)
200				gtcr |= GTCR_ADV_1000THDX;
201			PHY_WRITE(sc, MII_100T2CR, gtcr);
202		}
203	}
204	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
205	return (EJUSTRETURN);
206}
207
208int
209mii_phy_tick(struct mii_softc *sc)
210{
211	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
212	struct ifnet *ifp = sc->mii_pdata->mii_ifp;
213	int reg;
214
215	/* Just bail now if the interface is down. */
216	if ((ifp->if_flags & IFF_UP) == 0)
217		return (EJUSTRETURN);
218
219	/*
220	 * If we're not doing autonegotiation, we don't need to do
221	 * any extra work here.  However, we need to check the link
222	 * status so we can generate an announcement if the status
223	 * changes.
224	 */
225	if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
226		sc->mii_ticks = 0;	/* reset autonegotiation timer. */
227		return (0);
228	}
229
230	/* Read the status register twice; BMSR_LINK is latch-low. */
231	reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
232	if ((reg & BMSR_LINK) != 0) {
233		sc->mii_ticks = 0;	/* reset autonegotiation timer. */
234		/* See above. */
235		return (0);
236	}
237
238	/* Announce link loss right after it happens */
239	if (sc->mii_ticks++ == 0)
240		return (0);
241
242	/* XXX: use default value if phy driver did not set mii_anegticks */
243	if (sc->mii_anegticks == 0)
244		sc->mii_anegticks = MII_ANEGTICKS_GIGE;
245
246	/* Only retry autonegotiation every mii_anegticks ticks. */
247	if (sc->mii_ticks <= sc->mii_anegticks)
248		return (EJUSTRETURN);
249
250	sc->mii_ticks = 0;
251	PHY_RESET(sc);
252	mii_phy_auto(sc);
253	return (0);
254}
255
256void
257mii_phy_reset(struct mii_softc *sc)
258{
259	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
260	int reg, i;
261
262	if ((sc->mii_flags & MIIF_NOISOLATE) != 0)
263		reg = BMCR_RESET;
264	else
265		reg = BMCR_RESET | BMCR_ISO;
266	PHY_WRITE(sc, MII_BMCR, reg);
267
268	/* Wait 100ms for it to complete. */
269	for (i = 0; i < 100; i++) {
270		reg = PHY_READ(sc, MII_BMCR);
271		if ((reg & BMCR_RESET) == 0)
272			break;
273		DELAY(1000);
274	}
275
276	if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
277		if ((ife == NULL && sc->mii_inst != 0) ||
278		    (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))
279			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
280	}
281}
282
283void
284mii_phy_down(struct mii_softc *sc)
285{
286
287}
288
289void
290mii_phy_update(struct mii_softc *sc, int cmd)
291{
292	struct mii_data *mii = sc->mii_pdata;
293
294	if (sc->mii_media_active != mii->mii_media_active ||
295	    cmd == MII_MEDIACHG) {
296		MIIBUS_STATCHG(sc->mii_dev);
297		sc->mii_media_active = mii->mii_media_active;
298	}
299	if (sc->mii_media_status != mii->mii_media_status) {
300		MIIBUS_LINKCHG(sc->mii_dev);
301		sc->mii_media_status = mii->mii_media_status;
302	}
303}
304
305/*
306 * Initialize generic PHY media based on BMSR, called when a PHY is
307 * attached.  We expect to be set up to print a comma-separated list
308 * of media names.  Does not print a newline.
309 */
310void
311mii_phy_add_media(struct mii_softc *sc)
312{
313	struct mii_data *mii = sc->mii_pdata;
314	const char *sep = "";
315	int fdx = 0;
316
317	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
318	    (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) {
319		printf("no media present");
320		return;
321	}
322
323	/*
324	 * Set the autonegotiation timer for 10/100 media.  Gigabit media is
325	 * handled below.
326	 */
327	sc->mii_anegticks = MII_ANEGTICKS;
328
329#define	ADD(m, c)	ifmedia_add(&mii->mii_media, (m), (c), NULL)
330#define	PRINT(s)	printf("%s%s", sep, s); sep = ", "
331
332	if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
333		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
334		    MII_MEDIA_NONE);
335		PRINT("none");
336	}
337
338	/*
339	 * There are different interpretations for the bits in
340	 * HomePNA PHYs.  And there is really only one media type
341	 * that is supported.
342	 */
343	if ((sc->mii_flags & MIIF_IS_HPNA) != 0) {
344		if ((sc->mii_capabilities & BMSR_10THDX) != 0) {
345			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0,
346			    sc->mii_inst), MII_MEDIA_10_T);
347			PRINT("HomePNA1");
348		}
349		return;
350	}
351
352	if ((sc->mii_capabilities & BMSR_10THDX) != 0) {
353		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
354		    MII_MEDIA_10_T);
355		PRINT("10baseT");
356	}
357	if ((sc->mii_capabilities & BMSR_10TFDX) != 0) {
358		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
359		    MII_MEDIA_10_T_FDX);
360		PRINT("10baseT-FDX");
361		if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
362		    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
363			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T,
364			    IFM_FDX | IFM_FLOW, sc->mii_inst),
365			    MII_MEDIA_10_T_FDX);
366			PRINT("10baseT-FDX-flow");
367		}
368		fdx = 1;
369	}
370	if ((sc->mii_capabilities & BMSR_100TXHDX) != 0) {
371		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
372		    MII_MEDIA_100_TX);
373		PRINT("100baseTX");
374	}
375	if ((sc->mii_capabilities & BMSR_100TXFDX) != 0) {
376		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
377		    MII_MEDIA_100_TX_FDX);
378		PRINT("100baseTX-FDX");
379		if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
380		    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
381			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX,
382			    IFM_FDX | IFM_FLOW, sc->mii_inst),
383			    MII_MEDIA_100_TX_FDX);
384			PRINT("100baseTX-FDX-flow");
385		}
386		fdx = 1;
387	}
388	if ((sc->mii_capabilities & BMSR_100T4) != 0) {
389		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst),
390		    MII_MEDIA_100_T4);
391		PRINT("100baseT4");
392	}
393
394	if ((sc->mii_extcapabilities & EXTSR_MEDIAMASK) != 0) {
395		/*
396		 * XXX Right now only handle 1000SX and 1000TX.  Need
397		 * XXX to handle 1000LX and 1000CX somehow.
398		 */
399		if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) {
400			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
401			sc->mii_flags |= MIIF_IS_1000X;
402			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
403			    sc->mii_inst), MII_MEDIA_1000_X);
404			PRINT("1000baseSX");
405		}
406		if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) {
407			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
408			sc->mii_flags |= MIIF_IS_1000X;
409			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
410			    sc->mii_inst), MII_MEDIA_1000_X_FDX);
411			PRINT("1000baseSX-FDX");
412			if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
413			    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
414				ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX,
415				    IFM_FDX | IFM_FLOW, sc->mii_inst),
416				    MII_MEDIA_1000_X_FDX);
417				PRINT("1000baseSX-FDX-flow");
418			}
419			fdx = 1;
420		}
421
422		/*
423		 * 1000baseT media needs to be able to manipulate
424		 * master/slave mode.
425		 *
426		 * All 1000baseT PHYs have a 1000baseT control register.
427		 */
428		if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) {
429			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
430			sc->mii_flags |= MIIF_HAVE_GTCR;
431			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
432			    sc->mii_inst), MII_MEDIA_1000_T);
433			PRINT("1000baseT");
434			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
435			    IFM_ETH_MASTER, sc->mii_inst), MII_MEDIA_1000_T);
436			PRINT("1000baseT-master");
437		}
438		if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) {
439			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
440			sc->mii_flags |= MIIF_HAVE_GTCR;
441			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
442			    sc->mii_inst), MII_MEDIA_1000_T_FDX);
443			PRINT("1000baseT-FDX");
444			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
445			    IFM_FDX | IFM_ETH_MASTER, sc->mii_inst),
446			    MII_MEDIA_1000_T_FDX);
447			PRINT("1000baseT-FDX-master");
448			if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
449			    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
450				ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
451				    IFM_FDX | IFM_FLOW, sc->mii_inst),
452				    MII_MEDIA_1000_T_FDX);
453				PRINT("1000baseT-FDX-flow");
454				ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
455				    IFM_FDX | IFM_FLOW | IFM_ETH_MASTER,
456				    sc->mii_inst), MII_MEDIA_1000_T_FDX);
457				PRINT("1000baseT-FDX-flow-master");
458			}
459			fdx = 1;
460		}
461	}
462
463	if ((sc->mii_capabilities & BMSR_ANEG) != 0) {
464		/* intentionally invalid index */
465		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst),
466		    MII_NMEDIA);
467		PRINT("auto");
468		if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE) != 0) {
469			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, IFM_FLOW,
470			    sc->mii_inst), MII_NMEDIA);
471			PRINT("auto-flow");
472		}
473	}
474#undef ADD
475#undef PRINT
476}
477
478int
479mii_phy_detach(device_t dev)
480{
481	struct mii_softc *sc;
482
483	sc = device_get_softc(dev);
484	mii_phy_down(sc);
485	sc->mii_dev = NULL;
486	LIST_REMOVE(sc, mii_list);
487	return (0);
488}
489
490const struct mii_phydesc *
491mii_phy_match_gen(const struct mii_attach_args *ma,
492  const struct mii_phydesc *mpd, size_t len)
493{
494
495	for (; mpd->mpd_name != NULL;
496	    mpd = (const struct mii_phydesc *)((const char *)mpd + len)) {
497		if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui &&
498		    MII_MODEL(ma->mii_id2) == mpd->mpd_model)
499			return (mpd);
500	}
501	return (NULL);
502}
503
504const struct mii_phydesc *
505mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd)
506{
507
508	return (mii_phy_match_gen(ma, mpd, sizeof(struct mii_phydesc)));
509}
510
511int
512mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv)
513{
514
515	mpd = mii_phy_match(device_get_ivars(dev), mpd);
516	if (mpd != NULL) {
517		device_set_desc(dev, mpd->mpd_name);
518		return (mrv);
519	}
520	return (ENXIO);
521}
522
523void
524mii_phy_dev_attach(device_t dev, u_int flags, const struct mii_phy_funcs *mpf,
525    int add_media)
526{
527	struct mii_softc *sc;
528	struct mii_attach_args *ma;
529	struct mii_data *mii;
530
531	sc = device_get_softc(dev);
532	ma = device_get_ivars(dev);
533	sc->mii_dev = device_get_parent(dev);
534	mii = ma->mii_data;
535	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
536
537	sc->mii_flags = flags | miibus_get_flags(dev);
538	sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
539	sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
540	sc->mii_mpd_rev = MII_REV(ma->mii_id2);
541	sc->mii_capmask = ma->mii_capmask;
542	sc->mii_inst = mii->mii_instance++;
543	sc->mii_phy = ma->mii_phyno;
544	sc->mii_offset = ma->mii_offset;
545	sc->mii_funcs = mpf;
546	sc->mii_pdata = mii;
547
548	if (bootverbose)
549		device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n",
550		    sc->mii_mpd_oui, sc->mii_mpd_model, sc->mii_mpd_rev);
551
552	if (add_media == 0)
553		return;
554
555	PHY_RESET(sc);
556
557	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask;
558	if (sc->mii_capabilities & BMSR_EXTSTAT)
559		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
560	device_printf(dev, " ");
561	mii_phy_add_media(sc);
562	printf("\n");
563
564	MIIBUS_MEDIAINIT(sc->mii_dev);
565}
566
567/*
568 * Return the flow control status flag from MII_ANAR & MII_ANLPAR.
569 */
570u_int
571mii_phy_flowstatus(struct mii_softc *sc)
572{
573	int anar, anlpar;
574
575	if ((sc->mii_flags & MIIF_DOPAUSE) == 0)
576		return (0);
577
578	anar = PHY_READ(sc, MII_ANAR);
579	anlpar = PHY_READ(sc, MII_ANLPAR);
580
581	/*
582	 * Check for 1000BASE-X.  Autonegotiation is a bit
583	 * different on such devices.
584	 */
585	if ((sc->mii_flags & MIIF_IS_1000X) != 0) {
586		anar <<= 3;
587		anlpar <<= 3;
588	}
589
590	if ((anar & ANAR_PAUSE_SYM) != 0 && (anlpar & ANLPAR_PAUSE_SYM) != 0)
591		return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE);
592
593	if ((anar & ANAR_PAUSE_SYM) == 0) {
594		if ((anar & ANAR_PAUSE_ASYM) != 0 &&
595		    (anlpar & ANLPAR_PAUSE_TOWARDS) != 0)
596			return (IFM_FLOW | IFM_ETH_TXPAUSE);
597		else
598			return (0);
599	}
600
601	if ((anar & ANAR_PAUSE_ASYM) == 0) {
602		if ((anlpar & ANLPAR_PAUSE_SYM) != 0)
603			return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE);
604		else
605			return (0);
606	}
607
608	switch ((anlpar & ANLPAR_PAUSE_TOWARDS)) {
609	case ANLPAR_PAUSE_NONE:
610		return (0);
611	case ANLPAR_PAUSE_ASYM:
612		return (IFM_FLOW | IFM_ETH_RXPAUSE);
613	default:
614		return (IFM_FLOW | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE);
615	}
616	/* NOTREACHED */
617}
618