mii_physubr.c revision 215297
1/* $NetBSD: mii_physubr.c,v 1.5 1999/08/03 19:41:49 drochner Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: head/sys/dev/mii/mii_physubr.c 215297 2010-11-14 13:26:10Z marius $"); 35 36/* 37 * Subroutines common to all PHYs. 38 */ 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/kernel.h> 43#include <sys/socket.h> 44#include <sys/errno.h> 45#include <sys/module.h> 46#include <sys/bus.h> 47 48#include <net/if.h> 49#include <net/if_media.h> 50 51#include <dev/mii/mii.h> 52#include <dev/mii/miivar.h> 53 54#include "miibus_if.h" 55 56/* 57 * Media to register setting conversion table. Order matters. 58 */ 59static const struct mii_media mii_media_table[MII_NMEDIA] = { 60 /* None */ 61 { BMCR_ISO, ANAR_CSMA, 62 0, }, 63 64 /* 10baseT */ 65 { BMCR_S10, ANAR_CSMA|ANAR_10, 66 0, }, 67 68 /* 10baseT-FDX */ 69 { BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD, 70 0, }, 71 72 /* 100baseT4 */ 73 { BMCR_S100, ANAR_CSMA|ANAR_T4, 74 0, }, 75 76 /* 100baseTX */ 77 { BMCR_S100, ANAR_CSMA|ANAR_TX, 78 0, }, 79 80 /* 100baseTX-FDX */ 81 { BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD, 82 0, }, 83 84 /* 1000baseX */ 85 { BMCR_S1000, ANAR_CSMA, 86 0, }, 87 88 /* 1000baseX-FDX */ 89 { BMCR_S1000|BMCR_FDX, ANAR_CSMA, 90 0, }, 91 92 /* 1000baseT */ 93 { BMCR_S1000, ANAR_CSMA, 94 GTCR_ADV_1000THDX }, 95 96 /* 1000baseT-FDX */ 97 { BMCR_S1000, ANAR_CSMA, 98 GTCR_ADV_1000TFDX }, 99}; 100 101void 102mii_phy_setmedia(struct mii_softc *sc) 103{ 104 struct mii_data *mii = sc->mii_pdata; 105 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 106 int bmcr, anar, gtcr; 107 108 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 109 /* 110 * Force renegotiation if MIIF_DOPAUSE or MIIF_FORCEANEG. 111 * The former is necessary as we might switch from flow- 112 * control advertisment being off to on or vice versa. 113 */ 114 if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 || 115 (sc->mii_flags & (MIIF_DOPAUSE | MIIF_FORCEANEG)) != 0) 116 (void)mii_phy_auto(sc); 117 return; 118 } 119 120 /* 121 * Table index is stored in the media entry. 122 */ 123 124 KASSERT(ife->ifm_data >=0 && ife->ifm_data < MII_NMEDIA, 125 ("invalid ife->ifm_data (0x%x) in mii_phy_setmedia", 126 ife->ifm_data)); 127 128 anar = mii_media_table[ife->ifm_data].mm_anar; 129 bmcr = mii_media_table[ife->ifm_data].mm_bmcr; 130 gtcr = mii_media_table[ife->ifm_data].mm_gtcr; 131 132 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 133 gtcr |= GTCR_MAN_MS; 134 if ((ife->ifm_media & IFM_ETH_MASTER) != 0) 135 gtcr |= GTCR_ADV_MS; 136 } 137 138 if ((ife->ifm_media & IFM_GMASK) == (IFM_FDX | IFM_FLOW) || 139 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) { 140 if ((sc->mii_flags & MIIF_IS_1000X) != 0) 141 anar |= ANAR_X_PAUSE_TOWARDS; 142 else { 143 anar |= ANAR_FC; 144 /* XXX Only 1000BASE-T has PAUSE_ASYM? */ 145 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0 && 146 (sc->mii_extcapabilities & 147 (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0) 148 anar |= ANAR_X_PAUSE_ASYM; 149 } 150 } 151 152 if ((ife->ifm_media & IFM_LOOP) != 0) 153 bmcr |= BMCR_LOOP; 154 155 PHY_WRITE(sc, MII_ANAR, anar); 156 PHY_WRITE(sc, MII_BMCR, bmcr); 157 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) 158 PHY_WRITE(sc, MII_100T2CR, gtcr); 159} 160 161int 162mii_phy_auto(struct mii_softc *sc) 163{ 164 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 165 int anar, gtcr; 166 167 /* 168 * Check for 1000BASE-X. Autonegotiation is a bit 169 * different on such devices. 170 */ 171 if ((sc->mii_flags & MIIF_IS_1000X) != 0) { 172 anar = 0; 173 if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) 174 anar |= ANAR_X_FD; 175 if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) 176 anar |= ANAR_X_HD; 177 178 if ((ife->ifm_media & IFM_FLOW) != 0 || 179 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) 180 anar |= ANAR_X_PAUSE_TOWARDS; 181 PHY_WRITE(sc, MII_ANAR, anar); 182 } else { 183 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | 184 ANAR_CSMA; 185 if ((ife->ifm_media & IFM_FLOW) != 0 || 186 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) { 187 if ((sc->mii_capabilities & BMSR_100TXFDX) != 0) 188 anar |= ANAR_FC; 189 /* XXX Only 1000BASE-T has PAUSE_ASYM? */ 190 if (((sc->mii_flags & MIIF_HAVE_GTCR) != 0) && 191 (sc->mii_extcapabilities & 192 (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0) 193 anar |= ANAR_X_PAUSE_ASYM; 194 } 195 PHY_WRITE(sc, MII_ANAR, anar); 196 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) { 197 gtcr = 0; 198 if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) 199 gtcr |= GTCR_ADV_1000TFDX; 200 if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) 201 gtcr |= GTCR_ADV_1000THDX; 202 PHY_WRITE(sc, MII_100T2CR, gtcr); 203 } 204 } 205 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG); 206 return (EJUSTRETURN); 207} 208 209int 210mii_phy_tick(struct mii_softc *sc) 211{ 212 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 213 struct ifnet *ifp = sc->mii_pdata->mii_ifp; 214 int reg; 215 216 /* Just bail now if the interface is down. */ 217 if ((ifp->if_flags & IFF_UP) == 0) 218 return (EJUSTRETURN); 219 220 /* 221 * If we're not doing autonegotiation, we don't need to do 222 * any extra work here. However, we need to check the link 223 * status so we can generate an announcement if the status 224 * changes. 225 */ 226 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 227 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 228 return (0); 229 } 230 231 /* Read the status register twice; BMSR_LINK is latch-low. */ 232 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 233 if ((reg & BMSR_LINK) != 0) { 234 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 235 /* See above. */ 236 return (0); 237 } 238 239 /* Announce link loss right after it happens */ 240 if (sc->mii_ticks++ == 0) 241 return (0); 242 243 /* XXX: use default value if phy driver did not set mii_anegticks */ 244 if (sc->mii_anegticks == 0) 245 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 246 247 /* Only retry autonegotiation every mii_anegticks ticks. */ 248 if (sc->mii_ticks <= sc->mii_anegticks) 249 return (EJUSTRETURN); 250 251 sc->mii_ticks = 0; 252 mii_phy_reset(sc); 253 mii_phy_auto(sc); 254 return (0); 255} 256 257void 258mii_phy_reset(struct mii_softc *sc) 259{ 260 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 261 int reg, i; 262 263 if ((sc->mii_flags & MIIF_NOISOLATE) != 0) 264 reg = BMCR_RESET; 265 else 266 reg = BMCR_RESET | BMCR_ISO; 267 PHY_WRITE(sc, MII_BMCR, reg); 268 269 /* Wait 100ms for it to complete. */ 270 for (i = 0; i < 100; i++) { 271 reg = PHY_READ(sc, MII_BMCR); 272 if ((reg & BMCR_RESET) == 0) 273 break; 274 DELAY(1000); 275 } 276 277 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) { 278 if ((ife == NULL && sc->mii_inst != 0) || 279 (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst)) 280 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 281 } 282} 283 284void 285mii_phy_down(struct mii_softc *sc) 286{ 287 288} 289 290void 291mii_phy_update(struct mii_softc *sc, int cmd) 292{ 293 struct mii_data *mii = sc->mii_pdata; 294 295 if (sc->mii_media_active != mii->mii_media_active || 296 cmd == MII_MEDIACHG) { 297 MIIBUS_STATCHG(sc->mii_dev); 298 sc->mii_media_active = mii->mii_media_active; 299 } 300 if (sc->mii_media_status != mii->mii_media_status) { 301 MIIBUS_LINKCHG(sc->mii_dev); 302 sc->mii_media_status = mii->mii_media_status; 303 } 304} 305 306/* 307 * Initialize generic PHY media based on BMSR, called when a PHY is 308 * attached. We expect to be set up to print a comma-separated list 309 * of media names. Does not print a newline. 310 */ 311void 312mii_phy_add_media(struct mii_softc *sc) 313{ 314 struct mii_data *mii = sc->mii_pdata; 315 const char *sep = ""; 316 int fdx = 0; 317 318 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && 319 (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) { 320 printf("no media present"); 321 return; 322 } 323 324 /* 325 * Set the autonegotiation timer for 10/100 media. Gigabit media is 326 * handled below. 327 */ 328 sc->mii_anegticks = MII_ANEGTICKS; 329 330#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 331#define PRINT(s) printf("%s%s", sep, s); sep = ", " 332 333 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) 334 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 335 MII_MEDIA_NONE); 336 337 /* 338 * There are different interpretations for the bits in 339 * HomePNA PHYs. And there is really only one media type 340 * that is supported. 341 */ 342 if ((sc->mii_flags & MIIF_IS_HPNA) != 0) { 343 if ((sc->mii_capabilities & BMSR_10THDX) != 0) { 344 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0, 345 sc->mii_inst), MII_MEDIA_10_T); 346 PRINT("HomePNA1"); 347 } 348 return; 349 } 350 351 if ((sc->mii_capabilities & BMSR_10THDX) != 0) { 352 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 353 MII_MEDIA_10_T); 354 PRINT("10baseT"); 355 } 356 if ((sc->mii_capabilities & BMSR_10TFDX) != 0) { 357 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 358 MII_MEDIA_10_T_FDX); 359 PRINT("10baseT-FDX"); 360 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 361 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 362 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 363 IFM_FDX | IFM_FLOW, sc->mii_inst), 364 MII_MEDIA_10_T_FDX); 365 PRINT("10baseT-FDX-flow"); 366 } 367 fdx = 1; 368 } 369 if ((sc->mii_capabilities & BMSR_100TXHDX) != 0) { 370 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 371 MII_MEDIA_100_TX); 372 PRINT("100baseTX"); 373 } 374 if ((sc->mii_capabilities & BMSR_100TXFDX) != 0) { 375 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 376 MII_MEDIA_100_TX_FDX); 377 PRINT("100baseTX-FDX"); 378 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 379 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 380 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 381 IFM_FDX | IFM_FLOW, sc->mii_inst), 382 MII_MEDIA_100_TX_FDX); 383 PRINT("100baseTX-FDX-flow"); 384 } 385 fdx = 1; 386 } 387 if ((sc->mii_capabilities & BMSR_100T4) != 0) { 388 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst), 389 MII_MEDIA_100_T4); 390 PRINT("100baseT4"); 391 } 392 393 if ((sc->mii_extcapabilities & EXTSR_MEDIAMASK) != 0) { 394 /* 395 * XXX Right now only handle 1000SX and 1000TX. Need 396 * XXX to handle 1000LX and 1000CX somehow. 397 */ 398 if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) { 399 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 400 sc->mii_flags |= MIIF_IS_1000X; 401 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, 402 sc->mii_inst), MII_MEDIA_1000_X); 403 PRINT("1000baseSX"); 404 } 405 if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) { 406 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 407 sc->mii_flags |= MIIF_IS_1000X; 408 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, 409 sc->mii_inst), MII_MEDIA_1000_X_FDX); 410 PRINT("1000baseSX-FDX"); 411 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 412 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 413 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 414 IFM_FDX | IFM_FLOW, sc->mii_inst), 415 MII_MEDIA_1000_X_FDX); 416 PRINT("1000baseSX-FDX-flow"); 417 } 418 fdx = 1; 419 } 420 421 /* 422 * 1000baseT media needs to be able to manipulate 423 * master/slave mode. 424 * 425 * All 1000baseT PHYs have a 1000baseT control register. 426 */ 427 if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) { 428 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 429 sc->mii_flags |= MIIF_HAVE_GTCR; 430 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, 431 sc->mii_inst), MII_MEDIA_1000_T); 432 PRINT("1000baseT"); 433 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 434 IFM_ETH_MASTER, sc->mii_inst), MII_MEDIA_1000_T); 435 PRINT("1000baseT-master"); 436 } 437 if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) { 438 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 439 sc->mii_flags |= MIIF_HAVE_GTCR; 440 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, 441 sc->mii_inst), MII_MEDIA_1000_T_FDX); 442 PRINT("1000baseT-FDX"); 443 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 444 IFM_FDX | IFM_ETH_MASTER, sc->mii_inst), 445 MII_MEDIA_1000_T_FDX); 446 PRINT("1000baseT-FDX-master"); 447 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 448 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 449 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 450 IFM_FDX | IFM_FLOW, sc->mii_inst), 451 MII_MEDIA_1000_T_FDX); 452 PRINT("1000baseT-FDX-flow"); 453 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 454 IFM_FDX | IFM_FLOW | IFM_ETH_MASTER, 455 sc->mii_inst), MII_MEDIA_1000_T_FDX); 456 PRINT("1000baseT-FDX-flow-master"); 457 } 458 fdx = 1; 459 } 460 } 461 462 if ((sc->mii_capabilities & BMSR_ANEG) != 0) { 463 /* intentionally invalid index */ 464 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 465 MII_NMEDIA); 466 PRINT("auto"); 467 if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE) != 0) { 468 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, IFM_FLOW, 469 sc->mii_inst), MII_NMEDIA); 470 PRINT("auto-flow"); 471 } 472 } 473#undef ADD 474#undef PRINT 475} 476 477int 478mii_phy_detach(device_t dev) 479{ 480 struct mii_softc *sc; 481 482 sc = device_get_softc(dev); 483 mii_phy_down(sc); 484 sc->mii_dev = NULL; 485 LIST_REMOVE(sc, mii_list); 486 return (0); 487} 488 489const struct mii_phydesc * 490mii_phy_match_gen(const struct mii_attach_args *ma, 491 const struct mii_phydesc *mpd, size_t len) 492{ 493 494 for (; mpd->mpd_name != NULL; 495 mpd = (const struct mii_phydesc *)((const char *)mpd + len)) { 496 if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui && 497 MII_MODEL(ma->mii_id2) == mpd->mpd_model) 498 return (mpd); 499 } 500 return (NULL); 501} 502 503const struct mii_phydesc * 504mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd) 505{ 506 507 return (mii_phy_match_gen(ma, mpd, sizeof(struct mii_phydesc))); 508} 509 510int 511mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv) 512{ 513 514 mpd = mii_phy_match(device_get_ivars(dev), mpd); 515 if (mpd != NULL) { 516 device_set_desc(dev, mpd->mpd_name); 517 return (mrv); 518 } 519 return (ENXIO); 520} 521 522/* 523 * Return the flow control status flag from MII_ANAR & MII_ANLPAR. 524 */ 525u_int 526mii_phy_flowstatus(struct mii_softc *sc) 527{ 528 int anar, anlpar; 529 530 if ((sc->mii_flags & MIIF_DOPAUSE) == 0) 531 return (0); 532 533 anar = PHY_READ(sc, MII_ANAR); 534 anlpar = PHY_READ(sc, MII_ANLPAR); 535 536 /* 537 * Check for 1000BASE-X. Autonegotiation is a bit 538 * different on such devices. 539 */ 540 if ((sc->mii_flags & MIIF_IS_1000X) != 0) { 541 anar <<= 3; 542 anlpar <<= 3; 543 } 544 545 if ((anar & ANAR_PAUSE_SYM) != 0 && (anlpar & ANLPAR_PAUSE_SYM) != 0) 546 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 547 548 if ((anar & ANAR_PAUSE_SYM) == 0) { 549 if ((anar & ANAR_PAUSE_ASYM) != 0 && 550 (anlpar & ANLPAR_PAUSE_TOWARDS) != 0) 551 return (IFM_FLOW | IFM_ETH_TXPAUSE); 552 else 553 return (0); 554 } 555 556 if ((anar & ANAR_PAUSE_ASYM) == 0) { 557 if ((anlpar & ANLPAR_PAUSE_SYM) != 0) 558 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 559 else 560 return (0); 561 } 562 563 switch ((anlpar & ANLPAR_PAUSE_TOWARDS)) { 564 case ANLPAR_PAUSE_NONE: 565 return (0); 566 case ANLPAR_PAUSE_ASYM: 567 return (IFM_FLOW | IFM_ETH_RXPAUSE); 568 default: 569 return (IFM_FLOW | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE); 570 } 571 /* NOTREACHED */ 572} 573