1139749Simp/*- 275353Smjacob * Principal Author: Parag Patel 375353Smjacob * Copyright (c) 2001 475353Smjacob * All rights reserved. 575353Smjacob * 675353Smjacob * Redistribution and use in source and binary forms, with or without 775353Smjacob * modification, are permitted provided that the following conditions 875353Smjacob * are met: 975353Smjacob * 1. Redistributions of source code must retain the above copyright 1075353Smjacob * notice unmodified, this list of conditions, and the following 1175353Smjacob * disclaimer. 1275353Smjacob * 2. Redistributions in binary form must reproduce the above copyright 1375353Smjacob * notice, this list of conditions and the following disclaimer in the 1475353Smjacob * documentation and/or other materials provided with the distribution. 1575353Smjacob * 1675353Smjacob * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1775353Smjacob * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1875353Smjacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1975353Smjacob * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2075353Smjacob * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2175353Smjacob * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2275353Smjacob * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2375353Smjacob * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2475353Smjacob * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2575353Smjacob * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2675353Smjacob * SUCH DAMAGE. 2775353Smjacob * 28220938Smarius * Additional Copyright (c) 2001 by Traakan Software under same licence. 2975353Smjacob * Secondary Author: Matthew Jacob 3075353Smjacob */ 3175353Smjacob 32129843Smarius#include <sys/cdefs.h> 33129843Smarius__FBSDID("$FreeBSD$"); 34129843Smarius 3575353Smjacob/* 3675353Smjacob * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. 3775353Smjacob */ 3875353Smjacob 39120281Swilko/* 40120281Swilko * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and 41120281Swilko * 1000baseSX PHY. 42120281Swilko * Nathan Binkert <nate@openbsd.org> 43120281Swilko * Jung-uk Kim <jkim@niksun.com> 44120281Swilko */ 45120281Swilko 4675353Smjacob#include <sys/param.h> 4775353Smjacob#include <sys/systm.h> 4875353Smjacob#include <sys/kernel.h> 49129876Sphk#include <sys/module.h> 5075353Smjacob#include <sys/socket.h> 5175353Smjacob#include <sys/bus.h> 5275353Smjacob 5375353Smjacob 5475353Smjacob#include <net/if.h> 5575353Smjacob#include <net/if_media.h> 5675353Smjacob 5775353Smjacob#include <dev/mii/mii.h> 5875353Smjacob#include <dev/mii/miivar.h> 59109514Sobrien#include "miidevs.h" 6075353Smjacob 6175353Smjacob#include <dev/mii/e1000phyreg.h> 6275353Smjacob 6375353Smjacob#include "miibus_if.h" 6475353Smjacob 65165095Syongaristatic int e1000phy_probe(device_t); 66165095Syongaristatic int e1000phy_attach(device_t); 6775353Smjacob 6875353Smjacobstatic device_method_t e1000phy_methods[] = { 6975353Smjacob /* device interface */ 7075353Smjacob DEVMETHOD(device_probe, e1000phy_probe), 7175353Smjacob DEVMETHOD(device_attach, e1000phy_attach), 7295722Sphk DEVMETHOD(device_detach, mii_phy_detach), 7375353Smjacob DEVMETHOD(device_shutdown, bus_generic_shutdown), 74229093Shselasky DEVMETHOD_END 7575353Smjacob}; 7675353Smjacob 7775353Smjacobstatic devclass_t e1000phy_devclass; 7875353Smjacobstatic driver_t e1000phy_driver = { 79165099Syongari "e1000phy", 80165099Syongari e1000phy_methods, 81221407Smarius sizeof(struct mii_softc) 8275353Smjacob}; 83165099Syongari 8475353SmjacobDRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); 8575353Smjacob 8684145Sjlemonstatic int e1000phy_service(struct mii_softc *, struct mii_data *, int); 8784145Sjlemonstatic void e1000phy_status(struct mii_softc *); 8884145Sjlemonstatic void e1000phy_reset(struct mii_softc *); 89221407Smariusstatic int e1000phy_mii_phy_auto(struct mii_softc *, int); 9075353Smjacob 91165099Syongaristatic const struct mii_phydesc e1000phys[] = { 92165099Syongari MII_PHY_DESC(MARVELL, E1000), 93165099Syongari MII_PHY_DESC(MARVELL, E1011), 94165099Syongari MII_PHY_DESC(MARVELL, E1000_3), 95165099Syongari MII_PHY_DESC(MARVELL, E1000_5), 96165099Syongari MII_PHY_DESC(MARVELL, E1111), 97165099Syongari MII_PHY_DESC(xxMARVELL, E1000), 98165099Syongari MII_PHY_DESC(xxMARVELL, E1011), 99165099Syongari MII_PHY_DESC(xxMARVELL, E1000_3), 100221407Smarius MII_PHY_DESC(xxMARVELL, E1000S), 101165099Syongari MII_PHY_DESC(xxMARVELL, E1000_5), 102221407Smarius MII_PHY_DESC(xxMARVELL, E1101), 103221407Smarius MII_PHY_DESC(xxMARVELL, E3082), 104221407Smarius MII_PHY_DESC(xxMARVELL, E1112), 105221407Smarius MII_PHY_DESC(xxMARVELL, E1149), 106165099Syongari MII_PHY_DESC(xxMARVELL, E1111), 107221407Smarius MII_PHY_DESC(xxMARVELL, E1116), 108221407Smarius MII_PHY_DESC(xxMARVELL, E1116R), 109221407Smarius MII_PHY_DESC(xxMARVELL, E1118), 110223688Simp MII_PHY_DESC(xxMARVELL, E1149R), 111221407Smarius MII_PHY_DESC(xxMARVELL, E3016), 112221407Smarius MII_PHY_DESC(xxMARVELL, PHYG65G), 113165099Syongari MII_PHY_END 114165099Syongari}; 11575353Smjacob 116221407Smariusstatic const struct mii_phy_funcs e1000phy_funcs = { 117221407Smarius e1000phy_service, 118221407Smarius e1000phy_status, 119221407Smarius e1000phy_reset 120221407Smarius}; 121221407Smarius 12275353Smjacobstatic int 12375353Smjacobe1000phy_probe(device_t dev) 12475353Smjacob{ 12575353Smjacob 126165099Syongari return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); 12775353Smjacob} 12875353Smjacob 12975353Smjacobstatic int 13075353Smjacobe1000phy_attach(device_t dev) 13175353Smjacob{ 13275353Smjacob struct mii_softc *sc; 133197590Syongari struct ifnet *ifp; 13475353Smjacob 135221407Smarius sc = device_get_softc(dev); 13675353Smjacob 137221407Smarius mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &e1000phy_funcs, 0); 13875353Smjacob 139197590Syongari ifp = sc->mii_pdata->mii_ifp; 140213893Smarius if (strcmp(ifp->if_dname, "msk") == 0 && 141213893Smarius (sc->mii_flags & MIIF_MACPRIV0) != 0) 142213893Smarius sc->mii_flags |= MIIF_PHYPRIV0; 143197590Syongari 144221407Smarius switch (sc->mii_mpd_model) { 145221407Smarius case MII_MODEL_xxMARVELL_E1011: 146221407Smarius case MII_MODEL_xxMARVELL_E1112: 147165099Syongari if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) 148165099Syongari sc->mii_flags |= MIIF_HAVEFIBER; 149165099Syongari break; 150221407Smarius case MII_MODEL_xxMARVELL_E1149: 151223688Simp case MII_MODEL_xxMARVELL_E1149R: 152183966Syongari /* 153183966Syongari * Some 88E1149 PHY's page select is initialized to 154183966Syongari * point to other bank instead of copper/fiber bank 155183966Syongari * which in turn resulted in wrong registers were 156183966Syongari * accessed during PHY operation. It is believed that 157183966Syongari * page 0 should be used for copper PHY so reinitialize 158183966Syongari * E1000_EADR to select default copper PHY. If parent 159183966Syongari * device know the type of PHY(either copper or fiber), 160183966Syongari * that information should be used to select default 161183966Syongari * type of PHY. 162183966Syongari */ 163183966Syongari PHY_WRITE(sc, E1000_EADR, 0); 164183966Syongari break; 165165099Syongari } 166165099Syongari 167221407Smarius PHY_RESET(sc); 16875353Smjacob 169221407Smarius sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; 170192708Syongari if (sc->mii_capabilities & BMSR_EXTSTAT) 171192708Syongari sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 17284144Sjlemon device_printf(dev, " "); 173192708Syongari mii_phy_add_media(sc); 174192708Syongari printf("\n"); 17584144Sjlemon 17675353Smjacob MIIBUS_MEDIAINIT(sc->mii_dev); 177165095Syongari return (0); 17875353Smjacob} 17975353Smjacob 18075353Smjacobstatic void 18175353Smjacobe1000phy_reset(struct mii_softc *sc) 18275353Smjacob{ 183183493Syongari uint16_t reg, page; 18475353Smjacob 18575353Smjacob reg = PHY_READ(sc, E1000_SCR); 186165099Syongari if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { 187165099Syongari reg &= ~E1000_SCR_AUTO_X_MODE; 188165099Syongari PHY_WRITE(sc, E1000_SCR, reg); 189221407Smarius if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1112) { 190165099Syongari /* Select 1000BASE-X only mode. */ 191183493Syongari page = PHY_READ(sc, E1000_EADR); 192165099Syongari PHY_WRITE(sc, E1000_EADR, 2); 193165099Syongari reg = PHY_READ(sc, E1000_SCR); 194165099Syongari reg &= ~E1000_SCR_MODE_MASK; 195165099Syongari reg |= E1000_SCR_MODE_1000BX; 196165099Syongari PHY_WRITE(sc, E1000_SCR, reg); 197214566Smarius if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) { 198197590Syongari /* Set SIGDET polarity low for SFP module. */ 199197590Syongari PHY_WRITE(sc, E1000_EADR, 1); 200197590Syongari reg = PHY_READ(sc, E1000_SCR); 201197590Syongari reg |= E1000_SCR_FIB_SIGDET_POLARITY; 202197590Syongari PHY_WRITE(sc, E1000_SCR, reg); 203197590Syongari } 204183493Syongari PHY_WRITE(sc, E1000_EADR, page); 205165099Syongari } 206165099Syongari } else { 207221407Smarius switch (sc->mii_mpd_model) { 208221407Smarius case MII_MODEL_xxMARVELL_E1111: 209221407Smarius case MII_MODEL_xxMARVELL_E1112: 210221407Smarius case MII_MODEL_xxMARVELL_E1116: 211221407Smarius case MII_MODEL_xxMARVELL_E1118: 212221407Smarius case MII_MODEL_xxMARVELL_E1149: 213223688Simp case MII_MODEL_xxMARVELL_E1149R: 214221407Smarius case MII_MODEL_xxMARVELL_PHYG65G: 215165099Syongari /* Disable energy detect mode. */ 216165099Syongari reg &= ~E1000_SCR_EN_DETECT_MASK; 217165099Syongari reg |= E1000_SCR_AUTO_X_MODE; 218221407Smarius if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116) 219173133Syongari reg &= ~E1000_SCR_POWER_DOWN; 220192713Syongari reg |= E1000_SCR_ASSERT_CRS_ON_TX; 221165099Syongari break; 222221407Smarius case MII_MODEL_xxMARVELL_E3082: 223165099Syongari reg |= (E1000_SCR_AUTO_X_MODE >> 1); 224192713Syongari reg |= E1000_SCR_ASSERT_CRS_ON_TX; 225165099Syongari break; 226221407Smarius case MII_MODEL_xxMARVELL_E3016: 227192713Syongari reg |= E1000_SCR_AUTO_MDIX; 228192713Syongari reg &= ~(E1000_SCR_EN_DETECT | 229192713Syongari E1000_SCR_SCRAMBLER_DISABLE); 230192713Syongari reg |= E1000_SCR_LPNP; 231192713Syongari /* XXX Enable class A driver for Yukon FE+ A0. */ 232192713Syongari PHY_WRITE(sc, 0x1C, PHY_READ(sc, 0x1C) | 0x0001); 233192713Syongari break; 234165099Syongari default: 235165099Syongari reg &= ~E1000_SCR_AUTO_X_MODE; 236192713Syongari reg |= E1000_SCR_ASSERT_CRS_ON_TX; 237165099Syongari break; 238165099Syongari } 239221407Smarius if (sc->mii_mpd_model != MII_MODEL_xxMARVELL_E3016) { 240192713Syongari /* Auto correction for reversed cable polarity. */ 241192713Syongari reg &= ~E1000_SCR_POLARITY_REVERSAL; 242192713Syongari } 243165099Syongari PHY_WRITE(sc, E1000_SCR, reg); 244173133Syongari 245221407Smarius if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116 || 246223688Simp sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149 || 247223688Simp sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149R) { 248173133Syongari PHY_WRITE(sc, E1000_EADR, 2); 249173133Syongari reg = PHY_READ(sc, E1000_SCR); 250173133Syongari reg |= E1000_SCR_RGMII_POWER_UP; 251173133Syongari PHY_WRITE(sc, E1000_SCR, reg); 252196366Syongari PHY_WRITE(sc, E1000_EADR, 0); 253173133Syongari } 254165099Syongari } 25575353Smjacob 256221407Smarius switch (sc->mii_mpd_model) { 257221407Smarius case MII_MODEL_xxMARVELL_E3082: 258221407Smarius case MII_MODEL_xxMARVELL_E1112: 259221407Smarius case MII_MODEL_xxMARVELL_E1118: 260193291Syongari break; 261221407Smarius case MII_MODEL_xxMARVELL_E1116: 262193291Syongari page = PHY_READ(sc, E1000_EADR); 263193291Syongari /* Select page 3, LED control register. */ 264193291Syongari PHY_WRITE(sc, E1000_EADR, 3); 265193291Syongari PHY_WRITE(sc, E1000_SCR, 266193291Syongari E1000_SCR_LED_LOS(1) | /* Link/Act */ 267193291Syongari E1000_SCR_LED_INIT(8) | /* 10Mbps */ 268193291Syongari E1000_SCR_LED_STAT1(7) | /* 100Mbps */ 269193291Syongari E1000_SCR_LED_STAT0(7)); /* 1000Mbps */ 270193291Syongari /* Set blink rate. */ 271193291Syongari PHY_WRITE(sc, E1000_IER, E1000_PULSE_DUR(E1000_PULSE_170MS) | 272193291Syongari E1000_BLINK_RATE(E1000_BLINK_84MS)); 273193291Syongari PHY_WRITE(sc, E1000_EADR, page); 274165099Syongari break; 275221407Smarius case MII_MODEL_xxMARVELL_E3016: 276192713Syongari /* LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED. */ 277192713Syongari PHY_WRITE(sc, 0x16, 0x0B << 8 | 0x05 << 4 | 0x04); 278192713Syongari /* Integrated register calibration workaround. */ 279192713Syongari PHY_WRITE(sc, 0x1D, 17); 280192713Syongari PHY_WRITE(sc, 0x1E, 0x3F60); 281192713Syongari break; 282165099Syongari default: 283165099Syongari /* Force TX_CLK to 25MHz clock. */ 284165099Syongari reg = PHY_READ(sc, E1000_ESCR); 285165099Syongari reg |= E1000_ESCR_TX_CLK_25; 286165099Syongari PHY_WRITE(sc, E1000_ESCR, reg); 287165099Syongari break; 288165099Syongari } 289165099Syongari 290165099Syongari /* Reset the PHY so all changes take effect. */ 29175353Smjacob reg = PHY_READ(sc, E1000_CR); 29275353Smjacob reg |= E1000_CR_RESET; 29375353Smjacob PHY_WRITE(sc, E1000_CR, reg); 29475353Smjacob} 29575353Smjacob 29684145Sjlemonstatic int 29775353Smjacobe1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 29875353Smjacob{ 29975353Smjacob struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 300165099Syongari uint16_t speed, gig; 30175353Smjacob int reg; 30275353Smjacob 30375353Smjacob switch (cmd) { 30475353Smjacob case MII_POLLSTAT: 30575353Smjacob break; 30675353Smjacob 30775353Smjacob case MII_MEDIACHG: 30875353Smjacob /* 30975353Smjacob * If the interface is not up, don't do anything. 31075353Smjacob */ 311165095Syongari if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 31275353Smjacob break; 31375353Smjacob 314165099Syongari if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 315221407Smarius e1000phy_mii_phy_auto(sc, ife->ifm_media); 31675353Smjacob break; 317165099Syongari } 31875353Smjacob 319165099Syongari speed = 0; 320165099Syongari switch (IFM_SUBTYPE(ife->ifm_media)) { 32195673Sphk case IFM_1000_T: 322192708Syongari if ((sc->mii_extcapabilities & 323192708Syongari (EXTSR_1000TFDX | EXTSR_1000THDX)) == 0) 324165099Syongari return (EINVAL); 325165099Syongari speed = E1000_CR_SPEED_1000; 32675353Smjacob break; 327120281Swilko case IFM_1000_SX: 328192708Syongari if ((sc->mii_extcapabilities & 329192708Syongari (EXTSR_1000XFDX | EXTSR_1000XHDX)) == 0) 330165099Syongari return (EINVAL); 331165099Syongari speed = E1000_CR_SPEED_1000; 332120281Swilko break; 33375353Smjacob case IFM_100_TX: 334165099Syongari speed = E1000_CR_SPEED_100; 33575353Smjacob break; 33675353Smjacob case IFM_10_T: 337165099Syongari speed = E1000_CR_SPEED_10; 33875353Smjacob break; 339165099Syongari case IFM_NONE: 340165099Syongari reg = PHY_READ(sc, E1000_CR); 341165099Syongari PHY_WRITE(sc, E1000_CR, 342165099Syongari reg | E1000_CR_ISOLATE | E1000_CR_POWER_DOWN); 343165099Syongari goto done; 34475353Smjacob default: 34575353Smjacob return (EINVAL); 34675353Smjacob } 34775353Smjacob 348217412Smarius if ((ife->ifm_media & IFM_FDX) != 0) { 349165099Syongari speed |= E1000_CR_FULL_DUPLEX; 350165099Syongari gig = E1000_1GCR_1000T_FD; 351165099Syongari } else 352165099Syongari gig = E1000_1GCR_1000T; 353165099Syongari 354165099Syongari reg = PHY_READ(sc, E1000_CR); 355165099Syongari reg &= ~E1000_CR_AUTO_NEG_ENABLE; 356165099Syongari PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); 357165099Syongari 358215297Smarius if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 359215297Smarius gig |= E1000_1GCR_MS_ENABLE; 360215297Smarius if ((ife->ifm_media & IFM_ETH_MASTER) != 0) 361215297Smarius gig |= E1000_1GCR_MS_VALUE; 362215297Smarius } else if ((sc->mii_extcapabilities & 363215297Smarius (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 364217412Smarius gig = 0; 365217412Smarius PHY_WRITE(sc, E1000_1GCR, gig); 366165099Syongari PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); 367165099Syongari PHY_WRITE(sc, E1000_CR, speed | E1000_CR_RESET); 368165099Syongaridone: 36975353Smjacob break; 37075353Smjacob case MII_TICK: 37175353Smjacob /* 37284145Sjlemon * Is the interface even up? 37375353Smjacob */ 37484145Sjlemon if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 37575353Smjacob return (0); 37675353Smjacob 37775353Smjacob /* 37884145Sjlemon * Only used for autonegotiation. 37975353Smjacob */ 380173667Syongari if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 381173667Syongari sc->mii_ticks = 0; 38284145Sjlemon break; 383173667Syongari } 38475353Smjacob 38575353Smjacob /* 38684145Sjlemon * check for link. 38784145Sjlemon * Read the status register twice; BMSR_LINK is latch-low. 38875353Smjacob */ 38984145Sjlemon reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 390165099Syongari if (reg & BMSR_LINK) { 391165099Syongari sc->mii_ticks = 0; 39284145Sjlemon break; 393165099Syongari } 39475353Smjacob 395165099Syongari /* Announce link loss right after it happens. */ 396173667Syongari if (sc->mii_ticks++ == 0) 397173667Syongari break; 398165099Syongari if (sc->mii_ticks <= sc->mii_anegticks) 399192709Syongari break; 40075353Smjacob 40184145Sjlemon sc->mii_ticks = 0; 402221407Smarius PHY_RESET(sc); 403221407Smarius e1000phy_mii_phy_auto(sc, ife->ifm_media); 404165099Syongari break; 40575353Smjacob } 40675353Smjacob 40775353Smjacob /* Update the media status. */ 408221407Smarius PHY_STATUS(sc); 40975353Smjacob 41075353Smjacob /* Callback if something changed. */ 41184145Sjlemon mii_phy_update(sc, cmd); 41275353Smjacob return (0); 41375353Smjacob} 41475353Smjacob 41584145Sjlemonstatic void 41675353Smjacobe1000phy_status(struct mii_softc *sc) 41775353Smjacob{ 41875353Smjacob struct mii_data *mii = sc->mii_pdata; 419215297Smarius int bmcr, bmsr, ssr; 42075353Smjacob 42175353Smjacob mii->mii_media_status = IFM_AVALID; 42275353Smjacob mii->mii_media_active = IFM_ETHER; 42375353Smjacob 42475353Smjacob bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR); 42575353Smjacob bmcr = PHY_READ(sc, E1000_CR); 42675353Smjacob ssr = PHY_READ(sc, E1000_SSR); 42775353Smjacob 42875353Smjacob if (bmsr & E1000_SR_LINK_STATUS) 42975353Smjacob mii->mii_media_status |= IFM_ACTIVE; 43075353Smjacob 43175353Smjacob if (bmcr & E1000_CR_LOOPBACK) 43275353Smjacob mii->mii_media_active |= IFM_LOOP; 43375353Smjacob 434192710Syongari if ((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0 && 435192710Syongari (ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0) { 43675353Smjacob /* Erg, still trying, I guess... */ 43775353Smjacob mii->mii_media_active |= IFM_NONE; 43875353Smjacob return; 43975353Smjacob } 44075353Smjacob 441120281Swilko if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 442192710Syongari switch (ssr & E1000_SSR_SPEED) { 443192710Syongari case E1000_SSR_1000MBS: 444120281Swilko mii->mii_media_active |= IFM_1000_T; 445192710Syongari break; 446192710Syongari case E1000_SSR_100MBS: 447120281Swilko mii->mii_media_active |= IFM_100_TX; 448192710Syongari break; 449192710Syongari case E1000_SSR_10MBS: 450120281Swilko mii->mii_media_active |= IFM_10_T; 451192710Syongari break; 452192710Syongari default: 453192710Syongari mii->mii_media_active |= IFM_NONE; 454192710Syongari return; 455192710Syongari } 456120281Swilko } else { 457197588Syongari /* 458197588Syongari * Some fiber PHY(88E1112) does not seem to set resolved 459197588Syongari * speed so always assume we've got IFM_1000_SX. 460197588Syongari */ 461197588Syongari mii->mii_media_active |= IFM_1000_SX; 462120281Swilko } 46375353Smjacob 464215297Smarius if (ssr & E1000_SSR_DUPLEX) { 46575353Smjacob mii->mii_media_active |= IFM_FDX; 466215297Smarius if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) 467215297Smarius mii->mii_media_active |= mii_phy_flowstatus(sc); 468215297Smarius } else 46975353Smjacob mii->mii_media_active |= IFM_HDX; 47075353Smjacob 471215297Smarius if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { 472215297Smarius if (((PHY_READ(sc, E1000_1GSR) | PHY_READ(sc, E1000_1GSR)) & 473215297Smarius E1000_1GSR_MS_CONFIG_RES) != 0) 474215297Smarius mii->mii_media_active |= IFM_ETH_MASTER; 47575353Smjacob } 47675353Smjacob} 47775353Smjacob 47875353Smjacobstatic int 479221407Smariuse1000phy_mii_phy_auto(struct mii_softc *sc, int media) 48075353Smjacob{ 481192711Syongari uint16_t reg; 48275353Smjacob 483192711Syongari if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 484192711Syongari reg = PHY_READ(sc, E1000_AR); 485215923Smarius reg &= ~(E1000_AR_PAUSE | E1000_AR_ASM_DIR); 486192711Syongari reg |= E1000_AR_10T | E1000_AR_10T_FD | 487215297Smarius E1000_AR_100TX | E1000_AR_100TX_FD; 488215297Smarius if ((media & IFM_FLOW) != 0 || 489215297Smarius (sc->mii_flags & MIIF_FORCEPAUSE) != 0) 490215297Smarius reg |= E1000_AR_PAUSE | E1000_AR_ASM_DIR; 491192711Syongari PHY_WRITE(sc, E1000_AR, reg | E1000_AR_SELECTOR_FIELD); 492192711Syongari } else 493215297Smarius PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X); 494192708Syongari if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 495165099Syongari PHY_WRITE(sc, E1000_1GCR, 496165099Syongari E1000_1GCR_1000T_FD | E1000_1GCR_1000T); 497165099Syongari PHY_WRITE(sc, E1000_CR, 498165099Syongari E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); 49975353Smjacob 50075353Smjacob return (EJUSTRETURN); 50175353Smjacob} 502