1139749Simp/*-
2135048Swpaul * Copyright (c) 2004
3135048Swpaul *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
4135048Swpaul *
5135048Swpaul * Redistribution and use in source and binary forms, with or without
6135048Swpaul * modification, are permitted provided that the following conditions
7135048Swpaul * are met:
8135048Swpaul * 1. Redistributions of source code must retain the above copyright
9135048Swpaul *    notice, this list of conditions and the following disclaimer.
10135048Swpaul * 2. Redistributions in binary form must reproduce the above copyright
11135048Swpaul *    notice, this list of conditions and the following disclaimer in the
12135048Swpaul *    documentation and/or other materials provided with the distribution.
13135048Swpaul * 3. All advertising materials mentioning features or use of this software
14135048Swpaul *    must display the following acknowledgement:
15135048Swpaul *	This product includes software developed by Bill Paul.
16135048Swpaul * 4. Neither the name of the author nor the names of any co-contributors
17135048Swpaul *    may be used to endorse or promote products derived from this software
18135048Swpaul *    without specific prior written permission.
19135048Swpaul *
20135048Swpaul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21135048Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22135048Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23135048Swpaul * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24135048Swpaul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25135048Swpaul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26135048Swpaul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27135048Swpaul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28135048Swpaul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29135048Swpaul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30135048Swpaul * THE POSSIBILITY OF SUCH DAMAGE.
31135048Swpaul */
32135048Swpaul
33135048Swpaul#include <sys/cdefs.h>
34135048Swpaul__FBSDID("$FreeBSD$");
35135048Swpaul
36135048Swpaul/*
37178598Sraj * Driver for the Cicada/Vitesse CS/VSC8xxx 10/100/1000 copper PHY.
38135048Swpaul */
39135048Swpaul
40135048Swpaul#include <sys/param.h>
41135048Swpaul#include <sys/systm.h>
42135048Swpaul#include <sys/kernel.h>
43135048Swpaul#include <sys/module.h>
44135048Swpaul#include <sys/socket.h>
45135048Swpaul#include <sys/bus.h>
46135048Swpaul
47135048Swpaul#include <net/if.h>
48135048Swpaul#include <net/if_arp.h>
49135048Swpaul#include <net/if_media.h>
50135048Swpaul
51135048Swpaul#include <dev/mii/mii.h>
52135048Swpaul#include <dev/mii/miivar.h>
53135048Swpaul#include "miidevs.h"
54135048Swpaul
55135048Swpaul#include <dev/mii/ciphyreg.h>
56135048Swpaul
57135048Swpaul#include "miibus_if.h"
58135048Swpaul
59135048Swpaul#include <machine/bus.h>
60213893Smarius
61135048Swpaulstatic int ciphy_probe(device_t);
62135048Swpaulstatic int ciphy_attach(device_t);
63135048Swpaul
64135048Swpaulstatic device_method_t ciphy_methods[] = {
65135048Swpaul	/* device interface */
66135048Swpaul	DEVMETHOD(device_probe,		ciphy_probe),
67135048Swpaul	DEVMETHOD(device_attach,	ciphy_attach),
68135048Swpaul	DEVMETHOD(device_detach,	mii_phy_detach),
69135048Swpaul	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
70229093Shselasky	DEVMETHOD_END
71135048Swpaul};
72135048Swpaul
73135048Swpaulstatic devclass_t ciphy_devclass;
74135048Swpaul
75135048Swpaulstatic driver_t ciphy_driver = {
76135048Swpaul	"ciphy",
77135048Swpaul	ciphy_methods,
78135048Swpaul	sizeof(struct mii_softc)
79135048Swpaul};
80135048Swpaul
81135048SwpaulDRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
82135048Swpaul
83135048Swpaulstatic int	ciphy_service(struct mii_softc *, struct mii_data *, int);
84135048Swpaulstatic void	ciphy_status(struct mii_softc *);
85135048Swpaulstatic void	ciphy_reset(struct mii_softc *);
86135048Swpaulstatic void	ciphy_fixup(struct mii_softc *);
87135048Swpaul
88164827Smariusstatic const struct mii_phydesc ciphys[] = {
89221407Smarius	MII_PHY_DESC(xxCICADA, CS8201),
90221407Smarius	MII_PHY_DESC(xxCICADA, CS8201A),
91221407Smarius	MII_PHY_DESC(xxCICADA, CS8201B),
92221407Smarius	MII_PHY_DESC(xxCICADA, CS8204),
93221407Smarius	MII_PHY_DESC(xxCICADA, VSC8211),
94221407Smarius	MII_PHY_DESC(xxCICADA, CS8244),
95221407Smarius	MII_PHY_DESC(xxVITESSE, VSC8601),
96164827Smarius	MII_PHY_END
97164827Smarius};
98164827Smarius
99221407Smariusstatic const struct mii_phy_funcs ciphy_funcs = {
100221407Smarius	ciphy_service,
101221407Smarius	ciphy_status,
102221407Smarius	ciphy_reset
103221407Smarius};
104221407Smarius
105135048Swpaulstatic int
106150763Simpciphy_probe(device_t dev)
107135048Swpaul{
108135048Swpaul
109164827Smarius	return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT));
110135048Swpaul}
111135048Swpaul
112135048Swpaulstatic int
113150763Simpciphy_attach(device_t dev)
114135048Swpaul{
115135048Swpaul
116221407Smarius	mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
117221407Smarius	    &ciphy_funcs, 1);
118164705Smarius	return (0);
119135048Swpaul}
120135048Swpaul
121135048Swpaulstatic int
122150763Simpciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
123135048Swpaul{
124135048Swpaul	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
125135048Swpaul	int reg, speed, gig;
126135048Swpaul
127135048Swpaul	switch (cmd) {
128135048Swpaul	case MII_POLLSTAT:
129135048Swpaul		break;
130135048Swpaul
131135048Swpaul	case MII_MEDIACHG:
132135048Swpaul		/*
133135048Swpaul		 * If the interface is not up, don't do anything.
134135048Swpaul		 */
135135048Swpaul		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
136135048Swpaul			break;
137135048Swpaul
138135048Swpaul		ciphy_fixup(sc);	/* XXX hardware bug work-around */
139135048Swpaul
140135048Swpaul		switch (IFM_SUBTYPE(ife->ifm_media)) {
141135048Swpaul		case IFM_AUTO:
142135048Swpaul#ifdef foo
143135048Swpaul			/*
144135048Swpaul			 * If we're already in auto mode, just return.
145135048Swpaul			 */
146135048Swpaul			if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
147135048Swpaul				return (0);
148135048Swpaul#endif
149215297Smarius			(void)mii_phy_auto(sc);
150135048Swpaul			break;
151135048Swpaul		case IFM_1000_T:
152135048Swpaul			speed = CIPHY_S1000;
153135048Swpaul			goto setit;
154135048Swpaul		case IFM_100_TX:
155135048Swpaul			speed = CIPHY_S100;
156135048Swpaul			goto setit;
157135048Swpaul		case IFM_10_T:
158135048Swpaul			speed = CIPHY_S10;
159135048Swpaulsetit:
160217413Smarius			if ((ife->ifm_media & IFM_FDX) != 0) {
161135048Swpaul				speed |= CIPHY_BMCR_FDX;
162135048Swpaul				gig = CIPHY_1000CTL_AFD;
163217413Smarius			} else
164135048Swpaul				gig = CIPHY_1000CTL_AHD;
165135048Swpaul
166217413Smarius			if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
167217413Smarius				gig |= CIPHY_1000CTL_MSE;
168217413Smarius				if ((ife->ifm_media & IFM_ETH_MASTER) != 0)
169217413Smarius					gig |= CIPHY_1000CTL_MSC;
170217413Smarius				speed |=
171217413Smarius				    CIPHY_BMCR_AUTOEN | CIPHY_BMCR_STARTNEG;
172217413Smarius			} else
173217413Smarius				gig = 0;
174217413Smarius			PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
175135048Swpaul			PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
176135048Swpaul			PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
177135048Swpaul			break;
178135048Swpaul		case IFM_NONE:
179215297Smarius			PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
180135048Swpaul			break;
181135048Swpaul		default:
182135048Swpaul			return (EINVAL);
183135048Swpaul		}
184135048Swpaul		break;
185135048Swpaul
186135048Swpaul	case MII_TICK:
187135048Swpaul		/*
188135048Swpaul		 * Is the interface even up?
189135048Swpaul		 */
190135048Swpaul		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
191135048Swpaul			return (0);
192135048Swpaul
193135048Swpaul		/*
194135048Swpaul		 * Only used for autonegotiation.
195135048Swpaul		 */
196135048Swpaul		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
197135048Swpaul			break;
198135048Swpaul
199135048Swpaul		/*
200135048Swpaul		 * Check to see if we have link.  If we do, we don't
201135048Swpaul		 * need to restart the autonegotiation process.  Read
202135048Swpaul		 * the BMSR twice in case it's latched.
203135048Swpaul		 */
204135048Swpaul		reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
205135048Swpaul		if (reg & BMSR_LINK)
206135048Swpaul			break;
207135048Swpaul
208183488Syongari		/* Announce link loss right after it happens. */
209183488Syongari		if (++sc->mii_ticks == 0)
210183488Syongari			break;
211135048Swpaul		/*
212183489Syongari		 * Only retry autonegotiation every mii_anegticks seconds.
213135048Swpaul		 */
214183489Syongari		if (sc->mii_ticks <= sc->mii_anegticks)
215135048Swpaul			break;
216164705Smarius
217135048Swpaul		sc->mii_ticks = 0;
218135048Swpaul		mii_phy_auto(sc);
219183490Syongari		break;
220135048Swpaul	}
221135048Swpaul
222135048Swpaul	/* Update the media status. */
223221407Smarius	PHY_STATUS(sc);
224135048Swpaul
225135048Swpaul	/*
226135048Swpaul	 * Callback if something changed. Note that we need to poke
227135048Swpaul	 * apply fixups for certain PHY revs.
228135048Swpaul	 */
229164705Smarius	if (sc->mii_media_active != mii->mii_media_active ||
230135048Swpaul	    sc->mii_media_status != mii->mii_media_status ||
231135048Swpaul	    cmd == MII_MEDIACHG) {
232135048Swpaul		ciphy_fixup(sc);
233135048Swpaul	}
234135048Swpaul	mii_phy_update(sc, cmd);
235135048Swpaul	return (0);
236135048Swpaul}
237135048Swpaul
238135048Swpaulstatic void
239150763Simpciphy_status(struct mii_softc *sc)
240135048Swpaul{
241135048Swpaul	struct mii_data *mii = sc->mii_pdata;
242135048Swpaul	int bmsr, bmcr;
243135048Swpaul
244135048Swpaul	mii->mii_media_status = IFM_AVALID;
245135048Swpaul	mii->mii_media_active = IFM_ETHER;
246135048Swpaul
247135048Swpaul	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
248135048Swpaul
249135048Swpaul	if (bmsr & BMSR_LINK)
250135048Swpaul		mii->mii_media_status |= IFM_ACTIVE;
251135048Swpaul
252135048Swpaul	bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
253135048Swpaul
254135048Swpaul	if (bmcr & CIPHY_BMCR_LOOP)
255135048Swpaul		mii->mii_media_active |= IFM_LOOP;
256135048Swpaul
257135048Swpaul	if (bmcr & CIPHY_BMCR_AUTOEN) {
258135048Swpaul		if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
259135048Swpaul			/* Erg, still trying, I guess... */
260135048Swpaul			mii->mii_media_active |= IFM_NONE;
261135048Swpaul			return;
262135048Swpaul		}
263135048Swpaul	}
264135048Swpaul
265135048Swpaul	bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
266135048Swpaul	switch (bmsr & CIPHY_AUXCSR_SPEED) {
267135048Swpaul	case CIPHY_SPEED10:
268135048Swpaul		mii->mii_media_active |= IFM_10_T;
269135048Swpaul		break;
270135048Swpaul	case CIPHY_SPEED100:
271135048Swpaul		mii->mii_media_active |= IFM_100_TX;
272135048Swpaul		break;
273135048Swpaul	case CIPHY_SPEED1000:
274135048Swpaul		mii->mii_media_active |= IFM_1000_T;
275135048Swpaul		break;
276135048Swpaul	default:
277135048Swpaul		device_printf(sc->mii_dev, "unknown PHY speed %x\n",
278135048Swpaul		    bmsr & CIPHY_AUXCSR_SPEED);
279135048Swpaul		break;
280135048Swpaul	}
281135048Swpaul
282135048Swpaul	if (bmsr & CIPHY_AUXCSR_FDX)
283221407Smarius		mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
284183491Syongari	else
285183491Syongari		mii->mii_media_active |= IFM_HDX;
286215297Smarius
287215297Smarius	if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
288215297Smarius	   (PHY_READ(sc, CIPHY_MII_1000STS) & CIPHY_1000STS_MSR) != 0)
289215297Smarius		mii->mii_media_active |= IFM_ETH_MASTER;
290135048Swpaul}
291135048Swpaul
292135048Swpaulstatic void
293135048Swpaulciphy_reset(struct mii_softc *sc)
294135048Swpaul{
295164830Smarius
296135048Swpaul	mii_phy_reset(sc);
297135048Swpaul	DELAY(1000);
298135048Swpaul}
299135048Swpaul
300135048Swpaul#define PHY_SETBIT(x, y, z) \
301135048Swpaul	PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
302135048Swpaul#define PHY_CLRBIT(x, y, z) \
303135048Swpaul	PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
304135048Swpaul
305135048Swpaulstatic void
306135048Swpaulciphy_fixup(struct mii_softc *sc)
307135048Swpaul{
308135048Swpaul	uint16_t		model;
309135048Swpaul	uint16_t		status, speed;
310170365Syongari	uint16_t		val;
311135048Swpaul
312135048Swpaul	model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
313135048Swpaul	status = PHY_READ(sc, CIPHY_MII_AUXCSR);
314135048Swpaul	speed = status & CIPHY_AUXCSR_SPEED;
315135048Swpaul
316170365Syongari	if (strcmp(device_get_name(device_get_parent(sc->mii_dev)),
317170365Syongari	    "nfe") == 0) {
318170365Syongari		/* need to set for 2.5V RGMII for NVIDIA adapters */
319170365Syongari		val = PHY_READ(sc, CIPHY_MII_ECTL1);
320170365Syongari		val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL);
321170365Syongari		val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII);
322170365Syongari		PHY_WRITE(sc, CIPHY_MII_ECTL1, val);
323170365Syongari		/* From Linux. */
324170365Syongari		val = PHY_READ(sc, CIPHY_MII_AUXCSR);
325170365Syongari		val |= CIPHY_AUXCSR_MDPPS;
326170365Syongari		PHY_WRITE(sc, CIPHY_MII_AUXCSR, val);
327170365Syongari		val = PHY_READ(sc, CIPHY_MII_10BTCSR);
328170365Syongari		val |= CIPHY_10BTCSR_ECHO;
329170365Syongari		PHY_WRITE(sc, CIPHY_MII_10BTCSR, val);
330170365Syongari	}
331170365Syongari
332135048Swpaul	switch (model) {
333221407Smarius	case MII_MODEL_xxCICADA_CS8204:
334221407Smarius	case MII_MODEL_xxCICADA_CS8201:
335135048Swpaul
336135048Swpaul		/* Turn off "aux mode" (whatever that means) */
337135048Swpaul		PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
338135048Swpaul
339135048Swpaul		/*
340135048Swpaul		 * Work around speed polling bug in VT3119/VT3216
341135048Swpaul		 * when using MII in full duplex mode.
342135048Swpaul		 */
343135048Swpaul		if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
344135048Swpaul		    (status & CIPHY_AUXCSR_FDX)) {
345135048Swpaul			PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
346135048Swpaul		} else {
347135048Swpaul			PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
348135048Swpaul		}
349135048Swpaul
350135048Swpaul		/* Enable link/activity LED blink. */
351135048Swpaul		PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
352135048Swpaul
353135048Swpaul		break;
354135048Swpaul
355221407Smarius	case MII_MODEL_xxCICADA_CS8201A:
356221407Smarius	case MII_MODEL_xxCICADA_CS8201B:
357135048Swpaul
358135048Swpaul		/*
359135048Swpaul		 * Work around speed polling bug in VT3119/VT3216
360135048Swpaul		 * when using MII in full duplex mode.
361135048Swpaul		 */
362135048Swpaul		if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
363135048Swpaul		    (status & CIPHY_AUXCSR_FDX)) {
364135048Swpaul			PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
365135048Swpaul		} else {
366135048Swpaul			PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
367135048Swpaul		}
368135048Swpaul
369135048Swpaul		break;
370221407Smarius	case MII_MODEL_xxCICADA_VSC8211:
371221407Smarius	case MII_MODEL_xxCICADA_CS8244:
372221407Smarius	case MII_MODEL_xxVITESSE_VSC8601:
373170365Syongari		break;
374135048Swpaul	default:
375135048Swpaul		device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",
376135048Swpaul		    model);
377135048Swpaul		break;
378135048Swpaul	}
379135048Swpaul}
380