isp_target.h revision 83005
1/* $FreeBSD: head/sys/dev/isp/isp_target.h 83005 2001-09-04 19:42:13Z mjacob $ */
2/*
3 * Qlogic Target Mode Structure and Flag Definitions
4 *
5 * Copyright (c) 1997, 1998
6 * Patrick Stirling
7 * pms@psconsult.com
8 * All rights reserved.
9 *
10 * Additional Copyright (c) 1999, 2000, 2001
11 * Matthew Jacob
12 * mjacob@feral.com
13 * All rights reserved.
14 *
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 * 1. Redistributions of source code must retain the above copyright
20 *    notice immediately at the beginning of the file, without modification,
21 *    this list of conditions, and the following disclaimer.
22 * 2. The name of the author may not be used to endorse or promote products
23 *    derived from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
29 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 */
36#ifndef	_ISP_TARGET_H
37#define	_ISP_TARGET_H
38
39/*
40 * Defines for all entry types
41 */
42#define QLTM_SVALID	0x80
43#define	QLTM_SENSELEN	18
44
45/*
46 * Structure for Enable Lun and Modify Lun queue entries
47 */
48typedef struct {
49	isphdr_t	le_header;
50	u_int32_t	le_reserved;
51	u_int8_t	le_lun;
52	u_int8_t	le_rsvd;
53	u_int8_t	le_ops;		/* Modify LUN only */
54	u_int8_t	le_tgt;		/* Not for FC */
55	u_int32_t	le_flags;	/* Not for FC */
56	u_int8_t	le_status;
57	u_int8_t	le_reserved2;
58	u_int8_t	le_cmd_count;
59	u_int8_t	le_in_count;
60	u_int8_t	le_cdb6len;	/* Not for FC */
61	u_int8_t	le_cdb7len;	/* Not for FC */
62	u_int16_t	le_timeout;
63	u_int16_t	le_reserved3[20];
64} lun_entry_t;
65
66/*
67 * le_flags values
68 */
69#define LUN_TQAE	0x00000002	/* bit1  Tagged Queue Action Enable */
70#define LUN_DSSM	0x01000000	/* bit24 Disable Sending SDP Message */
71#define	LUN_DISAD	0x02000000	/* bit25 Disable autodisconnect */
72#define LUN_DM		0x40000000	/* bit30 Disconnects Mandatory */
73
74/*
75 * le_ops values
76 */
77#define LUN_CCINCR	0x01	/* increment command count */
78#define LUN_CCDECR	0x02	/* decrement command count */
79#define LUN_ININCR	0x40	/* increment immed. notify count */
80#define LUN_INDECR	0x80	/* decrement immed. notify count */
81
82/*
83 * le_status values
84 */
85#define	LUN_OK		0x01	/* we be rockin' */
86#define LUN_ERR		0x04	/* request completed with error */
87#define LUN_INVAL	0x06	/* invalid request */
88#define LUN_NOCAP	0x16	/* can't provide requested capability */
89#define LUN_ENABLED	0x3E	/* LUN already enabled */
90
91/*
92 * Immediate Notify Entry structure
93 */
94#define IN_MSGLEN	8	/* 8 bytes */
95#define IN_RSVDLEN	8	/* 8 words */
96typedef struct {
97	isphdr_t	in_header;
98	u_int32_t	in_reserved;
99	u_int8_t	in_lun;		/* lun */
100	u_int8_t	in_iid;		/* initiator */
101	u_int8_t	in_reserved2;
102	u_int8_t	in_tgt;		/* target */
103	u_int32_t	in_flags;
104	u_int8_t	in_status;
105	u_int8_t	in_rsvd2;
106	u_int8_t	in_tag_val;	/* tag value */
107	u_int8_t	in_tag_type;	/* tag type */
108	u_int16_t	in_seqid;	/* sequence id */
109	u_int8_t	in_msg[IN_MSGLEN];	/* SCSI message bytes */
110	u_int16_t	in_reserved3[IN_RSVDLEN];
111	u_int8_t	in_sense[QLTM_SENSELEN];/* suggested sense data */
112} in_entry_t;
113
114typedef struct {
115	isphdr_t	in_header;
116	u_int32_t	in_reserved;
117	u_int8_t	in_lun;		/* lun */
118	u_int8_t	in_iid;		/* initiator */
119	u_int16_t	in_scclun;
120	u_int32_t	in_reserved2;
121	u_int16_t	in_status;
122	u_int16_t	in_task_flags;
123	u_int16_t	in_seqid;	/* sequence id */
124} in_fcentry_t;
125
126/*
127 * Values for the in_status field
128 */
129#define	IN_REJECT	0x0D	/* Message Reject message received */
130#define IN_RESET	0x0E	/* Bus Reset occurred */
131#define IN_NO_RCAP	0x16	/* requested capability not available */
132#define IN_IDE_RECEIVED	0x33	/* Initiator Detected Error msg received */
133#define IN_RSRC_UNAVAIL	0x34	/* resource unavailable */
134#define IN_MSG_RECEIVED	0x36	/* SCSI message received */
135#define	IN_ABORT_TASK	0x20	/* task named in RX_ID is being aborted (FC) */
136#define	IN_PORT_LOGOUT	0x29	/* port has logged out (FC) */
137#define	IN_PORT_CHANGED	0x2A	/* port changed */
138#define	IN_GLOBAL_LOGO	0x2E	/* all ports logged out */
139#define	IN_NO_NEXUS	0x3B	/* Nexus not established */
140
141/*
142 * Values for the in_task_flags field- should only get one at a time!
143 */
144#define	TASK_FLAGS_ABORT_TASK		(1<<9)
145#define	TASK_FLAGS_CLEAR_TASK_SET	(1<<10)
146#define	TASK_FLAGS_TARGET_RESET		(1<<13)
147#define	TASK_FLAGS_CLEAR_ACA		(1<<14)
148#define	TASK_FLAGS_TERMINATE_TASK	(1<<15)
149
150#ifndef	MSG_ABORT_TAG
151#define	MSG_ABORT_TAG		0x06
152#endif
153#ifndef	MSG_CLEAR_QUEUE
154#define	MSG_CLEAR_QUEUE		0x0e
155#endif
156#ifndef	MSG_BUS_DEV_RESET
157#define	MSG_BUS_DEV_RESET	0x0b
158#endif
159#ifndef	MSG_REL_RECOVERY
160#define	MSG_REL_RECOVERY	0x10
161#endif
162#ifndef	MSG_TERM_IO_PROC
163#define	MSG_TERM_IO_PROC	0x11
164#endif
165
166
167/*
168 * Notify Acknowledge Entry structure
169 */
170#define NA_RSVDLEN	22
171typedef struct {
172	isphdr_t	na_header;
173	u_int32_t	na_reserved;
174	u_int8_t	na_lun;		/* lun */
175	u_int8_t	na_iid;		/* initiator */
176	u_int8_t	na_reserved2;
177	u_int8_t	na_tgt;		/* target */
178	u_int32_t	na_flags;
179	u_int8_t	na_status;
180	u_int8_t	na_event;
181	u_int16_t	na_seqid;	/* sequence id */
182	u_int16_t	na_reserved3[NA_RSVDLEN];
183} na_entry_t;
184
185/*
186 * Value for the na_event field
187 */
188#define NA_RST_CLRD	0x80	/* Clear an async event notification */
189#define	NA_OK		0x01	/* Notify Acknowledge Succeeded */
190#define	NA_INVALID	0x06	/* Invalid Notify Acknowledge */
191
192#define	NA2_RSVDLEN	21
193typedef struct {
194	isphdr_t	na_header;
195	u_int32_t	na_reserved;
196	u_int8_t	na_lun;		/* lun */
197	u_int8_t	na_iid;		/* initiator */
198	u_int16_t	na_scclun;
199	u_int16_t	na_flags;
200	u_int16_t	na_reserved2;
201	u_int16_t	na_status;
202	u_int16_t	na_task_flags;
203	u_int16_t	na_seqid;	/* sequence id */
204	u_int16_t	na_reserved3[NA2_RSVDLEN];
205} na_fcentry_t;
206#define	NAFC_RCOUNT	0x80	/* increment resource count */
207#define NAFC_RST_CLRD	0x20	/* Clear LIP Reset */
208/*
209 * Accept Target I/O Entry structure
210 */
211#define ATIO_CDBLEN	26
212
213typedef struct {
214	isphdr_t	at_header;
215	u_int16_t	at_reserved;
216	u_int16_t	at_handle;
217	u_int8_t	at_lun;		/* lun */
218	u_int8_t	at_iid;		/* initiator */
219	u_int8_t	at_cdblen; 	/* cdb length */
220	u_int8_t	at_tgt;		/* target */
221	u_int32_t	at_flags;
222	u_int8_t	at_status;	/* firmware status */
223	u_int8_t	at_scsi_status;	/* scsi status */
224	u_int8_t	at_tag_val;	/* tag value */
225	u_int8_t	at_tag_type;	/* tag type */
226	u_int8_t	at_cdb[ATIO_CDBLEN];	/* received CDB */
227	u_int8_t	at_sense[QLTM_SENSELEN];/* suggested sense data */
228} at_entry_t;
229
230/*
231 * at_flags values
232 */
233#define AT_NODISC	0x00008000	/* disconnect disabled */
234#define AT_TQAE		0x00000002	/* Tagged Queue Action enabled */
235
236/*
237 * at_status values
238 */
239#define AT_PATH_INVALID	0x07	/* ATIO sent to firmware for disabled lun */
240#define	AT_RESET	0x0E	/* SCSI Bus Reset Occurred */
241#define AT_PHASE_ERROR	0x14	/* Bus phase sequence error */
242#define AT_NOCAP	0x16	/* Requested capability not available */
243#define AT_BDR_MSG	0x17	/* Bus Device Reset msg received */
244#define AT_CDB		0x3D	/* CDB received */
245
246/*
247 * Macros to create and fetch and test concatenated handle and tag value macros
248 */
249
250#define	AT_MAKE_TAGID(tid, aep)						\
251	tid = ((aep)->at_handle << 16);					\
252	if ((aep)->at_flags & AT_TQAE)					\
253		(tid) |= ((aep)->at_tag_val + 1)
254
255#define	CT_MAKE_TAGID(tid, ct)						\
256	tid = ((ct)->ct_fwhandle << 16);				\
257	if ((ct)->ct_flags & CT_TQAE)					\
258		(tid) |= ((ct)->ct_tag_val + 1)
259
260#define	AT_HAS_TAG(val)		((val) & 0xffff)
261#define	AT_GET_TAG(val)		AT_HAS_TAG(val) - 1
262#define	AT_GET_HANDLE(val)	((val) >> 16)
263
264/*
265 * Accept Target I/O Entry structure, Type 2
266 */
267#define ATIO2_CDBLEN	16
268
269typedef struct {
270	isphdr_t	at_header;
271	u_int32_t	at_reserved;
272	u_int8_t	at_lun;		/* lun or reserved */
273	u_int8_t	at_iid;		/* initiator */
274	u_int16_t	at_rxid; 	/* response ID */
275	u_int16_t	at_flags;
276	u_int16_t	at_status;	/* firmware status */
277	u_int8_t	at_reserved1;
278	u_int8_t	at_taskcodes;
279	u_int8_t	at_taskflags;
280	u_int8_t	at_execodes;
281	u_int8_t	at_cdb[ATIO2_CDBLEN];	/* received CDB */
282	u_int32_t	at_datalen;		/* allocated data len */
283	u_int16_t	at_scclun;	/* SCC Lun or reserved */
284	u_int16_t	at_reserved2[10];
285	u_int16_t	at_oxid;
286} at2_entry_t;
287
288#define	ATIO2_WWPN_OFFSET	0x2A
289#define	ATIO2_OXID_OFFSET	0x3E
290
291#define	ATIO2_TC_ATTR_MASK	0x7
292#define	ATIO2_TC_ATTR_SIMPLEQ	0
293#define	ATIO2_TC_ATTR_HEADOFQ	1
294#define	ATIO2_TC_ATTR_ORDERED	2
295#define	ATIO2_TC_ATTR_ACAQ	4
296#define	ATIO2_TC_ATTR_UNTAGGED	5
297
298/*
299 * Continue Target I/O Entry structure
300 * Request from driver. The response from the
301 * ISP firmware is the same except that the last 18
302 * bytes are overwritten by suggested sense data if
303 * the 'autosense valid' bit is set in the status byte.
304 */
305typedef struct {
306	isphdr_t	ct_header;
307	u_int16_t	ct_reserved;
308#define	ct_syshandle	ct_reserved	/* we use this */
309	u_int16_t	ct_fwhandle;	/* required by f/w */
310	u_int8_t	ct_lun;	/* lun */
311	u_int8_t	ct_iid;	/* initiator id */
312	u_int8_t	ct_reserved2;
313	u_int8_t	ct_tgt;	/* our target id */
314	u_int32_t	ct_flags;
315	u_int8_t 	ct_status;	/* isp status */
316	u_int8_t 	ct_scsi_status;	/* scsi status */
317	u_int8_t 	ct_tag_val;	/* tag value */
318	u_int8_t 	ct_tag_type;	/* tag type */
319	u_int32_t	ct_xfrlen;	/* transfer length */
320	u_int32_t	ct_resid;	/* residual length */
321	u_int16_t	ct_timeout;
322	u_int16_t	ct_seg_count;
323	ispds_t		ct_dataseg[ISP_RQDSEG];
324} ct_entry_t;
325
326/*
327 * For some of the dual port SCSI adapters, port (bus #) is reported
328 * in the MSbit of ct_iid. Bit fields are a bit too awkward here.
329 *
330 * Note that this does not apply to FC adapters at all which can and
331 * do report IIDs between 129 && 255 (these represent devices that have
332 * logged in across a SCSI fabric).
333 */
334#define	GET_IID_VAL(x)		(x & 0x3f)
335#define	GET_BUS_VAL(x)		((x >> 7) & 0x1)
336#define	SET_IID_VAL(y, x)	y = ((y & ~0x3f) | (x & 0x3f))
337#define	SET_BUS_VAL(y, x)	y = ((y & 0x3f) | ((x & 0x1) << 7))
338
339/*
340 * ct_flags values
341 */
342#define CT_TQAE		0x00000002	/* bit  1, Tagged Queue Action enable */
343#define CT_DATA_IN	0x00000040	/* bits 6&7, Data direction */
344#define CT_DATA_OUT	0x00000080	/* bits 6&7, Data direction */
345#define CT_NO_DATA	0x000000C0	/* bits 6&7, Data direction */
346#define	CT_CCINCR	0x00000100	/* bit 8, autoincrement atio count */
347#define CT_DATAMASK	0x000000C0	/* bits 6&7, Data direction */
348#define	CT_INISYNCWIDE	0x00004000	/* bit 14, Do Sync/Wide Negotiation */
349#define CT_NODISC	0x00008000	/* bit 15, Disconnects disabled */
350#define CT_DSDP		0x01000000	/* bit 24, Disable Save Data Pointers */
351#define CT_SENDRDP	0x04000000	/* bit 26, Send Restore Pointers msg */
352#define CT_SENDSTATUS	0x80000000	/* bit 31, Send SCSI status byte */
353
354/*
355 * ct_status values
356 * - set by the firmware when it returns the CTIO
357 */
358#define CT_OK		0x01	/* completed without error */
359#define CT_ABORTED	0x02	/* aborted by host */
360#define CT_ERR		0x04	/* see sense data for error */
361#define CT_INVAL	0x06	/* request for disabled lun */
362#define CT_NOPATH	0x07	/* invalid ITL nexus */
363#define	CT_INVRXID	0x08	/* (FC only) Invalid RX_ID */
364#define	CT_DATA_OVER	0x09	/* (FC only) Data Overrun */
365#define CT_RSELTMO	0x0A	/* reselection timeout after 2 tries */
366#define CT_TIMEOUT	0x0B	/* timed out */
367#define CT_RESET	0x0E	/* SCSI Bus Reset occurred */
368#define	CT_PARITY	0x0F	/* Uncorrectable Parity Error */
369#define	CT_BUS_ERROR	0x10	/* (FC Only) DMA PCI Error */
370#define	CT_PANIC	0x13	/* Unrecoverable Error */
371#define CT_PHASE_ERROR	0x14	/* Bus phase sequence error */
372#define CT_BDR_MSG	0x17	/* Bus Device Reset msg received */
373#define	CT_DATA_UNDER	0x15	/* (FC only) Data Underrun */
374#define CT_TERMINATED	0x19	/* due to Terminate Transfer mbox cmd */
375#define	CT_PORTNOTAVAIL	0x28	/* port not available */
376#define	CT_LOGOUT	0x29	/* port logout */
377#define	CT_PORTCHANGED	0x2A	/* port changed */
378#define	CT_IDE		0x33	/* Initiator Detected Error */
379#define CT_NOACK	0x35	/* Outstanding Immed. Notify. entry */
380
381/*
382 * When the firmware returns a CTIO entry, it may overwrite the last
383 * part of the structure with sense data. This starts at offset 0x2E
384 * into the entry, which is in the middle of ct_dataseg[1]. Rather
385 * than define a new struct for this, I'm just using the sense data
386 * offset.
387 */
388#define CTIO_SENSE_OFFSET	0x2E
389
390/*
391 * Entry length in u_longs. All entries are the same size so
392 * any one will do as the numerator.
393 */
394#define UINT32_ENTRY_SIZE	(sizeof(at_entry_t)/sizeof(u_int32_t))
395
396/*
397 * QLA2100 CTIO (type 2) entry
398 */
399#define	MAXRESPLEN	26
400typedef struct {
401	isphdr_t	ct_header;
402	u_int16_t	ct_reserved;
403	u_int16_t	ct_fwhandle;	/* just to match CTIO */
404	u_int8_t	ct_lun;	/* lun */
405	u_int8_t	ct_iid;	/* initiator id */
406	u_int16_t	ct_rxid; /* response ID */
407	u_int16_t	ct_flags;
408	u_int16_t 	ct_status;	/* isp status */
409	u_int16_t	ct_timeout;
410	u_int16_t	ct_seg_count;
411	u_int32_t	ct_reloff;	/* relative offset */
412	int32_t		ct_resid;	/* residual length */
413	union {
414		/*
415		 * The three different modes that the target driver
416		 * can set the CTIO2 up as.
417		 *
418		 * The first is for sending FCP_DATA_IUs as well as
419		 * (optionally) sending a terminal SCSI status FCP_RSP_IU.
420		 *
421		 * The second is for sending SCSI sense data in an FCP_RSP_IU.
422		 * Note that no FCP_DATA_IUs will be sent.
423		 *
424		 * The third is for sending FCP_RSP_IUs as built specifically
425		 * in system memory as located by the isp_dataseg.
426		 */
427		struct {
428			u_int32_t _reserved;
429			u_int16_t _reserved2;
430			u_int16_t ct_scsi_status;
431			u_int32_t ct_xfrlen;
432			ispds_t ct_dataseg[ISP_RQDSEG_T2];
433			/*
434			 * For CTIO3, an ispds64_t would go here, padded
435			 * to the end of the request.
436			 */
437			/*
438			 * For CTIO4, an ispdlist_t would go here, padded
439			 * to the end of the request.
440			 */
441		} m0;
442		struct {
443			u_int16_t _reserved;
444			u_int16_t _reserved2;
445			u_int16_t ct_senselen;
446			u_int16_t ct_scsi_status;
447			u_int16_t ct_resplen;
448			u_int8_t  ct_resp[MAXRESPLEN];
449		} m1;
450		struct {
451			u_int32_t _reserved;
452			u_int16_t _reserved2;
453			u_int16_t _reserved3;
454			u_int32_t ct_datalen;
455			ispds_t ct_fcp_rsp_iudata;
456		} m2;
457		/*
458		 * CTIO2 returned from F/W...
459		 */
460		struct {
461			u_int32_t _reserved[4];
462			u_int16_t ct_scsi_status;
463			u_int8_t  ct_sense[QLTM_SENSELEN];
464		} fw;
465	} rsp;
466} ct2_entry_t;
467
468/*
469 * ct_flags values for CTIO2
470 */
471#define	CT2_FLAG_MMASK	0x0003
472#define	CT2_FLAG_MODE0	0x0000
473#define	CT2_FLAG_MODE1	0x0001
474#define	CT2_FLAG_MODE2	0x0002
475#define CT2_DATA_IN	CT_DATA_IN
476#define CT2_DATA_OUT	CT_DATA_OUT
477#define CT2_NO_DATA	CT_NO_DATA
478#define CT2_DATAMASK	CT_DATAMASK
479#define	CT2_CCINCR	0x0100
480#define	CT2_FASTPOST	0x0200
481#define CT2_SENDSTATUS	0x8000
482
483/*
484 * ct_status values are (mostly) the same as that for ct_entry.
485 */
486
487/*
488 * ct_scsi_status values- the low 8 bits are the normal SCSI status
489 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU
490 * fields.
491 */
492#define	CT2_RSPLEN_VALID	0x0100
493#define	CT2_SNSLEN_VALID	0x0200
494#define	CT2_DATA_OVER		0x0400
495#define	CT2_DATA_UNDER		0x0800
496
497/*
498 * Macros for packing/unpacking the above structures
499 */
500
501#ifdef	__sparc__
502#define	ISP_SBUS_SWOZZLE(isp, src, dst, taga, tagb)	\
503	if (isp->isp_bustype == ISP_BT_SBUS) {	\
504		u_int8_t tmp = src -> taga;	\
505		dst -> taga =  dst -> tagb;	\
506		src -> tagb =  tmp;		\
507	} else { \
508		dst -> taga =  src -> taga;	\
509		dst -> tagb =  src -> taga;	\
510	}
511#else
512#define	ISP_SBUS_SWOZZLE(isp, src, dst, taga, tagb)	\
513		dst -> taga =  src -> taga;	\
514		dst -> tagb =  src -> taga
515#endif
516
517#define	MCIDF(d, s)	if ((void *) d != (void *)s) MEMCPY(d, s, QENTRY_LEN)
518
519/* This is really only for SBus cards on a sparc */
520#ifdef	__sparc__
521#define	ISP_SWIZ_ATIO(isp, vdst, vsrc)					\
522{									\
523	at_entry_t *src = (at_entry_t *) vsrc;				\
524	at_entry_t *dst = (at_entry_t *) vdst;				\
525	dst->at_header = src->at_header;				\
526	dst->at_reserved = src->at_reserved;				\
527	dst->at_handle = src->at_handle;				\
528	ISP_SBUS_SWOZZLE(isp, src, dst, at_lun, at_iid);		\
529	ISP_SBUS_SWOZZLE(isp, src, dst, at_cdblen, at_tgt);		\
530	dst->at_flags = src->at_flags;					\
531	ISP_SBUS_SWOZZLE(isp, src, dst, at_status, at_scsi_status);	\
532	ISP_SBUS_SWOZZLE(isp, src, dst, at_tag_val, at_tag_type);	\
533	MEMCPY(dst->at_cdb, src->at_cdb, ATIO_CDBLEN);			\
534	MEMCPY(dst->at_sense, src->at_sense, QLTM_SENSELEN);		\
535}
536#define	ISP_SWIZ_ATIO2(isp, vdst, vsrc)					\
537{									\
538	at2_entry_t *src = (at2_entry_t *) vsrc;			\
539	at2_entry_t *dst = (at2_entry_t *) vdst;			\
540	dst->at_reserved = src->at_reserved;				\
541	ISP_SBUS_SWOZZLE(isp, src, dst, at_lun, at_iid);		\
542	dst->at_rxid = src->at_rxid;					\
543	dst->at_flags = src->at_flags;					\
544	dst->at_status = src->at_status;				\
545	ISP_SBUS_SWOZZLE(isp, src, dst, at_reserved1, at_taskcodes);	\
546	ISP_SBUS_SWOZZLE(isp, src, dst, at_taskflags, at_execodes);	\
547	MEMCPY(dst->at_cdb, src->at_cdb, ATIO2_CDBLEN);			\
548	dst->at_datalen = src->at_datalen;				\
549	dst->at_scclun = src->at_scclun;				\
550	MEMCPY(dst->at_reserved2, src->at_reserved2, sizeof dst->at_reserved2);\
551	dst->at_oxid = src->at_oxid;					\
552}
553#define	ISP_SWIZ_CTIO(isp, vdst, vsrc)					\
554{									\
555	ct_entry_t *src = (ct_entry_t *) vsrc;				\
556	ct_entry_t *dst = (ct_entry_t *) vdst;				\
557	dst->ct_header = src->ct_header;				\
558	dst->ct_syshandle = src->ct_syshandle;				\
559	dst->ct_fwhandle = src->ct_fwhandle;				\
560	dst->ct_fwhandle = src->ct_fwhandle;				\
561	ISP_SBUS_SWOZZLE(isp, src, dst, ct_lun, ct_iid);		\
562	ISP_SBUS_SWOZZLE(isp, src, dst, ct_reserved2, ct_tgt);		\
563	dst->ct_flags = src->ct_flags;					\
564	ISP_SBUS_SWOZZLE(isp, src, dst, ct_status, ct_scsi_status);	\
565	ISP_SBUS_SWOZZLE(isp, src, dst, ct_tag_val, ct_tag_type);	\
566	dst->ct_xfrlen = src->ct_xfrlen;				\
567	dst->ct_resid = src->ct_resid;					\
568	dst->ct_timeout = src->ct_timeout;				\
569	dst->ct_seg_count = src->ct_seg_count;				\
570	MEMCPY(dst->ct_dataseg, src->ct_dataseg, sizeof (dst->ct_dataseg)); \
571}
572#define	ISP_SWIZ_CTIO2(isp, vdst, vsrc)					\
573{									\
574	ct2_entry_t *src = (ct2_entry_t *) vsrc;			\
575	ct2_entry_t *dst = (ct2_entry_t *) vdst;			\
576	dst->ct_header = src->ct_header;				\
577	dst->ct_syshandle = src->ct_syshandle;				\
578	dst->ct_fwhandle = src->ct_fwhandle;				\
579	dst->ct_fwhandle = src->ct_fwhandle;				\
580	ISP_SBUS_SWOZZLE(isp, src, dst, ct_lun, ct_iid);		\
581	dst->ct_rxid = src->ct_rxid;					\
582	dst->ct_flags = src->ct_flags;					\
583	dst->ct_status = src->ct_status;				\
584	dst->ct_timeout = src->ct_timeout;				\
585	dst->ct_seg_count = src->ct_seg_count;				\
586	dst->ct_reloff = src->ct_reloff;				\
587	dst->ct_resid = src->ct_resid;					\
588	dst->rsp = src->rsp;						\
589}
590#define	ISP_SWIZ_ENABLE_LUN(isp, vdst, vsrc)				\
591{									\
592	lun_entry_t *src = (lun_entry_t *)vsrc;				\
593	lun_entry_t *dst = (lun_entry_t *)vdst;				\
594	dst->le_header = src->le_header;				\
595	dst->le_reserved2 = src->le_reserved2;				\
596	ISP_SBUS_SWOZZLE(isp, src, dst, le_lun, le_rsvd);		\
597	ISP_SBUS_SWOZZLE(isp, src, dst, le_ops, le_tgt);		\
598	dst->le_flags = src->le_flags;					\
599	ISP_SBUS_SWOZZLE(isp, src, dst, le_status, le_reserved2);	\
600	ISP_SBUS_SWOZZLE(isp, src, dst, le_cmd_count, le_in_count);	\
601	ISP_SBUS_SWOZZLE(isp, src, dst, le_cdb6len, le_cdb7len);	\
602	dst->le_timeout = src->le_timeout;				\
603	dst->le_reserved = src->le_reserved;				\
604}
605#define	ISP_SWIZ_NOTIFY(isp, vdst, vsrc)				\
606{									\
607	in_entry_type *src = (in_entry_t *)vsrc;			\
608	in_entry_type *dst = (in_entry_t *)vdst;			\
609	dst->in_header = src->in_header;				\
610	dst->in_reserved2 = src->in_reserved2;				\
611	ISP_SBUS_SWOZZLE(isp, src, dst, in_lun, in_iid);		\
612	ISP_SBUS_SWOZZLE(isp, src, dst, in_reserved2, in_tgt);		\
613	dst->in_flags = src->in_flags;					\
614	ISP_SBUS_SWOZZLE(isp, src, dst, in_status, in_rsvd2);		\
615	ISP_SBUS_SWOZZLE(isp, src, dst, in_tag_val, in_tag_type);	\
616	dst->in_seqid = src->in_seqid;					\
617	MEMCPY(dst->in_msg, src->in_msg, IN_MSGLEN);			\
618	MEMCPY(dst->in_reserved, src->in_reserved, IN_RESERVED);	\
619	MEMCPY(dst->in_sense, src->in_sense, QLTM_SENSELEN);		\
620}
621#define	ISP_SWIZ_NOTIFY_FC(isp, vdst, vsrc)				\
622{									\
623	in_fcentry_type *src = (in_fcentry_t *)vsrc;			\
624	in_fcentry_type *dst = (in_fcentry_t *)vdst;			\
625	dst->in_header = src->in_header;				\
626	dst->in_reserved2 = src->in_reserved2;				\
627	ISP_SBUS_SWOZZLE(isp, src, dst, in_lun, in_iid);		\
628	dst->in_scclun = src->in_scclun;				\
629	dst->in_reserved2 = src->in_reserved2;				\
630	dst->in_status = src->in_status;				\
631	dst->in_task_flags = src->in_task_flags;			\
632	dst->in_seqid = src->in_seqid;					\
633}
634#define	ISP_SWIZ_NOT_ACK(isp, vdst, vsrc)				\
635{									\
636	na_entry_t *src = (na_entry_t *)vsrc;				\
637	na_entry_t *dst = (na_entry_t *)vdst;				\
638	dst->na_header = src->na_header;				\
639	dst->na_reserved = src->na_reserved;				\
640	ISP_SBUS_SWOZZLE(isp, src, dst, na_lun, na_iid);		\
641	dst->na_reserved2 = src->na_reserved2;				\
642	ISP_SBUS_SWOZZLE(isp, src, dst, na_reserved, na_tgt);		\
643	dst->na_flags = src->na_flags;					\
644	ISP_SBUS_SWOZZLE(isp, src, dst, na_status, na_event);		\
645	dst->na_seqid = src->na_seqid;					\
646	MEMCPY(dst->na_reserved3, src->na_reserved3, NA_RSVDLEN);	\
647}
648#define	ISP_SWIZ_NOT_ACK_FC(isp, vdst, vsrc)				\
649{									\
650	na_fcentry_t *src = (na_fcentry_t *)vsrc;			\
651	na_fcentry_t *dst = (na_fcentry_t *)vdst;			\
652	dst->na_header = src->na_header;				\
653	dst->na_reserved = src->na_reserved;				\
654	ISP_SBUS_SWOZZLE(isp, src, dst, na_lun, na_iid);		\
655	dst->na_scclun = src->na_scclun;				\
656	dst->na_flags = src->na_flags;					\
657	dst->na_reserved2 = src->na_reserved2;				\
658	dst->na_status = src->na_status;				\
659	dst->na_task_flags = src->na_task_flags;			\
660	dst->na_seqid = src->na_seqid;					\
661	MEMCPY(dst->na_reserved3, src->na_reserved3, NA2_RSVDLEN);	\
662}
663#else
664#define	ISP_SWIZ_ATIO(isp, d, s)	MCIDF(d, s)
665#define	ISP_SWIZ_ATIO2(isp, d, s)	MCIDF(d, s)
666#define	ISP_SWIZ_CTIO(isp, d, s)	MCIDF(d, s)
667#define	ISP_SWIZ_CTIO2(isp, d, s)	MCIDF(d, s)
668#define	ISP_SWIZ_ENABLE_LUN(isp, d, s)	MCIDF(d, s)
669#define	ISP_SWIZ_ATIO2(isp, d, s)	MCIDF(d, s)
670#define	ISP_SWIZ_CTIO2(isp, d, s)	MCIDF(d, s)
671#define	ISP_SWIZ_NOTIFY(isp, d, s)	MCIDF(d, s)
672#define	ISP_SWIZ_NOTIFY_FC(isp, d, s)	MCIDF(d, s)
673#define	ISP_SWIZ_NOT_ACK(isp, d, s)	MCIDF(d, s)
674#define	ISP_SWIZ_NOT_ACK_FC(isp, d, s)	MCIDF(d, s)
675#endif
676
677/*
678 * Debug macros
679 */
680
681#define	ISP_TDQE(isp, msg, idx, arg)	\
682    if (isp->isp_dblev & ISP_LOGTDEBUG2) isp_print_qentry(isp, msg, idx, arg)
683
684/*
685 * The functions below are target mode functions that
686 * are generally internal to the Qlogic driver.
687 */
688
689/*
690 * This function handles new response queue entry appropriate for target mode.
691 */
692int isp_target_notify(struct ispsoftc *, void *, u_int16_t *);
693
694/*
695 * Enable/Disable/Modify a logical unit.
696 * (softc, cmd, bus, tgt, lun, cmd_cnt, inotify_cnt, opaque)
697 */
698#define	DFLT_CMND_CNT	32
699#define	DFLT_INOT_CNT	4
700int isp_lun_cmd(struct ispsoftc *, int, int, int, int, int, int, u_int32_t);
701
702/*
703 * General request queue 'put' routine for target mode entries.
704 */
705int isp_target_put_entry(struct ispsoftc *isp, void *);
706
707/*
708 * General routine to put back an ATIO entry-
709 * used for replenishing f/w resource counts.
710 * The argument is a pointer to a source ATIO
711 * or ATIO2.
712 */
713int isp_target_put_atio(struct ispsoftc *, void *);
714
715/*
716 * General routine to send a final CTIO for a command- used mostly for
717 * local responses.
718 */
719int isp_endcmd(struct ispsoftc *, void *, u_int32_t, u_int16_t);
720#define	ECMD_SVALID	0x100
721
722/*
723 * Handle an asynchronous event
724 */
725
726void isp_target_async(struct ispsoftc *, int, int);
727
728#endif	/* _ISP_TARGET_H */
729