isp_target.h revision 56005
1116742Ssam/* $FreeBSD: head/sys/dev/isp/isp_target.h 56005 2000-01-15 01:48:24Z mjacob $ */ 2116904Ssam/* 3139530Ssam * Qlogic Target Mode Structure and Flag Definitions 4116742Ssam * 5116742Ssam * Copyright (c) 1997, 1998 6116742Ssam * Patrick Stirling 7116742Ssam * pms@psconsult.com 8116742Ssam * All rights reserved. 9116742Ssam * 10116904Ssam * Additional Copyright (c) 1999 11116904Ssam * Matthew Jacob 12116904Ssam * mjacob@feral.com 13116904Ssam * All rights reserved. 14116904Ssam * 15116904Ssam * 16116742Ssam * Redistribution and use in source and binary forms, with or without 17116742Ssam * modification, are permitted provided that the following conditions 18116742Ssam * are met: 19116742Ssam * 1. Redistributions of source code must retain the above copyright 20116742Ssam * notice immediately at the beginning of the file, without modification, 21116904Ssam * this list of conditions, and the following disclaimer. 22116904Ssam * 2. Redistributions in binary form must reproduce the above copyright 23116904Ssam * notice, this list of conditions and the following disclaimer in the 24116904Ssam * documentation and/or other materials provided with the distribution. 25116904Ssam * 3. The name of the author may not be used to endorse or promote products 26116904Ssam * derived from this software without specific prior written permission. 27116904Ssam * 28116904Ssam * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 29116904Ssam * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30116904Ssam * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31116742Ssam * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 32116742Ssam * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33116742Ssam * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34116742Ssam * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35116742Ssam * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36116742Ssam * SUCH DAMAGE. 37116742Ssam * 38116742Ssam */ 39116742Ssam#ifndef _ISPTARGET_H 40116742Ssam#define _ISPTARGET_H 41138568Ssam 42116742Ssam/* 43116742Ssam * Defines for all entry types 44116742Ssam */ 45116742Ssam#define QLTM_SVALID 0x80 46116742Ssam#define QLTM_SENSELEN 18 47116742Ssam 48116742Ssam/* 49116742Ssam * Structure for Enable Lun and Modify Lun queue entries 50116742Ssam */ 51116742Ssamtypedef struct { 52147221Ssam isphdr_t le_header; 53147221Ssam u_int32_t le_reserved; 54147221Ssam u_int8_t le_lun; 55147221Ssam u_int8_t le_rsvd; 56147221Ssam u_int8_t le_ops; /* Modify LUN only */ 57147221Ssam u_int8_t le_tgt; /* Not for FC */ 58147221Ssam u_int32_t le_flags; /* Not for FC */ 59147221Ssam u_int8_t le_status; 60147221Ssam u_int8_t le_reserved2; 61147221Ssam u_int8_t le_cmd_count; 62138568Ssam u_int8_t le_in_count; 63138568Ssam u_int8_t le_cdb6len; /* Not for FC */ 64138568Ssam u_int8_t le_cdb7len; /* Not for FC */ 65138568Ssam u_int16_t le_timeout; 66116742Ssam u_int16_t le_reserved3[20]; 67138568Ssam} lun_entry_t; 68138568Ssam 69138568Ssam/* 70138568Ssam * le_flags values 71120104Ssam */ 72138568Ssam#define LUN_TQAE 0x00000001 /* bit1 Tagged Queue Action Enable */ 73138568Ssam#define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 74116742Ssam#define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 75148304Ssam 76138568Ssam/* 77138568Ssam * le_ops values 78148863Ssam */ 79148863Ssam#define LUN_CCINCR 0x01 /* increment command count */ 80138568Ssam#define LUN_CCDECR 0x02 /* decrement command count */ 81138568Ssam#define LUN_ININCR 0x40 /* increment immed. notify count */ 82138568Ssam#define LUN_INDECR 0x80 /* decrement immed. notify count */ 83127876Ssam 84120481Ssam/* 85116742Ssam * le_status values 86138568Ssam */ 87116742Ssam#define LUN_OK 0x01 /* we be rockin' */ 88116742Ssam#define LUN_ERR 0x04 /* request completed with error */ 89138568Ssam#define LUN_INVAL 0x06 /* invalid request */ 90138568Ssam#define LUN_NOCAP 0x16 /* can't provide requested capability */ 91138568Ssam#define LUN_ENABLED 0x3E /* LUN already enabled */ 92138568Ssam 93138568Ssam/* 94138568Ssam * Immediate Notify Entry structure 95138568Ssam */ 96138568Ssam#define IN_MSGLEN 8 /* 8 bytes */ 97138568Ssam#define IN_RSVDLEN 8 /* 8 words */ 98138568Ssamtypedef struct { 99138568Ssam isphdr_t in_header; 100148863Ssam u_int32_t in_reserved; 101148863Ssam u_int8_t in_lun; /* lun */ 102148863Ssam u_int8_t in_iid; /* initiator */ 103148863Ssam u_int8_t in_reserved2; 104148863Ssam u_int8_t in_tgt; /* target */ 105148863Ssam u_int32_t in_flags; 106148863Ssam u_int8_t in_status; 107148863Ssam u_int8_t in_rsvd2; 108148863Ssam u_int8_t in_tag_val; /* tag value */ 109148863Ssam u_int8_t in_tag_type; /* tag type */ 110148863Ssam u_int16_t in_seqid; /* sequence id */ 111138568Ssam u_int8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 112138568Ssam u_int16_t in_reserved3[IN_RSVDLEN]; 113138568Ssam u_int8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 114138568Ssam} in_entry_t; 115138568Ssam 116138568Ssamtypedef struct { 117138568Ssam isphdr_t in_header; 118138568Ssam u_int32_t in_reserved; 119138568Ssam u_int8_t in_lun; /* lun */ 120138568Ssam u_int8_t in_iid; /* initiator */ 121138568Ssam u_int16_t in_scclun; 122138568Ssam u_int32_t in_reserved2; 123138568Ssam u_int16_t in_status; 124138568Ssam u_int16_t in_task_flags; 125138568Ssam u_int16_t in_seqid; /* sequence id */ 126138568Ssam} in_fcentry_t; 127138568Ssam 128138568Ssam/* 129118887Ssam * Values for the in_status field 130148863Ssam */ 131148863Ssam#define IN_RESET 0x0E /* Bus Reset occurred */ 132148863Ssam#define IN_NO_RCAP 0x16 /* requested capability not available */ 133148863Ssam#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 134148863Ssam#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 135148863Ssam#define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 136118887Ssam#define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 137148863Ssam#define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 138138568Ssam#define IN_PORT_CHANGED 0x2A /* port changed */ 139138568Ssam#define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 140138568Ssam 141138568Ssam/* 142148863Ssam * Values for the in_task_flags field- should only get one at a time! 143138568Ssam */ 144138568Ssam#define TASK_FLAGS_ABORT_TASK (1<<9) 145138568Ssam#define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 146138568Ssam#define TASK_FLAGS_TARGET_RESET (1<<13) 147138568Ssam#define TASK_FLAGS_CLEAR_ACA (1<<14) 148138568Ssam#define TASK_FLAGS_TERMINATE_TASK (1<<15) 149138568Ssam 150138568Ssam#ifndef MSG_ABORT_TAG 151138568Ssam#define MSG_ABORT_TAG 0x06 152138568Ssam#endif 153138568Ssam#ifndef MSG_CLEAR_QUEUE 154138568Ssam#define MSG_CLEAR_QUEUE 0x0e 155138568Ssam#endif 156138568Ssam#ifndef MSG_BUS_DEV_RESET 157138568Ssam#define MSG_BUS_DEV_RESET 0x0b 158138568Ssam#endif 159138568Ssam#ifndef MSG_REL_RECOVERY 160138568Ssam#define MSG_REL_RECOVERY 0x10 161138568Ssam#endif 162138568Ssam#ifndef MSG_TERM_IO_PROC 163138568Ssam#define MSG_TERM_IO_PROC 0x11 164138568Ssam#endif 165138568Ssam 166138568Ssam 167138568Ssam/* 168138568Ssam * Notify Acknowledge Entry structure 169138568Ssam */ 170138568Ssam#define NA_RSVDLEN 22 171138568Ssamtypedef struct { 172138568Ssam isphdr_t na_header; 173138568Ssam u_int32_t na_reserved; 174148863Ssam u_int8_t na_lun; /* lun */ 175116742Ssam u_int8_t na_iid; /* initiator */ 176116742Ssam u_int8_t na_reserved2; 177116742Ssam u_int8_t na_tgt; /* target */ 178138568Ssam u_int32_t na_flags; 179116742Ssam u_int8_t na_status; 180116742Ssam u_int8_t na_event; 181138568Ssam u_int16_t na_seqid; /* sequence id */ 182138568Ssam u_int16_t na_reserved3[NA_RSVDLEN]; 183138568Ssam} na_entry_t; 184138568Ssam 185138568Ssam/* 186140753Ssam * Value for the na_event field 187138568Ssam */ 188138568Ssam#define NA_RST_CLRD 0x80 /* Clear an async event notification */ 189138568Ssam 190138568Ssam#define NA2_RSVDLEN 21 191138568Ssamtypedef struct { 192138568Ssam isphdr_t na_header; 193138568Ssam u_int32_t na_reserved; 194138568Ssam u_int8_t na_lun; /* lun */ 195116742Ssam u_int8_t na_iid; /* initiator */ 196116742Ssam u_int16_t na_scclun; 197138568Ssam u_int16_t na_flags; 198138568Ssam u_int16_t na_reserved2; 199138568Ssam u_int16_t na_status; 200138568Ssam u_int16_t na_task_flags; 201138568Ssam u_int16_t na_seqid; /* sequence id */ 202148302Ssam u_int16_t na_reserved3[NA2_RSVDLEN]; 203138568Ssam} na_fcentry_t; 204148302Ssam#define NAFC_RCOUNT 0x80 /* increment resource count */ 205148302Ssam#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 206138568Ssam/* 207139528Ssam * Accept Target I/O Entry structure 208138568Ssam */ 209138568Ssam#define ATIO_CDBLEN 26 210138568Ssam 211148302Ssamtypedef struct { 212138568Ssam isphdr_t at_header; 213138568Ssam u_int32_t at_reserved; 214138568Ssam u_int8_t at_lun; /* lun */ 215138568Ssam u_int8_t at_iid; /* initiator */ 216116742Ssam u_int8_t at_cdblen; /* cdb length */ 217138568Ssam u_int8_t at_tgt; /* target */ 218138568Ssam u_int32_t at_flags; 219138568Ssam u_int8_t at_status; /* firmware status */ 220153351Ssam u_int8_t at_scsi_status; /* scsi status */ 221138568Ssam u_int8_t at_tag_val; /* tag value */ 222138568Ssam u_int8_t at_tag_type; /* tag type */ 223138568Ssam u_int8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 224153351Ssam u_int8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 225153351Ssam} at_entry_t; 226138568Ssam 227138568Ssam/* 228138568Ssam * at_flags values 229138568Ssam */ 230138568Ssam#define AT_NODISC 0x00008000 /* disconnect disabled */ 231116742Ssam#define AT_TQAE 0x00000001 /* Tagged Queue Action enabled */ 232116742Ssam 233116742Ssam/* 234138568Ssam * at_status values 235138568Ssam */ 236138568Ssam#define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 237138568Ssam#define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 238138568Ssam#define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 239138568Ssam#define AT_NOCAP 0x16 /* Requested capability not available */ 240138568Ssam#define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 241138568Ssam#define AT_CDB 0x3D /* CDB received */ 242138568Ssam 243138568Ssam/* 244138568Ssam * Accept Target I/O Entry structure, Type 2 245138568Ssam */ 246138568Ssam#define ATIO2_CDBLEN 16 247138568Ssam 248138568Ssamtypedef struct { 249138568Ssam isphdr_t at_header; 250116742Ssam u_int32_t at_reserved; 251138568Ssam u_int8_t at_lun; /* lun or reserved */ 252116742Ssam u_int8_t at_iid; /* initiator */ 253116742Ssam u_int16_t at_rxid; /* response ID */ 254117811Ssam u_int16_t at_flags; 255138568Ssam u_int16_t at_status; /* firmware status */ 256116742Ssam u_int8_t at_reserved1; 257116742Ssam u_int8_t at_taskcodes; 258138568Ssam u_int8_t at_taskflags; 259138568Ssam u_int8_t at_execodes; 260138568Ssam u_int8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 261138568Ssam u_int32_t at_datalen; /* allocated data len */ 262138568Ssam u_int16_t at_scclun; /* SCC Lun or reserved */ 263138568Ssam u_int16_t at_reserved2; 264138568Ssam u_int16_t at_scsi_status; 265138568Ssam u_int8_t at_sense[QLTM_SENSELEN]; 266138568Ssam} at2_entry_t; 267138568Ssam 268138568Ssam#define ATIO2_TC_ATTR_MASK 0x7 269138568Ssam#define ATIO2_TC_ATTR_SIMPLEQ 0 270138568Ssam#define ATIO2_TC_ATTR_HEADOFQ 1 271148936Ssam#define ATIO2_TC_ATTR_ORDERED 2 272138568Ssam#define ATIO2_TC_ATTR_ACAQ 4 273138568Ssam#define ATIO2_TC_ATTR_UNTAGGED 5 274116742Ssam 275116742Ssam/* 276116742Ssam * Continue Target I/O Entry structure 277116742Ssam * Request from driver. The response from the 278116742Ssam * ISP firmware is the same except that the last 18 279116742Ssam * bytes are overwritten by suggested sense data if 280138568Ssam * the 'autosense valid' bit is set in the status byte. 281116742Ssam */ 282116742Ssamtypedef struct { 283138568Ssam isphdr_t ct_header; 284117811Ssam u_int32_t ct_reserved; 285117811Ssam u_int8_t ct_lun; /* lun */ 286117811Ssam u_int8_t ct_iid; /* initiator id */ 287117811Ssam u_int8_t ct_reserved2; 288121180Ssam u_int8_t ct_tgt; /* our target id */ 289117811Ssam u_int32_t ct_flags; 290121180Ssam u_int8_t ct_status; /* isp status */ 291121180Ssam u_int8_t ct_scsi_status; /* scsi status */ 292121180Ssam u_int8_t ct_tag_val; /* tag value */ 293139520Ssam u_int8_t ct_tag_type; /* tag type */ 294139520Ssam u_int32_t ct_xfrlen; /* transfer length */ 295138568Ssam u_int32_t ct_resid; /* residual length */ 296139520Ssam u_int16_t ct_timeout; 297116742Ssam u_int16_t ct_seg_count; 298138568Ssam ispds_t ct_dataseg[ISP_RQDSEG]; 299116742Ssam} ct_entry_t; 300138568Ssam 301138568Ssam/* 302138568Ssam * For some of the dual port SCSI adapters, port (bus #) is reported 303116742Ssam * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 304138568Ssam * 305138568Ssam * Note that this does not apply to FC adapters at all which can and 306117811Ssam * do report IIDs between 129 && 255 (these represent devices that have 307138568Ssam * logged in across a SCSI fabric). 308116742Ssam */ 309116742Ssam#define GET_IID_VAL(x) (x & 0x3f) 310116742Ssam#define GET_BUS_VAL(x) ((x >> 7) & 0x1) 311116742Ssam#define SET_IID_VAL(y, x) (y | (x & 0x3f)) 312116742Ssam#define SET_BUS_VAL(y, x) (y | ((x & 0x1) << 7)) 313138568Ssam 314138568Ssam/* 315116742Ssam * ct_flags values 316116742Ssam */ 317116742Ssam#define CT_TQAE 0x00000001 /* bit 1, Tagged Queue Action enable */ 318138568Ssam#define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction */ 319138568Ssam#define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction */ 320138568Ssam#define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 321138568Ssam#define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 322138568Ssam#define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 323138568Ssam#define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 324138568Ssam#define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 325148936Ssam#define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 326138568Ssam#define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 327116742Ssam 328116742Ssam/* 329116742Ssam * ct_status values 330138568Ssam * - set by the firmware when it returns the CTIO 331138568Ssam */ 332138568Ssam#define CT_OK 0x01 /* completed without error */ 333148936Ssam#define CT_ABORTED 0x02 /* aborted by host */ 334138568Ssam#define CT_ERR 0x04 /* see sense data for error */ 335148936Ssam#define CT_INVAL 0x06 /* request for disabled lun */ 336148936Ssam#define CT_NOPATH 0x07 /* invalid ITL nexus */ 337148936Ssam#define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 338148936Ssam#define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 339148936Ssam#define CT_TIMEOUT 0x0B /* timed out */ 340148936Ssam#define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 341148936Ssam#define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 342138568Ssam#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 343138568Ssam#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 344116742Ssam#define CT_PORTNOTAVAIL 0x28 /* port not available */ 345148936Ssam#define CT_LOGOUT 0x29 /* port logout */ 346138568Ssam#define CT_PORTCHANGED 0x2A /* port changed */ 347138568Ssam#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 348116742Ssam 349116742Ssam/* 350141658Ssam * When the firmware returns a CTIO entry, it may overwrite the last 351141658Ssam * part of the structure with sense data. This starts at offset 0x2E 352141658Ssam * into the entry, which is in the middle of ct_dataseg[1]. Rather 353141658Ssam * than define a new struct for this, I'm just using the sense data 354141658Ssam * offset. 355141658Ssam */ 356141658Ssam#define CTIO_SENSE_OFFSET 0x2E 357141658Ssam 358141658Ssam/* 359141658Ssam * Entry length in u_longs. All entries are the same size so 360141658Ssam * any one will do as the numerator. 361116742Ssam */ 362116742Ssam#define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(u_int32_t)) 363116742Ssam 364140753Ssam/* 365116742Ssam * QLA2100 CTIO (type 2) entry 366116742Ssam */ 367138568Ssam#define MAXRESPLEN 26 368138568Ssamtypedef struct { 369138568Ssam isphdr_t ct_header; 370138568Ssam u_int32_t ct_reserved; 371138568Ssam u_int8_t ct_lun; /* lun */ 372138568Ssam u_int8_t ct_iid; /* initiator id */ 373138568Ssam u_int16_t ct_rxid; /* response ID */ 374138568Ssam u_int16_t ct_flags; 375138568Ssam u_int16_t ct_status; /* isp status */ 376140753Ssam u_int16_t ct_timeout; 377140753Ssam u_int16_t ct_seg_count; 378140753Ssam u_int32_t ct_reloff; /* relative offset */ 379140753Ssam int32_t ct_resid; /* residual length */ 380140753Ssam union { 381140753Ssam /* 382140753Ssam * The three different modes that the target driver 383140753Ssam * can set the CTIO2 up as. 384140753Ssam * 385140753Ssam * The first is for sending FCP_DATA_IUs as well as 386140753Ssam * (optionally) sending a terminal SCSI status FCP_RSP_IU. 387148863Ssam * 388140753Ssam * The second is for sending SCSI sense data in an FCP_RSP_IU. 389140753Ssam * Note that no FCP_DATA_IUs will be sent. 390138568Ssam * 391138568Ssam * The third is for sending FCP_RSP_IUs as built specifically 392116742Ssam * in system memory as located by the isp_dataseg. 393116742Ssam */ 394116742Ssam struct { 395141658Ssam u_int32_t _reserved; 396148843Ssam u_int16_t _reserved2; 397138568Ssam u_int16_t ct_scsi_status; 398116742Ssam u_int32_t ct_xfrlen; 399116742Ssam ispds_t ct_dataseg[ISP_RQDSEG_T2]; 400116742Ssam } m0; 401116742Ssam struct { 402116742Ssam u_int16_t _reserved; 403138568Ssam u_int16_t _reserved2; 404138568Ssam u_int16_t ct_senselen; 405138568Ssam u_int16_t ct_scsi_status; 406143300Ssam u_int16_t ct_resplen; 407143300Ssam u_int8_t ct_resp[MAXRESPLEN]; 408143300Ssam } m1; 409143300Ssam struct { 410153403Ssam u_int32_t _reserved; 411153403Ssam u_int16_t _reserved2; 412153403Ssam u_int16_t _reserved3; 413153403Ssam u_int32_t ct_datalen; 414153403Ssam ispds_t ct_fcp_rsp_iudata; 415138568Ssam } m2; 416138568Ssam /* 417138568Ssam * CTIO2 returned from F/W... 418138568Ssam */ 419138568Ssam struct { 420148936Ssam u_int32_t _reserved[4]; 421138568Ssam u_int16_t ct_scsi_status; 422138568Ssam u_int8_t ct_sense[QLTM_SENSELEN]; 423138568Ssam } fw; 424138568Ssam } rsp; 425138568Ssam} ct2_entry_t; 426138568Ssam 427138568Ssam/* 428138568Ssam * ct_flags values for CTIO2 429138568Ssam */ 430138568Ssam#define CT2_FLAG_MMASK 0x0003 431138568Ssam#define CT2_FLAG_MODE0 0x0000 432138568Ssam#define CT2_FLAG_MODE1 0x0001 433138568Ssam#define CT2_FLAG_MODE2 0x0002 434138568Ssam#define CT2_DATA_IN CT_DATA_IN 435138568Ssam#define CT2_DATA_OUT CT_DATA_OUT 436138568Ssam#define CT2_NO_DATA CT_NO_DATA 437140753Ssam#define CT2_DATAMASK CT_DATAMASK 438116742Ssam#define CT2_CCINCR 0x0100 439116742Ssam#define CT2_FASTPOST 0x0200 440138568Ssam#define CT2_SENDSTATUS 0x8000 441138568Ssam 442138568Ssam/* 443138568Ssam * ct_status values are (mostly) the same as that for ct_entry. 444138568Ssam */ 445138568Ssam 446140753Ssam/* 447140753Ssam * ct_scsi_status values- the low 8 bits are the normal SCSI status 448138568Ssam * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 449138568Ssam * fields. 450138568Ssam */ 451138568Ssam#define CT2_RSPLEN_VALID 0x0100 452141658Ssam#define CT2_SNSLEN_VALID 0x0200 453141658Ssam#define CT2_DATA_OVER 0x0400 454148843Ssam#define CT2_DATA_UNDER 0x0800 455138568Ssam 456141658Ssam/* 457138568Ssam * Macros for packing/unpacking the above structures 458138568Ssam */ 459148432Ssam 460148432Ssam#ifdef __sparc__ 461148432Ssam#define ISP_SBUS_SWOZZLE(isp, src, dest, taga, tagb) \ 462127767Ssam if (isp->isp_bus == ISP_SBUS) { \ 463138568Ssam source -> taga = dest -> tagb; \ 464127767Ssam source -> tagb = dest -> taga; \ 465127767Ssam } else { \ 466127767Ssam source -> taga = dest -> taga; \ 467127767Ssam source -> tagb = dest -> taga; \ 468127767Ssam } 469127767Ssam#else 470127767Ssam#define ISP_SBUS_SWOZZLE(isp, src, dest, taga, tagb) \ 471127767Ssam source -> taga = dest -> taga; \ 472127767Ssam source -> tagb = dest -> taga; 473127767Ssam#endif 474127767Ssam 475127767Ssam#define MCIDF(d, s) if ((void *) d != (void *)s) MEMCPY(d, s, QENTRY_LEN) 476127767Ssam 477127767Ssam/* This is really only for SBus cards on a sparc */ 478127767Ssam#ifdef __sparc__ 479127767Ssam#define ISP_SWIZ_ATIO(isp, dest, vsrc) \ 480127767Ssam{ \ 481138568Ssam at_entry_t *source = (at_entry_t *) vsrc; \ 482127767Ssam at_entry_t local, *vdst; \ 483127767Ssam if ((void *)dest == (void *)vsrc) { \ 484127767Ssam MEMCPY(vsrc, &local, sizeof (at_entry_t)); \ 485127767Ssam vdst = &local; \ 486127767Ssam } else { \ 487127767Ssam vdst = dest; \ 488127767Ssam } \ 489148299Ssam vdst->at_header = source->at_header; \ 490127767Ssam vdst->at_reserved2 = source->at_reserved2; \ 491127767Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, at_lun, at_iid); \ 492127767Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, at_cdblen, at_tgt); \ 493127767Ssam vdst->at_flags = source->at_flags; \ 494127767Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, at_status, at_scsi_status); \ 495127767Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, at_tag_val, at_tag_type); \ 496127767Ssam MEMCPY(vdst->at_cdb, source->at_cdb, ATIO_CDBLEN); \ 497127767Ssam MEMCPY(vdst->at_sense, source->at_sense, QLTM_SENSELEN); \ 498127767Ssam} 499148432Ssam 500148432Ssam#define ISP_SWIZ_CTIO(isp, dest, vsrc) \ 501127767Ssam{ \ 502138568Ssam ct_entry_t *source = (ct_entry-t *) vsrc; \ 503148432Ssam ct_entry_t *local, *vdst; \ 504148432Ssam if ((void *)dest == (void *)vsrc) { \ 505127767Ssam MEMCPY(vsrc, &local, sizeof (ct_entry_t)); \ 506127767Ssam vdst = &local; \ 507127767Ssam } else { \ 508127767Ssam vdst = dest; \ 509127767Ssam } \ 510127767Ssam vdst->ct_header = source->ct_header; \ 511127767Ssam vdst->ct_reserved = source->ct_reserved; \ 512127767Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, ct_lun, ct_iid); \ 513127767Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, ct_rsvd, ct_tgt); \ 514127767Ssam vdst->ct_flags = source->ct_flags; \ 515127767Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, ct_status, ct_scsi_status); \ 516127767Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, ct_tag_val, ct_tag_type); \ 517127767Ssam vdst->ct_xfrlen = source->ct_xfrlen; \ 518127767Ssam vdst->ct_resid = source->ct_resid; \ 519127767Ssam vdst->ct_timeout = source->ct_timeout; \ 520127767Ssam vdst->ct_seg_count = source->ct_seg_count; \ 521127767Ssam MEMCPY(vdst->ct_cdb, source->ct_cdb, ATIO_CDBLEN); \ 522127767Ssam MEMCPY(vdst->ct_sense, source->ct_sense, QLTM_SENSELEN); \ 523127767Ssam vdst->ct_dataseg = source->ct_dataseg; \ 524127767Ssam} 525127767Ssam#define ISP_SWIZ_ENABLE_LUN(isp, dest, vsrc) \ 526127767Ssam{ \ 527127767Ssam lun_entry_t *source = (lun_entry_t *)vsrc; \ 528127767Ssam lun_entry_t *local, *vdst; \ 529138568Ssam if ((void *)dest == (void *)vsrc) { \ 530138568Ssam MEMCPY(vsrc, &local, sizeof (lun_entry_t)); \ 531138568Ssam vdst = &local; \ 532138568Ssam } else { \ 533138568Ssam vdst = dest; \ 534138568Ssam } \ 535138568Ssam vdst->le_header = source->le_header; \ 536138568Ssam vdst->le_reserved2 = source->le_reserved2; \ 537116742Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, le_lun, le_rsvd); \ 538138568Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, le_ops, le_tgt); \ 539138568Ssam vdst->le_flags = source->le_flags; \ 540138568Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, le_status, le_rsvd2); \ 541138568Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, le_cmd_count, le_in_count); \ 542138568Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, le_cdb6len, le_cdb7len); \ 543138568Ssam vdst->le_timeout = source->le_timeout; \ 544138568Ssam vdst->le_reserved = source->le_reserved; \ 545138568Ssam} 546138568Ssam#define ISP_SWIZ_NOTIFY(isp, dest, vsrc) \ 547138568Ssam{ \ 548138568Ssam in_entry_type *source = (in_entry_t *)vsrc; \ 549138568Ssam in_entry_t *local, *vdst; \ 550138568Ssam if ((void *)dest == (void *)vsrc) { \ 551148432Ssam MEMCPY(vsrc, &local, sizeof (in_entry_t)); \ 552138568Ssam vdst = &local; \ 553138568Ssam } else { \ 554138568Ssam vdst = dest; \ 555138568Ssam } \ 556138568Ssam vdst->in_header = source->in_header; \ 557138568Ssam vdst->in_reserved2 = source->in_reserved2; \ 558138568Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, in_lun, in_iid); \ 559138568Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, in_rsvd, in_tgt); \ 560138568Ssam vdst->in_flags = source->in_flags; \ 561148432Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, in_status, in_rsvd2); \ 562148432Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, in_tag_val, in_tag_type); \ 563148432Ssam vdst->in_seqid = source->in_seqid; \ 564148432Ssam MEMCPY(vdst->in_msg, source->in_msg, IN_MSGLEN); \ 565148432Ssam MEMCPY(vdst->in_reserved, source->in_reserved, IN_RESERVED); \ 566138568Ssam MEMCPY(vdst->in_sense, source->in_sense, QLTM_SENSELEN); \ 567138568Ssam} 568139543Ssam#define ISP_SWIZ_NOT_ACK(isp, dest) \ 569139543Ssam{ \ 570139543Ssam na_entry_t *source = (na_entry_t *)vsrc; \ 571139543Ssam na_entry_t *local, *vdst; \ 572139543Ssam if ((void *)dest == (void *)vsrc) { \ 573139543Ssam MEMCPY(vsrc, &local, sizeof (na_entry_t)); \ 574139543Ssam vdst = &local; \ 575139543Ssam } else { \ 576139543Ssam vdst = dest; \ 577139543Ssam } \ 578139543Ssam vdst->na_header = source->na_header; \ 579139543Ssam vdst->na_reserved2 = source->na_reserved2; \ 580139543Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, na_lun, na_iid); \ 581139543Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, na_rsvd, na_tgt); \ 582139543Ssam vdst->na_flags = source->na_flags; \ 583138568Ssam ISP_SBUS_SWOZZLE(isp, source, vdst, na_status, na_event); \ 584138568Ssam vdst->na_seqid = source->na_seqid; \ 585138568Ssam MEMCPY(vdst->na_reserved, source->na_reserved, NA_RSVDLEN); \ 586138568Ssam} 587138568Ssam#define ISP_SWIZ_NOT_ACK_FC(isp, d, s) MCIDF(d, s) 588140441Ssam#define ISP_SWIZ_ATIO2(isp, d, s) MCIDF(d, s) 589140441Ssam#define ISP_SWIZ_CTIO2(isp, d, s) MCIDF(d, s) 590140441Ssam#else 591140441Ssam#define ISP_SWIZ_ATIO(isp, d, s) MCIDF(d, s) 592140441Ssam#define ISP_SWIZ_CTIO(isp, d, s) MCIDF(d, s) 593140441Ssam#define ISP_SWIZ_ENABLE_LUN(isp, d, s) MCIDF(d, s) 594140441Ssam#define ISP_SWIZ_NOTIFY(isp, d, s) MCIDF(d, s) 595140441Ssam#define ISP_SWIZ_NOT_ACK(isp, d, s) MCIDF(d, s) 596140441Ssam#define ISP_SWIZ_NOT_ACK_FC(isp, d, s) MCIDF(d, s) 597140441Ssam#define ISP_SWIZ_ATIO2(isp, d, s) MCIDF(d, s) 598140441Ssam#define ISP_SWIZ_CTIO2(isp, d, s) MCIDF(d, s) 599140441Ssam#endif 600140441Ssam 601140441Ssam/* 602116742Ssam * Debug macros 603116742Ssam */ 604116742Ssam 605138568Ssamextern int isp_tdebug; 606116742Ssam#define ISP_TDQE(isp, msg, idx, arg) \ 607140448Ssam if (isp_tdebug > 3) isp_print_qentry(isp, msg, idx, arg) 608140448Ssam 609116742Ssam#define ITDEBUG(level, msg) if (level > isp_tdebug) PRINTF msg 610140441Ssam 611140441Ssam/* 612116742Ssam * The functions below are target mode functions that 613116742Ssam * are generally internal to the Qlogic driver. 614138568Ssam */ 615138568Ssam 616138568Ssam/* 617138568Ssam * This function handles new response queue entry appropriate for target mode. 618116742Ssam */ 619116742Ssamint isp_target_notify __P((struct ispsoftc *, void *, u_int16_t *)); 620116742Ssam 621116742Ssam/* 622140753Ssam * Enable/Disable/Modify a logical unit. 623138568Ssam */ 624116742Ssam#define DFLT_CMD_CNT (RESULT_QUEUE_LEN >> 1) 625138568Ssam#define DFLT_INOTIFY (4) 626140448Ssamint isp_lun_cmd __P((struct ispsoftc *isp, int, int, int, int, u_int32_t)); 627140448Ssam 628138568Ssam/* 629138568Ssam * General request queue 'put' routine for target mode entries. 630138568Ssam */ 631138568Ssamint isp_target_put_entry __P((struct ispsoftc *isp, void *)); 632116742Ssam 633140448Ssam/* 634138568Ssam * General routine to put back an ATIO entry- 635138568Ssam * used for replenishing f/w resource counts. 636116742Ssam */ 637138568Ssamint 638138568Ssamisp_target_put_atio __P((struct ispsoftc *isp, int, int, int, int, int)); 639138568Ssam 640138568Ssam/* 641138568Ssam * General routine to send a final CTIO for a command- used mostly for 642138568Ssam * local responses. 643138568Ssam */ 644138568Ssamint 645138568Ssamisp_endcmd __P((struct ispsoftc *isp, void *, u_int32_t, u_int32_t)); 646116742Ssam#define ECMD_SVALID 0x100 647138568Ssam 648143715Ssam/* 649143715Ssam * Handle an asynchronous event 650138568Ssam */ 651138568Ssam 652138568Ssamvoid isp_target_async __P((struct ispsoftc *, int, int)); 653138568Ssam 654138568Ssam#endif /* _ISPTARGET_H */ 655116742Ssam