scic_sds_pci.h revision 230557
1230557Sjimharris/*- 2230557Sjimharris * This file is provided under a dual BSD/GPLv2 license. When using or 3230557Sjimharris * redistributing this file, you may do so under either license. 4230557Sjimharris * 5230557Sjimharris * GPL LICENSE SUMMARY 6230557Sjimharris * 7230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8230557Sjimharris * 9230557Sjimharris * This program is free software; you can redistribute it and/or modify 10230557Sjimharris * it under the terms of version 2 of the GNU General Public License as 11230557Sjimharris * published by the Free Software Foundation. 12230557Sjimharris * 13230557Sjimharris * This program is distributed in the hope that it will be useful, but 14230557Sjimharris * WITHOUT ANY WARRANTY; without even the implied warranty of 15230557Sjimharris * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16230557Sjimharris * General Public License for more details. 17230557Sjimharris * 18230557Sjimharris * You should have received a copy of the GNU General Public License 19230557Sjimharris * along with this program; if not, write to the Free Software 20230557Sjimharris * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21230557Sjimharris * The full GNU General Public License is included in this distribution 22230557Sjimharris * in the file called LICENSE.GPL. 23230557Sjimharris * 24230557Sjimharris * BSD LICENSE 25230557Sjimharris * 26230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 27230557Sjimharris * All rights reserved. 28230557Sjimharris * 29230557Sjimharris * Redistribution and use in source and binary forms, with or without 30230557Sjimharris * modification, are permitted provided that the following conditions 31230557Sjimharris * are met: 32230557Sjimharris * 33230557Sjimharris * * Redistributions of source code must retain the above copyright 34230557Sjimharris * notice, this list of conditions and the following disclaimer. 35230557Sjimharris * * Redistributions in binary form must reproduce the above copyright 36230557Sjimharris * notice, this list of conditions and the following disclaimer in 37230557Sjimharris * the documentation and/or other materials provided with the 38230557Sjimharris * distribution. 39230557Sjimharris * 40230557Sjimharris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41230557Sjimharris * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42230557Sjimharris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43230557Sjimharris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44230557Sjimharris * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45230557Sjimharris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46230557Sjimharris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47230557Sjimharris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48230557Sjimharris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49230557Sjimharris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50230557Sjimharris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51230557Sjimharris * 52230557Sjimharris * $FreeBSD$ 53230557Sjimharris */ 54230557Sjimharris#ifndef _SCIC_SDS_PCI_H_ 55230557Sjimharris#define _SCIC_SDS_PCI_H_ 56230557Sjimharris 57230557Sjimharris/** 58230557Sjimharris * @file 59230557Sjimharris * 60230557Sjimharris * @brief This file contains the prototypes/macros utilized in writing 61230557Sjimharris * out PCI data for the SCI core. 62230557Sjimharris */ 63230557Sjimharris 64230557Sjimharris#ifdef __cplusplus 65230557Sjimharrisextern "C" { 66230557Sjimharris#endif // __cplusplus 67230557Sjimharris 68230557Sjimharris#include <dev/isci/scil/sci_types.h> 69230557Sjimharris 70230557Sjimharris#define PATSBURG_SMU_BAR 0 71230557Sjimharris#define PATSBURG_SCU_BAR 1 72230557Sjimharris#define PATSBURG_IO_SPACE_BAR0 2 73230557Sjimharris#define PATSBURG_IO_SPACE_BAR1 3 74230557Sjimharris 75230557Sjimharris#define SCIC_SDS_PCI_REVISION_A0 0 76230557Sjimharris#define SCIC_SDS_PCI_REVISION_A2 2 77230557Sjimharris#define SCIC_SDS_PCI_REVISION_B0 4 78230557Sjimharris#define SCIC_SDS_PCI_REVISION_C0 5 79230557Sjimharris#define SCIC_SDS_PCI_REVISION_C1 6 80230557Sjimharris 81230557Sjimharrisenum SCU_CONTROLLER_PCI_REVISION_CODE 82230557Sjimharris{ 83230557Sjimharris SCU_PBG_HBA_REV_A0 = SCIC_SDS_PCI_REVISION_A0, 84230557Sjimharris SCU_PBG_HBA_REV_A2 = SCIC_SDS_PCI_REVISION_A2, 85230557Sjimharris SCU_PBG_HBA_REV_B0 = SCIC_SDS_PCI_REVISION_B0, 86230557Sjimharris SCU_PBG_HBA_REV_C0 = SCIC_SDS_PCI_REVISION_C0, 87230557Sjimharris SCU_PBG_HBA_REV_C1 = SCIC_SDS_PCI_REVISION_C1 88230557Sjimharris}; 89230557Sjimharris 90230557Sjimharrisstruct SCIC_SDS_CONTROLLER; 91230557Sjimharris 92230557Sjimharrisvoid scic_sds_pci_bar_initialization( 93230557Sjimharris struct SCIC_SDS_CONTROLLER * this_controller 94230557Sjimharris); 95230557Sjimharris 96230557Sjimharris#if !defined(ENABLE_PCI_IO_SPACE_ACCESS) || defined(ARLINGTON_BUILD) 97230557Sjimharris 98230557Sjimharris#define scic_sds_pci_read_smu_dword scic_cb_pci_read_dword 99230557Sjimharris#define scic_sds_pci_write_smu_dword scic_cb_pci_write_dword 100230557Sjimharris#define scic_sds_pci_read_scu_dword scic_cb_pci_read_dword 101230557Sjimharris#define scic_sds_pci_write_scu_dword scic_cb_pci_write_dword 102230557Sjimharris 103230557Sjimharris#else // !defined(ENABLE_PCI_IO_SPACE_ACCESS) 104230557Sjimharris 105230557Sjimharris// These two registers form the Data/Index pair equivalent in the 106230557Sjimharris// SCU. They are only used for access registers in BAR 1, not BAR 0. 107230557Sjimharris#define SCU_MMR_ADDRESS_WINDOW_OFFSET 0xA0 108230557Sjimharris#define SCU_MMR_DATA_WINDOW_OFFSET 0xA4 109230557Sjimharris 110230557SjimharrisU32 scic_sds_pci_read_smu_dword( 111230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 112230557Sjimharris void * address 113230557Sjimharris); 114230557Sjimharris 115230557Sjimharrisvoid scic_sds_pci_write_smu_dword( 116230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 117230557Sjimharris void * address, 118230557Sjimharris U32 write_value 119230557Sjimharris); 120230557Sjimharris 121230557SjimharrisU32 scic_sds_pci_read_scu_dword( 122230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 123230557Sjimharris void * address 124230557Sjimharris); 125230557Sjimharris 126230557Sjimharrisvoid scic_sds_pci_write_scu_dword( 127230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 128230557Sjimharris void * address, 129230557Sjimharris U32 write_value 130230557Sjimharris); 131230557Sjimharris 132230557Sjimharris#endif // !defined(ENABLE_PCI_IO_SPACE_ACCESS) 133230557Sjimharris 134230557Sjimharris#ifdef __cplusplus 135230557Sjimharris} 136230557Sjimharris#endif // __cplusplus 137230557Sjimharris 138230557Sjimharris#endif // _SCIC_SDS_PCI_H_ 139