intel_sas.h revision 230557
1145510Sdarrenr/*- 2145510Sdarrenr * This file is provided under a dual BSD/GPLv2 license. When using or 3145510Sdarrenr * redistributing this file, you may do so under either license. 4145510Sdarrenr * 5145510Sdarrenr * GPL LICENSE SUMMARY 6145510Sdarrenr * 7145510Sdarrenr * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8145510Sdarrenr * 9145510Sdarrenr * This program is free software; you can redistribute it and/or modify 10145510Sdarrenr * it under the terms of version 2 of the GNU General Public License as 11145510Sdarrenr * published by the Free Software Foundation. 12145510Sdarrenr * 13145510Sdarrenr * This program is distributed in the hope that it will be useful, but 14145510Sdarrenr * WITHOUT ANY WARRANTY; without even the implied warranty of 15145510Sdarrenr * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16145510Sdarrenr * General Public License for more details. 17145510Sdarrenr * 18145510Sdarrenr * You should have received a copy of the GNU General Public License 19145510Sdarrenr * along with this program; if not, write to the Free Software 20145510Sdarrenr * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21145510Sdarrenr * The full GNU General Public License is included in this distribution 22145510Sdarrenr * in the file called LICENSE.GPL. 23145510Sdarrenr * 24145510Sdarrenr * BSD LICENSE 25145510Sdarrenr * 26145510Sdarrenr * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. 27145510Sdarrenr * All rights reserved. 28145510Sdarrenr * 29145510Sdarrenr * Redistribution and use in source and binary forms, with or without 30145510Sdarrenr * modification, are permitted provided that the following conditions 31145510Sdarrenr * are met: 32145510Sdarrenr * 33145510Sdarrenr * * Redistributions of source code must retain the above copyright 34145510Sdarrenr * notice, this list of conditions and the following disclaimer. 35145510Sdarrenr * * Redistributions in binary form must reproduce the above copyright 36145510Sdarrenr * notice, this list of conditions and the following disclaimer in 37145510Sdarrenr * the documentation and/or other materials provided with the 38145510Sdarrenr * distribution. 39145510Sdarrenr * 40145510Sdarrenr * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41145510Sdarrenr * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42145510Sdarrenr * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43145510Sdarrenr * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44145510Sdarrenr * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45145510Sdarrenr * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46145510Sdarrenr * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47145510Sdarrenr * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48145510Sdarrenr * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49145510Sdarrenr * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50145510Sdarrenr * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51145510Sdarrenr * 52145510Sdarrenr * $FreeBSD$ 53145510Sdarrenr */ 54145510Sdarrenr#ifndef _INTEL_SAS_H_ 55145510Sdarrenr#define _INTEL_SAS_H_ 56145510Sdarrenr 57145510Sdarrenr/** 58145510Sdarrenr * @file 59145510Sdarrenr * 60145510Sdarrenr * @brief This file contains all of the definitions relating to structures, 61145510Sdarrenr * constants, etc. defined by the SAS specification. 62145510Sdarrenr */ 63145510Sdarrenr 64145510Sdarrenr#include <dev/isci/types.h> 65145510Sdarrenr#include <dev/isci/scil/intel_sata.h> 66145510Sdarrenr#include <dev/isci/scil/intel_scsi.h> 67145510Sdarrenr 68145510Sdarrenr/** 69145510Sdarrenr * @struct SCI_SAS_ADDRESS 70145510Sdarrenr * @brief This structure depicts how a SAS address is represented by SCI. 71145510Sdarrenr */ 72145510Sdarrenrtypedef struct SCI_SAS_ADDRESS 73145510Sdarrenr{ 74145510Sdarrenr /** 75145510Sdarrenr * This member contains the higher 32-bits of the SAS address. 76145510Sdarrenr */ 77145510Sdarrenr U32 high; 78145510Sdarrenr 79145510Sdarrenr /** 80145510Sdarrenr * This member contains the lower 32-bits of the SAS address. 81145510Sdarrenr */ 82145510Sdarrenr U32 low; 83145510Sdarrenr 84145510Sdarrenr} SCI_SAS_ADDRESS_T; 85145510Sdarrenr 86145510Sdarrenr/** 87145510Sdarrenr * @struct SCI_SAS_IDENTIFY_ADDRESS_FRAME_PROTOCOLS 88145510Sdarrenr * @brief This structure depicts the contents of bytes 2 and 3 in the 89145510Sdarrenr * SAS IDENTIFY ADDRESS FRAME (IAF). 90145510Sdarrenr * @note For specific information on each of these 91145510Sdarrenr * individual fields please reference the SAS specification 92145510Sdarrenr * Link layer section on address frames. 93145510Sdarrenr */ 94145510Sdarrenrtypedef struct SCI_SAS_IDENTIFY_ADDRESS_FRAME_PROTOCOLS 95145510Sdarrenr{ 96145510Sdarrenr union 97145510Sdarrenr { 98145510Sdarrenr struct 99145510Sdarrenr { 100145510Sdarrenr U16 restricted1 : 1; 101145510Sdarrenr U16 smp_initiator : 1; 102145510Sdarrenr U16 stp_initiator : 1; 103145510Sdarrenr U16 ssp_initiator : 1; 104145510Sdarrenr U16 reserved3 : 4; 105145510Sdarrenr U16 restricted2 : 1; 106145510Sdarrenr U16 smp_target : 1; 107145510Sdarrenr U16 stp_target : 1; 108145510Sdarrenr U16 ssp_target : 1; 109145510Sdarrenr U16 reserved4 : 4; 110145510Sdarrenr } bits; 111145510Sdarrenr 112145510Sdarrenr U16 all; 113145510Sdarrenr } u; 114145510Sdarrenr 115145510Sdarrenr} SCI_SAS_IDENTIFY_ADDRESS_FRAME_PROTOCOLS_T; 116145510Sdarrenr 117145510Sdarrenr/** 118145510Sdarrenr * @struct SCI_SAS_IDENTIFY_ADDRESS_FRAME 119145510Sdarrenr * @brief This structure depicts the contents of the SAS IDENTIFY ADDRESS 120145510Sdarrenr * FRAME (IAF). 121145510Sdarrenr * @note For specific information on each of these 122145510Sdarrenr * individual fields please reference the SAS specification 123145510Sdarrenr * Link layer section on address frames. 124145510Sdarrenr */ 125145510Sdarrenrtypedef struct SCI_SAS_IDENTIFY_ADDRESS_FRAME 126145510Sdarrenr{ 127145510Sdarrenr U16 address_frame_type : 4; 128145510Sdarrenr U16 device_type : 3; 129145510Sdarrenr U16 reserved1 : 1; 130145510Sdarrenr U16 reason : 4; 131145510Sdarrenr U16 reserved2 : 4; 132145510Sdarrenr 133145510Sdarrenr SCI_SAS_IDENTIFY_ADDRESS_FRAME_PROTOCOLS_T protocols; 134145510Sdarrenr 135145510Sdarrenr SCI_SAS_ADDRESS_T device_name; 136145510Sdarrenr SCI_SAS_ADDRESS_T sas_address; 137145510Sdarrenr 138145510Sdarrenr U32 phy_identifier : 8; 139145510Sdarrenr U32 break_reply_capable : 1; 140145510Sdarrenr U32 requested_in_zpsds : 1; 141145510Sdarrenr U32 in_zpsds_persistent : 1; 142145510Sdarrenr U32 reserved5 : 21; 143145510Sdarrenr 144145510Sdarrenr U32 reserved6[4]; 145145510Sdarrenr 146145510Sdarrenr} SCI_SAS_IDENTIFY_ADDRESS_FRAME_T; 147145510Sdarrenr 148145510Sdarrenr/** 149145510Sdarrenr * @struct SAS_CAPABILITIES 150145510Sdarrenr * @brief This structure depicts the various SAS capabilities supported 151145510Sdarrenr * by the directly attached target device. For specific information 152145510Sdarrenr * on each of these individual fields please reference the SAS 153145510Sdarrenr * specification Phy layer section on speed negotiation windows. 154145510Sdarrenr */ 155145510Sdarrenrtypedef struct SAS_CAPABILITIES 156145510Sdarrenr{ 157145510Sdarrenr union 158145510Sdarrenr { 159145510Sdarrenr#if defined (SCIC_SDS_4_ENABLED) 160145510Sdarrenr struct 161145510Sdarrenr { 162145510Sdarrenr /** 163145510Sdarrenr * The SAS specification indicates the start bit shall always be set to 164145510Sdarrenr * 1. This implementation will have the start bit set to 0 if the 165145510Sdarrenr * PHY CAPABILITIES were either not received or speed negotiation failed. 166145510Sdarrenr */ 167145510Sdarrenr U32 start : 1; 168145510Sdarrenr U32 tx_ssc_type : 1; 169145510Sdarrenr U32 reserved1 : 2; 170145510Sdarrenr U32 requested_logical_link_rate : 4; 171145510Sdarrenr 172145510Sdarrenr U32 gen1_without_ssc_supported : 1; 173145510Sdarrenr U32 gen1_with_ssc_supported : 1; 174145510Sdarrenr U32 gen2_without_ssc_supported : 1; 175145510Sdarrenr U32 gen2_with_ssc_supported : 1; 176145510Sdarrenr U32 gen3_without_ssc_supported : 1; 177145510Sdarrenr U32 gen3_with_ssc_supported : 1; 178145510Sdarrenr U32 reserved2 : 17; 179145510Sdarrenr U32 parity : 1; 180145510Sdarrenr } bits; 181145510Sdarrenr#endif // (SCIC_SDS_4_ENABLED) 182145510Sdarrenr 183145510Sdarrenr U32 all; 184145510Sdarrenr } u; 185145510Sdarrenr 186145510Sdarrenr} SAS_CAPABILITIES_T; 187145510Sdarrenr 188145510Sdarrenr/** 189145510Sdarrenr * @enum _SCI_SAS_LINK_RATE 190145510Sdarrenr * @brief This enumeration depicts the SAS specification defined link speeds. 191145510Sdarrenr */ 192145510Sdarrenrtypedef enum _SCI_SAS_LINK_RATE 193145510Sdarrenr{ 194145510Sdarrenr SCI_SAS_NO_LINK_RATE = 0, 195145510Sdarrenr SCI_SATA_SPINUP_HOLD = 0x3, 196145510Sdarrenr SCI_SAS_150_GB = 0x8, 197145510Sdarrenr SCI_SAS_300_GB = 0x9, 198145510Sdarrenr SCI_SAS_600_GB = 0xA 199145510Sdarrenr} SCI_SAS_LINK_RATE; 200145510Sdarrenr 201145510Sdarrenr/** 202145510Sdarrenr * @enum _SCI_SAS_TASK_ATTRIBUTE 203145510Sdarrenr * @brief This enumeration depicts the SAM/SAS specification defined task 204145510Sdarrenr * attribute values for a command information unit. 205145510Sdarrenr */ 206145510Sdarrenrtypedef enum _SCI_SAS_TASK_ATTRIBUTE 207145510Sdarrenr{ 208145510Sdarrenr SCI_SAS_SIMPLE_ATTRIBUTE = 0, 209145510Sdarrenr SCI_SAS_HEAD_OF_QUEUE_ATTRIBUTE = 1, 210145510Sdarrenr SCI_SAS_ORDERED_ATTRIBUTE = 2, 211145510Sdarrenr SCI_SAS_ACA_ATTRIBUTE = 4, 212145510Sdarrenr} SCI_SAS_TASK_ATTRIBUTE; 213145510Sdarrenr 214145510Sdarrenr/** 215145510Sdarrenr * @enum _SCI_SAS_TASK_MGMT_FUNCTION 216145510Sdarrenr * @brief This enumeration depicts the SAM/SAS specification defined task 217145510Sdarrenr * management functions. 218145510Sdarrenr * @note This HARD_RESET function listed here is not actually defined 219145510Sdarrenr * as a task management function in the industry standard. 220145510Sdarrenr */ 221145510Sdarrenrtypedef enum _SCI_SAS_TASK_MGMT_FUNCTION 222145510Sdarrenr{ 223145510Sdarrenr SCI_SAS_ABORT_TASK = SCSI_TASK_REQUEST_ABORT_TASK, 224145510Sdarrenr SCI_SAS_ABORT_TASK_SET = SCSI_TASK_REQUEST_ABORT_TASK_SET, 225145510Sdarrenr SCI_SAS_CLEAR_TASK_SET = SCSI_TASK_REQUEST_CLEAR_TASK_SET, 226145510Sdarrenr SCI_SAS_LOGICAL_UNIT_RESET = SCSI_TASK_REQUEST_LOGICAL_UNIT_RESET, 227145510Sdarrenr SCI_SAS_I_T_NEXUS_RESET = SCSI_TASK_REQUEST_I_T_NEXUS_RESET, 228145510Sdarrenr SCI_SAS_CLEAR_ACA = SCSI_TASK_REQUEST_CLEAR_ACA, 229145510Sdarrenr SCI_SAS_QUERY_TASK = SCSI_TASK_REQUEST_QUERY_TASK, 230145510Sdarrenr SCI_SAS_QUERY_TASK_SET = SCSI_TASK_REQUEST_QUERY_TASK_SET, 231145510Sdarrenr SCI_SAS_QUERY_ASYNCHRONOUS_EVENT = SCSI_TASK_REQUEST_QUERY_UNIT_ATTENTION, 232145510Sdarrenr SCI_SAS_HARD_RESET = 0xFF 233145510Sdarrenr} SCI_SAS_TASK_MGMT_FUNCTION_T; 234145510Sdarrenr 235145510Sdarrenr 236145510Sdarrenr/** 237145510Sdarrenr * @enum _SCI_SAS_FRAME_TYPE 238145510Sdarrenr * @brief This enumeration depicts the SAS specification defined SSP frame 239145510Sdarrenr * types. 240145510Sdarrenr */ 241145510Sdarrenrtypedef enum _SCI_SAS_FRAME_TYPE 242145510Sdarrenr{ 243145510Sdarrenr SCI_SAS_DATA_FRAME = 0x01, 244145510Sdarrenr SCI_SAS_XFER_RDY_FRAME = 0x05, 245145510Sdarrenr SCI_SAS_COMMAND_FRAME = 0x06, 246145510Sdarrenr SCI_SAS_RESPONSE_FRAME = 0x07, 247145510Sdarrenr SCI_SAS_TASK_FRAME = 0x16 248145510Sdarrenr} SCI_SAS_FRAME_TYPE_T; 249145510Sdarrenr 250145510Sdarrenr 251145510Sdarrenr/** 252145510Sdarrenr * @struct SCI_SSP_COMMAND_IU 253145510Sdarrenr * @brief This structure depicts the contents of the SSP COMMAND 254145510Sdarrenr * INFORMATION UNIT. For specific information on each of these 255145510Sdarrenr * individual fields please reference the SAS specification SSP 256145510Sdarrenr * transport layer section. 257145510Sdarrenr */ 258145510Sdarrenrtypedef struct SCI_SSP_COMMAND_IU 259145510Sdarrenr{ 260145510Sdarrenr 261145510Sdarrenr U32 lun[2]; 262145510Sdarrenr 263145510Sdarrenr U32 additional_cdb_length : 6; 264145510Sdarrenr U32 reserved0 : 2; 265145510Sdarrenr U32 reserved1 : 8; 266145510Sdarrenr U32 enable_first_burst : 1; 267145510Sdarrenr U32 task_priority : 4; 268145510Sdarrenr U32 task_attribute : 3; 269145510Sdarrenr U32 reserved2 : 8; 270145510Sdarrenr 271145510Sdarrenr U32 cdb[4]; 272145510Sdarrenr 273145510Sdarrenr} SCI_SSP_COMMAND_IU_T; 274145510Sdarrenr 275145510Sdarrenr/** 276145510Sdarrenr * @struct SCI_SSP_TASK_IU 277145510Sdarrenr * @brief This structure depicts the contents of the SSP TASK INFORMATION 278145510Sdarrenr * UNIT. For specific information on each of these individual fields 279145510Sdarrenr * please reference the SAS specification SSP transport layer 280145510Sdarrenr * section. 281145510Sdarrenr */ 282145510Sdarrenrtypedef struct SCI_SSP_TASK_IU 283145510Sdarrenr{ 284145510Sdarrenr U32 lun_upper; 285145510Sdarrenr U32 lun_lower; 286145510Sdarrenr 287145510Sdarrenr U32 reserved0 : 8; 288145510Sdarrenr U32 task_function : 8; 289145510Sdarrenr U32 reserved1 : 8; 290145510Sdarrenr U32 reserved2 : 8; 291145510Sdarrenr 292145510Sdarrenr U32 reserved3 : 16; 293145510Sdarrenr U32 task_tag : 16; 294145510Sdarrenr 295145510Sdarrenr U32 reserved4[3]; 296145510Sdarrenr 297145510Sdarrenr} SCI_SSP_TASK_IU_T; 298145510Sdarrenr 299145510Sdarrenr#define SSP_RESPONSE_IU_MAX_DATA 64 300145510Sdarrenr 301145510Sdarrenr#define SCI_SSP_RESPONSE_IU_DATA_PRESENT_MASK (0x03) 302145510Sdarrenr 303145510Sdarrenr/** 304145510Sdarrenr * @struct SCI_SSP_RESPONSE_IU 305145510Sdarrenr * @brief This structure depicts the contents of the SSP RESPONSE 306145510Sdarrenr * INFORMATION UNIT. For specific information on each of these 307145510Sdarrenr * individual fields please reference the SAS specification SSP 308145510Sdarrenr * transport layer section. 309145510Sdarrenr */ 310145510Sdarrenrtypedef struct SCI_SSP_RESPONSE_IU 311145510Sdarrenr{ 312145510Sdarrenr U8 reserved0[8]; 313145510Sdarrenr 314145510Sdarrenr U8 retry_delay_timer[2]; 315145510Sdarrenr U8 data_present; 316145510Sdarrenr U8 status; 317145510Sdarrenr 318145510Sdarrenr U8 reserved1[4]; 319145510Sdarrenr U8 sense_data_length[4]; 320145510Sdarrenr U8 response_data_length[4]; 321145510Sdarrenr 322145510Sdarrenr U32 data[SSP_RESPONSE_IU_MAX_DATA]; 323145510Sdarrenr 324145510Sdarrenr} SCI_SSP_RESPONSE_IU_T; 325145510Sdarrenr 326145510Sdarrenr/** 327145510Sdarrenr * @enum _SCI_SAS_DATA_PRESENT_TYPE 328145510Sdarrenr * @brief This enumeration depicts the SAS specification defined SSP data present 329145510Sdarrenr * types in SCI_SSP_RESPONSE_IU. 330145510Sdarrenr */ 331145510Sdarrenrtypedef enum _SCI_SSP_RESPONSE_IU_DATA_PRESENT_TYPE 332145510Sdarrenr{ 333145510Sdarrenr SCI_SSP_RESPONSE_IU_NO_DATA = 0x00, 334145510Sdarrenr SCI_SSP_RESPONSE_IU_RESPONSE_DATA = 0x01, 335145510Sdarrenr SCI_SSP_RESPONSE_IU_SENSE_DATA = 0x02 336145510Sdarrenr} SCI_SSP_RESPONSE_IU_DATA_PRESENT_TYPE_T; 337145510Sdarrenr 338145510Sdarrenr/** 339145510Sdarrenr * @struct SCI_SSP_FRAME_HEADER 340145510Sdarrenr * 341145510Sdarrenr * @brief This structure depicts the contents of an SSP frame header. For 342145510Sdarrenr * specific information on the individual fields please reference 343145510Sdarrenr * the SAS specification transport layer SSP frame format. 344145510Sdarrenr */ 345145510Sdarrenrtypedef struct SCI_SSP_FRAME_HEADER 346145510Sdarrenr{ 347145510Sdarrenr // Word 0 348145510Sdarrenr U32 hashed_destination_address :24; 349145510Sdarrenr U32 frame_type : 8; 350145510Sdarrenr 351145510Sdarrenr // Word 1 352145510Sdarrenr U32 hashed_source_address :24; 353145510Sdarrenr U32 reserved1_0 : 8; 354145510Sdarrenr 355145510Sdarrenr // Word 2 356145510Sdarrenr U32 reserved2_2 : 6; 357145510Sdarrenr U32 fill_bytes : 2; 358145510Sdarrenr U32 reserved2_1 : 3; 359145510Sdarrenr U32 tlr_control : 2; 360145510Sdarrenr U32 retry_data_frames : 1; 361145510Sdarrenr U32 retransmit : 1; 362145510Sdarrenr U32 changing_data_pointer : 1; 363145510Sdarrenr U32 reserved2_0 :16; 364145510Sdarrenr 365145510Sdarrenr // Word 3 366145510Sdarrenr U32 uiResv4; 367145510Sdarrenr 368145510Sdarrenr // Word 4 369145510Sdarrenr U16 target_port_transfer_tag; 370145510Sdarrenr U16 tag; 371145510Sdarrenr 372145510Sdarrenr // Word 5 373145510Sdarrenr U32 data_offset; 374145510Sdarrenr 375145510Sdarrenr} SCI_SSP_FRAME_HEADER_T; 376145510Sdarrenr 377145510Sdarrenr/** 378145510Sdarrenr * @struct SMP_REQUEST_HEADER 379145510Sdarrenr * @brief This structure defines the contents of an SMP Request header. 380145510Sdarrenr * @note For specific information on each of these 381145510Sdarrenr * individual fields please reference the SAS specification. 382145510Sdarrenr */ 383145510Sdarrenrtypedef struct SMP_REQUEST_HEADER 384145510Sdarrenr{ 385145510Sdarrenr U8 smp_frame_type; // byte 0 386145510Sdarrenr U8 function; // byte 1 387145510Sdarrenr U8 allocated_response_length; // byte 2 388145510Sdarrenr U8 request_length; // byte 3 389145510Sdarrenr} SMP_REQUEST_HEADER_T; 390145510Sdarrenr 391145510Sdarrenr/** 392145510Sdarrenr * @struct SMP_RESPONSE_HEADER 393145510Sdarrenr * @brief This structure depicts the contents of the SAS SMP DISCOVER 394145510Sdarrenr * RESPONSE frame. For specific information on each of these 395145510Sdarrenr * individual fields please reference the SAS specification Link 396145510Sdarrenr * layer section on address frames. 397145510Sdarrenr */ 398145510Sdarrenrtypedef struct SMP_RESPONSE_HEADER 399145510Sdarrenr{ 400145510Sdarrenr U8 smp_frame_type; // byte 0 401145510Sdarrenr U8 function; // byte 1 402145510Sdarrenr U8 function_result; // byte 2 403145510Sdarrenr U8 response_length; // byte 3 404145510Sdarrenr} SMP_RESPONSE_HEADER_T; 405145510Sdarrenr 406145510Sdarrenr/** 407145510Sdarrenr * @struct SMP_REQUEST_GENERAL 408145510Sdarrenr * @brief This structure defines the contents of an SMP Request that 409145510Sdarrenr * is comprised of the SMP_REQUEST_HEADER and a CRC. 410145510Sdarrenr * @note For specific information on each of these 411145510Sdarrenr * individual fields please reference the SAS specification. 412145510Sdarrenr */ 413145510Sdarrenrtypedef struct SMP_REQUEST_GENERAL 414145510Sdarrenr{ 415145510Sdarrenr U32 crc; // bytes 4-7 416145510Sdarrenr 417145510Sdarrenr} SMP_REQUEST_GENERAL_T; 418145510Sdarrenr 419145510Sdarrenr/** 420145510Sdarrenr * @struct SMP_REQUEST_PHY_IDENTIFIER 421145510Sdarrenr * @brief This structure defines the contents of an SMP Request that 422145510Sdarrenr * is comprised of the SMP_REQUEST_HEADER and a phy identifier. 423145510Sdarrenr * Examples: SMP_REQUEST_DISCOVER, SMP_REQUEST_REPORT_PHY_SATA. 424145510Sdarrenr * @note For specific information on each of these 425145510Sdarrenr * individual fields please reference the SAS specification. 426145510Sdarrenr */ 427145510Sdarrenrtypedef struct SMP_REQUEST_PHY_IDENTIFIER 428145510Sdarrenr{ 429145510Sdarrenr U32 reserved_byte4_7; // bytes 4-7 430145510Sdarrenr 431145510Sdarrenr U32 ignore_zone_group:1; // byte 8 432145510Sdarrenr U32 reserved_byte8:7; 433145510Sdarrenr 434145510Sdarrenr U32 phy_identifier:8; // byte 9 435145510Sdarrenr U32 reserved_byte10:8; // byte 10 436145510Sdarrenr U32 reserved_byte11:8; // byte 11 437145510Sdarrenr 438145510Sdarrenr} SMP_REQUEST_PHY_IDENTIFIER_T; 439145510Sdarrenr 440145510Sdarrenr/** 441145510Sdarrenr * @struct SMP_REQUEST_CONFIGURE_ROUTE_INFORMATION 442145510Sdarrenr * @brief This structure defines the contents of an SMP Configure Route 443145510Sdarrenr * Information request. 444145510Sdarrenr * @note For specific information on each of these 445145510Sdarrenr * individual fields please reference the SAS specification. 446145510Sdarrenr */ 447145510Sdarrenrtypedef struct SMP_REQUEST_CONFIGURE_ROUTE_INFORMATION 448145510Sdarrenr{ 449145510Sdarrenr U32 expected_expander_change_count:16; // bytes 4-5 450145510Sdarrenr U32 expander_route_index_high:8; 451145510Sdarrenr U32 expander_route_index:8; // bytes 6-7 452145510Sdarrenr 453145510Sdarrenr U32 reserved_byte8:8; // bytes 8 454145510Sdarrenr U32 phy_identifier:8; // bytes 9 455145510Sdarrenr U32 reserved_byte_10_11:16; // bytes 10-11 456145510Sdarrenr 457145510Sdarrenr U32 reserved_byte_12_bit_0_6:7; 458145510Sdarrenr U32 disable_route_entry:1; // byte 12 459145510Sdarrenr U32 reserved_byte_13_15:24; // bytes 13-15 460145510Sdarrenr 461145510Sdarrenr U32 routed_sas_address[2]; // bytes 16-23 462145510Sdarrenr U8 reserved_byte_24_39[16]; // bytes 24-39 463145510Sdarrenr 464145510Sdarrenr} SMP_REQUEST_CONFIGURE_ROUTE_INFORMATION_T; 465145510Sdarrenr 466145510Sdarrenr/** 467145510Sdarrenr * @struct SMP_REQUEST_PHY_CONTROL 468145510Sdarrenr * @brief This structure defines the contents of an SMP Phy Controler 469145510Sdarrenr * request. 470145510Sdarrenr * @note For specific information on each of these 471145510Sdarrenr * individual fields please reference the SAS specification. 472145510Sdarrenr */ 473145510Sdarrenrtypedef struct SMP_REQUEST_PHY_CONTROL 474145510Sdarrenr{ 475145510Sdarrenr U16 expected_expander_change_count; // byte 4-5 476145510Sdarrenr 477145510Sdarrenr U16 reserved_byte_6_7; // byte 6-7 478145510Sdarrenr U8 reserved_byte_8; // byte 8 479145510Sdarrenr 480145510Sdarrenr U8 phy_identifier; // byte 9 481145510Sdarrenr U8 phy_operation; // byte 10 482145510Sdarrenr 483145510Sdarrenr U8 update_partial_pathway_timeout_value:1; 484145510Sdarrenr U8 reserved_byte_11_bit_1_7:7; // byte 11 485145510Sdarrenr 486145510Sdarrenr U8 reserved_byte_12_23[12]; // byte 12-23 487145510Sdarrenr 488145510Sdarrenr U8 attached_device_name[8]; // byte 24-31 489145510Sdarrenr 490145510Sdarrenr U8 reserved_byte_32_bit_3_0:4; // byte 32 491145510Sdarrenr U8 programmed_minimum_physical_link_rate:4; 492145510Sdarrenr 493145510Sdarrenr U8 reserved_byte_33_bit_3_0:4; // byte 33 494145510Sdarrenr U8 programmed_maximum_physical_link_rate:4; 495145510Sdarrenr 496145510Sdarrenr U16 reserved_byte_34_35; // byte 34-35 497145510Sdarrenr 498145510Sdarrenr U8 partial_pathway_timeout_value:4; 499145510Sdarrenr U8 reserved_byte_36_bit_4_7:4; // byte 36 500145510Sdarrenr 501145510Sdarrenr U16 reserved_byte_37_38; // byte 37-38 502145510Sdarrenr U8 reserved_byte_39; // byte 39 503145510Sdarrenr 504145510Sdarrenr} SMP_REQUEST_PHY_CONTROL_T; 505145510Sdarrenr 506145510Sdarrenr/** 507145510Sdarrenr * @struct SMP_REQUEST_VENDOR_SPECIFIC 508145510Sdarrenr * @brief This structure depicts the vendor specific space for SMP request. 509145510Sdarrenr */ 510145510Sdarrenr #define SMP_REQUEST_VENDOR_SPECIFIC_MAX_LENGTH 1016 511145510Sdarrenrtypedef struct SMP_REQUEST_VENDOR_SPECIFIC 512145510Sdarrenr{ 513145510Sdarrenr U8 request_bytes[SMP_REQUEST_VENDOR_SPECIFIC_MAX_LENGTH]; 514145510Sdarrenr}SMP_REQUEST_VENDOR_SPECIFIC_T; 515145510Sdarrenr 516145510Sdarrenr/** 517145510Sdarrenr * @struct SMP_REQUEST 518145510Sdarrenr * @brief This structure simply unionizes the existing request 519145510Sdarrenr * structures into a common request type. 520145510Sdarrenr */ 521145510Sdarrenrtypedef struct _SMP_REQUEST 522145510Sdarrenr{ 523145510Sdarrenr SMP_REQUEST_HEADER_T header; 524145510Sdarrenr 525145510Sdarrenr union 526145510Sdarrenr { // bytes 4-N 527145510Sdarrenr SMP_REQUEST_GENERAL_T report_general; 528145510Sdarrenr SMP_REQUEST_PHY_IDENTIFIER_T discover; 529145510Sdarrenr SMP_REQUEST_GENERAL_T report_manufacturer_information; 530145510Sdarrenr SMP_REQUEST_PHY_IDENTIFIER_T report_phy_sata; 531145510Sdarrenr SMP_REQUEST_PHY_CONTROL_T phy_control; 532145510Sdarrenr SMP_REQUEST_PHY_IDENTIFIER_T report_phy_error_log; 533145510Sdarrenr SMP_REQUEST_PHY_IDENTIFIER_T report_route_information; 534145510Sdarrenr SMP_REQUEST_CONFIGURE_ROUTE_INFORMATION_T configure_route_information; 535145510Sdarrenr SMP_REQUEST_VENDOR_SPECIFIC_T vendor_specific_request; 536145510Sdarrenr } request; 537145510Sdarrenr 538145510Sdarrenr} SMP_REQUEST_T; 539145510Sdarrenr 540145510Sdarrenr 541145510Sdarrenr/** 542145510Sdarrenr * @struct SMP_RESPONSE_REPORT_GENERAL 543145510Sdarrenr * @brief This structure depicts the SMP Report General for 544145510Sdarrenr * expander devices. It adheres to the SAS-2.1 specification. 545145510Sdarrenr * @note For specific information on each of these 546145510Sdarrenr * individual fields please reference the SAS specification 547145510Sdarrenr * Application layer section on SMP. 548145510Sdarrenr */ 549145510Sdarrenrtypedef struct SMP_RESPONSE_REPORT_GENERAL 550145510Sdarrenr{ 551145510Sdarrenr U16 expander_change_count; //byte 4-5 552145510Sdarrenr U16 expander_route_indexes; //byte 6-7 553145510Sdarrenr 554145510Sdarrenr U32 reserved_byte8:7; //byte 8 bit 0-6 555145510Sdarrenr U32 long_response:1; //byte 8 bit 7 556145510Sdarrenr 557145510Sdarrenr U32 number_of_phys:8; //byte 9 558145510Sdarrenr 559145510Sdarrenr U32 configurable_route_table:1; //byte 10 560145510Sdarrenr U32 configuring:1; 561145510Sdarrenr U32 configures_others:1; 562145510Sdarrenr U32 open_reject_retry_supported:1; 563145510Sdarrenr U32 stp_continue_awt:1; 564145510Sdarrenr U32 self_configuring:1; 565145510Sdarrenr U32 zone_configuring:1; 566145510Sdarrenr U32 table_to_table_supported:1; 567145510Sdarrenr 568145510Sdarrenr U32 reserved_byte11:8; //byte 11 569145510Sdarrenr 570145510Sdarrenr U32 enclosure_logical_identifier_high; //byte 12-15 571145510Sdarrenr U32 enclosure_logical_identifier_low; //byte 16-19 572145510Sdarrenr 573145510Sdarrenr U32 reserved_byte20_23; 574145510Sdarrenr U32 reserved_byte24_27; 575145510Sdarrenr 576145510Sdarrenr} SMP_RESPONSE_REPORT_GENERAL_T; 577145510Sdarrenr 578145510Sdarrenrtypedef struct SMP_RESPONSE_REPORT_GENERAL_LONG 579145510Sdarrenr{ 580145510Sdarrenr SMP_RESPONSE_REPORT_GENERAL_T sas1_1; 581145510Sdarrenr 582145510Sdarrenr struct 583145510Sdarrenr { 584145510Sdarrenr U16 reserved1; 585145510Sdarrenr U16 stp_bus_inactivity_time_limit; 586145510Sdarrenr U16 stp_max_connect_time_limit; 587145510Sdarrenr U16 stp_smp_i_t_nexus_loss_time; 588145510Sdarrenr 589145510Sdarrenr U32 zoning_enabled : 1; 590145510Sdarrenr U32 zoning_supported : 1; 591145510Sdarrenr U32 physicaL_presence_asserted : 1; 592145510Sdarrenr U32 zone_locked : 1; 593145510Sdarrenr U32 reserved2 : 1; 594145510Sdarrenr U32 num_zone_groups : 3; 595145510Sdarrenr U32 saving_zoning_enabled_supported : 3; 596145510Sdarrenr U32 saving_zone_perms_table_supported : 1; 597145510Sdarrenr U32 saving_zone_phy_info_supported : 1; 598145510Sdarrenr U32 saving_zone_manager_password_supported : 1; 599145510Sdarrenr U32 saving : 1; 600145510Sdarrenr U32 reserved3 : 1; 601145510Sdarrenr U32 max_number_routed_sas_addresses : 16; 602145510Sdarrenr 603145510Sdarrenr SCI_SAS_ADDRESS_T active_zone_manager_sas_address; 604145510Sdarrenr 605145510Sdarrenr U16 zone_lock_inactivity_time_limit; 606145510Sdarrenr U16 reserved4; 607145510Sdarrenr 608145510Sdarrenr U8 reserved5; 609145510Sdarrenr U8 first_enclosure_connector_element_index; 610145510Sdarrenr U8 number_of_enclosure_connector_element_indices; 611145510Sdarrenr U8 reserved6; 612145510Sdarrenr 613145510Sdarrenr U32 reserved7 : 7; 614145510Sdarrenr U32 reduced_functionality : 1; 615145510Sdarrenr U32 time_to_reduce_functionality : 8; 616145510Sdarrenr U32 initial_time_to_reduce_functionality : 8; 617145510Sdarrenr U8 max_reduced_functionality_time; 618145510Sdarrenr 619145510Sdarrenr U16 last_self_config_status_descriptor_index; 620145510Sdarrenr U16 max_number_of_stored_self_config_status_descriptors; 621145510Sdarrenr 622145510Sdarrenr U16 last_phy_event_list_descriptor_index; 623145510Sdarrenr U16 max_number_of_stored_phy_event_list_descriptors; 624145510Sdarrenr } sas2; 625145510Sdarrenr 626145510Sdarrenr} SMP_RESPONSE_REPORT_GENERAL_LONG_T; 627145510Sdarrenr 628145510Sdarrenr/** 629145510Sdarrenr * @struct SMP_RESPONSE_REPORT_MANUFACTURER_INFORMATION 630145510Sdarrenr * @brief This structure depicts the SMP report manufacturer 631145510Sdarrenr * information for expander devices. It adheres to the 632145510Sdarrenr * SAS-2.1 specification. 633145510Sdarrenr * @note For specific information on each of these 634145510Sdarrenr * individual fields please reference the SAS specification 635145510Sdarrenr * Application layer section on SMP. 636145510Sdarrenr */ 637145510Sdarrenrtypedef struct SMP_RESPONSE_REPORT_MANUFACTURER_INFORMATION 638145510Sdarrenr{ 639145510Sdarrenr U32 expander_change_count : 16; // bytes 4-5 640145510Sdarrenr U32 reserved1 : 16; 641145510Sdarrenr 642145510Sdarrenr U32 sas1_1_format : 1; 643145510Sdarrenr U32 reserved2 : 31; 644145510Sdarrenr 645145510Sdarrenr U8 vendor_id[8]; 646145510Sdarrenr U8 product_id[16]; 647145510Sdarrenr U8 product_revision_level[4]; 648145510Sdarrenr U8 component_vendor_id[8]; 649145510Sdarrenr U8 component_id[2]; 650145510Sdarrenr U8 component_revision_level; 651145510Sdarrenr U8 reserved3; 652145510Sdarrenr U8 vendor_specific[8]; 653145510Sdarrenr 654145510Sdarrenr} SMP_RESPONSE_REPORT_MANUFACTURER_INFORMATION_T; 655145510Sdarrenr 656145510Sdarrenr#define SMP_RESPONSE_DISCOVER_FORMAT_1_1_SIZE 52 657145510Sdarrenr#define SMP_RESPONSE_DISCOVER_FORMAT_2_SIZE 116 658145510Sdarrenr 659145510Sdarrenr/** 660145510Sdarrenr * @struct SMP_DISCOVER_RESPONSE_PROTOCOLS 661145510Sdarrenr * @brief This structure depicts the discover response where the 662145510Sdarrenr * supported protocols by the remote phy are specified. 663145510Sdarrenr * @note For specific information on each of these 664145510Sdarrenr * individual fields please reference the SAS specification 665145510Sdarrenr * Link layer section on address frames. 666145510Sdarrenr */ 667145510Sdarrenrtypedef struct SMP_DISCOVER_RESPONSE_PROTOCOLS 668145510Sdarrenr{ 669145510Sdarrenr union 670145510Sdarrenr { 671145510Sdarrenr struct 672145510Sdarrenr { 673145510Sdarrenr U16 attached_sata_host : 1; 674145510Sdarrenr U16 attached_smp_initiator : 1; 675145510Sdarrenr U16 attached_stp_initiator : 1; 676145510Sdarrenr U16 attached_ssp_initiator : 1; 677145510Sdarrenr U16 reserved3 : 4; 678145510Sdarrenr U16 attached_sata_device : 1; 679145510Sdarrenr U16 attached_smp_target : 1; 680145510Sdarrenr U16 attached_stp_target : 1; 681145510Sdarrenr U16 attached_ssp_target : 1; 682145510Sdarrenr U16 reserved4 : 3; 683145510Sdarrenr U16 attached_sata_port_selector : 1; 684145510Sdarrenr } bits; 685145510Sdarrenr 686145510Sdarrenr U16 all; 687145510Sdarrenr } u; 688145510Sdarrenr 689145510Sdarrenr} SMP_DISCOVER_RESPONSE_PROTOCOLS_T; 690145510Sdarrenr 691145510Sdarrenr/** 692145510Sdarrenr * @struct SMP_RESPONSE_DISCOVER_FORMAT 693145510Sdarrenr * @brief This structure defines the SMP phy discover response format. 694145510Sdarrenr * It handles both SAS1.1 and SAS 2 definitions. The unions 695145510Sdarrenr * indicate locations where the SAS specification versions 696145510Sdarrenr * differ from one another. 697145510Sdarrenr */ 698145510Sdarrenrtypedef struct SMP_RESPONSE_DISCOVER 699145510Sdarrenr{ 700145510Sdarrenr 701145510Sdarrenr union 702145510Sdarrenr { 703145510Sdarrenr struct 704145510Sdarrenr { 705145510Sdarrenr U8 reserved[2]; 706145510Sdarrenr } sas1_1; 707145510Sdarrenr 708145510Sdarrenr struct 709145510Sdarrenr { 710145510Sdarrenr U16 expander_change_count; 711145510Sdarrenr } sas2; 712145510Sdarrenr 713145510Sdarrenr } u1; 714145510Sdarrenr 715145510Sdarrenr U8 reserved1[3]; 716145510Sdarrenr U8 phy_identifier; 717145510Sdarrenr U8 reserved2[2]; 718145510Sdarrenr 719145510Sdarrenr union 720145510Sdarrenr { 721145510Sdarrenr struct 722145510Sdarrenr { 723145510Sdarrenr U16 reserved1 : 4; 724145510Sdarrenr U16 attached_device_type : 3; 725145510Sdarrenr U16 reserved2 : 1; 726145510Sdarrenr U16 negotiated_physical_link_rate : 4; 727145510Sdarrenr U16 reserved3 : 4; 728145510Sdarrenr } sas1_1; 729145510Sdarrenr 730145510Sdarrenr struct 731145510Sdarrenr { 732145510Sdarrenr U16 attached_reason : 4; 733145510Sdarrenr U16 attached_device_type : 3; 734145510Sdarrenr U16 reserved2 : 1; 735145510Sdarrenr U16 negotiated_logical_link_rate : 4; 736145510Sdarrenr U16 reserved3 : 4; 737145510Sdarrenr } sas2; 738145510Sdarrenr 739145510Sdarrenr } u2; 740145510Sdarrenr 741145510Sdarrenr SMP_DISCOVER_RESPONSE_PROTOCOLS_T protocols; 742145510Sdarrenr SCI_SAS_ADDRESS_T sas_address; 743145510Sdarrenr SCI_SAS_ADDRESS_T attached_sas_address; 744145510Sdarrenr 745145510Sdarrenr U8 attached_phy_identifier; 746145510Sdarrenr 747145510Sdarrenr union 748145510Sdarrenr { 749145510Sdarrenr struct 750145510Sdarrenr { 751145510Sdarrenr U8 reserved; 752145510Sdarrenr } sas1_1; 753145510Sdarrenr 754145510Sdarrenr struct 755145510Sdarrenr { 756145510Sdarrenr U8 attached_break_reply_capable : 1; 757145510Sdarrenr U8 attached_requested_inside_zpsds : 1; 758145510Sdarrenr U8 attached_inside_zpsds_persistent : 1; 759145510Sdarrenr U8 reserved1 : 5; 760145510Sdarrenr } sas2; 761145510Sdarrenr 762145510Sdarrenr } u3; 763145510Sdarrenr 764145510Sdarrenr U8 reserved_for_identify[6]; 765145510Sdarrenr 766145510Sdarrenr U32 hardware_min_physical_link_rate : 4; 767145510Sdarrenr U32 programmed_min_physical_link_rate : 4; 768145510Sdarrenr U32 hardware_max_physical_link_rate : 4; 769145510Sdarrenr U32 programmed_max_physical_link_rate : 4; 770145510Sdarrenr U32 phy_change_count : 8; 771145510Sdarrenr U32 partial_pathway_timeout_value : 4; 772145510Sdarrenr U32 reserved5 : 3; 773145510Sdarrenr U32 virtual_phy : 1; 774145510Sdarrenr 775145510Sdarrenr U32 routing_attribute : 4; 776145510Sdarrenr U32 reserved6 : 4; 777145510Sdarrenr U32 connector_type : 7; 778145510Sdarrenr U32 reserved7 : 1; 779145510Sdarrenr U32 connector_element_index : 8; 780145510Sdarrenr U32 connector_physical_link : 8; 781145510Sdarrenr 782145510Sdarrenr U16 reserved8; 783145510Sdarrenr U16 vendor_specific; 784145510Sdarrenr 785145510Sdarrenr union 786145510Sdarrenr { 787145510Sdarrenr struct 788145510Sdarrenr { 789145510Sdarrenr /** 790145510Sdarrenr * In the SAS 1.1 specification this structure ends after 52 bytes. 791145510Sdarrenr * As a result, the contents of this field should never have a 792145510Sdarrenr * real value. It is undefined. 793145510Sdarrenr */ 794145510Sdarrenr U8 undefined[SMP_RESPONSE_DISCOVER_FORMAT_2_SIZE 795145510Sdarrenr - SMP_RESPONSE_DISCOVER_FORMAT_1_1_SIZE]; 796145510Sdarrenr } sas1_1; 797145510Sdarrenr 798145510Sdarrenr struct 799145510Sdarrenr { 800145510Sdarrenr SCI_SAS_ADDRESS_T attached_device_name; 801145510Sdarrenr 802145510Sdarrenr U32 zoning_enabled : 1; 803145510Sdarrenr U32 inside_zpsds : 1; 804145510Sdarrenr U32 zone_group_persistent : 1; 805145510Sdarrenr U32 reserved1 : 1; 806145510Sdarrenr U32 requested_inside_zpsds : 1; 807145510Sdarrenr U32 inside_zpsds_persistent : 1; 808145510Sdarrenr U32 requested_inside_zpsds_changed_by_expander : 1; 809145510Sdarrenr U32 reserved2 : 1; 810145510Sdarrenr U32 reserved_for_zoning_fields : 16; 811145510Sdarrenr U32 zone_group : 8; 812145510Sdarrenr 813145510Sdarrenr U8 self_configuration_status; 814145510Sdarrenr U8 self_configuration_levels_completed; 815145510Sdarrenr U16 reserved_for_self_config_fields; 816145510Sdarrenr 817145510Sdarrenr SCI_SAS_ADDRESS_T self_configuration_sas_address; 818145510Sdarrenr 819145510Sdarrenr U32 programmed_phy_capabilities; 820145510Sdarrenr U32 current_phy_capabilities; 821145510Sdarrenr U32 attached_phy_capabilities; 822145510Sdarrenr 823145510Sdarrenr U32 reserved3; 824145510Sdarrenr 825145510Sdarrenr U32 reserved4 : 16; 826145510Sdarrenr U32 negotiated_physical_link_rate : 4; 827145510Sdarrenr U32 reason : 4; 828145510Sdarrenr U32 hardware_muxing_supported : 1; 829145510Sdarrenr U32 negotiated_ssc : 1; 830145510Sdarrenr U32 reserved5 : 6; 831145510Sdarrenr 832145510Sdarrenr U32 default_zoning_enabled : 1; 833145510Sdarrenr U32 reserved6 : 1; 834145510Sdarrenr U32 default_zone_group_persistent : 1; 835145510Sdarrenr U32 reserved7 : 1; 836145510Sdarrenr U32 default_requested_inside_zpsds : 1; 837145510Sdarrenr U32 default_inside_zpsds_persistent : 1; 838145510Sdarrenr U32 reserved8 : 2; 839145510Sdarrenr U32 reserved9 : 16; 840145510Sdarrenr U32 default_zone_group : 8; 841145510Sdarrenr 842145510Sdarrenr U32 saved_zoning_enabled : 1; 843145510Sdarrenr U32 reserved10 : 1; 844145510Sdarrenr U32 saved_zone_group_persistent : 1; 845145510Sdarrenr U32 reserved11 : 1; 846145510Sdarrenr U32 saved_requested_inside_zpsds : 1; 847145510Sdarrenr U32 saved_inside_zpsds_persistent : 1; 848145510Sdarrenr U32 reserved12 : 18; 849145510Sdarrenr U32 saved_zone_group : 8; 850145510Sdarrenr 851145510Sdarrenr U32 reserved14 : 2; 852145510Sdarrenr U32 shadow_zone_group_persistent : 1; 853145510Sdarrenr U32 reserved15 : 1; 854145510Sdarrenr U32 shadow_requested_inside_zpsds : 1; 855145510Sdarrenr U32 shadow_inside_zpsds_persistent : 1; 856 U32 reserved16 : 18; 857 U32 shadow_zone_group : 8; 858 859 U8 device_slot_number; 860 U8 device_slot_group_number; 861 U8 device_slot_group_output_connector[6]; 862 } sas2; 863 864 } u4; 865 866} SMP_RESPONSE_DISCOVER_T; 867 868/** 869 * @struct SMP_RESPONSE_REPORT_PHY_SATA 870 * @brief This structure depicts the contents of the SAS SMP REPORT 871 * PHY SATA frame. For specific information on each of these 872 * individual fields please reference the SAS specification Link 873 * layer section on address frames. 874 */ 875typedef struct SMP_RESPONSE_REPORT_PHY_SATA 876{ 877 U32 ignored_byte_4_7; // bytes 4-7 878 879 U32 affiliations_valid:1; 880 U32 affiliations_supported:1; 881 U32 reserved_byte11:6; // byte 11 882 U32 ignored_byte10:8; // byte 10 883 U32 phy_identifier:8; // byte 9 884 U32 reserved_byte_8:8; // byte 8 885 886 U32 reserved_12_15; 887 U32 stp_sas_address[2]; 888 U8 device_to_host_fis[20]; 889 U32 reserved_44_47; 890 U32 affiliated_stp_initiator_sas_address[2]; 891 892} SMP_RESPONSE_REPORT_PHY_SATA_T; 893 894typedef struct SMP_RESPONSE_VENDOR_SPECIFIC 895{ 896 U8 response_bytes[SMP_REQUEST_VENDOR_SPECIFIC_MAX_LENGTH]; 897}SMP_RESPONSE_VENDOR_SPECIFIC_T; 898 899typedef union SMP_RESPONSE_BODY 900{ 901 SMP_RESPONSE_REPORT_GENERAL_T report_general; 902 SMP_RESPONSE_REPORT_MANUFACTURER_INFORMATION_T report_manufacturer_information; 903 SMP_RESPONSE_DISCOVER_T discover; 904 SMP_RESPONSE_REPORT_PHY_SATA_T report_phy_sata; 905 SMP_RESPONSE_VENDOR_SPECIFIC_T vendor_specific_response; 906} SMP_RESPONSE_BODY_T; 907 908/** 909 * @struct SMP_RESPONSE 910 * @brief This structure simply unionizes the existing response 911 * structures into a common response type. 912 */ 913typedef struct _SMP_RESPONSE 914{ 915 SMP_RESPONSE_HEADER_T header; 916 917 SMP_RESPONSE_BODY_T response; 918 919} SMP_RESPONSE_T; 920 921// SMP Request Functions 922#define SMP_FUNCTION_REPORT_GENERAL 0x00 923#define SMP_FUNCTION_REPORT_MANUFACTURER_INFORMATION 0x01 924#define SMP_FUNCTION_DISCOVER 0x10 925#define SMP_FUNCTION_REPORT_PHY_ERROR_LOG 0x11 926#define SMP_FUNCTION_REPORT_PHY_SATA 0x12 927#define SMP_FUNCTION_REPORT_ROUTE_INFORMATION 0X13 928#define SMP_FUNCTION_CONFIGURE_ROUTE_INFORMATION 0X90 929#define SMP_FUNCTION_PHY_CONTROL 0x91 930#define SMP_FUNCTION_PHY_TEST 0x92 931 932#define SMP_FRAME_TYPE_REQUEST 0x40 933#define SMP_FRAME_TYPE_RESPONSE 0x41 934 935#define PHY_OPERATION_NOP 0x00 936#define PHY_OPERATION_LINK_RESET 0x01 937#define PHY_OPERATION_HARD_RESET 0x02 938#define PHY_OPERATION_DISABLE 0x03 939#define PHY_OPERATION_CLEAR_ERROR_LOG 0x05 940#define PHY_OPERATION_CLEAR_AFFILIATION 0x06 941 942#define NPLR_PHY_ENABLED_UNK_LINK_RATE 0x00 943#define NPLR_PHY_DISABLED 0x01 944#define NPLR_PHY_ENABLED_SPD_NEG_FAILED 0x02 945#define NPLR_PHY_ENABLED_SATA_HOLD 0x03 946#define NPLR_PHY_ENABLED_1_5G 0x08 947#define NPLR_PHY_ENABLED_3_0G 0x09 948 949// SMP Function Result values. 950#define SMP_RESULT_FUNCTION_ACCEPTED 0x00 951#define SMP_RESULT_UNKNOWN_FUNCTION 0x01 952#define SMP_RESULT_FUNCTION_FAILED 0x02 953#define SMP_RESULT_INVALID_REQUEST_FRAME_LEN 0x03 954#define SMP_RESULT_INAVALID_EXPANDER_CHANGE_COUNT 0x04 955#define SMP_RESULT_BUSY 0x05 956#define SMP_RESULT_INCOMPLETE_DESCRIPTOR_LIST 0x06 957#define SMP_RESULT_PHY_DOES_NOT_EXIST 0x10 958#define SMP_RESULT_INDEX_DOES_NOT_EXIST 0x11 959#define SMP_RESULT_PHY_DOES_NOT_SUPPORT_SATA 0x12 960#define SMP_RESULT_UNKNOWN_PHY_OPERATION 0x13 961#define SMP_RESULT_UNKNOWN_PHY_TEST_FUNCTION 0x14 962#define SMP_RESULT_PHY_TEST_IN_PROGRESS 0x15 963#define SMP_RESULT_PHY_VACANT 0x16 964 965/* Attached Device Types */ 966#define SMP_NO_DEVICE_ATTACHED 0 967#define SMP_END_DEVICE_ONLY 1 968#define SMP_EDGE_EXPANDER_DEVICE 2 969#define SMP_FANOUT_EXPANDER_DEVICE 3 970 971/* Expander phy routine attribute */ 972#define DIRECT_ROUTING_ATTRIBUTE 0 973#define SUBTRACTIVE_ROUTING_ATTRIBUTE 1 974#define TABLE_ROUTING_ATTRIBUTE 2 975 976#endif // _INTEL_SAS_H_ 977 978