138774Snsouch/*- 293023Snsouch * Copyright (c) 1998, 2001 Nicolas Souchu 338774Snsouch * All rights reserved. 438774Snsouch * 538774Snsouch * Redistribution and use in source and binary forms, with or without 638774Snsouch * modification, are permitted provided that the following conditions 738774Snsouch * are met: 838774Snsouch * 1. Redistributions of source code must retain the above copyright 938774Snsouch * notice, this list of conditions and the following disclaimer. 1038774Snsouch * 2. Redistributions in binary form must reproduce the above copyright 1138774Snsouch * notice, this list of conditions and the following disclaimer in the 1238774Snsouch * documentation and/or other materials provided with the distribution. 1338774Snsouch * 1438774Snsouch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1538774Snsouch * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1638774Snsouch * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1738774Snsouch * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1838774Snsouch * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1938774Snsouch * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2038774Snsouch * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2138774Snsouch * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2238774Snsouch * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2338774Snsouch * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2438774Snsouch * SUCH DAMAGE. 2538774Snsouch * 2650477Speter * $FreeBSD$ 2738774Snsouch */ 2838774Snsouch#ifndef __IICONF_H 2938774Snsouch#define __IICONF_H 3038774Snsouch 3138774Snsouch#include <sys/queue.h> 32160372Simp#include <dev/iicbus/iic.h> 3338774Snsouch 34160372Simp 3543301Sdillon#define IICPRI (PZERO+8) /* XXX sleep/wakeup queue priority */ 3638774Snsouch 3738774Snsouch#define LSB 0x1 3838774Snsouch 3938774Snsouch/* 4038774Snsouch * How tsleep() is called in iic_request_bus(). 4138774Snsouch */ 4238774Snsouch#define IIC_DONTWAIT 0 4338774Snsouch#define IIC_NOINTR 0 4438774Snsouch#define IIC_WAIT 0x1 4538774Snsouch#define IIC_INTR 0x2 4638774Snsouch 4738774Snsouch/* 4838774Snsouch * i2c modes 4938774Snsouch */ 5038774Snsouch#define IIC_MASTER 0x1 5138774Snsouch#define IIC_SLAVE 0x2 5238774Snsouch#define IIC_POLLED 0x4 5338774Snsouch 5438774Snsouch/* 5538774Snsouch * i2c speed 5638774Snsouch */ 5738774Snsouch#define IIC_UNKNOWN 0x0 5838774Snsouch#define IIC_SLOW 0x1 5938774Snsouch#define IIC_FAST 0x2 6038774Snsouch#define IIC_FASTEST 0x3 6138774Snsouch 6240782Snsouch#define IIC_LAST_READ 0x1 6340782Snsouch 6438774Snsouch/* 6540782Snsouch * callback index 6640782Snsouch */ 6740782Snsouch#define IIC_REQUEST_BUS 0x1 6840782Snsouch#define IIC_RELEASE_BUS 0x2 6940782Snsouch 7040782Snsouch/* 7138774Snsouch * interrupt events 7238774Snsouch */ 7338774Snsouch#define INTR_GENERAL 0x1 /* general call received */ 7438774Snsouch#define INTR_START 0x2 /* the I2C interface is addressed */ 7538774Snsouch#define INTR_STOP 0x3 /* stop condition received */ 7638774Snsouch#define INTR_RECEIVE 0x4 /* character received */ 7738774Snsouch#define INTR_TRANSMIT 0x5 /* character to transmit */ 7838774Snsouch#define INTR_ERROR 0x6 /* error */ 7938774Snsouch#define INTR_NOACK 0x7 /* no ack from master receiver */ 8038774Snsouch 8138774Snsouch/* 8238774Snsouch * adapter layer errors 8338774Snsouch */ 8438774Snsouch#define IIC_NOERR 0x0 /* no error occured */ 8538774Snsouch#define IIC_EBUSERR 0x1 /* bus error */ 8638774Snsouch#define IIC_ENOACK 0x2 /* ack not received until timeout */ 8738774Snsouch#define IIC_ETIMEOUT 0x3 /* timeout */ 8838774Snsouch#define IIC_EBUSBSY 0x4 /* bus busy */ 8938774Snsouch#define IIC_ESTATUS 0x5 /* status error */ 9038774Snsouch#define IIC_EUNDERFLOW 0x6 /* slave ready for more data */ 9138774Snsouch#define IIC_EOVERFLOW 0x7 /* too much data */ 9240782Snsouch#define IIC_ENOTSUPP 0x8 /* request not supported */ 9340782Snsouch#define IIC_ENOADDR 0x9 /* no address assigned to the interface */ 9438774Snsouch 9538774Snsouchextern int iicbus_request_bus(device_t, device_t, int); 9638774Snsouchextern int iicbus_release_bus(device_t, device_t); 9738774Snsouchextern device_t iicbus_alloc_bus(device_t); 9838774Snsouch 9938774Snsouchextern void iicbus_intr(device_t, int, char *); 10038774Snsouch 10140782Snsouchextern int iicbus_null_repeated_start(device_t, u_char); 10240782Snsouchextern int iicbus_null_callback(device_t, int, caddr_t); 10340782Snsouch 10440782Snsouch#define iicbus_reset(bus,speed,addr,oldaddr) \ 10540782Snsouch (IICBUS_RESET(device_get_parent(bus), speed, addr, oldaddr)) 10638774Snsouch 10742442Snsouch/* basic I2C operations */ 10842442Snsouchextern int iicbus_started(device_t); 10942442Snsouchextern int iicbus_start(device_t, u_char, int); 11042442Snsouchextern int iicbus_stop(device_t); 11143346Srogerextern int iicbus_repeated_start(device_t, u_char, int); 112164901Simpextern int iicbus_write(device_t, const char *, int, int *, int); 11342442Snsouchextern int iicbus_read(device_t, char *, int, int *, int, int); 11442442Snsouch 11543346Sroger/* single byte read/write functions, start/stop not managed */ 11643346Srogerextern int iicbus_write_byte(device_t, char, int); 11743346Srogerextern int iicbus_read_byte(device_t, char *, int); 11843346Sroger 11942442Snsouch/* Read/write operations with start/stop conditions managed */ 12038774Snsouchextern int iicbus_block_write(device_t, u_char, char *, int, int *); 12138774Snsouchextern int iicbus_block_read(device_t, u_char, char *, int, int *); 12238774Snsouch 123160372Simp/* vectors of iic operations to pass to bridge */ 124160372Simpint iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs); 125160372Simpint iicbus_transfer_gen(device_t bus, struct iic_msg *msgs, uint32_t nmsgs); 126160372Simp 12793023Snsouch#define IICBUS_MODVER 1 12893023Snsouch#define IICBUS_MINVER 1 12993023Snsouch#define IICBUS_MAXVER 1 13093023Snsouch#define IICBUS_PREFVER IICBUS_MODVER 13193023Snsouch 132116559Sjmgextern driver_t iicbb_driver; 133116559Sjmgextern devclass_t iicbb_devclass; 134116559Sjmg 13593023Snsouch#define IICBB_MODVER 1 13693023Snsouch#define IICBB_MINVER 1 13793023Snsouch#define IICBB_MAXVER 1 13893023Snsouch#define IICBB_PREFVER IICBB_MODVER 13993023Snsouch 14038774Snsouch#endif 141