113105Sbde/*- 213105Sbde * Copyright (c) 1995 Sean Eric Fagan. 313105Sbde * All rights reserved. 413105Sbde * 513105Sbde * Redistribution and use in source and binary forms, with or without 613105Sbde * modification, are permitted provided that the following conditions 713105Sbde * are met: 813105Sbde * 1. Redistributions of source code must retain the above copyright 913105Sbde * notice, this list of conditions and the following disclaimer. 1013105Sbde * 2. Redistributions in binary form must reproduce the above copyright 1113105Sbde * notice, this list of conditions and the following disclaimer in the 1213105Sbde * documentation and/or other materials provided with the distribution. 1313105Sbde * 3. Neither the name of the author nor the names of contributors 1413105Sbde * may be used to endorse or promote products derived from this software 1513105Sbde * without specific prior written permission. 1613105Sbde * 1713105Sbde * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1813105Sbde * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1913105Sbde * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2013105Sbde * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2113105Sbde * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2213105Sbde * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2313105Sbde * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2413105Sbde * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2513105Sbde * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2613105Sbde * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2713105Sbde * SUCH DAMAGE. 2813105Sbde * 2950477Speter * $FreeBSD$ 3013105Sbde */ 3113105Sbde 3213105Sbde#ifndef _IC_ESP_H_ 3313105Sbde#define _IC_ESP_H_ 3413105Sbde 3513105Sbde/* 3613105Sbde * Definitions for Hayes ESP serial cards. 3713105Sbde */ 3813105Sbde 3913105Sbde/* 4013105Sbde * CMD1 and CMD2 are the command ports, offsets from <esp_iobase>. 4113105Sbde */ 4213105Sbde#define ESP_CMD1 4 4313105Sbde#define ESP_CMD2 5 4413105Sbde 4513105Sbde/* 4613105Sbde * STAT1 and STAT2 are to get return values and status bytes; 4713105Sbde * they overload CMD1 and CMD2. 4813105Sbde */ 4913105Sbde#define ESP_STATUS1 ESP_CMD1 5013105Sbde#define ESP_STATUS2 ESP_CMD2 5113105Sbde 5213105Sbde/* 5313105Sbde * Commands. Commands are given by writing the command value to 5413105Sbde * ESP_CMD1 and then writing or reading some number of bytes from 5513105Sbde * ESP_CMD2 or ESP_STATUS2. 5613105Sbde */ 5713105Sbde#define ESP_GETTEST 0x01 /* self-test command (1 byte + extras) */ 5813105Sbde#define ESP_GETDIPS 0x02 /* get on-board DIP switches (1 byte) */ 5913105Sbde#define ESP_SETFLOWTYPE 0x08 /* set type of flow-control (2 bytes) */ 6013105Sbde#define ESP_SETRXFLOW 0x0a /* set Rx FIFO flow control levels (4 bytes) */ 6113105Sbde#define ESP_SETMODE 0x10 /* set board mode (1 byte) */ 6277961Snyan#define ESP_SETCLOCK 0x23 /* set UART clock prescaler */ 6313105Sbde 6413105Sbde/* Mode bits (ESP_SETMODE). */ 6513105Sbde#define ESP_MODE_FIFO 0x02 /* act like a 16550 (compatibility mode) */ 6613105Sbde#define ESP_MODE_RTS 0x04 /* use RTS hardware flow control */ 6713105Sbde#define ESP_MODE_SCALE 0x80 /* scale FIFO trigger levels */ 6813105Sbde 6913105Sbde/* Flow control type bits (ESP_SETFLOWTYPE). */ 7013105Sbde#define ESP_FLOW_RTS 0x04 /* cmd1: local Rx sends RTS flow control */ 7113105Sbde#define ESP_FLOW_CTS 0x10 /* cmd2: local transmitter responds to CTS */ 7213105Sbde 7313105Sbde/* Used by ESP_SETRXFLOW. */ 7413105Sbde#define HIBYTE(w) (((w) >> 8) & 0xff) 7513105Sbde#define LOBYTE(w) ((w) & 0xff) 7613105Sbde 7713105Sbde#endif /* !_IC_ESP_H_ */ 78