191396Stmm/*- 291396Stmm * Copyright (c) 1999 The NetBSD Foundation, Inc. 391396Stmm * All rights reserved. 491396Stmm * 591396Stmm * This code is derived from software contributed to The NetBSD Foundation 691396Stmm * by Paul Kranenburg. 791396Stmm * 891396Stmm * Redistribution and use in source and binary forms, with or without 991396Stmm * modification, are permitted provided that the following conditions 1091396Stmm * are met: 1191396Stmm * 1. Redistributions of source code must retain the above copyright 1291396Stmm * notice, this list of conditions and the following disclaimer. 1391396Stmm * 2. Redistributions in binary form must reproduce the above copyright 1491396Stmm * notice, this list of conditions and the following disclaimer in the 1591396Stmm * documentation and/or other materials provided with the distribution. 1691396Stmm * 1791396Stmm * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 1891396Stmm * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 1991396Stmm * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2091396Stmm * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 2191396Stmm * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2291396Stmm * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2391396Stmm * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2491396Stmm * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2591396Stmm * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2691396Stmm * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 2791396Stmm * POSSIBILITY OF SUCH DAMAGE. 2891396Stmm * 2991396Stmm * from: NetBSD: hmevar.h,v 1.5 2000/06/25 01:10:04 eeh Exp 3091396Stmm * 3191396Stmm * $FreeBSD$ 3291396Stmm */ 3391396Stmm 3491396Stmm#include <sys/callout.h> 3591396Stmm 3691396Stmm/* 3791396Stmm * Number of receive and transmit descriptors. For each receive descriptor, 3891396Stmm * an mbuf cluster is allocated and set up to receive a packet, and a dma map 3991396Stmm * is created. Therefore, this number should not be too high to not waste 4091396Stmm * memory. 41108834Stmm * TX descriptors have no static cost, except for the memory directly allocated 42108834Stmm * for them. TX queue elements (the number of which is fixed by HME_NTXQ) hold 43108834Stmm * the software state for a transmit job; each has a dmamap allocated for it. 44108834Stmm * There may be multiple descriptors allocated to a single queue element. 45178470Smarius * HME_NTXQ and HME_NTXSEGS are completely arbitrary. 4691396Stmm */ 47178470Smarius#define HME_NRXDESC 128 48178470Smarius#define HME_NTXDESC 256 49178470Smarius#define HME_NTXQ 64 50178470Smarius#define HME_NTXSEGS 16 5191396Stmm 5291396Stmm/* Maximum size of a mapped RX buffer. */ 5391396Stmm#define HME_BUFSZ 1600 5491396Stmm 5591396Stmm/* 5691396Stmm * RX DMA descriptor. The descriptors are preallocated; the dma map is 5791396Stmm * reused. 5891396Stmm */ 5991396Stmmstruct hme_rxdesc { 6091396Stmm struct mbuf *hrx_m; 6191396Stmm bus_dmamap_t hrx_dmamap; 6291396Stmm}; 6391396Stmm 64108834Stmm/* Lazily leave at least one burst size grace space. */ 65108834Stmm#define HME_DESC_RXLEN(sc, d) \ 66108834Stmm ulmin(HME_BUFSZ, (d)->hrx_m->m_len - (sc)->sc_burst) 67108834Stmm 6891396Stmmstruct hme_txdesc { 6991396Stmm struct mbuf *htx_m; 7091396Stmm bus_dmamap_t htx_dmamap; 71108834Stmm int htx_lastdesc; 72108834Stmm STAILQ_ENTRY(hme_txdesc) htx_q; 7391396Stmm}; 7491396Stmm 75108834StmmSTAILQ_HEAD(hme_txdq, hme_txdesc); 76108834Stmm 7791396Stmmstruct hme_ring { 7891396Stmm /* Ring Descriptors */ 7991396Stmm caddr_t rb_membase; /* Packet buffer: CPU address */ 8091396Stmm bus_addr_t rb_dmabase; /* Packet buffer: DMA address */ 8191396Stmm caddr_t rb_txd; /* Transmit descriptors */ 8291396Stmm bus_addr_t rb_txddma; /* DMA address of same */ 8391396Stmm caddr_t rb_rxd; /* Receive descriptors */ 8491396Stmm bus_addr_t rb_rxddma; /* DMA address of same */ 8591396Stmm 8691396Stmm /* Ring Descriptor state */ 87108834Stmm int rb_tdhead, rb_tdtail; 88108834Stmm int rb_rdtail; 89108834Stmm int rb_td_nbusy; 9091396Stmm 9191396Stmm /* Descriptors */ 92108834Stmm struct hme_rxdesc rb_rxdesc[HME_NRXDESC]; 93108834Stmm struct hme_txdesc rb_txdesc[HME_NTXQ]; 9491396Stmm 95108834Stmm struct hme_txdq rb_txfreeq; 96108834Stmm struct hme_txdq rb_txbusyq; 97108834Stmm 9891396Stmm bus_dmamap_t rb_spare_dmamap; 9991396Stmm}; 10091396Stmm 10191396Stmmstruct hme_softc { 102147256Sbrooks struct ifnet *sc_ifp; 10391396Stmm struct ifmedia sc_ifmedia; 10491396Stmm device_t sc_dev; 10591396Stmm device_t sc_miibus; 10691396Stmm struct mii_data *sc_mii; /* MII media control */ 107178470Smarius u_char sc_enaddr[ETHER_ADDR_LEN]; 10891396Stmm struct callout sc_tick_ch; /* tick callout */ 109164932Smarius int sc_wdog_timer; /* watchdog timer */ 11091396Stmm 11191396Stmm /* The following bus handles are to be provided by the bus front-end */ 11291396Stmm bus_dma_tag_t sc_pdmatag; /* bus dma parent tag */ 11391396Stmm bus_dma_tag_t sc_cdmatag; /* control bus dma tag */ 11491396Stmm bus_dmamap_t sc_cdmamap; /* control bus dma handle */ 11591396Stmm bus_dma_tag_t sc_rdmatag; /* RX bus dma tag */ 11691396Stmm bus_dma_tag_t sc_tdmatag; /* RX bus dma tag */ 11791396Stmm bus_space_handle_t sc_sebh; /* HME Global registers */ 11891396Stmm bus_space_handle_t sc_erxh; /* HME ERX registers */ 11991396Stmm bus_space_handle_t sc_etxh; /* HME ETX registers */ 12091396Stmm bus_space_handle_t sc_mach; /* HME MAC registers */ 12191396Stmm bus_space_handle_t sc_mifh; /* HME MIF registers */ 12291396Stmm bus_space_tag_t sc_sebt; /* HME Global registers */ 12391396Stmm bus_space_tag_t sc_erxt; /* HME ERX registers */ 12491396Stmm bus_space_tag_t sc_etxt; /* HME ETX registers */ 12591396Stmm bus_space_tag_t sc_mact; /* HME MAC registers */ 12691396Stmm bus_space_tag_t sc_mift; /* HME MIF registers */ 12791396Stmm int sc_burst; /* DVMA burst size in effect */ 12891396Stmm int sc_phys[2]; /* MII instance -> PHY map */ 12991396Stmm 130178470Smarius u_int sc_flags; 131178470Smarius#define HME_LINK (1 << 0) /* link is up */ 132178470Smarius#define HME_PCI (1 << 1) /* PCI busses are little-endian */ 133178470Smarius 134178470Smarius int sc_ifflags; 135133149Syongari int sc_csum_features; 13691396Stmm 13791396Stmm /* Ring descriptor */ 138137982Syongari struct hme_ring sc_rb; 13991396Stmm 140137982Syongari struct mtx sc_lock; 14191396Stmm}; 14291396Stmm 143137982Syongari#define HME_LOCK(_sc) mtx_lock(&(_sc)->sc_lock) 144137982Syongari#define HME_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_lock) 145137982Syongari#define HME_LOCK_ASSERT(_sc, _what) mtx_assert(&(_sc)->sc_lock, (_what)) 146137982Syongari 14791396Stmmextern devclass_t hme_devclass; 14891396Stmm 14991396Stmmint hme_config(struct hme_softc *); 150108976Stmmvoid hme_detach(struct hme_softc *); 151108976Stmmvoid hme_suspend(struct hme_softc *); 152108976Stmmvoid hme_resume(struct hme_softc *); 15391396Stmmvoid hme_intr(void *); 15491396Stmm 15591396Stmm/* MII methods & callbacks */ 15691396Stmmint hme_mii_readreg(device_t, int, int); 15791396Stmmint hme_mii_writereg(device_t, int, int, int); 15891396Stmmvoid hme_mii_statchg(device_t); 159