midwayvar.h revision 225736
10SN/A/*	$NetBSD: midwayvar.h,v 1.10 1997/03/20 21:34:46 chuck Exp $	*/
211928Sserb
30SN/A/*-
40SN/A * Copyright (c) 1996 Charles D. Cranor and Washington University.
50SN/A * All rights reserved.
60SN/A *
72362SN/A * Redistribution and use in source and binary forms, with or without
80SN/A * modification, are permitted provided that the following conditions
92362SN/A * are met:
100SN/A * 1. Redistributions of source code must retain the above copyright
110SN/A *    notice, this list of conditions and the following disclaimer.
120SN/A * 2. Redistributions in binary form must reproduce the above copyright
130SN/A *    notice, this list of conditions and the following disclaimer in the
140SN/A *    documentation and/or other materials provided with the distribution.
150SN/A * 3. All advertising materials mentioning features or use of this software
160SN/A *    must display the following acknowledgement:
170SN/A *      This product includes software developed by Charles D. Cranor and
180SN/A *	Washington University.
190SN/A * 4. The name of the author may not be used to endorse or promote products
200SN/A *    derived from this software without specific prior written permission.
212362SN/A *
222362SN/A * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
232362SN/A * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
240SN/A * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
250SN/A * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
260SN/A * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
270SN/A * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
280SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2912903Sserb * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
300SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
310SN/A * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
320SN/A *
330SN/A * $FreeBSD: stable/9/sys/dev/en/midwayvar.h 147256 2005-06-10 16:49:24Z brooks $
340SN/A */
350SN/A
360SN/A/*
370SN/A * m i d w a y v a r . h
380SN/A *
390SN/A * we define the en_softc here so that bus specific modules can allocate
4013629Savstepan * it as the first item in their softc.
410SN/A *
420SN/A * author: Chuck Cranor <chuck@ccrc.wustl.edu>
430SN/A */
448234SN/A
450SN/A/*
460SN/A * params needed to determine softc size
470SN/A */
480SN/A#ifndef EN_NTX
490SN/A#define EN_NTX          8       /* number of tx bufs to use */
500SN/A#endif
510SN/A#ifndef EN_TXSZ
520SN/A#define EN_TXSZ         32      /* trasmit buf size in KB */
530SN/A#endif
5413629Savstepan#ifndef EN_RXSZ
550SN/A#define EN_RXSZ         32      /* recv buf size in KB */
560SN/A#endif
570SN/A
5813629Savstepan/* largest possible NRX (depends on RAM size) */
590SN/A#define EN_MAXNRX       ((2048 - (EN_NTX * EN_TXSZ)) / EN_RXSZ)
6013629Savstepan
6113629Savstepan#ifndef EN_MAX_DMASEG
620SN/A#define EN_MAX_DMASEG	32
630SN/A#endif
640SN/A
6513629Savstepan/* number of bytes to use in the first receive buffer. This must not be larger
6613629Savstepan * than MHLEN, should be a multiple of 64 and must be a multiple of 4. */
6713629Savstepan#define EN_RX1BUF	128
680SN/A
6913629Savstepan/*
700SN/A * Structure to hold DMA maps. These are handle via a typestable uma zone.
710SN/A */
720SN/Astruct en_map {
730SN/A	uintptr_t	flags;		/* map flags */
740SN/A	struct en_map	*rsvd2;		/* see uma_zalloc(9) */
750SN/A	struct en_softc	*sc;		/* back pointer */
7613629Savstepan	bus_dmamap_t	map;		/* the map */
770SN/A};
7813629Savstepan#define ENMAP_LOADED	0x02
790SN/A#define ENMAP_ALLOC	0x01
800SN/A
810SN/A#define EN_MAX_MAPS	400
820SN/A
830SN/A/*
840SN/A * Statistics
850SN/A */
8610071SN/Astruct en_stats {
870SN/A	uint32_t vtrash;	/* sw copy of counter */
880SN/A	uint32_t otrash;	/* sw copy of counter */
890SN/A	uint32_t ttrash;	/* # of RBD's with T bit set */
900SN/A	uint32_t mfixaddr;	/* # of times we had to mfix an address */
910SN/A	uint32_t mfixlen;	/* # of times we had to mfix a lenght*/
920SN/A	uint32_t mfixfail;	/* # of times mfix failed */
930SN/A	uint32_t txmbovr;	/* # of times we dropped due to mbsize */
940SN/A	uint32_t dmaovr;	/* tx dma overflow count */
950SN/A	uint32_t txoutspace;	/* out of space in xmit buffer */
960SN/A	uint32_t txdtqout;	/* out of DTQs */
970SN/A	uint32_t launch;	/* total # of launches */
980SN/A	uint32_t hwpull;	/* # of pulls off hardware service list */
990SN/A	uint32_t swadd;		/* # of pushes on sw service list */
1000SN/A	uint32_t rxqnotus;	/* # of times we pull from rx q, but fail */
1010SN/A	uint32_t rxqus;		/* # of good pulls from rx q */
1020SN/A	uint32_t rxdrqout;	/* # of times out of DRQs */
1030SN/A	uint32_t rxmbufout;	/* # of time out of mbufs */
1040SN/A	uint32_t txnomap;	/* out of DMA maps in TX */
1050SN/A};
1060SN/A
1070SN/A/*
1080SN/A * Each of these structures describes one of the eight transmit channels
1090SN/A */
1100SN/Astruct en_txslot {
1110SN/A	uint32_t	mbsize;		/* # mbuf bytes in use (max=TXHIWAT) */
1120SN/A	uint32_t	bfree;		/* # free bytes in buffer */
1130SN/A	uint32_t	start;		/* start of buffer area (byte offset) */
1140SN/A	uint32_t	stop;		/* ends of buffer area (byte offset) */
1150SN/A	uint32_t	cur;		/* next free area (byte offset) */
1160SN/A	uint32_t	nref;		/* # of VCs using this channel */
1170SN/A	struct ifqueue	q;		/* mbufs waiting for DMA now */
1180SN/A	struct ifqueue	indma;		/* mbufs waiting for DMA now */
1190SN/A};
1200SN/A
1210SN/A/*
1220SN/A * Each of these structures is used for each of the receive buffers on the
1230SN/A * card.
1240SN/A */
1250SN/Astruct en_rxslot {
1260SN/A	uint32_t	mode;		/* saved copy of mode info */
1270SN/A	uint32_t	start;		/* begin of my buffer area */
1280SN/A	uint32_t	stop;		/* end of my buffer area */
1290SN/A	uint32_t	cur;		/* where I am at in the buffer */
1300SN/A	struct en_vcc	*vcc;		/* backpointer to VCI */
1310SN/A	struct ifqueue	q;		/* mbufs waiting for dma now */
1320SN/A	struct ifqueue	indma;		/* mbufs being dma'd now */
1330SN/A};
1340SN/A
1350SN/Astruct en_vcc {
1360SN/A	struct atmio_vcc vcc;		/* required by common code */
1370SN/A	void		*rxhand;
1380SN/A	u_int		vflags;
1390SN/A	uint32_t	ipackets;
1400SN/A	uint32_t	opackets;
1410SN/A	uint32_t	ibytes;
1420SN/A	uint32_t	obytes;
1430SN/A
1440SN/A	uint8_t		txspeed;
1450SN/A	struct en_txslot *txslot;	/* transmit slot */
1460SN/A	struct en_rxslot *rxslot;	/* receive slot */
14713629Savstepan};
1480SN/A#define	VCC_DRAIN	0x0001		/* closed, but draining rx */
1490SN/A#define	VCC_SWSL	0x0002		/* on rx software service list */
1500SN/A#define	VCC_CLOSE_RX	0x0004		/* currently closing */
1510SN/A
1520SN/A/*
1530SN/A * softc
1540SN/A */
1550SN/Astruct en_softc {
1560SN/A	struct ifnet	*ifp;
1570SN/A	device_t dev;
1580SN/A
1590SN/A	/* bus glue */
1600SN/A	bus_space_tag_t en_memt;	/* for EN_READ/EN_WRITE */
1610SN/A	bus_space_handle_t en_base;	/* base of en card */
1620SN/A	bus_size_t en_obmemsz;		/* size of en card (bytes) */
1630SN/A	void (*en_busreset)(void *);	/* bus specific reset function */
1640SN/A	bus_dma_tag_t txtag;		/* TX DMA tag */
1650SN/A
1660SN/A	/* serv list */
1670SN/A	uint32_t hwslistp;	/* hw pointer to service list (byte offset) */
1680SN/A	uint16_t swslist[MID_SL_N]; /* software svc list (see en_service()) */
1690SN/A	uint16_t swsl_head; 	/* ends of swslist (index into swslist) */
1700SN/A	uint16_t swsl_tail;
1710SN/A	uint32_t swsl_size;	/* # of items in swsl */
1720SN/A
1730SN/A	/* xmit dma */
1740SN/A	uint32_t dtq[MID_DTQ_N];/* sw copy of dma q (see EN_DQ_MK macros) */
1750SN/A	uint32_t dtq_free;	/* # of dtq's free */
1760SN/A	uint32_t dtq_us;	/* software copy of our pointer (byte offset) */
17711928Sserb	uint32_t dtq_chip;	/* chip's pointer (byte offset) */
1780SN/A	uint32_t need_dtqs;	/* true if we ran out of DTQs */
1790SN/A
1800SN/A	/* recv dma */
1810SN/A	uint32_t drq[MID_DRQ_N];/* sw copy of dma q (see ENIDQ macros) */
1820SN/A	uint32_t drq_free;	/* # of drq's free */
1830SN/A	uint32_t drq_us;	/* software copy of our pointer (byte offset) */
1840SN/A	uint32_t drq_chip;	/* chip's pointer (byte offset) */
18513629Savstepan	uint32_t need_drqs;	/* true if we ran out of DRQs */
1860SN/A
1870SN/A	/* xmit buf ctrl. (per channel) */
1880SN/A	struct en_txslot txslot[MID_NTX_CH];
1890SN/A
1900SN/A	/* recv buf ctrl. (per recv slot) */
1910SN/A	struct en_rxslot rxslot[EN_MAXNRX];
1920SN/A	int en_nrx;			/* # of active rx slots */
1930SN/A
1940SN/A	/* vccs */
1950SN/A	struct en_vcc **vccs;
19613629Savstepan	u_int vccs_open;
1970SN/A	struct cv cv_close;		/* close CV */
1980SN/A
1990SN/A	/* stats */
2000SN/A	struct en_stats stats;
2010SN/A
2020SN/A	/* random stuff */
2030SN/A	uint32_t ipl;		/* sbus interrupt lvl (1 on pci?) */
2040SN/A	uint8_t bestburstcode;	/* code of best burst we can use */
2050SN/A	uint8_t bestburstlen;	/* length of best burst (bytes) */
2060SN/A	uint8_t bestburstshift;	/* (x >> shift) == (x / bestburstlen) */
2070SN/A	uint8_t bestburstmask;	/* bits to check if not multiple of burst */
2080SN/A	uint8_t alburst;	/* align dma bursts? */
2090SN/A	uint8_t noalbursts;	/* don't use unaligned > 4 byte bursts */
2100SN/A	uint8_t is_adaptec;	/* adaptec version of midway? */
2110SN/A	struct mbuf *padbuf;	/* buffer of zeros for TX padding */
2120SN/A
2130SN/A	/* mutex to protect this structure and the associated hardware */
2140SN/A	struct mtx en_mtx;
2150SN/A
216555SN/A	/* sysctl support */
217555SN/A	struct sysctl_ctx_list sysctl_ctx;
2180SN/A	struct sysctl_oid *sysctl_tree;
2190SN/A
2200SN/A	/* memory zones */
2210SN/A	uma_zone_t map_zone;
2220SN/A
2230SN/A	/* media and phy */
2240SN/A	struct ifmedia media;
2250SN/A	struct utopia utopia;
2260SN/A
2270SN/A#ifdef EN_DEBUG
22813629Savstepan	/* debugging */
2290SN/A	u_int debug;
2300SN/A#endif
23110071SN/A};
2320SN/A
2330SN/A/*
2340SN/A * exported functions
2350SN/A */
2360SN/Aint	en_attach(struct en_softc *);
2370SN/Avoid	en_destroy(struct en_softc *);
2380SN/Avoid	en_intr(void *);
23913629Savstepanvoid	en_reset(struct en_softc *);
2400SN/Aint	en_modevent(module_t, int, void *arg);
24110187SN/A