if_em.h revision 88308 
1/**************************************************************************
2**************************************************************************
3
4Copyright (c) 2001 Intel Corporation
5All rights reserved.
6
7Redistribution and use in source and binary forms of the Software, with or
8without modification, are permitted provided that the following conditions
9are met:
10
11 1. Redistributions of source code of the Software may retain the above
12    copyright notice, this list of conditions and the following disclaimer.
13
14 2. Redistributions in binary form of the Software may reproduce the above
15    copyright notice, this list of conditions and the following disclaimer
16    in the documentation and/or other materials provided with the
17    distribution.
18
19 3. Neither the name of the Intel Corporation nor the names of its
20    contributors shall be used to endorse or promote products derived from
21    this Software without specific prior written permission.
22
23THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS CONTRIBUTORS BE LIABLE
27FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33SUCH DAMAGE.
34
35$FreeBSD: head/sys/dev/em/if_em.h 88308 2001-12-20 17:55:49Z pdeuskar $
36***************************************************************************
37***************************************************************************/
38
39#ifndef _EM_H_DEFINED_
40#define _EM_H_DEFINED_
41
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/mbuf.h>
46#include <sys/protosw.h>
47#include <sys/socket.h>
48#include <sys/malloc.h>
49#include <sys/kernel.h>
50
51#include <net/if.h>
52#include <net/if_dl.h>
53#include <net/if_media.h>
54#include <net/bpf.h>
55#include <net/ethernet.h>
56#include <net/if_arp.h>
57#include <sys/sockio.h>
58
59#include <netinet/in_systm.h>
60#include <netinet/in.h>
61#include <netinet/ip.h>
62#include <netinet/tcp.h>
63#include <netinet/udp.h>
64
65#include <sys/bus.h>
66#include <machine/bus.h>
67#include <sys/rman.h>
68#include <machine/resource.h>
69#include <vm/vm.h>
70#include <vm/pmap.h>
71#include <machine/clock.h>
72#include <pci/pcivar.h>
73#include <pci/pcireg.h>
74
75#include "opt_bdg.h"
76
77#include <dev/em/if_em_fxhw.h>
78#include <dev/em/if_em_phy.h>
79
80/* Tunables */
81#define MAX_TXD                         256
82#define MAX_RXD                         256
83#define TX_CLEANUP_THRESHOLD            MAX_TXD / 8
84#define TIDV                            128
85#define RIDV                            28
86#define DO_AUTO_NEG                     1
87#define WAIT_FOR_AUTO_NEG_DEFAULT       1
88#define AUTONEG_ADV_DEFAULT             (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
89                                         ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
90                                         ADVERTISE_1000_FULL)
91#define EM_ENABLE_RXCSUM_OFFLOAD        1
92#define EM_REPORT_TX_EARLY              2
93#define EM_CHECKSUM_FEATURES            (CSUM_TCP | CSUM_UDP)
94#define EM_MAX_INTR                     3
95#define EM_TX_TIMEOUT                   5    /* set to 5 seconds */
96#define EM_JUMBO_ENABLE_DEFAULT         0
97
98
99#define EM_VENDOR_ID                    0x8086
100#define EM_MMBA                         0x0010 /* Mem base address */
101#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
102#define EM_JUMBO_PBA                    0x00000028
103#define EM_DEFAULT_PBA                  0x00000030
104
105#define IOCTL_CMD_TYPE                  u_long
106#define ETH_LENGTH_OF_ADDRESS           ETHER_ADDR_LEN
107#define PCI_COMMAND_REGISTER            PCIR_COMMAND
108#define MAX_NUM_MULTICAST_ADDRESSES     128
109#define PCI_ANY_ID                      (~0U)
110#define ETHER_ALIGN                     2
111#define CMD_MEM_WRT_INVALIDATE          0x0010
112
113/* Defines for printing debug information */
114#define DEBUG_INIT  0
115#define DEBUG_IOCTL 0
116#define DEBUG_HW    0
117#define DEBUG_TXRX  0
118#define DEBUG_RXCSUM 0
119#define DEBUG_TXCSUM 0
120
121#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
122#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
123#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
124#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
125#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
126#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
127#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
128#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
129#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
130#define TXRX_DEBUGOUT(S)              if (DEBUG_TXRX) printf(S "\n")
131#define TXRX_DEBUGOUT1(S, A)          if (DEBUG_TXRX) printf(S "\n", A)
132#define TXRX_DEBUGOUT2(S, A, B)       if (DEBUG_TXRX) printf(S "\n", A, B)
133#define RXCSUM_DEBUGOUT(S)              if (DEBUG_RXCSUM) printf(S "\n")
134#define RXCSUM_DEBUGOUT1(S, A)          if (DEBUG_RXCSUM) printf(S "\n", A)
135#define RXCSUM_DEBUGOUT2(S, A, B)       if (DEBUG_RXCSUM) printf(S "\n", A, B)
136#define TXCSUM_DEBUGOUT(S)              if (DEBUG_TXCSUM) printf(S "\n")
137#define TXCSUM_DEBUGOUT1(S, A)          if (DEBUG_TXCSUM) printf(S "\n", A)
138#define TXCSUM_DEBUGOUT2(S, A, B)       if (DEBUG_TXCSUM) printf(S "\n", A, B)
139
140/* Device ID defines */
141#define PCI_DEVICE_ID_82542            0x1000
142#define PCI_DEVICE_ID_82543GC_FIBER    0x1001
143#define PCI_DEVICE_ID_82543GC_COPPER   0x1004
144#define PCI_DEVICE_ID_82544EI_FIBER    0x1009
145#define PCI_DEVICE_ID_82544EI_COPPER   0x1008
146#define PCI_DEVICE_ID_82544GC_STRG     0x100C
147#define PCI_DEVICE_ID_82544GC_COPPER   0x100D
148
149/* Supported RX Buffer Sizes */
150#define EM_RXBUFFER_2048        2048
151#define EM_RXBUFFER_4096        4096
152#define EM_RXBUFFER_8192        8192
153#define EM_RXBUFFER_16384      16384
154
155
156/* Jumbo Frame */
157#define EM_JSLOTS                   384
158#define EM_JUMBO_FRAMELEN          9018
159#define EM_JUMBO_MTU               (EM_JUMBO_FRAMELEN - ETHER_HDR_LEN - ETHER_CRC_LEN)
160#define EM_JRAWLEN (EM_JUMBO_FRAMELEN + ETHER_ALIGN + sizeof(u_int64_t))
161#define EM_JLEN (EM_JRAWLEN + (sizeof(u_int64_t) - \
162                              (EM_JRAWLEN % sizeof(u_int64_t))))
163#define EM_JPAGESZ PAGE_SIZE
164#define EM_RESID (EM_JPAGESZ - (EM_JLEN * EM_JSLOTS) % EM_JPAGESZ)
165#define EM_JMEM ((EM_JLEN * EM_JSLOTS) + EM_RESID)
166
167struct em_jslot {
168        caddr_t                 em_buf;
169        int                     em_inuse;
170};
171
172struct em_jpool_entry {
173        int                             slot;
174        SLIST_ENTRY(em_jpool_entry)     em_jpool_entries;
175};
176
177
178
179/* ******************************************************************************
180 * vendor_info_array
181 *
182 * This array contains the list of Subvendor/Subdevice IDs on which the driver
183 * should load.
184 *
185 * ******************************************************************************/
186typedef struct _em_vendor_info_t
187{
188        unsigned int vendor_id;
189        unsigned int device_id;
190        unsigned int subvendor_id;
191        unsigned int subdevice_id;
192        unsigned int index;
193} em_vendor_info_t;
194
195
196struct em_tx_buffer {
197        STAILQ_ENTRY(em_tx_buffer) em_tx_entry;
198        struct mbuf    *Packet;
199        u_int32_t       NumTxDescriptorsUsed;
200};
201
202
203/* ******************************************************************************
204 * This structure stores information about the 2k aligned receive buffer
205 * into which the E1000 DMA's frames.
206 * ******************************************************************************/
207struct em_rx_buffer {
208        STAILQ_ENTRY(em_rx_buffer) em_rx_entry;
209        struct mbuf    *Packet;
210        u_int32_t       LowPhysicalAddress;
211        u_int32_t       HighPhysicalAddress;
212};
213
214typedef enum _XSUM_CONTEXT_T {
215        OFFLOAD_NONE,
216        OFFLOAD_TCP_IP,
217        OFFLOAD_UDP_IP
218} XSUM_CONTEXT_T;
219
220/* Our adapter structure */
221struct adapter {
222        struct arpcom   interface_data;
223        struct adapter *next;
224        struct adapter *prev;
225
226        /* FreeBSD operating-system-specific structures */
227        bus_space_tag_t bus_space_tag;
228        bus_space_handle_t bus_space_handle;
229        struct device   *dev;
230        struct resource *res_memory;
231        struct resource *res_interrupt;
232        void            *int_handler_tag;
233        struct ifmedia  media;
234        struct callout_handle timer_handle;
235        u_int8_t        unit;
236
237        /* PCI Info */
238        u_int16_t       VendorId;
239        u_int16_t       DeviceId;
240        u_int8_t        RevId;
241        u_int16_t       SubVendorId;
242        u_int16_t       SubSystemId;
243        u_int16_t       PciCommandWord;
244
245        /* PCI Bus Info */
246        E1000_BUS_TYPE_ENUM BusType;
247        E1000_BUS_SPEED_ENUM BusSpeed;
248        E1000_BUS_WIDTH_ENUM BusWidth;
249
250        /* Info about the board itself */
251        u_int8_t        MacType;
252        u_int8_t        MediaType;
253        u_int32_t       PhyId;
254        u_int32_t       PhyAddress;
255        uint8_t         CurrentNetAddress[ETH_LENGTH_OF_ADDRESS];
256        uint8_t         PermNetAddress[ETH_LENGTH_OF_ADDRESS];
257        u_int32_t       PartNumber;
258
259        u_int8_t        AdapterStopped;
260        u_int8_t        DmaFairness;
261        u_int8_t        ReportTxEarly;
262        u_int32_t       MulticastFilterType;
263        u_int32_t       NumberOfMcAddresses;
264        u_int8_t        MulticastAddressList[MAX_NUM_MULTICAST_ADDRESSES][ETH_LENGTH_OF_ADDRESS];
265
266        u_int8_t        GetLinkStatus;
267        u_int8_t        LinkStatusChanged;
268        u_int8_t        LinkIsActive;
269        u_int32_t       AutoNegFailed;
270        u_int8_t        AutoNeg;
271        u_int16_t       AutoNegAdvertised;
272        u_int8_t        WaitAutoNegComplete;
273        u_int8_t        ForcedSpeedDuplex;
274        u_int16_t       LineSpeed;
275        u_int16_t       FullDuplex;
276        u_int8_t        TbiCompatibilityEnable;
277        u_int8_t        TbiCompatibilityOn;
278        u_int32_t       TxcwRegValue;
279        u_int32_t       OriginalFlowControl;
280        u_int32_t       FlowControl;
281        u_int16_t       FlowControlHighWatermark;
282        u_int16_t       FlowControlLowWatermark;
283        u_int16_t       FlowControlPauseTime;
284        u_int8_t        FlowControlSendXon;
285
286        u_int32_t       MaxFrameSize;
287        u_int32_t       TxIntDelay;
288        u_int32_t       RxIntDelay;
289
290        u_int8_t        RxChecksum;
291        XSUM_CONTEXT_T  ActiveChecksumContext;
292
293        u_int8_t        MdiX;
294        u_int8_t        DisablePolarityCorrection;
295
296        /* Transmit definitions */
297        struct _E1000_TRANSMIT_DESCRIPTOR *FirstTxDescriptor;
298        struct _E1000_TRANSMIT_DESCRIPTOR *LastTxDescriptor;
299        struct _E1000_TRANSMIT_DESCRIPTOR *NextAvailTxDescriptor;
300        struct _E1000_TRANSMIT_DESCRIPTOR *OldestUsedTxDescriptor;
301        struct _E1000_TRANSMIT_DESCRIPTOR *TxDescBase;
302        volatile u_int16_t NumTxDescriptorsAvail;
303        u_int16_t       NumTxDescriptors;
304        u_int32_t       TxdCmd;
305        struct em_tx_buffer   *tx_buffer_area;
306        STAILQ_HEAD(__em_tx_buffer_free, em_tx_buffer)  FreeSwTxPacketList;
307        STAILQ_HEAD(__em_tx_buffer_used, em_tx_buffer)  UsedSwTxPacketList;
308
309        /* Receive definitions */
310        struct _E1000_RECEIVE_DESCRIPTOR *FirstRxDescriptor;
311        struct _E1000_RECEIVE_DESCRIPTOR *LastRxDescriptor;
312        struct _E1000_RECEIVE_DESCRIPTOR *NextRxDescriptorToCheck;
313        struct _E1000_RECEIVE_DESCRIPTOR *RxDescBase;
314        u_int16_t       NumRxDescriptors;
315        u_int16_t       NumRxDescriptorsEmpty;
316        u_int16_t       NextRxDescriptorToFill;
317        u_int32_t       RxBufferLen;
318        struct em_rx_buffer   *rx_buffer_area;
319        STAILQ_HEAD(__em_rx_buffer, em_rx_buffer)  RxSwPacketList;
320
321        /* Jumbo frame */
322        u_int8_t               JumboEnable;
323        struct em_jslot        em_jslots[EM_JSLOTS];
324        void                  *em_jumbo_buf;
325        SLIST_HEAD(__em_jfreehead, em_jpool_entry)      em_jfree_listhead;
326        SLIST_HEAD(__em_jinusehead, em_jpool_entry)     em_jinuse_listhead;
327
328
329        /* Misc stats maintained by the driver */
330        unsigned long   DroppedPackets;
331        unsigned long   NoJumboBufAvail;
332        unsigned long   JumboMbufFailed;
333        unsigned long   JumboClusterFailed;
334        unsigned long   StdMbufFailed;
335        unsigned long   StdClusterFailed;
336#ifdef DBG_STATS
337        unsigned long   NoTxDescAvail;
338        unsigned long   NoPacketsAvail;
339        unsigned long   CleanTxInterrupts;
340        unsigned long   NoTxBufferAvail1;
341        unsigned long   NoTxBufferAvail2;
342#endif
343
344        /* Statistics registers present in the 82542 */
345        unsigned long   Crcerrs;
346        unsigned long   Symerrs;
347        unsigned long   Mpc;
348        unsigned long   Scc;
349        unsigned long   Ecol;
350        unsigned long   Mcc;
351        unsigned long   Latecol;
352        unsigned long   Colc;
353        unsigned long   Dc;
354        unsigned long   Sec;
355        unsigned long   Rlec;
356        unsigned long   Xonrxc;
357        unsigned long   Xontxc;
358        unsigned long   Xoffrxc;
359        unsigned long   Xofftxc;
360        unsigned long   Fcruc;
361        unsigned long   Prc64;
362        unsigned long   Prc127;
363        unsigned long   Prc255;
364        unsigned long   Prc511;
365        unsigned long   Prc1023;
366        unsigned long   Prc1522;
367        unsigned long   Gprc;
368        unsigned long   Bprc;
369        unsigned long   Mprc;
370        unsigned long   Gptc;
371        unsigned long   Gorcl;
372        unsigned long   Gorch;
373        unsigned long   Gotcl;
374        unsigned long   Gotch;
375        unsigned long   Rnbc;
376        unsigned long   Ruc;
377        unsigned long   Rfc;
378        unsigned long   Roc;
379        unsigned long   Rjc;
380        unsigned long   Torcl;
381        unsigned long   Torch;
382        unsigned long   Totcl;
383        unsigned long   Totch;
384        unsigned long   Tpr;
385        unsigned long   Tpt;
386        unsigned long   Ptc64;
387        unsigned long   Ptc127;
388        unsigned long   Ptc255;
389        unsigned long   Ptc511;
390        unsigned long   Ptc1023;
391        unsigned long   Ptc1522;
392        unsigned long   Mptc;
393        unsigned long   Bptc;
394        /* Statistics registers added in the 82543 */
395        unsigned long   Algnerrc;
396        unsigned long   Rxerrc;
397        unsigned long   Tuc;
398        unsigned long   Tncrs;
399        unsigned long   Cexterr;
400        unsigned long   Rutec;
401        unsigned long   Tsctc;
402        unsigned long   Tsctfc;
403
404};
405
406extern void em_adjust_tbi_accepted_stats(struct adapter * Adapter,
407                                            u32 FrameLength, u8 * MacAddress);
408
409#endif                                                  /* _EM_H_DEFINED_ */
410