if_em.h revision 87189 
1/**************************************************************************
2**************************************************************************
3
4Copyright (c) 2001 Intel Corporation
5All rights reserved.
6
7Redistribution and use in source and binary forms of the Software, with or
8without modification, are permitted provided that the following conditions
9are met:
10
11 1. Redistributions of source code of the Software may retain the above
12    copyright notice, this list of conditions and the following disclaimer.
13
14 2. Redistributions in binary form of the Software may reproduce the above
15    copyright notice, this list of conditions and the following disclaimer
16    in the documentation and/or other materials provided with the
17    distribution.
18
19 3. Neither the name of the Intel Corporation nor the names of its
20    contributors shall be used to endorse or promote products derived from
21    this Software without specific prior written permission.
22
23THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS CONTRIBUTORS BE LIABLE
27FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33SUCH DAMAGE.
34
35$FreeBSD: head/sys/dev/em/if_em.h 87189 2001-12-02 07:37:17Z pdeuskar $
36***************************************************************************
37***************************************************************************/
38
39#ifndef _EM_H_DEFINED_
40#define _EM_H_DEFINED_
41
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/mbuf.h>
46#include <sys/protosw.h>
47#include <sys/socket.h>
48#include <sys/malloc.h>
49#include <sys/kernel.h>
50
51#include <net/if.h>
52#include <net/if_dl.h>
53#include <net/if_media.h>
54#include <net/bpf.h>
55#include <net/ethernet.h>
56#include <net/if_arp.h>
57#include <sys/sockio.h>
58
59#include <netinet/in_systm.h>
60#include <netinet/in.h>
61#include <netinet/ip.h>
62#include <netinet/tcp.h>
63#include <netinet/udp.h>
64
65#include <sys/bus.h>
66#include <machine/bus.h>
67#include <sys/rman.h>
68#include <machine/resource.h>
69#include <vm/vm.h>
70#include <vm/pmap.h>
71#include <machine/clock.h>
72#include <pci/pcivar.h>
73#include <pci/pcireg.h>
74#include <stddef.h>
75
76#include "opt_bdg.h"
77
78#include <dev/em/if_em_fxhw.h>
79#include <dev/em/if_em_phy.h>
80
81/* Tunables */
82#define MAX_TXD                         256
83#define MAX_RXD                         256
84#define TX_CLEANUP_THRESHOLD            MAX_TXD / 8
85#define TIDV                            128
86#define RIDV                            28
87#define DO_AUTO_NEG                     1
88#define WAIT_FOR_AUTO_NEG_DEFAULT       1
89#define AUTONEG_ADV_DEFAULT             (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
90                                         ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
91                                         ADVERTISE_1000_FULL)
92#define EM_ENABLE_RXCSUM_OFFLOAD        1
93#define EM_REPORT_TX_EARLY              2
94#define EM_CHECKSUM_FEATURES            (CSUM_TCP | CSUM_UDP)
95#define EM_MAX_INTR                     3
96#define EM_TX_TIMEOUT                   5    /* set to 5 seconds */
97#define EM_JUMBO_ENABLE_DEFAULT         0
98
99
100#define EM_VENDOR_ID                    0x8086
101#define EM_MMBA                         0x0010 /* Mem base address */
102#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
103#define EM_JUMBO_PBA                    0x00000028
104#define EM_DEFAULT_PBA                  0x00000030
105
106#define IOCTL_CMD_TYPE                  u_long
107#define ETH_LENGTH_OF_ADDRESS           ETHER_ADDR_LEN
108#define PCI_COMMAND_REGISTER            PCIR_COMMAND
109#define MAX_NUM_MULTICAST_ADDRESSES     128
110#define PCI_ANY_ID                      (~0U)
111#define ETHER_ALIGN                     2
112#define CMD_MEM_WRT_INVALIDATE          0x0010
113
114/* Defines for printing debug information */
115#define DEBUG_INIT  0
116#define DEBUG_IOCTL 0
117#define DEBUG_HW    0
118#define DEBUG_TXRX  0
119#define DEBUG_RXCSUM 0
120#define DEBUG_TXCSUM 0
121
122#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
123#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
124#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
125#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
126#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
127#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
128#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
129#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
130#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
131#define TXRX_DEBUGOUT(S)              if (DEBUG_TXRX) printf(S "\n")
132#define TXRX_DEBUGOUT1(S, A)          if (DEBUG_TXRX) printf(S "\n", A)
133#define TXRX_DEBUGOUT2(S, A, B)       if (DEBUG_TXRX) printf(S "\n", A, B)
134#define RXCSUM_DEBUGOUT(S)              if (DEBUG_RXCSUM) printf(S "\n")
135#define RXCSUM_DEBUGOUT1(S, A)          if (DEBUG_RXCSUM) printf(S "\n", A)
136#define RXCSUM_DEBUGOUT2(S, A, B)       if (DEBUG_RXCSUM) printf(S "\n", A, B)
137#define TXCSUM_DEBUGOUT(S)              if (DEBUG_TXCSUM) printf(S "\n")
138#define TXCSUM_DEBUGOUT1(S, A)          if (DEBUG_TXCSUM) printf(S "\n", A)
139#define TXCSUM_DEBUGOUT2(S, A, B)       if (DEBUG_TXCSUM) printf(S "\n", A, B)
140
141/* Device ID defines */
142#define PCI_DEVICE_ID_82542            0x1000
143#define PCI_DEVICE_ID_82543GC_FIBER    0x1001
144#define PCI_DEVICE_ID_82543GC_COPPER   0x1004
145#define PCI_DEVICE_ID_82544EI_FIBER    0x1009
146#define PCI_DEVICE_ID_82544EI_COPPER   0x1008
147#define PCI_DEVICE_ID_82544GC_STRG     0x100C
148#define PCI_DEVICE_ID_82544GC_COPPER   0x100D
149
150/* Supported RX Buffer Sizes */
151#define EM_RXBUFFER_2048        2048
152#define EM_RXBUFFER_4096        4096
153#define EM_RXBUFFER_8192        8192
154#define EM_RXBUFFER_16384      16384
155
156
157/* Jumbo Frame */
158#define EM_JSLOTS                   384
159#define EM_JUMBO_FRAMELEN          9018
160#define EM_JUMBO_MTU               (EM_JUMBO_FRAMELEN - ETHER_HDR_LEN - ETHER_CRC_LEN)
161#define EM_JRAWLEN (EM_JUMBO_FRAMELEN + ETHER_ALIGN + sizeof(u_int64_t))
162#define EM_JLEN (EM_JRAWLEN + (sizeof(u_int64_t) - \
163                              (EM_JRAWLEN % sizeof(u_int64_t))))
164#define EM_JPAGESZ PAGE_SIZE
165#define EM_RESID (EM_JPAGESZ - (EM_JLEN * EM_JSLOTS) % EM_JPAGESZ)
166#define EM_JMEM ((EM_JLEN * EM_JSLOTS) + EM_RESID)
167
168struct em_jslot {
169        caddr_t                 em_buf;
170        int                     em_inuse;
171};
172
173struct em_jpool_entry {
174        int                             slot;
175        SLIST_ENTRY(em_jpool_entry)     em_jpool_entries;
176};
177
178
179
180/* ******************************************************************************
181 * vendor_info_array
182 *
183 * This array contains the list of Subvendor/Subdevice IDs on which the driver
184 * should load.
185 *
186 * ******************************************************************************/
187typedef struct _em_vendor_info_t
188{
189        unsigned int vendor_id;
190        unsigned int device_id;
191        unsigned int subvendor_id;
192        unsigned int subdevice_id;
193        unsigned int index;
194} em_vendor_info_t;
195
196
197struct em_tx_buffer {
198        STAILQ_ENTRY(em_tx_buffer) em_tx_entry;
199        struct mbuf    *Packet;
200        u_int32_t       NumTxDescriptorsUsed;
201};
202
203
204/* ******************************************************************************
205 * This structure stores information about the 2k aligned receive buffer
206 * into which the E1000 DMA's frames.
207 * ******************************************************************************/
208struct em_rx_buffer {
209        STAILQ_ENTRY(em_rx_buffer) em_rx_entry;
210        struct mbuf    *Packet;
211        u_int32_t       LowPhysicalAddress;
212        u_int32_t       HighPhysicalAddress;
213};
214
215typedef enum _XSUM_CONTEXT_T {
216        OFFLOAD_NONE,
217        OFFLOAD_TCP_IP,
218        OFFLOAD_UDP_IP
219} XSUM_CONTEXT_T;
220
221/* Our adapter structure */
222struct adapter {
223        struct arpcom   interface_data;
224        struct adapter *next;
225        struct adapter *prev;
226
227        /* FreeBSD operating-system-specific structures */
228        bus_space_tag_t bus_space_tag;
229        bus_space_handle_t bus_space_handle;
230        struct device   *dev;
231        struct resource *res_memory;
232        struct resource *res_interrupt;
233        void            *int_handler_tag;
234        struct ifmedia  media;
235        struct callout_handle timer_handle;
236        u_int8_t        unit;
237
238        /* PCI Info */
239        u_int16_t       VendorId;
240        u_int16_t       DeviceId;
241        u_int8_t        RevId;
242        u_int16_t       SubVendorId;
243        u_int16_t       SubSystemId;
244        u_int16_t       PciCommandWord;
245
246        /* PCI Bus Info */
247        E1000_BUS_TYPE_ENUM BusType;
248        E1000_BUS_SPEED_ENUM BusSpeed;
249        E1000_BUS_WIDTH_ENUM BusWidth;
250
251        /* Info about the board itself */
252        u_int8_t        MacType;
253        u_int8_t        MediaType;
254        u_int32_t       PhyId;
255        u_int32_t       PhyAddress;
256        uint8_t         CurrentNetAddress[ETH_LENGTH_OF_ADDRESS];
257        uint8_t         PermNetAddress[ETH_LENGTH_OF_ADDRESS];
258        u_int32_t       PartNumber;
259
260        u_int8_t        AdapterStopped;
261        u_int8_t        DmaFairness;
262        u_int8_t        ReportTxEarly;
263        u_int32_t       MulticastFilterType;
264        u_int32_t       NumberOfMcAddresses;
265        u_int8_t        MulticastAddressList[MAX_NUM_MULTICAST_ADDRESSES][ETH_LENGTH_OF_ADDRESS];
266
267        u_int8_t        GetLinkStatus;
268        u_int8_t        LinkStatusChanged;
269        u_int8_t        LinkIsActive;
270        u_int32_t       AutoNegFailed;
271        u_int8_t        AutoNeg;
272        u_int16_t       AutoNegAdvertised;
273        u_int8_t        WaitAutoNegComplete;
274        u_int8_t        ForcedSpeedDuplex;
275        u_int16_t       LineSpeed;
276        u_int16_t       FullDuplex;
277        u_int8_t        TbiCompatibilityEnable;
278        u_int8_t        TbiCompatibilityOn;
279        u_int32_t       TxcwRegValue;
280        u_int32_t       OriginalFlowControl;
281        u_int32_t       FlowControl;
282        u_int16_t       FlowControlHighWatermark;
283        u_int16_t       FlowControlLowWatermark;
284        u_int16_t       FlowControlPauseTime;
285        u_int8_t        FlowControlSendXon;
286
287        u_int32_t       MaxFrameSize;
288        u_int32_t       TxIntDelay;
289        u_int32_t       RxIntDelay;
290
291        u_int8_t        RxChecksum;
292        XSUM_CONTEXT_T  ActiveChecksumContext;
293
294        u_int8_t        MdiX;
295        u_int8_t        DisablePolarityCorrection;
296
297        /* Transmit definitions */
298        struct _E1000_TRANSMIT_DESCRIPTOR *FirstTxDescriptor;
299        struct _E1000_TRANSMIT_DESCRIPTOR *LastTxDescriptor;
300        struct _E1000_TRANSMIT_DESCRIPTOR *NextAvailTxDescriptor;
301        struct _E1000_TRANSMIT_DESCRIPTOR *OldestUsedTxDescriptor;
302        struct _E1000_TRANSMIT_DESCRIPTOR *TxDescBase;
303        volatile u_int16_t NumTxDescriptorsAvail;
304        u_int16_t       NumTxDescriptors;
305        u_int32_t       TxdCmd;
306        struct em_tx_buffer   *tx_buffer_area;
307        STAILQ_HEAD(__em_tx_buffer_free, em_tx_buffer)  FreeSwTxPacketList;
308        STAILQ_HEAD(__em_tx_buffer_used, em_tx_buffer)  UsedSwTxPacketList;
309
310        /* Receive definitions */
311        struct _E1000_RECEIVE_DESCRIPTOR *FirstRxDescriptor;
312        struct _E1000_RECEIVE_DESCRIPTOR *LastRxDescriptor;
313        struct _E1000_RECEIVE_DESCRIPTOR *NextRxDescriptorToCheck;
314        struct _E1000_RECEIVE_DESCRIPTOR *RxDescBase;
315        u_int16_t       NumRxDescriptors;
316        u_int16_t       NumRxDescriptorsEmpty;
317        u_int16_t       NextRxDescriptorToFill;
318        u_int32_t       RxBufferLen;
319        struct em_rx_buffer   *rx_buffer_area;
320        STAILQ_HEAD(__em_rx_buffer, em_rx_buffer)  RxSwPacketList;
321
322        /* Jumbo frame */
323        u_int8_t               JumboEnable;
324        struct em_jslot        em_jslots[EM_JSLOTS];
325        void                  *em_jumbo_buf;
326        SLIST_HEAD(__em_jfreehead, em_jpool_entry)      em_jfree_listhead;
327        SLIST_HEAD(__em_jinusehead, em_jpool_entry)     em_jinuse_listhead;
328
329
330        /* Misc stats maintained by the driver */
331        unsigned long   DroppedPackets;
332        unsigned long   NoJumboBufAvail;
333        unsigned long   JumboMbufFailed;
334        unsigned long   JumboClusterFailed;
335        unsigned long   StdMbufFailed;
336        unsigned long   StdClusterFailed;
337#ifdef DBG_STATS
338        unsigned long   NoTxDescAvail;
339        unsigned long   NoPacketsAvail;
340        unsigned long   CleanTxInterrupts;
341        unsigned long   NoTxBufferAvail1;
342        unsigned long   NoTxBufferAvail2;
343#endif
344
345        /* Statistics registers present in the 82542 */
346        unsigned long   Crcerrs;
347        unsigned long   Symerrs;
348        unsigned long   Mpc;
349        unsigned long   Scc;
350        unsigned long   Ecol;
351        unsigned long   Mcc;
352        unsigned long   Latecol;
353        unsigned long   Colc;
354        unsigned long   Dc;
355        unsigned long   Sec;
356        unsigned long   Rlec;
357        unsigned long   Xonrxc;
358        unsigned long   Xontxc;
359        unsigned long   Xoffrxc;
360        unsigned long   Xofftxc;
361        unsigned long   Fcruc;
362        unsigned long   Prc64;
363        unsigned long   Prc127;
364        unsigned long   Prc255;
365        unsigned long   Prc511;
366        unsigned long   Prc1023;
367        unsigned long   Prc1522;
368        unsigned long   Gprc;
369        unsigned long   Bprc;
370        unsigned long   Mprc;
371        unsigned long   Gptc;
372        unsigned long   Gorcl;
373        unsigned long   Gorch;
374        unsigned long   Gotcl;
375        unsigned long   Gotch;
376        unsigned long   Rnbc;
377        unsigned long   Ruc;
378        unsigned long   Rfc;
379        unsigned long   Roc;
380        unsigned long   Rjc;
381        unsigned long   Torcl;
382        unsigned long   Torch;
383        unsigned long   Totcl;
384        unsigned long   Totch;
385        unsigned long   Tpr;
386        unsigned long   Tpt;
387        unsigned long   Ptc64;
388        unsigned long   Ptc127;
389        unsigned long   Ptc255;
390        unsigned long   Ptc511;
391        unsigned long   Ptc1023;
392        unsigned long   Ptc1522;
393        unsigned long   Mptc;
394        unsigned long   Bptc;
395        /* Statistics registers added in the 82543 */
396        unsigned long   Algnerrc;
397        unsigned long   Rxerrc;
398        unsigned long   Tuc;
399        unsigned long   Tncrs;
400        unsigned long   Cexterr;
401        unsigned long   Rutec;
402        unsigned long   Tsctc;
403        unsigned long   Tsctfc;
404
405};
406
407extern void em_adjust_tbi_accepted_stats(struct adapter * Adapter,
408                                            u32 FrameLength, u8 * MacAddress);
409
410#endif                                                  /* _EM_H_DEFINED_ */
411