if_em.h revision 155709
1/************************************************************************** 2 3Copyright (c) 2001-2005, Intel Corporation 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30POSSIBILITY OF SUCH DAMAGE. 31 32***************************************************************************/ 33 34/*$FreeBSD: head/sys/dev/em/if_em.h 155709 2006-02-15 08:39:50Z glebius $*/ 35 36#ifndef _EM_H_DEFINED_ 37#define _EM_H_DEFINED_ 38 39/* Tunables */ 40 41/* 42 * EM_TXD: Maximum number of Transmit Descriptors 43 * Valid Range: 80-256 for 82542 and 82543-based adapters 44 * 80-4096 for others 45 * Default Value: 256 46 * This value is the number of transmit descriptors allocated by the driver. 47 * Increasing this value allows the driver to queue more transmits. Each 48 * descriptor is 16 bytes. 49 * Since TDLEN should be multiple of 128bytes, the number of transmit 50 * desscriptors should meet the following condition. 51 * (num_tx_desc * sizeof(struct em_tx_desc)) % 128 == 0 52 */ 53#define EM_MIN_TXD 80 54#define EM_MAX_TXD_82543 256 55#define EM_MAX_TXD 4096 56#define EM_DEFAULT_TXD EM_MAX_TXD_82543 57 58/* 59 * EM_RXD - Maximum number of receive Descriptors 60 * Valid Range: 80-256 for 82542 and 82543-based adapters 61 * 80-4096 for others 62 * Default Value: 256 63 * This value is the number of receive descriptors allocated by the driver. 64 * Increasing this value allows the driver to buffer more incoming packets. 65 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 66 * descriptor. The maximum MTU size is 16110. 67 * Since TDLEN should be multiple of 128bytes, the number of transmit 68 * desscriptors should meet the following condition. 69 * (num_tx_desc * sizeof(struct em_tx_desc)) % 128 == 0 70 */ 71#define EM_MIN_RXD 80 72#define EM_MAX_RXD_82543 256 73#define EM_MAX_RXD 4096 74#define EM_DEFAULT_RXD EM_MAX_RXD_82543 75 76/* 77 * EM_TIDV - Transmit Interrupt Delay Value 78 * Valid Range: 0-65535 (0=off) 79 * Default Value: 64 80 * This value delays the generation of transmit interrupts in units of 81 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 82 * efficiency if properly tuned for specific network traffic. If the 83 * system is reporting dropped transmits, this value may be set too high 84 * causing the driver to run out of available transmit descriptors. 85 */ 86#define EM_TIDV 64 87 88/* 89 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544) 90 * Valid Range: 0-65535 (0=off) 91 * Default Value: 64 92 * This value, in units of 1.024 microseconds, limits the delay in which a 93 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 94 * this value ensures that an interrupt is generated after the initial 95 * packet is sent on the wire within the set amount of time. Proper tuning, 96 * along with EM_TIDV, may improve traffic throughput in specific 97 * network conditions. 98 */ 99#define EM_TADV 64 100 101/* 102 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 103 * Valid Range: 0-65535 (0=off) 104 * Default Value: 0 105 * This value delays the generation of receive interrupts in units of 1.024 106 * microseconds. Receive interrupt reduction can improve CPU efficiency if 107 * properly tuned for specific network traffic. Increasing this value adds 108 * extra latency to frame reception and can end up decreasing the throughput 109 * of TCP traffic. If the system is reporting dropped receives, this value 110 * may be set too high, causing the driver to run out of available receive 111 * descriptors. 112 * 113 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 114 * may hang (stop transmitting) under certain network conditions. 115 * If this occurs a WATCHDOG message is logged in the system event log. 116 * In addition, the controller is automatically reset, restoring the 117 * network connection. To eliminate the potential for the hang 118 * ensure that EM_RDTR is set to 0. 119 */ 120#define EM_RDTR 0 121 122/* 123 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 124 * Valid Range: 0-65535 (0=off) 125 * Default Value: 64 126 * This value, in units of 1.024 microseconds, limits the delay in which a 127 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 128 * this value ensures that an interrupt is generated after the initial 129 * packet is received within the set amount of time. Proper tuning, 130 * along with EM_RDTR, may improve traffic throughput in specific network 131 * conditions. 132 */ 133#define EM_RADV 64 134 135/* 136 * Inform the stack about transmit checksum offload capabilities. 137 */ 138#define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP) 139 140/* 141 * This parameter controls the duration of transmit watchdog timer. 142 */ 143#define EM_TX_TIMEOUT 5 /* set to 5 seconds */ 144 145/* 146 * This parameter controls when the driver calls the routine to reclaim 147 * transmit descriptors. 148 */ 149#define EM_TX_CLEANUP_THRESHOLD (sc->num_tx_desc / 8) 150 151/* 152 * This parameter controls whether or not autonegotation is enabled. 153 * 0 - Disable autonegotiation 154 * 1 - Enable autonegotiation 155 */ 156#define DO_AUTO_NEG 1 157 158/* 159 * This parameter control whether or not the driver will wait for 160 * autonegotiation to complete. 161 * 1 - Wait for autonegotiation to complete 162 * 0 - Don't wait for autonegotiation to complete 163 */ 164#define WAIT_FOR_AUTO_NEG_DEFAULT 0 165 166/* 167 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue 168 * with 82541/82547 devices and some switches. See the "Known Limitations" section of 169 * the README file for a complete description and a list of affected switches. 170 * 171 * 0 = Hardware default 172 * 1 = Master mode 173 * 2 = Slave mode 174 * 3 = Auto master/slave 175 */ 176/* #define EM_MASTER_SLAVE 2 */ 177 178/* Tunables -- End */ 179 180#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 181 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 182 ADVERTISE_1000_FULL) 183 184#define EM_VENDOR_ID 0x8086 185 186#define EM_JUMBO_PBA 0x00000028 187#define EM_DEFAULT_PBA 0x00000030 188#define EM_SMARTSPEED_DOWNSHIFT 3 189#define EM_SMARTSPEED_MAX 15 190 191 192#define MAX_NUM_MULTICAST_ADDRESSES 128 193#define PCI_ANY_ID (~0U) 194#define ETHER_ALIGN 2 195 196/* Defines for printing debug information */ 197#define DEBUG_INIT 0 198#define DEBUG_IOCTL 0 199#define DEBUG_HW 0 200 201#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 202#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 203#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 204#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 205#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 206#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 207#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 208#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 209#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 210 211 212/* Supported RX Buffer Sizes */ 213#define EM_RXBUFFER_2048 2048 214#define EM_RXBUFFER_4096 4096 215#define EM_RXBUFFER_8192 8192 216#define EM_RXBUFFER_16384 16384 217 218#define EM_MAX_SCATTER 64 219 220typedef enum _XSUM_CONTEXT_T { 221 OFFLOAD_NONE, 222 OFFLOAD_TCP_IP, 223 OFFLOAD_UDP_IP 224} XSUM_CONTEXT_T; 225 226struct em_softc sc; /* XXX: ugly forward declaration */ 227struct em_int_delay_info { 228 struct em_softc *sc; /* XXX: ugly pointer */ 229 int offset; /* Register offset to read/write */ 230 int value; /* Current value in usecs */ 231}; 232 233/* 234 * Bus dma allocation structure used by 235 * em_dma_malloc() and em_dma_free(). 236 */ 237struct em_dma_alloc { 238 bus_addr_t dma_paddr; 239 caddr_t dma_vaddr; 240 bus_dma_tag_t dma_tag; 241 bus_dmamap_t dma_map; 242 bus_dma_segment_t dma_seg; 243 int dma_nseg; 244}; 245 246/* Driver softc. */ 247struct em_softc { 248 struct ifnet *ifp; 249 struct em_hw hw; 250 251 /* FreeBSD operating-system-specific structures. */ 252 struct em_osdep osdep; 253 struct device *dev; 254 struct resource *res_memory; 255 struct resource *res_ioport; 256 struct resource *res_interrupt; 257 void *int_handler_tag; 258 struct ifmedia media; 259 struct callout timer; 260 struct callout tx_fifo_timer; 261 int io_rid; 262 struct mtx mtx; 263 int em_insert_vlan_header; 264 struct task link_task; 265 struct task rxtx_task; 266 struct taskqueue *tq; /* private task queue */ 267 268 /* Info about the board itself */ 269 uint32_t part_num; 270 uint8_t link_active; 271 uint16_t link_speed; 272 uint16_t link_duplex; 273 uint32_t smartspeed; 274 struct em_int_delay_info tx_int_delay; 275 struct em_int_delay_info tx_abs_int_delay; 276 struct em_int_delay_info rx_int_delay; 277 struct em_int_delay_info rx_abs_int_delay; 278 279 XSUM_CONTEXT_T active_checksum_context; 280 281 /* 282 * Transmit definitions 283 * 284 * We have an array of num_tx_desc descriptors (handled 285 * by the controller) paired with an array of tx_buffers 286 * (at tx_buffer_area). 287 * The index of the next available descriptor is next_avail_tx_desc. 288 * The number of remaining tx_desc is num_tx_desc_avail. 289 */ 290 struct em_dma_alloc txdma; /* bus_dma glue for tx desc */ 291 struct em_tx_desc *tx_desc_base; 292 uint32_t next_avail_tx_desc; 293 uint32_t oldest_used_tx_desc; 294 volatile uint16_t num_tx_desc_avail; 295 uint16_t num_tx_desc; 296 uint32_t txd_cmd; 297 struct em_buffer *tx_buffer_area; 298 bus_dma_tag_t txtag; /* dma tag for tx */ 299 300 /* 301 * Receive definitions 302 * 303 * we have an array of num_rx_desc rx_desc (handled by the 304 * controller), and paired with an array of rx_buffers 305 * (at rx_buffer_area). 306 * The next pair to check on receive is at offset next_rx_desc_to_check 307 */ 308 struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */ 309 struct em_rx_desc *rx_desc_base; 310 uint32_t next_rx_desc_to_check; 311 uint32_t rx_buffer_len; 312 uint16_t num_rx_desc; 313 int rx_process_limit; 314 struct em_buffer *rx_buffer_area; 315 bus_dma_tag_t rxtag; 316 317 /* First/last mbuf pointers, for collecting multisegment RX packets. */ 318 struct mbuf *fmp; 319 struct mbuf *lmp; 320 321 /* Misc stats maintained by the driver */ 322 unsigned long dropped_pkts; 323 unsigned long mbuf_alloc_failed; 324 unsigned long mbuf_cluster_failed; 325 unsigned long no_tx_desc_avail1; 326 unsigned long no_tx_desc_avail2; 327 unsigned long no_tx_map_avail; 328 unsigned long no_tx_dma_setup; 329 unsigned long watchdog_events; 330 unsigned long rx_overruns; 331 332 /* Used in for 82547 10Mb Half workaround */ 333 #define EM_PBA_BYTES_SHIFT 0xA 334 #define EM_TX_HEAD_ADDR_SHIFT 7 335 #define EM_PBA_TX_MASK 0xFFFF0000 336 #define EM_FIFO_HDR 0x10 337 338 #define EM_82547_PKT_THRESH 0x3e0 339 340 uint32_t tx_fifo_size; 341 uint32_t tx_fifo_head; 342 uint32_t tx_fifo_head_addr; 343 uint64_t tx_fifo_reset_cnt; 344 uint64_t tx_fifo_wrk_cnt; 345 uint32_t tx_head_addr; 346 347 /* For 82544 PCIX Workaround */ 348 boolean_t pcix_82544; 349 boolean_t in_detach; 350 351 struct em_hw_stats stats; 352}; 353 354/* ****************************************************************************** 355 * vendor_info_array 356 * 357 * This array contains the list of Subvendor/Subdevice IDs on which the driver 358 * should load. 359 * 360 * ******************************************************************************/ 361typedef struct _em_vendor_info_t { 362 unsigned int vendor_id; 363 unsigned int device_id; 364 unsigned int subvendor_id; 365 unsigned int subdevice_id; 366 unsigned int index; 367} em_vendor_info_t; 368 369 370struct em_buffer { 371 struct mbuf *m_head; 372 bus_dmamap_t map; /* bus_dma map for packet */ 373}; 374 375/* For 82544 PCIX Workaround */ 376typedef struct _ADDRESS_LENGTH_PAIR 377{ 378 u_int64_t address; 379 u_int32_t length; 380} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR; 381 382typedef struct _DESCRIPTOR_PAIR 383{ 384 ADDRESS_LENGTH_PAIR descriptor[4]; 385 u_int32_t elements; 386} DESC_ARRAY, *PDESC_ARRAY; 387 388#define EM_LOCK_INIT(_sc, _name) \ 389 mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF) 390#define EM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 391#define EM_LOCK(_sc) mtx_lock(&(_sc)->mtx) 392#define EM_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 393#define EM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) 394 395#endif /* _EM_H_DEFINED_ */ 396