if_em.h revision 155674 
1/**************************************************************************
2
3Copyright (c) 2001-2005, Intel Corporation
4All rights reserved.
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7modification, are permitted provided that the following conditions are met:
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10    this list of conditions and the following disclaimer.
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12 2. Redistributions in binary form must reproduce the above copyright
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20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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32***************************************************************************/
33
34/*$FreeBSD: head/sys/dev/em/if_em.h 155674 2006-02-14 13:11:36Z glebius $*/
35
36#ifndef _EM_H_DEFINED_
37#define _EM_H_DEFINED_
38
39/* Tunables */
40
41/*
42 * EM_TXD: Maximum number of Transmit Descriptors
43 * Valid Range: 80-256 for 82542 and 82543-based adapters
44 *              80-4096 for others
45 * Default Value: 256
46 *   This value is the number of transmit descriptors allocated by the driver.
47 *   Increasing this value allows the driver to queue more transmits. Each
48 *   descriptor is 16 bytes.
49 *   Since TDLEN should be multiple of 128bytes, the number of transmit
50 *   desscriptors should meet the following condition.
51 *      (num_tx_desc * sizeof(struct em_tx_desc)) % 128 == 0
52 */
53#define EM_MIN_TXD		80
54#define EM_MAX_TXD_82543	256
55#define EM_MAX_TXD		4096
56#define EM_DEFAULT_TXD		EM_MAX_TXD_82543
57
58/*
59 * EM_RXD - Maximum number of receive Descriptors
60 * Valid Range: 80-256 for 82542 and 82543-based adapters
61 *              80-4096 for others
62 * Default Value: 256
63 *   This value is the number of receive descriptors allocated by the driver.
64 *   Increasing this value allows the driver to buffer more incoming packets.
65 *   Each descriptor is 16 bytes.  A receive buffer is also allocated for each
66 *   descriptor. The maximum MTU size is 16110.
67 *   Since TDLEN should be multiple of 128bytes, the number of transmit
68 *   desscriptors should meet the following condition.
69 *      (num_tx_desc * sizeof(struct em_tx_desc)) % 128 == 0
70 */
71#define EM_MIN_RXD		80
72#define EM_MAX_RXD_82543	256
73#define EM_MAX_RXD		4096
74#define EM_DEFAULT_RXD		EM_MAX_RXD_82543
75
76/*
77 * EM_TIDV - Transmit Interrupt Delay Value
78 * Valid Range: 0-65535 (0=off)
79 * Default Value: 64
80 *   This value delays the generation of transmit interrupts in units of
81 *   1.024 microseconds. Transmit interrupt reduction can improve CPU
82 *   efficiency if properly tuned for specific network traffic. If the
83 *   system is reporting dropped transmits, this value may be set too high
84 *   causing the driver to run out of available transmit descriptors.
85 */
86#define EM_TIDV                         64
87
88/*
89 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544)
90 * Valid Range: 0-65535 (0=off)
91 * Default Value: 64
92 *   This value, in units of 1.024 microseconds, limits the delay in which a
93 *   transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
94 *   this value ensures that an interrupt is generated after the initial
95 *   packet is sent on the wire within the set amount of time.  Proper tuning,
96 *   along with EM_TIDV, may improve traffic throughput in specific
97 *   network conditions.
98 */
99#define EM_TADV                         64
100
101/*
102 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
103 * Valid Range: 0-65535 (0=off)
104 * Default Value: 0
105 *   This value delays the generation of receive interrupts in units of 1.024
106 *   microseconds.  Receive interrupt reduction can improve CPU efficiency if
107 *   properly tuned for specific network traffic. Increasing this value adds
108 *   extra latency to frame reception and can end up decreasing the throughput
109 *   of TCP traffic. If the system is reporting dropped receives, this value
110 *   may be set too high, causing the driver to run out of available receive
111 *   descriptors.
112 *
113 *   CAUTION: When setting EM_RDTR to a value other than 0, adapters
114 *            may hang (stop transmitting) under certain network conditions.
115 *            If this occurs a WATCHDOG message is logged in the system event log.
116 *            In addition, the controller is automatically reset, restoring the
117 *            network connection. To eliminate the potential for the hang
118 *            ensure that EM_RDTR is set to 0.
119 */
120#define EM_RDTR                         0
121
122/*
123 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
124 * Valid Range: 0-65535 (0=off)
125 * Default Value: 64
126 *   This value, in units of 1.024 microseconds, limits the delay in which a
127 *   receive interrupt is generated. Useful only if EM_RDTR is non-zero,
128 *   this value ensures that an interrupt is generated after the initial
129 *   packet is received within the set amount of time.  Proper tuning,
130 *   along with EM_RDTR, may improve traffic throughput in specific network
131 *   conditions.
132 */
133#define EM_RADV                         64
134
135/*
136 * Inform the stack about transmit checksum offload capabilities.
137 */
138#define EM_CHECKSUM_FEATURES            (CSUM_TCP | CSUM_UDP)
139
140/*
141 * This parameter controls the duration of transmit watchdog timer.
142 */
143#define EM_TX_TIMEOUT                   5    /* set to 5 seconds */
144
145/*
146 * This parameter controls when the driver calls the routine to reclaim
147 * transmit descriptors.
148 */
149#define EM_TX_CLEANUP_THRESHOLD		(adapter->num_tx_desc / 8)
150
151/*
152 * This parameter controls whether or not autonegotation is enabled.
153 *              0 - Disable autonegotiation
154 *              1 - Enable  autonegotiation
155 */
156#define DO_AUTO_NEG                     1
157
158/*
159 * This parameter control whether or not the driver will wait for
160 * autonegotiation to complete.
161 *              1 - Wait for autonegotiation to complete
162 *              0 - Don't wait for autonegotiation to complete
163 */
164#define WAIT_FOR_AUTO_NEG_DEFAULT       0
165
166/*
167 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue
168 * with 82541/82547 devices and some switches.  See the "Known Limitations" section of
169 * the README file for a complete description and a list of affected switches.
170 *
171 *              0 = Hardware default
172 *              1 = Master mode
173 *              2 = Slave mode
174 *              3 = Auto master/slave
175 */
176/* #define EM_MASTER_SLAVE      2 */
177
178/* Tunables -- End */
179
180#define AUTONEG_ADV_DEFAULT             (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
181                                         ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
182                                         ADVERTISE_1000_FULL)
183
184#define EM_VENDOR_ID                    0x8086
185
186#define EM_JUMBO_PBA                    0x00000028
187#define EM_DEFAULT_PBA                  0x00000030
188#define EM_SMARTSPEED_DOWNSHIFT         3
189#define EM_SMARTSPEED_MAX               15
190
191
192#define MAX_NUM_MULTICAST_ADDRESSES     128
193#define PCI_ANY_ID                      (~0U)
194#define ETHER_ALIGN                     2
195
196/* Defines for printing debug information */
197#define DEBUG_INIT  0
198#define DEBUG_IOCTL 0
199#define DEBUG_HW    0
200
201#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
202#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
203#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
204#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
205#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
206#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
207#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
208#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
209#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
210
211
212/* Supported RX Buffer Sizes */
213#define EM_RXBUFFER_2048        2048
214#define EM_RXBUFFER_4096        4096
215#define EM_RXBUFFER_8192        8192
216#define EM_RXBUFFER_16384      16384
217
218#define EM_MAX_SCATTER            64
219
220/* ******************************************************************************
221 * vendor_info_array
222 *
223 * This array contains the list of Subvendor/Subdevice IDs on which the driver
224 * should load.
225 *
226 * ******************************************************************************/
227typedef struct _em_vendor_info_t {
228	unsigned int vendor_id;
229	unsigned int device_id;
230	unsigned int subvendor_id;
231	unsigned int subdevice_id;
232	unsigned int index;
233} em_vendor_info_t;
234
235
236struct em_buffer {
237        struct mbuf    *m_head;
238        bus_dmamap_t    map;         /* bus_dma map for packet */
239};
240
241/*
242 * Bus dma allocation structure used by
243 * em_dma_malloc and em_dma_free.
244 */
245struct em_dma_alloc {
246        bus_addr_t              dma_paddr;
247        caddr_t                 dma_vaddr;
248        bus_dma_tag_t           dma_tag;
249        bus_dmamap_t            dma_map;
250        bus_dma_segment_t       dma_seg;
251        int                     dma_nseg;
252};
253
254typedef enum _XSUM_CONTEXT_T {
255	OFFLOAD_NONE,
256	OFFLOAD_TCP_IP,
257	OFFLOAD_UDP_IP
258} XSUM_CONTEXT_T;
259
260struct adapter;
261struct em_int_delay_info {
262	struct adapter *adapter;	/* Back-pointer to the adapter struct */
263	int offset;			/* Register offset to read/write */
264	int value;			/* Current value in usecs */
265};
266
267/* For 82544 PCIX  Workaround */
268typedef struct _ADDRESS_LENGTH_PAIR
269{
270    u_int64_t   address;
271    u_int32_t   length;
272} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
273
274typedef struct _DESCRIPTOR_PAIR
275{
276    ADDRESS_LENGTH_PAIR descriptor[4];
277    u_int32_t   elements;
278} DESC_ARRAY, *PDESC_ARRAY;
279
280/* Our adapter structure */
281struct adapter {
282	struct ifnet   *ifp;
283	struct em_hw    hw;
284
285	/* FreeBSD operating-system-specific structures */
286	struct em_osdep osdep;
287	struct device   *dev;
288	struct resource *res_memory;
289	struct resource *res_ioport;
290	struct resource *res_interrupt;
291	void            *int_handler_tag;
292	struct ifmedia  media;
293	struct callout	timer;
294	struct callout	tx_fifo_timer;
295	int             io_rid;
296	u_int8_t        unit;
297	struct mtx	mtx;
298	int		em_insert_vlan_header;
299	struct task	link_task;
300	struct task	rxtx_task;
301	struct taskqueue *tq;		/* private task queue */
302
303	/* Info about the board itself */
304	u_int32_t       part_num;
305	u_int8_t        link_active;
306	u_int16_t       link_speed;
307	u_int16_t       link_duplex;
308	u_int32_t       smartspeed;
309	struct em_int_delay_info tx_int_delay;
310	struct em_int_delay_info tx_abs_int_delay;
311	struct em_int_delay_info rx_int_delay;
312	struct em_int_delay_info rx_abs_int_delay;
313
314	XSUM_CONTEXT_T  active_checksum_context;
315
316	/*
317         * Transmit definitions
318         *
319         * We have an array of num_tx_desc descriptors (handled
320         * by the controller) paired with an array of tx_buffers
321         * (at tx_buffer_area).
322         * The index of the next available descriptor is next_avail_tx_desc.
323         * The number of remaining tx_desc is num_tx_desc_avail.
324         */
325	struct em_dma_alloc txdma;              /* bus_dma glue for tx desc */
326        struct em_tx_desc *tx_desc_base;
327        u_int32_t          next_avail_tx_desc;
328	u_int32_t          oldest_used_tx_desc;
329        volatile u_int16_t num_tx_desc_avail;
330        u_int16_t          num_tx_desc;
331        u_int32_t          txd_cmd;
332        struct em_buffer   *tx_buffer_area;
333	bus_dma_tag_t      txtag;               /* dma tag for tx */
334
335	/*
336	 * Receive definitions
337         *
338         * we have an array of num_rx_desc rx_desc (handled by the
339         * controller), and paired with an array of rx_buffers
340         * (at rx_buffer_area).
341         * The next pair to check on receive is at offset next_rx_desc_to_check
342         */
343	struct em_dma_alloc rxdma;              /* bus_dma glue for rx desc */
344        struct em_rx_desc *rx_desc_base;
345        u_int32_t          next_rx_desc_to_check;
346        u_int32_t          rx_buffer_len;
347        u_int16_t          num_rx_desc;
348        int                rx_process_limit;
349        struct em_buffer   *rx_buffer_area;
350	bus_dma_tag_t      rxtag;
351
352	/* Jumbo frame */
353	struct mbuf        *fmp;
354	struct mbuf        *lmp;
355
356	/* Misc stats maintained by the driver */
357	unsigned long   dropped_pkts;
358	unsigned long   mbuf_alloc_failed;
359	unsigned long   mbuf_cluster_failed;
360	unsigned long   no_tx_desc_avail1;
361	unsigned long   no_tx_desc_avail2;
362	unsigned long   no_tx_map_avail;
363        unsigned long   no_tx_dma_setup;
364	unsigned long	watchdog_events;
365	unsigned long	rx_overruns;
366
367	/* Used in for 82547 10Mb Half workaround */
368	#define EM_PBA_BYTES_SHIFT	0xA
369	#define EM_TX_HEAD_ADDR_SHIFT	7
370	#define EM_PBA_TX_MASK		0xFFFF0000
371	#define EM_FIFO_HDR              0x10
372
373	#define EM_82547_PKT_THRESH      0x3e0
374
375	u_int32_t       tx_fifo_size;
376	u_int32_t       tx_fifo_head;
377	u_int32_t       tx_fifo_head_addr;
378	u_int64_t       tx_fifo_reset_cnt;
379	u_int64_t       tx_fifo_wrk_cnt;
380	u_int32_t       tx_head_addr;
381
382        /* For 82544 PCIX Workaround */
383        boolean_t       pcix_82544;
384	boolean_t       in_detach;
385
386	struct em_hw_stats stats;
387};
388
389#define	EM_LOCK_INIT(_sc, _name) \
390	mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
391#define	EM_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->mtx)
392#define	EM_LOCK(_sc)		mtx_lock(&(_sc)->mtx)
393#define	EM_UNLOCK(_sc)		mtx_unlock(&(_sc)->mtx)
394#define	EM_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->mtx, MA_OWNED)
395
396#endif                                                  /* _EM_H_DEFINED_ */
397