if_em.h revision 155305 
1/**************************************************************************
2
3Copyright (c) 2001-2005, Intel Corporation
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
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10    this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13    notice, this list of conditions and the following disclaimer in the
14    documentation and/or other materials provided with the distribution.
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16 3. Neither the name of the Intel Corporation nor the names of its
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19
20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32***************************************************************************/
33
34/*$FreeBSD: head/sys/dev/em/if_em.h 155305 2006-02-04 16:50:14Z scottl $*/
35
36#ifndef _EM_H_DEFINED_
37#define _EM_H_DEFINED_
38
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/bus.h>
43#include <sys/endian.h>
44#include <sys/kernel.h>
45#include <sys/mbuf.h>
46#include <sys/malloc.h>
47#include <sys/module.h>
48#include <sys/socket.h>
49#include <sys/sockio.h>
50#include <sys/sysctl.h>
51#include <sys/taskqueue.h>
52#include <sys/kthread.h>
53
54#include <machine/bus.h>
55#include <sys/rman.h>
56#include <machine/resource.h>
57
58#include <net/bpf.h>
59#include <net/ethernet.h>
60#include <net/if.h>
61#include <net/if_arp.h>
62#include <net/if_dl.h>
63#include <net/if_media.h>
64
65#include <net/if_types.h>
66#include <net/if_vlan_var.h>
67
68#include <netinet/in_systm.h>
69#include <netinet/in.h>
70#include <netinet/ip.h>
71#include <netinet/tcp.h>
72#include <netinet/udp.h>
73
74#include <dev/pci/pcivar.h>
75#include <dev/pci/pcireg.h>
76
77#include <dev/em/if_em_hw.h>
78
79/* Tunables */
80
81/*
82 * EM_TXD: Maximum number of Transmit Descriptors
83 * Valid Range: 80-256 for 82542 and 82543-based adapters
84 *              80-4096 for others
85 * Default Value: 256
86 *   This value is the number of transmit descriptors allocated by the driver.
87 *   Increasing this value allows the driver to queue more transmits. Each
88 *   descriptor is 16 bytes.
89 *   Since TDLEN should be multiple of 128bytes, the number of transmit
90 *   desscriptors should meet the following condition.
91 *      (num_tx_desc * sizeof(struct em_tx_desc)) % 128 == 0
92 */
93#define EM_MIN_TXD		80
94#define EM_MAX_TXD_82543	256
95#define EM_MAX_TXD		4096
96#define EM_DEFAULT_TXD		EM_MAX_TXD_82543
97
98/*
99 * EM_RXD - Maximum number of receive Descriptors
100 * Valid Range: 80-256 for 82542 and 82543-based adapters
101 *              80-4096 for others
102 * Default Value: 256
103 *   This value is the number of receive descriptors allocated by the driver.
104 *   Increasing this value allows the driver to buffer more incoming packets.
105 *   Each descriptor is 16 bytes.  A receive buffer is also allocated for each
106 *   descriptor. The maximum MTU size is 16110.
107 *   Since TDLEN should be multiple of 128bytes, the number of transmit
108 *   desscriptors should meet the following condition.
109 *      (num_tx_desc * sizeof(struct em_tx_desc)) % 128 == 0
110 */
111#define EM_MIN_RXD		80
112#define EM_MAX_RXD_82543	256
113#define EM_MAX_RXD		4096
114#define EM_DEFAULT_RXD		EM_MAX_RXD_82543
115
116/*
117 * EM_TIDV - Transmit Interrupt Delay Value
118 * Valid Range: 0-65535 (0=off)
119 * Default Value: 64
120 *   This value delays the generation of transmit interrupts in units of
121 *   1.024 microseconds. Transmit interrupt reduction can improve CPU
122 *   efficiency if properly tuned for specific network traffic. If the
123 *   system is reporting dropped transmits, this value may be set too high
124 *   causing the driver to run out of available transmit descriptors.
125 */
126#define EM_TIDV                         64
127
128/*
129 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544)
130 * Valid Range: 0-65535 (0=off)
131 * Default Value: 64
132 *   This value, in units of 1.024 microseconds, limits the delay in which a
133 *   transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
134 *   this value ensures that an interrupt is generated after the initial
135 *   packet is sent on the wire within the set amount of time.  Proper tuning,
136 *   along with EM_TIDV, may improve traffic throughput in specific
137 *   network conditions.
138 */
139#define EM_TADV                         64
140
141/*
142 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
143 * Valid Range: 0-65535 (0=off)
144 * Default Value: 0
145 *   This value delays the generation of receive interrupts in units of 1.024
146 *   microseconds.  Receive interrupt reduction can improve CPU efficiency if
147 *   properly tuned for specific network traffic. Increasing this value adds
148 *   extra latency to frame reception and can end up decreasing the throughput
149 *   of TCP traffic. If the system is reporting dropped receives, this value
150 *   may be set too high, causing the driver to run out of available receive
151 *   descriptors.
152 *
153 *   CAUTION: When setting EM_RDTR to a value other than 0, adapters
154 *            may hang (stop transmitting) under certain network conditions.
155 *            If this occurs a WATCHDOG message is logged in the system event log.
156 *            In addition, the controller is automatically reset, restoring the
157 *            network connection. To eliminate the potential for the hang
158 *            ensure that EM_RDTR is set to 0.
159 */
160#define EM_RDTR                         0
161
162/*
163 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
164 * Valid Range: 0-65535 (0=off)
165 * Default Value: 64
166 *   This value, in units of 1.024 microseconds, limits the delay in which a
167 *   receive interrupt is generated. Useful only if EM_RDTR is non-zero,
168 *   this value ensures that an interrupt is generated after the initial
169 *   packet is received within the set amount of time.  Proper tuning,
170 *   along with EM_RDTR, may improve traffic throughput in specific network
171 *   conditions.
172 */
173#define EM_RADV                         64
174
175/*
176 * Inform the stack about transmit checksum offload capabilities.
177 */
178#define EM_CHECKSUM_FEATURES            (CSUM_TCP | CSUM_UDP)
179
180/*
181 * This parameter controls the duration of transmit watchdog timer.
182 */
183#define EM_TX_TIMEOUT                   5    /* set to 5 seconds */
184
185/*
186 * This parameter controls when the driver calls the routine to reclaim
187 * transmit descriptors.
188 */
189#define EM_TX_CLEANUP_THRESHOLD		(adapter->num_tx_desc / 8)
190
191/*
192 * This parameter controls whether or not autonegotation is enabled.
193 *              0 - Disable autonegotiation
194 *              1 - Enable  autonegotiation
195 */
196#define DO_AUTO_NEG                     1
197
198/*
199 * This parameter control whether or not the driver will wait for
200 * autonegotiation to complete.
201 *              1 - Wait for autonegotiation to complete
202 *              0 - Don't wait for autonegotiation to complete
203 */
204#define WAIT_FOR_AUTO_NEG_DEFAULT       0
205
206/*
207 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue
208 * with 82541/82547 devices and some switches.  See the "Known Limitations" section of
209 * the README file for a complete description and a list of affected switches.
210 *
211 *              0 = Hardware default
212 *              1 = Master mode
213 *              2 = Slave mode
214 *              3 = Auto master/slave
215 */
216/* #define EM_MASTER_SLAVE      2 */
217
218/* Tunables -- End */
219
220#define AUTONEG_ADV_DEFAULT             (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
221                                         ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
222                                         ADVERTISE_1000_FULL)
223
224#define EM_VENDOR_ID                    0x8086
225
226#define EM_JUMBO_PBA                    0x00000028
227#define EM_DEFAULT_PBA                  0x00000030
228#define EM_SMARTSPEED_DOWNSHIFT         3
229#define EM_SMARTSPEED_MAX               15
230
231
232#define MAX_NUM_MULTICAST_ADDRESSES     128
233#define PCI_ANY_ID                      (~0U)
234#define ETHER_ALIGN                     2
235
236/* Defines for printing debug information */
237#define DEBUG_INIT  0
238#define DEBUG_IOCTL 0
239#define DEBUG_HW    0
240
241#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
242#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
243#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
244#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
245#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
246#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
247#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
248#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
249#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
250
251
252/* Supported RX Buffer Sizes */
253#define EM_RXBUFFER_2048        2048
254#define EM_RXBUFFER_4096        4096
255#define EM_RXBUFFER_8192        8192
256#define EM_RXBUFFER_16384      16384
257
258#define EM_MAX_SCATTER            64
259
260/* ******************************************************************************
261 * vendor_info_array
262 *
263 * This array contains the list of Subvendor/Subdevice IDs on which the driver
264 * should load.
265 *
266 * ******************************************************************************/
267typedef struct _em_vendor_info_t {
268	unsigned int vendor_id;
269	unsigned int device_id;
270	unsigned int subvendor_id;
271	unsigned int subdevice_id;
272	unsigned int index;
273} em_vendor_info_t;
274
275
276struct em_buffer {
277        struct mbuf    *m_head;
278        bus_dmamap_t    map;         /* bus_dma map for packet */
279};
280
281/*
282 * Bus dma allocation structure used by
283 * em_dma_malloc and em_dma_free.
284 */
285struct em_dma_alloc {
286        bus_addr_t              dma_paddr;
287        caddr_t                 dma_vaddr;
288        bus_dma_tag_t           dma_tag;
289        bus_dmamap_t            dma_map;
290        bus_dma_segment_t       dma_seg;
291        int                     dma_nseg;
292};
293
294typedef enum _XSUM_CONTEXT_T {
295	OFFLOAD_NONE,
296	OFFLOAD_TCP_IP,
297	OFFLOAD_UDP_IP
298} XSUM_CONTEXT_T;
299
300struct adapter;
301struct em_int_delay_info {
302	struct adapter *adapter;	/* Back-pointer to the adapter struct */
303	int offset;			/* Register offset to read/write */
304	int value;			/* Current value in usecs */
305};
306
307/* For 82544 PCIX  Workaround */
308typedef struct _ADDRESS_LENGTH_PAIR
309{
310    u_int64_t   address;
311    u_int32_t   length;
312} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
313
314typedef struct _DESCRIPTOR_PAIR
315{
316    ADDRESS_LENGTH_PAIR descriptor[4];
317    u_int32_t   elements;
318} DESC_ARRAY, *PDESC_ARRAY;
319
320/* Our adapter structure */
321struct adapter {
322	struct ifnet   *ifp;
323	struct em_hw    hw;
324
325	/* FreeBSD operating-system-specific structures */
326	struct em_osdep osdep;
327	struct device   *dev;
328	struct resource *res_memory;
329	struct resource *res_ioport;
330	struct resource *res_interrupt;
331	void            *int_handler_tag;
332	struct ifmedia  media;
333	struct callout	timer;
334	struct callout	tx_fifo_timer;
335	int             io_rid;
336	u_int8_t        unit;
337	struct mtx	mtx;
338	int		em_insert_vlan_header;
339	struct task	link_task;
340	struct task	rxtx_task;
341	struct taskqueue *tq;		/* private task queue */
342
343	/* Info about the board itself */
344	u_int32_t       part_num;
345	u_int8_t        link_active;
346	u_int16_t       link_speed;
347	u_int16_t       link_duplex;
348	u_int32_t       smartspeed;
349	struct em_int_delay_info tx_int_delay;
350	struct em_int_delay_info tx_abs_int_delay;
351	struct em_int_delay_info rx_int_delay;
352	struct em_int_delay_info rx_abs_int_delay;
353
354	XSUM_CONTEXT_T  active_checksum_context;
355
356	/*
357         * Transmit definitions
358         *
359         * We have an array of num_tx_desc descriptors (handled
360         * by the controller) paired with an array of tx_buffers
361         * (at tx_buffer_area).
362         * The index of the next available descriptor is next_avail_tx_desc.
363         * The number of remaining tx_desc is num_tx_desc_avail.
364         */
365	struct em_dma_alloc txdma;              /* bus_dma glue for tx desc */
366        struct em_tx_desc *tx_desc_base;
367        u_int32_t          next_avail_tx_desc;
368	u_int32_t          oldest_used_tx_desc;
369        volatile u_int16_t num_tx_desc_avail;
370        u_int16_t          num_tx_desc;
371        u_int32_t          txd_cmd;
372        struct em_buffer   *tx_buffer_area;
373	bus_dma_tag_t      txtag;               /* dma tag for tx */
374
375	/*
376	 * Receive definitions
377         *
378         * we have an array of num_rx_desc rx_desc (handled by the
379         * controller), and paired with an array of rx_buffers
380         * (at rx_buffer_area).
381         * The next pair to check on receive is at offset next_rx_desc_to_check
382         */
383	struct em_dma_alloc rxdma;              /* bus_dma glue for rx desc */
384        struct em_rx_desc *rx_desc_base;
385        u_int32_t          next_rx_desc_to_check;
386        u_int32_t          rx_buffer_len;
387        u_int16_t          num_rx_desc;
388        int                rx_process_limit;
389        struct em_buffer   *rx_buffer_area;
390	bus_dma_tag_t      rxtag;
391
392	/* Jumbo frame */
393	struct mbuf        *fmp;
394	struct mbuf        *lmp;
395
396	/* Misc stats maintained by the driver */
397	unsigned long   dropped_pkts;
398	unsigned long   mbuf_alloc_failed;
399	unsigned long   mbuf_cluster_failed;
400	unsigned long   no_tx_desc_avail1;
401	unsigned long   no_tx_desc_avail2;
402	unsigned long   no_tx_map_avail;
403        unsigned long   no_tx_dma_setup;
404	unsigned long	watchdog_events;
405	unsigned long	rx_overruns;
406
407	/* Used in for 82547 10Mb Half workaround */
408	#define EM_PBA_BYTES_SHIFT	0xA
409	#define EM_TX_HEAD_ADDR_SHIFT	7
410	#define EM_PBA_TX_MASK		0xFFFF0000
411	#define EM_FIFO_HDR              0x10
412
413	#define EM_82547_PKT_THRESH      0x3e0
414
415	u_int32_t       tx_fifo_size;
416	u_int32_t       tx_fifo_head;
417	u_int32_t       tx_fifo_head_addr;
418	u_int64_t       tx_fifo_reset_cnt;
419	u_int64_t       tx_fifo_wrk_cnt;
420	u_int32_t       tx_head_addr;
421
422        /* For 82544 PCIX Workaround */
423        boolean_t       pcix_82544;
424	boolean_t       in_detach;
425
426	struct em_hw_stats stats;
427};
428
429#define	EM_LOCK_INIT(_sc, _name) \
430	mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
431#define	EM_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->mtx)
432#define	EM_LOCK(_sc)		mtx_lock(&(_sc)->mtx)
433#define	EM_UNLOCK(_sc)		mtx_unlock(&(_sc)->mtx)
434#define	EM_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->mtx, MA_OWNED)
435
436#endif                                                  /* _EM_H_DEFINED_ */
437