if_em.h revision 152545 
1/**************************************************************************
2
3Copyright (c) 2001-2005, Intel Corporation
4All rights reserved.
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10    this list of conditions and the following disclaimer.
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12 2. Redistributions in binary form must reproduce the above copyright
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16 3. Neither the name of the Intel Corporation nor the names of its
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19
20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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31
32***************************************************************************/
33
34/*$FreeBSD: head/sys/dev/em/if_em.h 152545 2005-11-17 10:13:18Z glebius $*/
35
36#ifndef _EM_H_DEFINED_
37#define _EM_H_DEFINED_
38
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/bus.h>
43#include <sys/endian.h>
44#include <sys/kernel.h>
45#include <sys/mbuf.h>
46#include <sys/malloc.h>
47#include <sys/module.h>
48#include <sys/socket.h>
49#include <sys/sockio.h>
50#include <sys/sysctl.h>
51
52#include <machine/bus.h>
53#include <sys/rman.h>
54#include <machine/resource.h>
55
56#include <net/bpf.h>
57#include <net/ethernet.h>
58#include <net/if.h>
59#include <net/if_arp.h>
60#include <net/if_dl.h>
61#include <net/if_media.h>
62
63#include <net/if_types.h>
64#include <net/if_vlan_var.h>
65
66#include <netinet/in_systm.h>
67#include <netinet/in.h>
68#include <netinet/ip.h>
69#include <netinet/tcp.h>
70#include <netinet/udp.h>
71
72#include <dev/pci/pcivar.h>
73#include <dev/pci/pcireg.h>
74
75#include <dev/em/if_em_hw.h>
76
77/* Tunables */
78
79/*
80 * EM_TXD: Maximum number of Transmit Descriptors
81 * Valid Range: 80-256 for 82542 and 82543-based adapters
82 *              80-4096 for others
83 * Default Value: 256
84 *   This value is the number of transmit descriptors allocated by the driver.
85 *   Increasing this value allows the driver to queue more transmits. Each
86 *   descriptor is 16 bytes.
87 */
88#define EM_MIN_TXD		80
89#define EM_MAX_TXD_82543	256
90#define EM_MAX_TXD		4096
91#define EM_DEFAULT_TXD		EM_MAX_TXD_82543
92
93/*
94 * EM_RXD - Maximum number of receive Descriptors
95 * Valid Range: 80-256 for 82542 and 82543-based adapters
96 *              80-4096 for others
97 * Default Value: 256
98 *   This value is the number of receive descriptors allocated by the driver.
99 *   Increasing this value allows the driver to buffer more incoming packets.
100 *   Each descriptor is 16 bytes.  A receive buffer is also allocated for each
101 *   descriptor. The maximum MTU size is 16110.
102 *
103 */
104#define EM_MIN_RXD		80
105#define EM_MAX_RXD_82543	256
106#define EM_MAX_RXD		4096
107#define EM_DEFAULT_RXD		EM_MAX_RXD_82543
108
109/*
110 * EM_TIDV - Transmit Interrupt Delay Value
111 * Valid Range: 0-65535 (0=off)
112 * Default Value: 64
113 *   This value delays the generation of transmit interrupts in units of
114 *   1.024 microseconds. Transmit interrupt reduction can improve CPU
115 *   efficiency if properly tuned for specific network traffic. If the
116 *   system is reporting dropped transmits, this value may be set too high
117 *   causing the driver to run out of available transmit descriptors.
118 */
119#define EM_TIDV                         64
120
121/*
122 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544)
123 * Valid Range: 0-65535 (0=off)
124 * Default Value: 64
125 *   This value, in units of 1.024 microseconds, limits the delay in which a
126 *   transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
127 *   this value ensures that an interrupt is generated after the initial
128 *   packet is sent on the wire within the set amount of time.  Proper tuning,
129 *   along with EM_TIDV, may improve traffic throughput in specific
130 *   network conditions.
131 */
132#define EM_TADV                         64
133
134/*
135 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
136 * Valid Range: 0-65535 (0=off)
137 * Default Value: 0
138 *   This value delays the generation of receive interrupts in units of 1.024
139 *   microseconds.  Receive interrupt reduction can improve CPU efficiency if
140 *   properly tuned for specific network traffic. Increasing this value adds
141 *   extra latency to frame reception and can end up decreasing the throughput
142 *   of TCP traffic. If the system is reporting dropped receives, this value
143 *   may be set too high, causing the driver to run out of available receive
144 *   descriptors.
145 *
146 *   CAUTION: When setting EM_RDTR to a value other than 0, adapters
147 *            may hang (stop transmitting) under certain network conditions.
148 *            If this occurs a WATCHDOG message is logged in the system event log.
149 *            In addition, the controller is automatically reset, restoring the
150 *            network connection. To eliminate the potential for the hang
151 *            ensure that EM_RDTR is set to 0.
152 */
153#define EM_RDTR                         0
154
155/*
156 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
157 * Valid Range: 0-65535 (0=off)
158 * Default Value: 64
159 *   This value, in units of 1.024 microseconds, limits the delay in which a
160 *   receive interrupt is generated. Useful only if EM_RDTR is non-zero,
161 *   this value ensures that an interrupt is generated after the initial
162 *   packet is received within the set amount of time.  Proper tuning,
163 *   along with EM_RDTR, may improve traffic throughput in specific network
164 *   conditions.
165 */
166#define EM_RADV                         64
167
168/*
169 * Inform the stack about transmit checksum offload capabilities.
170 */
171#define EM_CHECKSUM_FEATURES            (CSUM_TCP | CSUM_UDP)
172
173/*
174 * This parameter controls the duration of transmit watchdog timer.
175 */
176#define EM_TX_TIMEOUT                   5    /* set to 5 seconds */
177
178/*
179 * This parameter controls when the driver calls the routine to reclaim
180 * transmit descriptors.
181 */
182#define EM_TX_CLEANUP_THRESHOLD		(adapter->num_tx_desc / 8)
183
184/*
185 * This parameter controls whether or not autonegotation is enabled.
186 *              0 - Disable autonegotiation
187 *              1 - Enable  autonegotiation
188 */
189#define DO_AUTO_NEG                     1
190
191/*
192 * This parameter control whether or not the driver will wait for
193 * autonegotiation to complete.
194 *              1 - Wait for autonegotiation to complete
195 *              0 - Don't wait for autonegotiation to complete
196 */
197#define WAIT_FOR_AUTO_NEG_DEFAULT       0
198
199/*
200 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue
201 * with 82541/82547 devices and some switches.  See the "Known Limitations" section of
202 * the README file for a complete description and a list of affected switches.
203 *
204 *              0 = Hardware default
205 *              1 = Master mode
206 *              2 = Slave mode
207 *              3 = Auto master/slave
208 */
209/* #define EM_MASTER_SLAVE      2 */
210
211/* Tunables -- End */
212
213#define AUTONEG_ADV_DEFAULT             (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
214                                         ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
215                                         ADVERTISE_1000_FULL)
216
217#define EM_VENDOR_ID                    0x8086
218#define EM_MMBA                         0x0010 /* Mem base address */
219#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
220
221#define EM_JUMBO_PBA                    0x00000028
222#define EM_DEFAULT_PBA                  0x00000030
223#define EM_SMARTSPEED_DOWNSHIFT         3
224#define EM_SMARTSPEED_MAX               15
225
226
227#define MAX_NUM_MULTICAST_ADDRESSES     128
228#define PCI_ANY_ID                      (~0U)
229#define ETHER_ALIGN                     2
230
231/* Defines for printing debug information */
232#define DEBUG_INIT  0
233#define DEBUG_IOCTL 0
234#define DEBUG_HW    0
235
236#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
237#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
238#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
239#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
240#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
241#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
242#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
243#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
244#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
245
246
247/* Supported RX Buffer Sizes */
248#define EM_RXBUFFER_2048        2048
249#define EM_RXBUFFER_4096        4096
250#define EM_RXBUFFER_8192        8192
251#define EM_RXBUFFER_16384      16384
252
253#define EM_MAX_SCATTER            64
254
255/* ******************************************************************************
256 * vendor_info_array
257 *
258 * This array contains the list of Subvendor/Subdevice IDs on which the driver
259 * should load.
260 *
261 * ******************************************************************************/
262typedef struct _em_vendor_info_t {
263	unsigned int vendor_id;
264	unsigned int device_id;
265	unsigned int subvendor_id;
266	unsigned int subdevice_id;
267	unsigned int index;
268} em_vendor_info_t;
269
270
271struct em_buffer {
272        struct mbuf    *m_head;
273        bus_dmamap_t    map;         /* bus_dma map for packet */
274};
275
276/*
277 * Bus dma allocation structure used by
278 * em_dma_malloc and em_dma_free.
279 */
280struct em_dma_alloc {
281        bus_addr_t              dma_paddr;
282        caddr_t                 dma_vaddr;
283        bus_dma_tag_t           dma_tag;
284        bus_dmamap_t            dma_map;
285        bus_dma_segment_t       dma_seg;
286        int                     dma_nseg;
287};
288
289typedef enum _XSUM_CONTEXT_T {
290	OFFLOAD_NONE,
291	OFFLOAD_TCP_IP,
292	OFFLOAD_UDP_IP
293} XSUM_CONTEXT_T;
294
295struct adapter;
296struct em_int_delay_info {
297	struct adapter *adapter;	/* Back-pointer to the adapter struct */
298	int offset;			/* Register offset to read/write */
299	int value;			/* Current value in usecs */
300};
301
302/* For 82544 PCIX  Workaround */
303typedef struct _ADDRESS_LENGTH_PAIR
304{
305    u_int64_t   address;
306    u_int32_t   length;
307} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
308
309typedef struct _DESCRIPTOR_PAIR
310{
311    ADDRESS_LENGTH_PAIR descriptor[4];
312    u_int32_t   elements;
313} DESC_ARRAY, *PDESC_ARRAY;
314
315/* Our adapter structure */
316struct adapter {
317	struct ifnet   *ifp;
318	struct em_hw    hw;
319
320	/* FreeBSD operating-system-specific structures */
321	struct em_osdep osdep;
322	struct device   *dev;
323	struct resource *res_memory;
324	struct resource *res_ioport;
325	struct resource *res_interrupt;
326	void            *int_handler_tag;
327	struct ifmedia  media;
328	struct callout	timer;
329	struct callout	tx_fifo_timer;
330	int             io_rid;
331	u_int8_t        unit;
332	struct mtx	mtx;
333	int		em_insert_vlan_header;
334
335	/* Info about the board itself */
336	u_int32_t       part_num;
337	u_int8_t        link_active;
338	u_int16_t       link_speed;
339	u_int16_t       link_duplex;
340	u_int32_t       smartspeed;
341	struct em_int_delay_info tx_int_delay;
342	struct em_int_delay_info tx_abs_int_delay;
343	struct em_int_delay_info rx_int_delay;
344	struct em_int_delay_info rx_abs_int_delay;
345
346	XSUM_CONTEXT_T  active_checksum_context;
347
348	/*
349         * Transmit definitions
350         *
351         * We have an array of num_tx_desc descriptors (handled
352         * by the controller) paired with an array of tx_buffers
353         * (at tx_buffer_area).
354         * The index of the next available descriptor is next_avail_tx_desc.
355         * The number of remaining tx_desc is num_tx_desc_avail.
356         */
357	struct em_dma_alloc txdma;              /* bus_dma glue for tx desc */
358        struct em_tx_desc *tx_desc_base;
359        u_int32_t          next_avail_tx_desc;
360	u_int32_t          oldest_used_tx_desc;
361        volatile u_int16_t num_tx_desc_avail;
362        u_int16_t          num_tx_desc;
363        u_int32_t          txd_cmd;
364        struct em_buffer   *tx_buffer_area;
365	bus_dma_tag_t      txtag;               /* dma tag for tx */
366
367	/*
368	 * Receive definitions
369         *
370         * we have an array of num_rx_desc rx_desc (handled by the
371         * controller), and paired with an array of rx_buffers
372         * (at rx_buffer_area).
373         * The next pair to check on receive is at offset next_rx_desc_to_check
374         */
375	struct em_dma_alloc rxdma;              /* bus_dma glue for rx desc */
376        struct em_rx_desc *rx_desc_base;
377        u_int32_t          next_rx_desc_to_check;
378        u_int16_t          num_rx_desc;
379        u_int32_t          rx_buffer_len;
380        struct em_buffer   *rx_buffer_area;
381	bus_dma_tag_t      rxtag;
382
383	/* Jumbo frame */
384	struct mbuf        *fmp;
385	struct mbuf        *lmp;
386
387	/* Misc stats maintained by the driver */
388	unsigned long   dropped_pkts;
389	unsigned long   mbuf_alloc_failed;
390	unsigned long   mbuf_cluster_failed;
391	unsigned long   no_tx_desc_avail1;
392	unsigned long   no_tx_desc_avail2;
393	unsigned long   no_tx_map_avail;
394        unsigned long   no_tx_dma_setup;
395	unsigned long	watchdog_events;
396	unsigned long	rx_overruns;
397
398	/* Used in for 82547 10Mb Half workaround */
399	#define EM_PBA_BYTES_SHIFT	0xA
400	#define EM_TX_HEAD_ADDR_SHIFT	7
401	#define EM_PBA_TX_MASK		0xFFFF0000
402	#define EM_FIFO_HDR              0x10
403
404	#define EM_82547_PKT_THRESH      0x3e0
405
406	u_int32_t       tx_fifo_size;
407	u_int32_t       tx_fifo_head;
408	u_int32_t       tx_fifo_head_addr;
409	u_int64_t       tx_fifo_reset_cnt;
410	u_int64_t       tx_fifo_wrk_cnt;
411	u_int32_t       tx_head_addr;
412
413        /* For 82544 PCIX Workaround */
414        boolean_t       pcix_82544;
415	boolean_t       in_detach;
416
417	struct em_hw_stats stats;
418};
419
420#define	EM_LOCK_INIT(_sc, _name) \
421	mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
422#define	EM_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->mtx)
423#define	EM_LOCK(_sc)		mtx_lock(&(_sc)->mtx)
424#define	EM_UNLOCK(_sc)		mtx_unlock(&(_sc)->mtx)
425#define	EM_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->mtx, MA_OWNED)
426
427#endif                                                  /* _EM_H_DEFINED_ */
428