if_em.h revision 152225 
1/**************************************************************************
2
3Copyright (c) 2001-2005, Intel Corporation
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
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9 1. Redistributions of source code must retain the above copyright notice,
10    this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13    notice, this list of conditions and the following disclaimer in the
14    documentation and/or other materials provided with the distribution.
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16 3. Neither the name of the Intel Corporation nor the names of its
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18    this software without specific prior written permission.
19
20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32***************************************************************************/
33
34/*$FreeBSD: head/sys/dev/em/if_em.h 152225 2005-11-09 08:43:18Z yongari $*/
35
36#ifndef _EM_H_DEFINED_
37#define _EM_H_DEFINED_
38
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/bus.h>
43#include <sys/endian.h>
44#include <sys/kernel.h>
45#include <sys/mbuf.h>
46#include <sys/malloc.h>
47#include <sys/module.h>
48#include <sys/socket.h>
49#include <sys/sockio.h>
50#include <sys/sysctl.h>
51#include <sys/syslog.h>
52
53#include <machine/bus.h>
54#include <sys/rman.h>
55#include <machine/resource.h>
56
57#include <net/bpf.h>
58#include <net/ethernet.h>
59#include <net/if.h>
60#include <net/if_arp.h>
61#include <net/if_dl.h>
62#include <net/if_media.h>
63
64#include <net/if_types.h>
65#include <net/if_vlan_var.h>
66
67#include <netinet/in_systm.h>
68#include <netinet/in.h>
69#include <netinet/ip.h>
70#include <netinet/tcp.h>
71#include <netinet/udp.h>
72
73#include <dev/pci/pcivar.h>
74#include <dev/pci/pcireg.h>
75
76#include <dev/em/if_em_hw.h>
77
78/* Tunables */
79
80/*
81 * EM_MAX_TXD: Maximum number of Transmit Descriptors
82 * Valid Range: 80-256 for 82542 and 82543-based adapters
83 *              80-4096 for others
84 * Default Value: 256
85 *   This value is the number of transmit descriptors allocated by the driver.
86 *   Increasing this value allows the driver to queue more transmits. Each
87 *   descriptor is 16 bytes.
88 */
89#define EM_MAX_TXD                      256
90
91/*
92 * EM_MAX_RXD - Maximum number of receive Descriptors
93 * Valid Range: 80-256 for 82542 and 82543-based adapters
94 *              80-4096 for others
95 * Default Value: 256
96 *   This value is the number of receive descriptors allocated by the driver.
97 *   Increasing this value allows the driver to buffer more incoming packets.
98 *   Each descriptor is 16 bytes.  A receive buffer is also allocated for each
99 *   descriptor. The maximum MTU size is 16110.
100 *
101 */
102#define EM_MAX_RXD                      256
103
104/*
105 * EM_TIDV - Transmit Interrupt Delay Value
106 * Valid Range: 0-65535 (0=off)
107 * Default Value: 64
108 *   This value delays the generation of transmit interrupts in units of
109 *   1.024 microseconds. Transmit interrupt reduction can improve CPU
110 *   efficiency if properly tuned for specific network traffic. If the
111 *   system is reporting dropped transmits, this value may be set too high
112 *   causing the driver to run out of available transmit descriptors.
113 */
114#define EM_TIDV                         64
115
116/*
117 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544)
118 * Valid Range: 0-65535 (0=off)
119 * Default Value: 64
120 *   This value, in units of 1.024 microseconds, limits the delay in which a
121 *   transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
122 *   this value ensures that an interrupt is generated after the initial
123 *   packet is sent on the wire within the set amount of time.  Proper tuning,
124 *   along with EM_TIDV, may improve traffic throughput in specific
125 *   network conditions.
126 */
127#define EM_TADV                         64
128
129/*
130 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
131 * Valid Range: 0-65535 (0=off)
132 * Default Value: 0
133 *   This value delays the generation of receive interrupts in units of 1.024
134 *   microseconds.  Receive interrupt reduction can improve CPU efficiency if
135 *   properly tuned for specific network traffic. Increasing this value adds
136 *   extra latency to frame reception and can end up decreasing the throughput
137 *   of TCP traffic. If the system is reporting dropped receives, this value
138 *   may be set too high, causing the driver to run out of available receive
139 *   descriptors.
140 *
141 *   CAUTION: When setting EM_RDTR to a value other than 0, adapters
142 *            may hang (stop transmitting) under certain network conditions.
143 *            If this occurs a WATCHDOG message is logged in the system event log.
144 *            In addition, the controller is automatically reset, restoring the
145 *            network connection. To eliminate the potential for the hang
146 *            ensure that EM_RDTR is set to 0.
147 */
148#define EM_RDTR                         0
149
150/*
151 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
152 * Valid Range: 0-65535 (0=off)
153 * Default Value: 64
154 *   This value, in units of 1.024 microseconds, limits the delay in which a
155 *   receive interrupt is generated. Useful only if EM_RDTR is non-zero,
156 *   this value ensures that an interrupt is generated after the initial
157 *   packet is received within the set amount of time.  Proper tuning,
158 *   along with EM_RDTR, may improve traffic throughput in specific network
159 *   conditions.
160 */
161#define EM_RADV                         64
162
163/*
164 * Inform the stack about transmit checksum offload capabilities.
165 */
166#define EM_CHECKSUM_FEATURES            (CSUM_TCP | CSUM_UDP)
167
168/*
169 * This parameter controls the duration of transmit watchdog timer.
170 */
171#define EM_TX_TIMEOUT                   5    /* set to 5 seconds */
172
173/*
174 * This parameter controls when the driver calls the routine to reclaim
175 * transmit descriptors.
176 */
177#define EM_TX_CLEANUP_THRESHOLD         EM_MAX_TXD / 8
178
179/*
180 * This parameter controls whether or not autonegotation is enabled.
181 *              0 - Disable autonegotiation
182 *              1 - Enable  autonegotiation
183 */
184#define DO_AUTO_NEG                     1
185
186/*
187 * This parameter control whether or not the driver will wait for
188 * autonegotiation to complete.
189 *              1 - Wait for autonegotiation to complete
190 *              0 - Don't wait for autonegotiation to complete
191 */
192#define WAIT_FOR_AUTO_NEG_DEFAULT       0
193
194/*
195 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue
196 * with 82541/82547 devices and some switches.  See the "Known Limitations" section of
197 * the README file for a complete description and a list of affected switches.
198 *
199 *              0 = Hardware default
200 *              1 = Master mode
201 *              2 = Slave mode
202 *              3 = Auto master/slave
203 */
204/* #define EM_MASTER_SLAVE      2 */
205
206/* Tunables -- End */
207
208#define AUTONEG_ADV_DEFAULT             (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
209                                         ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
210                                         ADVERTISE_1000_FULL)
211
212#define EM_VENDOR_ID                    0x8086
213#define EM_MMBA                         0x0010 /* Mem base address */
214#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
215
216#define EM_JUMBO_PBA                    0x00000028
217#define EM_DEFAULT_PBA                  0x00000030
218#define EM_SMARTSPEED_DOWNSHIFT         3
219#define EM_SMARTSPEED_MAX               15
220
221
222#define MAX_NUM_MULTICAST_ADDRESSES     128
223#define PCI_ANY_ID                      (~0U)
224#define ETHER_ALIGN                     2
225
226/* Defines for printing debug information */
227#define DEBUG_INIT  0
228#define DEBUG_IOCTL 0
229#define DEBUG_HW    0
230
231#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
232#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
233#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
234#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
235#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
236#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
237#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
238#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
239#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
240
241
242/* Supported RX Buffer Sizes */
243#define EM_RXBUFFER_2048        2048
244#define EM_RXBUFFER_4096        4096
245#define EM_RXBUFFER_8192        8192
246#define EM_RXBUFFER_16384      16384
247
248#define EM_MAX_SCATTER            64
249
250/* ******************************************************************************
251 * vendor_info_array
252 *
253 * This array contains the list of Subvendor/Subdevice IDs on which the driver
254 * should load.
255 *
256 * ******************************************************************************/
257typedef struct _em_vendor_info_t {
258	unsigned int vendor_id;
259	unsigned int device_id;
260	unsigned int subvendor_id;
261	unsigned int subdevice_id;
262	unsigned int index;
263} em_vendor_info_t;
264
265
266struct em_buffer {
267        struct mbuf    *m_head;
268        bus_dmamap_t    map;         /* bus_dma map for packet */
269};
270
271/*
272 * Bus dma allocation structure used by
273 * em_dma_malloc and em_dma_free.
274 */
275struct em_dma_alloc {
276        bus_addr_t              dma_paddr;
277        caddr_t                 dma_vaddr;
278        bus_dma_tag_t           dma_tag;
279        bus_dmamap_t            dma_map;
280        bus_dma_segment_t       dma_seg;
281        int                     dma_nseg;
282};
283
284typedef enum _XSUM_CONTEXT_T {
285	OFFLOAD_NONE,
286	OFFLOAD_TCP_IP,
287	OFFLOAD_UDP_IP
288} XSUM_CONTEXT_T;
289
290struct adapter;
291struct em_int_delay_info {
292	struct adapter *adapter;	/* Back-pointer to the adapter struct */
293	int offset;			/* Register offset to read/write */
294	int value;			/* Current value in usecs */
295};
296
297/* For 82544 PCIX  Workaround */
298typedef struct _ADDRESS_LENGTH_PAIR
299{
300    u_int64_t   address;
301    u_int32_t   length;
302} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
303
304typedef struct _DESCRIPTOR_PAIR
305{
306    ADDRESS_LENGTH_PAIR descriptor[4];
307    u_int32_t   elements;
308} DESC_ARRAY, *PDESC_ARRAY;
309
310/* Our adapter structure */
311struct adapter {
312	struct ifnet   *ifp;
313	struct em_hw    hw;
314
315	/* FreeBSD operating-system-specific structures */
316	struct em_osdep osdep;
317	struct device   *dev;
318	struct resource *res_memory;
319	struct resource *res_ioport;
320	struct resource *res_interrupt;
321	void            *int_handler_tag;
322	struct ifmedia  media;
323	struct callout	timer;
324	struct callout	tx_fifo_timer;
325	int             io_rid;
326	u_int8_t        unit;
327	struct mtx	mtx;
328	int		em_insert_vlan_header;
329
330	/* Info about the board itself */
331	u_int32_t       part_num;
332	u_int8_t        link_active;
333	u_int16_t       link_speed;
334	u_int16_t       link_duplex;
335	u_int32_t       smartspeed;
336	struct em_int_delay_info tx_int_delay;
337	struct em_int_delay_info tx_abs_int_delay;
338	struct em_int_delay_info rx_int_delay;
339	struct em_int_delay_info rx_abs_int_delay;
340
341	XSUM_CONTEXT_T  active_checksum_context;
342
343	/*
344         * Transmit definitions
345         *
346         * We have an array of num_tx_desc descriptors (handled
347         * by the controller) paired with an array of tx_buffers
348         * (at tx_buffer_area).
349         * The index of the next available descriptor is next_avail_tx_desc.
350         * The number of remaining tx_desc is num_tx_desc_avail.
351         */
352	struct em_dma_alloc txdma;              /* bus_dma glue for tx desc */
353        struct em_tx_desc *tx_desc_base;
354        u_int32_t          next_avail_tx_desc;
355	u_int32_t          oldest_used_tx_desc;
356        volatile u_int16_t num_tx_desc_avail;
357        u_int16_t          num_tx_desc;
358        u_int32_t          txd_cmd;
359        struct em_buffer   *tx_buffer_area;
360	bus_dma_tag_t      txtag;               /* dma tag for tx */
361
362	/*
363	 * Receive definitions
364         *
365         * we have an array of num_rx_desc rx_desc (handled by the
366         * controller), and paired with an array of rx_buffers
367         * (at rx_buffer_area).
368         * The next pair to check on receive is at offset next_rx_desc_to_check
369         */
370	struct em_dma_alloc rxdma;              /* bus_dma glue for rx desc */
371        struct em_rx_desc *rx_desc_base;
372        u_int32_t          next_rx_desc_to_check;
373        u_int16_t          num_rx_desc;
374        u_int32_t          rx_buffer_len;
375        struct em_buffer   *rx_buffer_area;
376	bus_dma_tag_t      rxtag;
377
378	/* Jumbo frame */
379	struct mbuf        *fmp;
380	struct mbuf        *lmp;
381
382	/* Misc stats maintained by the driver */
383	unsigned long   dropped_pkts;
384	unsigned long   mbuf_alloc_failed;
385	unsigned long   mbuf_cluster_failed;
386	unsigned long   no_tx_desc_avail1;
387	unsigned long   no_tx_desc_avail2;
388	unsigned long   no_tx_map_avail;
389        unsigned long   no_tx_dma_setup;
390
391	/* Used in for 82547 10Mb Half workaround */
392	#define EM_PBA_BYTES_SHIFT	0xA
393	#define EM_TX_HEAD_ADDR_SHIFT	7
394	#define EM_PBA_TX_MASK		0xFFFF0000
395	#define EM_FIFO_HDR              0x10
396
397	#define EM_82547_PKT_THRESH      0x3e0
398
399	u_int32_t       tx_fifo_size;
400	u_int32_t       tx_fifo_head;
401	u_int32_t       tx_fifo_head_addr;
402	u_int64_t       tx_fifo_reset_cnt;
403	u_int64_t       tx_fifo_wrk_cnt;
404	u_int32_t       tx_head_addr;
405
406        /* For 82544 PCIX Workaround */
407        boolean_t       pcix_82544;
408	boolean_t       in_detach;
409
410	struct em_hw_stats stats;
411};
412
413#define	EM_LOCK_INIT(_sc, _name) \
414	mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
415#define	EM_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->mtx)
416#define	EM_LOCK(_sc)		mtx_lock(&(_sc)->mtx)
417#define	EM_UNLOCK(_sc)		mtx_unlock(&(_sc)->mtx)
418#define	EM_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->mtx, MA_OWNED)
419
420#endif                                                  /* _EM_H_DEFINED_ */
421