if_em.h revision 151494
1/************************************************************************** 2 3Copyright (c) 2001-2005, Intel Corporation 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30POSSIBILITY OF SUCH DAMAGE. 31 32***************************************************************************/ 33 34/*$FreeBSD: head/sys/dev/em/if_em.h 151494 2005-10-20 08:46:43Z glebius $*/ 35 36#ifndef _EM_H_DEFINED_ 37#define _EM_H_DEFINED_ 38 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/mbuf.h> 43#include <sys/protosw.h> 44#include <sys/socket.h> 45#include <sys/malloc.h> 46#include <sys/kernel.h> 47#include <sys/module.h> 48#include <sys/sockio.h> 49#include <sys/sysctl.h> 50#include <sys/syslog.h> 51 52#include <net/if.h> 53#include <net/if_arp.h> 54#include <net/ethernet.h> 55#include <net/if_dl.h> 56#include <net/if_media.h> 57 58#include <net/bpf.h> 59#include <net/if_types.h> 60#include <net/if_vlan_var.h> 61 62#include <netinet/in_systm.h> 63#include <netinet/in.h> 64#include <netinet/ip.h> 65#include <netinet/tcp.h> 66#include <netinet/udp.h> 67 68#include <sys/bus.h> 69#include <machine/bus.h> 70#include <sys/rman.h> 71#include <machine/resource.h> 72#include <vm/vm.h> 73#include <vm/pmap.h> 74#include <machine/clock.h> 75#include <dev/pci/pcivar.h> 76#include <dev/pci/pcireg.h> 77#include <sys/endian.h> 78#include <sys/proc.h> 79 80#include <dev/em/if_em_hw.h> 81 82/* Tunables */ 83 84/* 85 * EM_MAX_TXD: Maximum number of Transmit Descriptors 86 * Valid Range: 80-256 for 82542 and 82543-based adapters 87 * 80-4096 for others 88 * Default Value: 256 89 * This value is the number of transmit descriptors allocated by the driver. 90 * Increasing this value allows the driver to queue more transmits. Each 91 * descriptor is 16 bytes. 92 */ 93#define EM_MAX_TXD 256 94 95/* 96 * EM_MAX_RXD - Maximum number of receive Descriptors 97 * Valid Range: 80-256 for 82542 and 82543-based adapters 98 * 80-4096 for others 99 * Default Value: 256 100 * This value is the number of receive descriptors allocated by the driver. 101 * Increasing this value allows the driver to buffer more incoming packets. 102 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 103 * descriptor. The maximum MTU size is 16110. 104 * 105 */ 106#define EM_MAX_RXD 256 107 108/* 109 * EM_TIDV - Transmit Interrupt Delay Value 110 * Valid Range: 0-65535 (0=off) 111 * Default Value: 64 112 * This value delays the generation of transmit interrupts in units of 113 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 114 * efficiency if properly tuned for specific network traffic. If the 115 * system is reporting dropped transmits, this value may be set too high 116 * causing the driver to run out of available transmit descriptors. 117 */ 118#define EM_TIDV 64 119 120/* 121 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544) 122 * Valid Range: 0-65535 (0=off) 123 * Default Value: 64 124 * This value, in units of 1.024 microseconds, limits the delay in which a 125 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 126 * this value ensures that an interrupt is generated after the initial 127 * packet is sent on the wire within the set amount of time. Proper tuning, 128 * along with EM_TIDV, may improve traffic throughput in specific 129 * network conditions. 130 */ 131#define EM_TADV 64 132 133/* 134 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 135 * Valid Range: 0-65535 (0=off) 136 * Default Value: 0 137 * This value delays the generation of receive interrupts in units of 1.024 138 * microseconds. Receive interrupt reduction can improve CPU efficiency if 139 * properly tuned for specific network traffic. Increasing this value adds 140 * extra latency to frame reception and can end up decreasing the throughput 141 * of TCP traffic. If the system is reporting dropped receives, this value 142 * may be set too high, causing the driver to run out of available receive 143 * descriptors. 144 * 145 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 146 * may hang (stop transmitting) under certain network conditions. 147 * If this occurs a WATCHDOG message is logged in the system event log. 148 * In addition, the controller is automatically reset, restoring the 149 * network connection. To eliminate the potential for the hang 150 * ensure that EM_RDTR is set to 0. 151 */ 152#define EM_RDTR 0 153 154/* 155 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 156 * Valid Range: 0-65535 (0=off) 157 * Default Value: 64 158 * This value, in units of 1.024 microseconds, limits the delay in which a 159 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 160 * this value ensures that an interrupt is generated after the initial 161 * packet is received within the set amount of time. Proper tuning, 162 * along with EM_RDTR, may improve traffic throughput in specific network 163 * conditions. 164 */ 165#define EM_RADV 64 166 167/* 168 * Inform the stack about transmit checksum offload capabilities. 169 */ 170#define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP) 171 172/* 173 * This parameter controls the duration of transmit watchdog timer. 174 */ 175#define EM_TX_TIMEOUT 5 /* set to 5 seconds */ 176 177/* 178 * This parameter controls when the driver calls the routine to reclaim 179 * transmit descriptors. 180 */ 181#define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8 182 183/* 184 * This parameter controls whether or not autonegotation is enabled. 185 * 0 - Disable autonegotiation 186 * 1 - Enable autonegotiation 187 */ 188#define DO_AUTO_NEG 1 189 190/* 191 * This parameter control whether or not the driver will wait for 192 * autonegotiation to complete. 193 * 1 - Wait for autonegotiation to complete 194 * 0 - Don't wait for autonegotiation to complete 195 */ 196#define WAIT_FOR_AUTO_NEG_DEFAULT 0 197 198/* 199 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue 200 * with 82541/82547 devices and some switches. See the "Known Limitations" section of 201 * the README file for a complete description and a list of affected switches. 202 * 203 * 0 = Hardware default 204 * 1 = Master mode 205 * 2 = Slave mode 206 * 3 = Auto master/slave 207 */ 208/* #define EM_MASTER_SLAVE 2 */ 209 210/* Tunables -- End */ 211 212#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 213 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 214 ADVERTISE_1000_FULL) 215 216#define EM_VENDOR_ID 0x8086 217#define EM_MMBA 0x0010 /* Mem base address */ 218#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 219 220#define EM_JUMBO_PBA 0x00000028 221#define EM_DEFAULT_PBA 0x00000030 222#define EM_SMARTSPEED_DOWNSHIFT 3 223#define EM_SMARTSPEED_MAX 15 224 225 226#define MAX_NUM_MULTICAST_ADDRESSES 128 227#define PCI_ANY_ID (~0U) 228#define ETHER_ALIGN 2 229 230/* Defines for printing debug information */ 231#define DEBUG_INIT 0 232#define DEBUG_IOCTL 0 233#define DEBUG_HW 0 234 235#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 236#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 237#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 238#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 239#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 240#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 241#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 242#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 243#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 244 245 246/* Supported RX Buffer Sizes */ 247#define EM_RXBUFFER_2048 2048 248#define EM_RXBUFFER_4096 4096 249#define EM_RXBUFFER_8192 8192 250#define EM_RXBUFFER_16384 16384 251 252#define EM_MAX_SCATTER 64 253 254/* ****************************************************************************** 255 * vendor_info_array 256 * 257 * This array contains the list of Subvendor/Subdevice IDs on which the driver 258 * should load. 259 * 260 * ******************************************************************************/ 261typedef struct _em_vendor_info_t { 262 unsigned int vendor_id; 263 unsigned int device_id; 264 unsigned int subvendor_id; 265 unsigned int subdevice_id; 266 unsigned int index; 267} em_vendor_info_t; 268 269 270struct em_buffer { 271 struct mbuf *m_head; 272 bus_dmamap_t map; /* bus_dma map for packet */ 273}; 274 275/* 276 * Bus dma allocation structure used by 277 * em_dma_malloc and em_dma_free. 278 */ 279struct em_dma_alloc { 280 bus_addr_t dma_paddr; 281 caddr_t dma_vaddr; 282 bus_dma_tag_t dma_tag; 283 bus_dmamap_t dma_map; 284 bus_dma_segment_t dma_seg; 285 bus_size_t dma_size; 286 int dma_nseg; 287}; 288 289typedef enum _XSUM_CONTEXT_T { 290 OFFLOAD_NONE, 291 OFFLOAD_TCP_IP, 292 OFFLOAD_UDP_IP 293} XSUM_CONTEXT_T; 294 295struct adapter; 296struct em_int_delay_info { 297 struct adapter *adapter; /* Back-pointer to the adapter struct */ 298 int offset; /* Register offset to read/write */ 299 int value; /* Current value in usecs */ 300}; 301 302/* For 82544 PCIX Workaround */ 303typedef struct _ADDRESS_LENGTH_PAIR 304{ 305 u_int64_t address; 306 u_int32_t length; 307} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR; 308 309typedef struct _DESCRIPTOR_PAIR 310{ 311 ADDRESS_LENGTH_PAIR descriptor[4]; 312 u_int32_t elements; 313} DESC_ARRAY, *PDESC_ARRAY; 314 315/* Our adapter structure */ 316struct adapter { 317 struct ifnet *ifp; 318 struct adapter *next; 319 struct adapter *prev; 320 struct em_hw hw; 321 322 /* FreeBSD operating-system-specific structures */ 323 struct em_osdep osdep; 324 struct device *dev; 325 struct resource *res_memory; 326 struct resource *res_ioport; 327 struct resource *res_interrupt; 328 void *int_handler_tag; 329 struct ifmedia media; 330 struct callout timer; 331 struct callout tx_fifo_timer; 332 int io_rid; 333 u_int8_t unit; 334 struct mtx mtx; 335 int em_insert_vlan_header; 336 337 /* Info about the board itself */ 338 u_int32_t part_num; 339 u_int8_t link_active; 340 u_int16_t link_speed; 341 u_int16_t link_duplex; 342 u_int32_t smartspeed; 343 struct em_int_delay_info tx_int_delay; 344 struct em_int_delay_info tx_abs_int_delay; 345 struct em_int_delay_info rx_int_delay; 346 struct em_int_delay_info rx_abs_int_delay; 347 348 XSUM_CONTEXT_T active_checksum_context; 349 350 /* 351 * Transmit definitions 352 * 353 * We have an array of num_tx_desc descriptors (handled 354 * by the controller) paired with an array of tx_buffers 355 * (at tx_buffer_area). 356 * The index of the next available descriptor is next_avail_tx_desc. 357 * The number of remaining tx_desc is num_tx_desc_avail. 358 */ 359 struct em_dma_alloc txdma; /* bus_dma glue for tx desc */ 360 struct em_tx_desc *tx_desc_base; 361 u_int32_t next_avail_tx_desc; 362 u_int32_t oldest_used_tx_desc; 363 volatile u_int16_t num_tx_desc_avail; 364 u_int16_t num_tx_desc; 365 u_int32_t txd_cmd; 366 struct em_buffer *tx_buffer_area; 367 bus_dma_tag_t txtag; /* dma tag for tx */ 368 369 /* 370 * Receive definitions 371 * 372 * we have an array of num_rx_desc rx_desc (handled by the 373 * controller), and paired with an array of rx_buffers 374 * (at rx_buffer_area). 375 * The next pair to check on receive is at offset next_rx_desc_to_check 376 */ 377 struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */ 378 struct em_rx_desc *rx_desc_base; 379 u_int32_t next_rx_desc_to_check; 380 u_int16_t num_rx_desc; 381 u_int32_t rx_buffer_len; 382 struct em_buffer *rx_buffer_area; 383 bus_dma_tag_t rxtag; 384 385 /* Jumbo frame */ 386 struct mbuf *fmp; 387 struct mbuf *lmp; 388 389 /* Misc stats maintained by the driver */ 390 unsigned long dropped_pkts; 391 unsigned long mbuf_alloc_failed; 392 unsigned long mbuf_cluster_failed; 393 unsigned long no_tx_desc_avail1; 394 unsigned long no_tx_desc_avail2; 395 unsigned long no_tx_map_avail; 396 unsigned long no_tx_dma_setup; 397 398 /* Used in for 82547 10Mb Half workaround */ 399 #define EM_PBA_BYTES_SHIFT 0xA 400 #define EM_TX_HEAD_ADDR_SHIFT 7 401 #define EM_PBA_TX_MASK 0xFFFF0000 402 #define EM_FIFO_HDR 0x10 403 404 #define EM_82547_PKT_THRESH 0x3e0 405 406 u_int32_t tx_fifo_size; 407 u_int32_t tx_fifo_head; 408 u_int32_t tx_fifo_head_addr; 409 u_int64_t tx_fifo_reset_cnt; 410 u_int64_t tx_fifo_wrk_cnt; 411 u_int32_t tx_head_addr; 412 413 /* For 82544 PCIX Workaround */ 414 boolean_t pcix_82544; 415 boolean_t in_detach; 416 417 struct em_hw_stats stats; 418}; 419 420#define EM_LOCK_INIT(_sc, _name) \ 421 mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF) 422#define EM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 423#define EM_LOCK(_sc) mtx_lock(&(_sc)->mtx) 424#define EM_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 425#define EM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) 426 427#endif /* _EM_H_DEFINED_ */ 428