if_em.h revision 150636
1/************************************************************************** 2 3Copyright (c) 2001-2005, Intel Corporation 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30POSSIBILITY OF SUCH DAMAGE. 31 32***************************************************************************/ 33 34/*$FreeBSD: head/sys/dev/em/if_em.h 150636 2005-09-27 18:10:43Z mlaier $*/ 35 36#ifndef _EM_H_DEFINED_ 37#define _EM_H_DEFINED_ 38 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/mbuf.h> 43#include <sys/protosw.h> 44#include <sys/socket.h> 45#include <sys/malloc.h> 46#include <sys/kernel.h> 47#include <sys/module.h> 48#include <sys/sockio.h> 49#include <sys/sysctl.h> 50 51#include <net/if.h> 52#include <net/if_arp.h> 53#include <net/ethernet.h> 54#include <net/if_dl.h> 55#include <net/if_media.h> 56 57#include <net/bpf.h> 58#include <net/if_types.h> 59#include <net/if_vlan_var.h> 60 61#include <netinet/in_systm.h> 62#include <netinet/in.h> 63#include <netinet/ip.h> 64#include <netinet/tcp.h> 65#include <netinet/udp.h> 66 67#include <sys/bus.h> 68#include <machine/bus.h> 69#include <sys/rman.h> 70#include <machine/resource.h> 71#include <vm/vm.h> 72#include <vm/pmap.h> 73#include <machine/clock.h> 74#include <dev/pci/pcivar.h> 75#include <dev/pci/pcireg.h> 76#include <sys/endian.h> 77#include <sys/proc.h> 78 79#include <dev/em/if_em_hw.h> 80 81/* Tunables */ 82 83/* 84 * EM_MAX_TXD: Maximum number of Transmit Descriptors 85 * Valid Range: 80-256 for 82542 and 82543-based adapters 86 * 80-4096 for others 87 * Default Value: 256 88 * This value is the number of transmit descriptors allocated by the driver. 89 * Increasing this value allows the driver to queue more transmits. Each 90 * descriptor is 16 bytes. 91 */ 92#define EM_MAX_TXD 256 93 94/* 95 * EM_MAX_RXD - Maximum number of receive Descriptors 96 * Valid Range: 80-256 for 82542 and 82543-based adapters 97 * 80-4096 for others 98 * Default Value: 256 99 * This value is the number of receive descriptors allocated by the driver. 100 * Increasing this value allows the driver to buffer more incoming packets. 101 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 102 * descriptor. The maximum MTU size is 16110. 103 * 104 */ 105#define EM_MAX_RXD 256 106 107/* 108 * EM_TIDV - Transmit Interrupt Delay Value 109 * Valid Range: 0-65535 (0=off) 110 * Default Value: 64 111 * This value delays the generation of transmit interrupts in units of 112 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 113 * efficiency if properly tuned for specific network traffic. If the 114 * system is reporting dropped transmits, this value may be set too high 115 * causing the driver to run out of available transmit descriptors. 116 */ 117#define EM_TIDV 64 118 119/* 120 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544) 121 * Valid Range: 0-65535 (0=off) 122 * Default Value: 64 123 * This value, in units of 1.024 microseconds, limits the delay in which a 124 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 125 * this value ensures that an interrupt is generated after the initial 126 * packet is sent on the wire within the set amount of time. Proper tuning, 127 * along with EM_TIDV, may improve traffic throughput in specific 128 * network conditions. 129 */ 130#define EM_TADV 64 131 132/* 133 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 134 * Valid Range: 0-65535 (0=off) 135 * Default Value: 0 136 * This value delays the generation of receive interrupts in units of 1.024 137 * microseconds. Receive interrupt reduction can improve CPU efficiency if 138 * properly tuned for specific network traffic. Increasing this value adds 139 * extra latency to frame reception and can end up decreasing the throughput 140 * of TCP traffic. If the system is reporting dropped receives, this value 141 * may be set too high, causing the driver to run out of available receive 142 * descriptors. 143 * 144 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 145 * may hang (stop transmitting) under certain network conditions. 146 * If this occurs a WATCHDOG message is logged in the system event log. 147 * In addition, the controller is automatically reset, restoring the 148 * network connection. To eliminate the potential for the hang 149 * ensure that EM_RDTR is set to 0. 150 */ 151#define EM_RDTR 0 152 153/* 154 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 155 * Valid Range: 0-65535 (0=off) 156 * Default Value: 64 157 * This value, in units of 1.024 microseconds, limits the delay in which a 158 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 159 * this value ensures that an interrupt is generated after the initial 160 * packet is received within the set amount of time. Proper tuning, 161 * along with EM_RDTR, may improve traffic throughput in specific network 162 * conditions. 163 */ 164#define EM_RADV 64 165 166 167/* 168 * This parameter controls the maximum no of times the driver will loop 169 * in the isr. 170 * Minimum Value = 1 171 */ 172#define EM_MAX_INTR 3 173 174/* 175 * Inform the stack about transmit checksum offload capabilities. 176 */ 177#define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP) 178 179/* 180 * This parameter controls the duration of transmit watchdog timer. 181 */ 182#define EM_TX_TIMEOUT 5 /* set to 5 seconds */ 183 184/* 185 * This parameter controls when the driver calls the routine to reclaim 186 * transmit descriptors. 187 */ 188#define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8 189 190/* 191 * This parameter controls whether or not autonegotation is enabled. 192 * 0 - Disable autonegotiation 193 * 1 - Enable autonegotiation 194 */ 195#define DO_AUTO_NEG 1 196 197/* 198 * This parameter control whether or not the driver will wait for 199 * autonegotiation to complete. 200 * 1 - Wait for autonegotiation to complete 201 * 0 - Don't wait for autonegotiation to complete 202 */ 203#define WAIT_FOR_AUTO_NEG_DEFAULT 0 204 205/* 206 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue 207 * with 82541/82547 devices and some switches. See the "Known Limitations" section of 208 * the README file for a complete description and a list of affected switches. 209 * 210 * 0 = Hardware default 211 * 1 = Master mode 212 * 2 = Slave mode 213 * 3 = Auto master/slave 214 */ 215/* #define EM_MASTER_SLAVE 2 */ 216 217/* Tunables -- End */ 218 219#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 220 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 221 ADVERTISE_1000_FULL) 222 223#define EM_VENDOR_ID 0x8086 224#define EM_MMBA 0x0010 /* Mem base address */ 225#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 226 227#define EM_JUMBO_PBA 0x00000028 228#define EM_DEFAULT_PBA 0x00000030 229#define EM_SMARTSPEED_DOWNSHIFT 3 230#define EM_SMARTSPEED_MAX 15 231 232 233#define MAX_NUM_MULTICAST_ADDRESSES 128 234#define PCI_ANY_ID (~0U) 235#define ETHER_ALIGN 2 236 237/* Defines for printing debug information */ 238#define DEBUG_INIT 0 239#define DEBUG_IOCTL 0 240#define DEBUG_HW 0 241 242#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 243#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 244#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 245#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 246#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 247#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 248#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 249#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 250#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 251 252 253/* Supported RX Buffer Sizes */ 254#define EM_RXBUFFER_2048 2048 255#define EM_RXBUFFER_4096 4096 256#define EM_RXBUFFER_8192 8192 257#define EM_RXBUFFER_16384 16384 258 259#define EM_MAX_SCATTER 64 260 261/* ****************************************************************************** 262 * vendor_info_array 263 * 264 * This array contains the list of Subvendor/Subdevice IDs on which the driver 265 * should load. 266 * 267 * ******************************************************************************/ 268typedef struct _em_vendor_info_t { 269 unsigned int vendor_id; 270 unsigned int device_id; 271 unsigned int subvendor_id; 272 unsigned int subdevice_id; 273 unsigned int index; 274} em_vendor_info_t; 275 276 277struct em_buffer { 278 struct mbuf *m_head; 279 bus_dmamap_t map; /* bus_dma map for packet */ 280}; 281 282/* 283 * Bus dma allocation structure used by 284 * em_dma_malloc and em_dma_free. 285 */ 286struct em_dma_alloc { 287 bus_addr_t dma_paddr; 288 caddr_t dma_vaddr; 289 bus_dma_tag_t dma_tag; 290 bus_dmamap_t dma_map; 291 bus_dma_segment_t dma_seg; 292 bus_size_t dma_size; 293 int dma_nseg; 294}; 295 296typedef enum _XSUM_CONTEXT_T { 297 OFFLOAD_NONE, 298 OFFLOAD_TCP_IP, 299 OFFLOAD_UDP_IP 300} XSUM_CONTEXT_T; 301 302struct adapter; 303struct em_int_delay_info { 304 struct adapter *adapter; /* Back-pointer to the adapter struct */ 305 int offset; /* Register offset to read/write */ 306 int value; /* Current value in usecs */ 307}; 308 309/* For 82544 PCIX Workaround */ 310typedef struct _ADDRESS_LENGTH_PAIR 311{ 312 u_int64_t address; 313 u_int32_t length; 314} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR; 315 316typedef struct _DESCRIPTOR_PAIR 317{ 318 ADDRESS_LENGTH_PAIR descriptor[4]; 319 u_int32_t elements; 320} DESC_ARRAY, *PDESC_ARRAY; 321 322/* Our adapter structure */ 323struct adapter { 324 struct ifnet *ifp; 325 struct adapter *next; 326 struct adapter *prev; 327 struct em_hw hw; 328 329 /* FreeBSD operating-system-specific structures */ 330 struct em_osdep osdep; 331 struct device *dev; 332 struct resource *res_memory; 333 struct resource *res_ioport; 334 struct resource *res_interrupt; 335 void *int_handler_tag; 336 struct ifmedia media; 337 struct callout timer; 338 struct callout tx_fifo_timer; 339 int io_rid; 340 u_int8_t unit; 341 struct mtx mtx; 342 int em_insert_vlan_header; 343 344 /* Info about the board itself */ 345 u_int32_t part_num; 346 u_int8_t link_active; 347 u_int16_t link_speed; 348 u_int16_t link_duplex; 349 u_int32_t smartspeed; 350 struct em_int_delay_info tx_int_delay; 351 struct em_int_delay_info tx_abs_int_delay; 352 struct em_int_delay_info rx_int_delay; 353 struct em_int_delay_info rx_abs_int_delay; 354 355 XSUM_CONTEXT_T active_checksum_context; 356 357 /* 358 * Transmit definitions 359 * 360 * We have an array of num_tx_desc descriptors (handled 361 * by the controller) paired with an array of tx_buffers 362 * (at tx_buffer_area). 363 * The index of the next available descriptor is next_avail_tx_desc. 364 * The number of remaining tx_desc is num_tx_desc_avail. 365 */ 366 struct em_dma_alloc txdma; /* bus_dma glue for tx desc */ 367 struct em_tx_desc *tx_desc_base; 368 u_int32_t next_avail_tx_desc; 369 u_int32_t oldest_used_tx_desc; 370 volatile u_int16_t num_tx_desc_avail; 371 u_int16_t num_tx_desc; 372 u_int32_t txd_cmd; 373 struct em_buffer *tx_buffer_area; 374 bus_dma_tag_t txtag; /* dma tag for tx */ 375 376 /* 377 * Receive definitions 378 * 379 * we have an array of num_rx_desc rx_desc (handled by the 380 * controller), and paired with an array of rx_buffers 381 * (at rx_buffer_area). 382 * The next pair to check on receive is at offset next_rx_desc_to_check 383 */ 384 struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */ 385 struct em_rx_desc *rx_desc_base; 386 u_int32_t next_rx_desc_to_check; 387 u_int16_t num_rx_desc; 388 u_int32_t rx_buffer_len; 389 struct em_buffer *rx_buffer_area; 390 bus_dma_tag_t rxtag; 391 392 /* Jumbo frame */ 393 struct mbuf *fmp; 394 struct mbuf *lmp; 395 396 /* Misc stats maintained by the driver */ 397 unsigned long dropped_pkts; 398 unsigned long mbuf_alloc_failed; 399 unsigned long mbuf_cluster_failed; 400 unsigned long no_tx_desc_avail1; 401 unsigned long no_tx_desc_avail2; 402 unsigned long no_tx_map_avail; 403 unsigned long no_tx_dma_setup; 404 405 /* Used in for 82547 10Mb Half workaround */ 406 #define EM_PBA_BYTES_SHIFT 0xA 407 #define EM_TX_HEAD_ADDR_SHIFT 7 408 #define EM_PBA_TX_MASK 0xFFFF0000 409 #define EM_FIFO_HDR 0x10 410 411 #define EM_82547_PKT_THRESH 0x3e0 412 413 u_int32_t tx_fifo_size; 414 u_int32_t tx_fifo_head; 415 u_int32_t tx_fifo_head_addr; 416 u_int64_t tx_fifo_reset_cnt; 417 u_int64_t tx_fifo_wrk_cnt; 418 u_int32_t tx_head_addr; 419 420 /* For 82544 PCIX Workaround */ 421 boolean_t pcix_82544; 422 boolean_t in_detach; 423 424 struct em_hw_stats stats; 425}; 426 427#define EM_LOCK_INIT(_sc, _name) \ 428 mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF) 429#define EM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 430#define EM_LOCK(_sc) mtx_lock(&(_sc)->mtx) 431#define EM_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 432#define EM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) 433 434#endif /* _EM_H_DEFINED_ */ 435