if_em.h revision 137583
1/************************************************************************** 2 3Copyright (c) 2001-2003, Intel Corporation 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30POSSIBILITY OF SUCH DAMAGE. 31 32***************************************************************************/ 33 34/*$FreeBSD: head/sys/dev/em/if_em.h 137583 2004-11-11 19:00:51Z des $*/ 35 36#ifndef _EM_H_DEFINED_ 37#define _EM_H_DEFINED_ 38 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/mbuf.h> 43#include <sys/protosw.h> 44#include <sys/socket.h> 45#include <sys/malloc.h> 46#include <sys/kernel.h> 47#include <sys/module.h> 48#include <sys/sockio.h> 49#include <sys/sysctl.h> 50 51#include <net/if.h> 52#include <net/if_arp.h> 53#include <net/ethernet.h> 54#include <net/if_dl.h> 55#include <net/if_media.h> 56 57#include <net/bpf.h> 58#include <net/if_types.h> 59#include <net/if_vlan_var.h> 60 61#include <netinet/in_systm.h> 62#include <netinet/in.h> 63#include <netinet/ip.h> 64#include <netinet/tcp.h> 65#include <netinet/udp.h> 66 67#include <sys/bus.h> 68#include <machine/bus.h> 69#include <sys/rman.h> 70#include <machine/resource.h> 71#include <vm/vm.h> 72#include <vm/pmap.h> 73#include <machine/clock.h> 74#include <dev/pci/pcivar.h> 75#include <dev/pci/pcireg.h> 76#include <sys/endian.h> 77#include <sys/proc.h> 78#include "opt_bdg.h" 79 80#include <dev/em/if_em_hw.h> 81 82/* Tunables */ 83 84/* 85 * EM_MAX_TXD: Maximum number of Transmit Descriptors 86 * Valid Range: 80-256 for 82542 and 82543-based adapters 87 * 80-4096 for others 88 * Default Value: 256 89 * This value is the number of transmit descriptors allocated by the driver. 90 * Increasing this value allows the driver to queue more transmits. Each 91 * descriptor is 16 bytes. 92 */ 93#define EM_MAX_TXD 256 94 95/* 96 * EM_MAX_RXD - Maximum number of receive Descriptors 97 * Valid Range: 80-256 for 82542 and 82543-based adapters 98 * 80-4096 for others 99 * Default Value: 256 100 * This value is the number of receive descriptors allocated by the driver. 101 * Increasing this value allows the driver to buffer more incoming packets. 102 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 103 * descriptor. The maximum MTU size is 16110. 104 * 105 */ 106#define EM_MAX_RXD 256 107 108/* 109 * EM_TIDV - Transmit Interrupt Delay Value 110 * Valid Range: 0-65535 (0=off) 111 * Default Value: 64 112 * This value delays the generation of transmit interrupts in units of 113 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 114 * efficiency if properly tuned for specific network traffic. If the 115 * system is reporting dropped transmits, this value may be set too high 116 * causing the driver to run out of available transmit descriptors. 117 */ 118#define EM_TIDV 64 119 120/* 121 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544) 122 * Valid Range: 0-65535 (0=off) 123 * Default Value: 64 124 * This value, in units of 1.024 microseconds, limits the delay in which a 125 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 126 * this value ensures that an interrupt is generated after the initial 127 * packet is sent on the wire within the set amount of time. Proper tuning, 128 * along with EM_TIDV, may improve traffic throughput in specific 129 * network conditions. 130 */ 131#define EM_TADV 64 132 133/* 134 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 135 * Valid Range: 0-65535 (0=off) 136 * Default Value: 0 137 * This value delays the generation of receive interrupts in units of 1.024 138 * microseconds. Receive interrupt reduction can improve CPU efficiency if 139 * properly tuned for specific network traffic. Increasing this value adds 140 * extra latency to frame reception and can end up decreasing the throughput 141 * of TCP traffic. If the system is reporting dropped receives, this value 142 * may be set too high, causing the driver to run out of available receive 143 * descriptors. 144 * 145 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 146 * may hang (stop transmitting) under certain network conditions. 147 * If this occurs a WATCHDOG message is logged in the system event log. 148 * In addition, the controller is automatically reset, restoring the 149 * network connection. To eliminate the potential for the hang 150 * ensure that EM_RDTR is set to 0. 151 */ 152#define EM_RDTR 0 153 154/* 155 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 156 * Valid Range: 0-65535 (0=off) 157 * Default Value: 64 158 * This value, in units of 1.024 microseconds, limits the delay in which a 159 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 160 * this value ensures that an interrupt is generated after the initial 161 * packet is received within the set amount of time. Proper tuning, 162 * along with EM_RDTR, may improve traffic throughput in specific network 163 * conditions. 164 */ 165#define EM_RADV 64 166 167 168/* 169 * This parameter controls the maximum no of times the driver will loop 170 * in the isr. 171 * Minimum Value = 1 172 */ 173#define EM_MAX_INTR 3 174 175/* 176 * Inform the stack about transmit checksum offload capabilities. 177 */ 178#define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP) 179 180/* 181 * This parameter controls the duration of transmit watchdog timer. 182 */ 183#define EM_TX_TIMEOUT 5 /* set to 5 seconds */ 184 185/* 186 * This parameter controls when the driver calls the routine to reclaim 187 * transmit descriptors. 188 */ 189#define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8 190 191/* 192 * This parameter controls whether or not autonegotation is enabled. 193 * 0 - Disable autonegotiation 194 * 1 - Enable autonegotiation 195 */ 196#define DO_AUTO_NEG 1 197 198/* 199 * This parameter control whether or not the driver will wait for 200 * autonegotiation to complete. 201 * 1 - Wait for autonegotiation to complete 202 * 0 - Don't wait for autonegotiation to complete 203 */ 204#define WAIT_FOR_AUTO_NEG_DEFAULT 0 205 206/* 207 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue 208 * with 82541/82547 devices and some switches. See the "Known Limitations" section of 209 * the README file for a complete description and a list of affected switches. 210 * 211 * 0 = Hardware default 212 * 1 = Master mode 213 * 2 = Slave mode 214 * 3 = Auto master/slave 215 */ 216/* #define EM_MASTER_SLAVE 2 */ 217 218/* Tunables -- End */ 219 220#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 221 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 222 ADVERTISE_1000_FULL) 223 224#define EM_VENDOR_ID 0x8086 225#define EM_MMBA 0x0010 /* Mem base address */ 226#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 227 228#define EM_JUMBO_PBA 0x00000028 229#define EM_DEFAULT_PBA 0x00000030 230#define EM_SMARTSPEED_DOWNSHIFT 3 231#define EM_SMARTSPEED_MAX 15 232 233 234#define MAX_NUM_MULTICAST_ADDRESSES 128 235#define PCI_ANY_ID (~0U) 236#define ETHER_ALIGN 2 237 238/* Defines for printing debug information */ 239#define DEBUG_INIT 0 240#define DEBUG_IOCTL 0 241#define DEBUG_HW 0 242 243#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 244#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 245#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 246#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 247#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 248#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 249#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 250#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 251#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 252 253 254/* Supported RX Buffer Sizes */ 255#define EM_RXBUFFER_2048 2048 256#define EM_RXBUFFER_4096 4096 257#define EM_RXBUFFER_8192 8192 258#define EM_RXBUFFER_16384 16384 259 260#define EM_MAX_SCATTER 64 261 262/* ****************************************************************************** 263 * vendor_info_array 264 * 265 * This array contains the list of Subvendor/Subdevice IDs on which the driver 266 * should load. 267 * 268 * ******************************************************************************/ 269typedef struct _em_vendor_info_t { 270 unsigned int vendor_id; 271 unsigned int device_id; 272 unsigned int subvendor_id; 273 unsigned int subdevice_id; 274 unsigned int index; 275} em_vendor_info_t; 276 277 278struct em_buffer { 279 struct mbuf *m_head; 280 bus_dmamap_t map; /* bus_dma map for packet */ 281}; 282 283struct em_q { 284 bus_dmamap_t map; /* bus_dma map for packet */ 285 int nsegs; /* # of segments/descriptors */ 286 bus_dma_segment_t segs[EM_MAX_SCATTER]; 287}; 288 289/* 290 * Bus dma allocation structure used by 291 * em_dma_malloc and em_dma_free. 292 */ 293struct em_dma_alloc { 294 bus_addr_t dma_paddr; 295 caddr_t dma_vaddr; 296 bus_dma_tag_t dma_tag; 297 bus_dmamap_t dma_map; 298 bus_dma_segment_t dma_seg; 299 bus_size_t dma_size; 300 int dma_nseg; 301}; 302 303typedef enum _XSUM_CONTEXT_T { 304 OFFLOAD_NONE, 305 OFFLOAD_TCP_IP, 306 OFFLOAD_UDP_IP 307} XSUM_CONTEXT_T; 308 309struct adapter; 310struct em_int_delay_info { 311 struct adapter *adapter; /* Back-pointer to the adapter struct */ 312 int offset; /* Register offset to read/write */ 313 int value; /* Current value in usecs */ 314}; 315 316/* For 82544 PCIX Workaround */ 317typedef struct _ADDRESS_LENGTH_PAIR 318{ 319 u_int64_t address; 320 u_int32_t length; 321} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR; 322 323typedef struct _DESCRIPTOR_PAIR 324{ 325 ADDRESS_LENGTH_PAIR descriptor[4]; 326 u_int32_t elements; 327} DESC_ARRAY, *PDESC_ARRAY; 328 329/* Our adapter structure */ 330struct adapter { 331 struct arpcom interface_data; 332 struct adapter *next; 333 struct adapter *prev; 334 struct em_hw hw; 335 336 /* FreeBSD operating-system-specific structures */ 337 struct em_osdep osdep; 338 struct device *dev; 339 struct resource *res_memory; 340 struct resource *res_ioport; 341 struct resource *res_interrupt; 342 void *int_handler_tag; 343 struct ifmedia media; 344 struct callout timer; 345 struct callout tx_fifo_timer; 346 int io_rid; 347 u_int8_t unit; 348 struct mtx mtx; 349 350 /* Info about the board itself */ 351 u_int32_t part_num; 352 u_int8_t link_active; 353 u_int16_t link_speed; 354 u_int16_t link_duplex; 355 u_int32_t smartspeed; 356 struct em_int_delay_info tx_int_delay; 357 struct em_int_delay_info tx_abs_int_delay; 358 struct em_int_delay_info rx_int_delay; 359 struct em_int_delay_info rx_abs_int_delay; 360 361 XSUM_CONTEXT_T active_checksum_context; 362 363 /* 364 * Transmit definitions 365 * 366 * We have an array of num_tx_desc descriptors (handled 367 * by the controller) paired with an array of tx_buffers 368 * (at tx_buffer_area). 369 * The index of the next available descriptor is next_avail_tx_desc. 370 * The number of remaining tx_desc is num_tx_desc_avail. 371 */ 372 struct em_dma_alloc txdma; /* bus_dma glue for tx desc */ 373 struct em_tx_desc *tx_desc_base; 374 u_int32_t next_avail_tx_desc; 375 u_int32_t oldest_used_tx_desc; 376 volatile u_int16_t num_tx_desc_avail; 377 u_int16_t num_tx_desc; 378 u_int32_t txd_cmd; 379 struct em_buffer *tx_buffer_area; 380 bus_dma_tag_t txtag; /* dma tag for tx */ 381 382 /* 383 * Receive definitions 384 * 385 * we have an array of num_rx_desc rx_desc (handled by the 386 * controller), and paired with an array of rx_buffers 387 * (at rx_buffer_area). 388 * The next pair to check on receive is at offset next_rx_desc_to_check 389 */ 390 struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */ 391 struct em_rx_desc *rx_desc_base; 392 u_int32_t next_rx_desc_to_check; 393 u_int16_t num_rx_desc; 394 u_int32_t rx_buffer_len; 395 struct em_buffer *rx_buffer_area; 396 bus_dma_tag_t rxtag; 397 398 /* Jumbo frame */ 399 struct mbuf *fmp; 400 struct mbuf *lmp; 401 402 /* Misc stats maintained by the driver */ 403 unsigned long dropped_pkts; 404 unsigned long mbuf_alloc_failed; 405 unsigned long mbuf_cluster_failed; 406 unsigned long no_tx_desc_avail1; 407 unsigned long no_tx_desc_avail2; 408 unsigned long no_tx_map_avail; 409 unsigned long no_tx_dma_setup; 410 411 /* Used in for 82547 10Mb Half workaround */ 412 #define EM_PBA_BYTES_SHIFT 0xA 413 #define EM_TX_HEAD_ADDR_SHIFT 7 414 #define EM_PBA_TX_MASK 0xFFFF0000 415 #define EM_FIFO_HDR 0x10 416 417 #define EM_82547_PKT_THRESH 0x3e0 418 419 u_int32_t tx_fifo_size; 420 u_int32_t tx_fifo_head; 421 u_int32_t tx_fifo_head_addr; 422 u_int64_t tx_fifo_reset_cnt; 423 u_int64_t tx_fifo_wrk_cnt; 424 u_int32_t tx_head_addr; 425 426 /* For 82544 PCIX Workaround */ 427 boolean_t pcix_82544; 428 boolean_t in_detach; 429 430#ifdef DBG_STATS 431 unsigned long no_pkts_avail; 432 unsigned long clean_tx_interrupts; 433 434#endif 435 struct em_hw_stats stats; 436}; 437 438#define EM_LOCK_INIT(_sc, _name) \ 439 mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF) 440#define EM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 441#define EM_LOCK(_sc) mtx_lock(&(_sc)->mtx) 442#define EM_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 443#define EM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) 444 445#endif /* _EM_H_DEFINED_ */ 446