if_em.h revision 112472
19313Ssos/**************************************************************************
2230132Suqs
39313SsosCopyright (c) 2001-2003, Intel Corporation
49313SsosAll rights reserved.
59313Ssos
69313SsosRedistribution and use in source and binary forms, with or without
79313Ssosmodification, are permitted provided that the following conditions are met:
89313Ssos
9111798Sdes 1. Redistributions of source code must retain the above copyright notice,
109313Ssos    this list of conditions and the following disclaimer.
119313Ssos
129313Ssos 2. Redistributions in binary form must reproduce the above copyright
139313Ssos    notice, this list of conditions and the following disclaimer in the
149313Ssos    documentation and/or other materials provided with the distribution.
1597748Sschweikh
169313Ssos 3. Neither the name of the Intel Corporation nor the names of its
179313Ssos    contributors may be used to endorse or promote products derived from
189313Ssos    this software without specific prior written permission.
199313Ssos
209313SsosTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
219313SsosAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
229313SsosIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
239313SsosARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
249313SsosLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
259313SsosCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
269313SsosSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
279313SsosINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
289313SsosCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29116173SobrienARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30116173SobrienPOSSIBILITY OF SUCH DAMAGE.
31116173Sobrien
32156874Sru***************************************************************************/
3331784Seivind
349313Ssos/*$FreeBSD: head/sys/dev/em/if_em.h 112472 2003-03-21 21:47:31Z pdeuskar $*/
359313Ssos
36263233Srwatson#ifndef _EM_H_DEFINED_
3776166Smarkm#define _EM_H_DEFINED_
3876166Smarkm
399313Ssos
409313Ssos#include <sys/param.h>
419313Ssos#include <sys/systm.h>
4231561Sbde#include <sys/mbuf.h>
439313Ssos#include <sys/protosw.h>
4472538Sjlemon#include <sys/socket.h>
4576166Smarkm#include <sys/malloc.h>
46168014Sjulian#include <sys/kernel.h>
4776166Smarkm#include <sys/sockio.h>
48162201Snetchild
49166085Skib#include <net/if.h>
50102814Siedowse#include <net/if_arp.h>
5176166Smarkm#include <net/ethernet.h>
5214331Speter#include <net/if_dl.h>
53162585Snetchild#include <net/if_media.h>
5476166Smarkm
5512458Sbde#include <net/bpf.h>
56140214Sobrien#include <net/if_types.h>
57140214Sobrien#include <net/if_vlan_var.h>
58140214Sobrien
59140214Sobrien#include <netinet/in_systm.h>
6064905Smarcel#include <netinet/in.h>
6168583Smarcel#include <netinet/ip.h>
62133816Stjr#include <netinet/tcp.h>
63246085Sjhb#include <netinet/udp.h>
6464905Smarcel
65177997Skib#include <sys/bus.h>
669313Ssos#include <machine/bus.h>
67315376Sdchagin#include <sys/rman.h>
68315376Sdchagin#include <machine/resource.h>
69315376Sdchagin#include <vm/vm.h>
70315376Sdchagin#include <vm/pmap.h>
719313Ssos#include <machine/clock.h>
7283366Sjulian#include <pci/pcivar.h>
739313Ssos#include <pci/pcireg.h>
74300411Sdchagin#include "opt_bdg.h"
75300411Sdchagin
769313Ssos#include <dev/em/if_em_hw.h>
77300411Sdchagin
789313Ssos/* Tunables */
7972543Sjlemon
80102814Siedowse/*
819313Ssos * TxDescriptors
82300411Sdchagin * Valid Range: 80-256 for 82542 and 82543-based adapters
83300411Sdchagin *            80-4096 for 82540, 82544, 82545, and 82546-based adapters
84300411Sdchagin * Default Value: 256
85300411Sdchagin *   This value is the number of transmit descriptors allocated by the driver.
869313Ssos *   Increasing this value allows the driver to queue more transmits. Each
879313Ssos *   descriptor is 16 bytes.
88168014Sjulian */
89168014Sjulian#define EM_MAX_TXD                      256
90177997Skib
919313Ssos/*
92300411Sdchagin * RxDescriptors
93300411Sdchagin * Valid Range: 80-256 for 82542 and 82543-based adapters
94300411Sdchagin *            80-4096 for 82540, 82544, 82545, and 82546-based adapters
95300411Sdchagin * Default Value: 256
96300411Sdchagin *   This value is the number of receive descriptors allocated by the driver.
9714331Speter *   Increasing this value allows the driver to buffer more incoming packets.
98300411Sdchagin *   Each descriptor is 16 bytes.  A receive buffer is also allocated for each
99300411Sdchagin *   descriptor. The maximum MTU size is 16110.
100300411Sdchagin *
101300411Sdchagin */
102300411Sdchagin#define EM_MAX_RXD                      256
103300411Sdchagin
104300411Sdchagin/*
105300411Sdchagin * TxIntDelay
106300411Sdchagin * Valid Range: 0-65535 (0=off)
107300411Sdchagin * Default Value: 64
108300411Sdchagin *   This value delays the generation of transmit interrupts in units of
109300411Sdchagin *   1.024 microseconds. Transmit interrupt reduction can improve CPU
110300411Sdchagin *   efficiency if properly tuned for specific network traffic. If the
111300411Sdchagin *   system is reporting dropped transmits, this value may be set too high
112300411Sdchagin *   causing the driver to run out of available transmit descriptors.
113300411Sdchagin */
114300411Sdchagin#define EM_TIDV                         64
115300411Sdchagin
116300411Sdchagin/*
117300411Sdchagin * TxAbsIntDelay (82540, 82545, and 82546-based adapters only)
118300411Sdchagin * Valid Range: 0-65535 (0=off)
119300411Sdchagin * Default Value: 64
120300411Sdchagin *   This value, in units of 1.024 microseconds, limits the delay in which a
121300411Sdchagin *   transmit interrupt is generated. Useful only if TxIntDelay is non-zero,
122300411Sdchagin *   this value ensures that an interrupt is generated after the initial
123300411Sdchagin *   packet is sent on the wire within the set amount of time.  Proper tuning,
124300411Sdchagin *   along with TxIntDelay, may improve traffic throughput in specific
125300411Sdchagin *   network conditions.
126300411Sdchagin */
127300411Sdchagin#define EM_TADV                         64
128300411Sdchagin
129300411Sdchagin/*
130300411Sdchagin * RxIntDelay
131300411Sdchagin * Valid Range: 0-65535 (0=off)
132300411Sdchagin * Default Value: 0
133300411Sdchagin *   This value delays the generation of receive interrupts in units of 1.024
1349313Ssos *   microseconds.  Receive interrupt reduction can improve CPU efficiency if
135300411Sdchagin *   properly tuned for specific network traffic. Increasing this value adds
136300411Sdchagin *   extra latency to frame reception and can end up decreasing the throughput
137300411Sdchagin *   of TCP traffic. If the system is reporting dropped receives, this value
138300411Sdchagin *   may be set too high, causing the driver to run out of available receive
139300411Sdchagin *   descriptors.
140178036Srdivacky *
141300411Sdchagin *   CAUTION: When setting RxIntDelay to a value other than 0, adapters
142300411Sdchagin *            may hang (stop transmitting) under certain network conditions.
143300411Sdchagin *            If this occurs a WATCHDOG message is logged in the system event log.
144300411Sdchagin *            In addition, the controller is automatically reset, restoring the
145300411Sdchagin *            network connection. To eliminate the potential for the hang
146300411Sdchagin *            ensure that RxIntDelay is set to 0.
147300411Sdchagin */
148300411Sdchagin#define EM_RDTR                         0
149300411Sdchagin
150300411Sdchagin/*
151300411Sdchagin * RxAbsIntDelay (82540, 82545, and 82546-based adapters only)
152300411Sdchagin * Valid Range: 0-65535 (0=off)
153300411Sdchagin * Default Value: 64
154300411Sdchagin *   This value, in units of 1.024 microseconds, limits the delay in which a
155300411Sdchagin *   receive interrupt is generated. Useful only if RxIntDelay is non-zero,
156300411Sdchagin *   this value ensures that an interrupt is generated after the initial
157300411Sdchagin *   packet is received within the set amount of time.  Proper tuning,
158300411Sdchagin *   along with RxIntDelay, may improve traffic throughput in specific network
159300411Sdchagin *   conditions.
160300411Sdchagin */
161300411Sdchagin#define EM_RADV                         64
162300411Sdchagin
163300411Sdchagin
164300411Sdchagin/*
165300411Sdchagin * This parameter controls the maximum no of times the driver will loop
166281726Strasz * in the isr.
167281726Strasz *           Minimum Value = 1
16814331Speter */
169300411Sdchagin#define EM_MAX_INTR                     3
170300411Sdchagin
17114331Speter/*
172300411Sdchagin * Inform the stack about transmit checksum offload capabilities.
173300411Sdchagin */
1749313Ssos#define EM_CHECKSUM_FEATURES            (CSUM_TCP | CSUM_UDP)
1759313Ssos
1769313Ssos/*
177168014Sjulian * This parameter controls the duration of transmit watchdog timer.
178168014Sjulian */
179177997Skib#define EM_TX_TIMEOUT                   5    /* set to 5 seconds */
180177997Skib
181168014Sjulian/*
182177997Skib * This parameter controls when the driver calls the routine to reclaim
183177997Skib * transmit descriptors.
184177997Skib */
185177997Skib#define EM_TX_CLEANUP_THRESHOLD         EM_MAX_TXD / 8
186177997Skib
187168014Sjulian/*
188168014Sjulian * This parameter controls whether or not autonegotation is enabled.
189168014Sjulian *              0 - Disable autonegotiation
190177997Skib *              1 - Enable  autonegotiation
191168014Sjulian */
192177997Skib#define DO_AUTO_NEG                     1
193168014Sjulian
194168014Sjulian/*
195168014Sjulian * This parameter control whether or not the driver will wait for
196168014Sjulian * autonegotiation to complete.
197168014Sjulian *              1 - Wait for autonegotiation to complete
198300411Sdchagin *              0 - Don't wait for autonegotiation to complete
199168014Sjulian */
200300411Sdchagin#define WAIT_FOR_AUTO_NEG_DEFAULT       1
201300411Sdchagin
202300411Sdchagin
203300411Sdchagin/* Tunables -- End */
204168014Sjulian
205168014Sjulian#define AUTONEG_ADV_DEFAULT             (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
206168014Sjulian                                         ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
207168014Sjulian                                         ADVERTISE_1000_FULL)
208168014Sjulian
209178036Srdivacky#define EM_VENDOR_ID                    0x8086
210168014Sjulian#define EM_MMBA                         0x0010 /* Mem base address */
211168014Sjulian#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
212168014Sjulian
21383366Sjulian#define EM_JUMBO_PBA                    0x00000028
2149313Ssos#define EM_DEFAULT_PBA                  0x00000030
215300411Sdchagin#define EM_SMARTSPEED_DOWNSHIFT         3
216300411Sdchagin#define EM_SMARTSPEED_MAX               15
217300411Sdchagin
218300411Sdchagin
219300411Sdchagin#define MAX_NUM_MULTICAST_ADDRESSES     128
220300411Sdchagin#define PCI_ANY_ID                      (~0U)
221300411Sdchagin#define ETHER_ALIGN                     2
2229313Ssos
2239313Ssos/* Defines for printing debug information */
22472543Sjlemon#define DEBUG_INIT  0
22572543Sjlemon#define DEBUG_IOCTL 0
22683221Smarcel#define DEBUG_HW    0
2279313Ssos
228300411Sdchagin#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
229300411Sdchagin#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
230300411Sdchagin#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
231300411Sdchagin#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
232300411Sdchagin#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
2339313Ssos#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
2349313Ssos#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
235283415Sdchagin#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
23614331Speter#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
23783366Sjulian
23814331Speter
23914331Speter/* Supported RX Buffer Sizes */
24014331Speter#define EM_RXBUFFER_2048        2048
24114331Speter#define EM_RXBUFFER_4096        4096
24214331Speter#define EM_RXBUFFER_8192        8192
24314331Speter#define EM_RXBUFFER_16384      16384
24472543Sjlemon
24572543Sjlemon#ifdef __alpha__
24672543Sjlemon	#undef vtophys
24714331Speter	#define vtophys(va)     alpha_XXX_dmamap((vm_offset_t)(va))
24814331Speter#endif /* __alpha__ */
24914331Speter
25014331Speter/* ******************************************************************************
25114331Speter * vendor_info_array
25214331Speter *
25314331Speter * This array contains the list of Subvendor/Subdevice IDs on which the driver
254225617Skmacy * should load.
255300411Sdchagin *
25614331Speter * ******************************************************************************/
257111797Sdestypedef struct _em_vendor_info_t {
258300411Sdchagin	unsigned int vendor_id;
25914331Speter	unsigned int device_id;
26083366Sjulian	unsigned int subvendor_id;
261300411Sdchagin	unsigned int subdevice_id;
26214331Speter	unsigned int index;
263283415Sdchagin} em_vendor_info_t;
26414331Speter
26583221Smarcel
26683221Smarcelstruct em_buffer {
26783221Smarcel	struct mbuf    *m_head;
268315376Sdchagin};
269315376Sdchagin
270315376Sdchagin
271315376Sdchagintypedef enum _XSUM_CONTEXT_T {
272315376Sdchagin	OFFLOAD_NONE,
273315376Sdchagin	OFFLOAD_TCP_IP,
274315376Sdchagin	OFFLOAD_UDP_IP
27583221Smarcel} XSUM_CONTEXT_T;
27683221Smarcel
277315376Sdchagin/* Our adapter structure */
278315376Sdchaginstruct adapter {
279315376Sdchagin	struct arpcom   interface_data;
280315376Sdchagin	struct adapter *next;
281315376Sdchagin	struct adapter *prev;
282315376Sdchagin	struct em_hw    hw;
283315376Sdchagin
284315376Sdchagin	/* FreeBSD operating-system-specific structures */
285315376Sdchagin	struct em_osdep osdep;
286315376Sdchagin	struct device   *dev;
287315376Sdchagin	struct resource *res_memory;
288315376Sdchagin	struct resource *res_ioport;
289315376Sdchagin	struct resource *res_interrupt;
290315376Sdchagin	void            *int_handler_tag;
291315376Sdchagin	struct ifmedia  media;
292315376Sdchagin	struct callout_handle timer_handle;
293315376Sdchagin	struct callout_handle tx_fifo_timer_handle;
294315376Sdchagin	int             io_rid;
295315376Sdchagin	u_int8_t        unit;
296315376Sdchagin
297315376Sdchagin	/* Info about the board itself */
29883221Smarcel	u_int32_t       part_num;
299179651Srdivacky	u_int8_t        link_active;
30083221Smarcel	u_int16_t       link_speed;
30183221Smarcel	u_int16_t       link_duplex;
30283221Smarcel	u_int32_t       smartspeed;
30383221Smarcel	u_int32_t       tx_int_delay;
30483221Smarcel	u_int32_t       tx_abs_int_delay;
30583221Smarcel	u_int32_t       rx_int_delay;
30683221Smarcel	u_int32_t       rx_abs_int_delay;
30783221Smarcel
30883221Smarcel	XSUM_CONTEXT_T  active_checksum_context;
30983221Smarcel
31083221Smarcel	/*
31183221Smarcel         * Transmit definitions
31283221Smarcel         *
313182892Srdivacky         * We have an array of num_tx_desc descriptors (handled
314182892Srdivacky         * by the controller) paired with an array of tx_buffers
315182892Srdivacky         * (at tx_buffer_area).
316182892Srdivacky         * The index of the next available descriptor is next_avail_tx_desc.
317182892Srdivacky         * The number of remaining tx_desc is num_tx_desc_avail.
318298482Spfg         */
31983221Smarcel        struct em_tx_desc *tx_desc_base;
320182892Srdivacky        u_int32_t          next_avail_tx_desc;
321298482Spfg	u_int32_t          oldest_used_tx_desc;
322182892Srdivacky        volatile u_int16_t num_tx_desc_avail;
323182892Srdivacky        u_int16_t          num_tx_desc;
32483221Smarcel        u_int32_t          txd_cmd;
32583221Smarcel        struct em_buffer   *tx_buffer_area;
326315376Sdchagin
327315376Sdchagin	/*
328315376Sdchagin	 * Receive definitions
329315376Sdchagin         *
330315376Sdchagin         * we have an array of num_rx_desc rx_desc (handled by the
331315376Sdchagin         * controller), and paired with an array of rx_buffers
332315376Sdchagin         * (at rx_buffer_area).
333315376Sdchagin         * The next pair to check on receive is at offset next_rx_desc_to_check
334315376Sdchagin         */
335315376Sdchagin        struct em_rx_desc *rx_desc_base;
336315376Sdchagin        u_int32_t          next_rx_desc_to_check;
337315376Sdchagin        u_int16_t          num_rx_desc;
33814331Speter        u_int32_t          rx_buffer_len;
339111798Sdes        struct em_buffer   *rx_buffer_area;
34083221Smarcel
34183221Smarcel	/* Jumbo frame */
34283221Smarcel	struct mbuf        *fmp;
343315376Sdchagin	struct mbuf        *lmp;
344182892Srdivacky
345315376Sdchagin	u_int16_t          tx_fifo_head;
346182892Srdivacky
347315376Sdchagin	/* Misc stats maintained by the driver */
348315376Sdchagin	unsigned long   dropped_pkts;
3499313Ssos	unsigned long   mbuf_alloc_failed;
350315376Sdchagin	unsigned long   mbuf_cluster_failed;
351315376Sdchagin	unsigned long   no_tx_desc_avail1;
352315376Sdchagin	unsigned long   no_tx_desc_avail2;
353315376Sdchagin	u_int64_t       tx_fifo_reset;
354315376Sdchagin	u_int64_t       tx_fifo_wrk;
355315376Sdchagin
356315376Sdchagin#ifdef DBG_STATS
357160276Sjhb	unsigned long   no_pkts_avail;
358315376Sdchagin	unsigned long   clean_tx_interrupts;
359315376Sdchagin
360315376Sdchagin#endif
361315376Sdchagin	struct em_hw_stats stats;
362315376Sdchagin};
36389306Salfred
3649313Ssos#endif                                                  /* _EM_H_DEFINED_ */
365315376Sdchagin