if_em.c revision 173789
1/************************************************************************** 2 3Copyright (c) 2001-2007, Intel Corporation 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30POSSIBILITY OF SUCH DAMAGE. 31 32***************************************************************************/ 33 34/*$FreeBSD: head/sys/dev/em/if_em.c 173789 2007-11-20 22:06:01Z jfv $*/ 35 36#ifdef HAVE_KERNEL_OPTION_HEADERS 37#include "opt_device_polling.h" 38#endif 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/bus.h> 43#include <sys/endian.h> 44#include <sys/kernel.h> 45#include <sys/kthread.h> 46#include <sys/malloc.h> 47#include <sys/mbuf.h> 48#include <sys/module.h> 49#include <sys/rman.h> 50#include <sys/socket.h> 51#include <sys/sockio.h> 52#include <sys/sysctl.h> 53#include <sys/taskqueue.h> 54 55#include <machine/bus.h> 56#include <machine/resource.h> 57 58#include <net/bpf.h> 59#include <net/ethernet.h> 60#include <net/if.h> 61#include <net/if_arp.h> 62#include <net/if_dl.h> 63#include <net/if_media.h> 64 65#include <net/if_types.h> 66#include <net/if_vlan_var.h> 67 68#include <netinet/in_systm.h> 69#include <netinet/in.h> 70#include <netinet/if_ether.h> 71#include <netinet/ip.h> 72#include <netinet/ip6.h> 73#include <netinet/tcp.h> 74#include <netinet/udp.h> 75 76#include <machine/in_cksum.h> 77#include <dev/pci/pcivar.h> 78#include <dev/pci/pcireg.h> 79 80#include "e1000_api.h" 81#include "e1000_82575.h" 82#include "if_em.h" 83 84/********************************************************************* 85 * Set this to one to display debug statistics 86 *********************************************************************/ 87int em_display_debug_stats = 0; 88 89/********************************************************************* 90 * Driver version: 91 *********************************************************************/ 92char em_driver_version[] = "Version - 6.7.3"; 93 94 95/********************************************************************* 96 * PCI Device ID Table 97 * 98 * Used by probe to select devices to load on 99 * Last field stores an index into e1000_strings 100 * Last entry must be all 0s 101 * 102 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 103 *********************************************************************/ 104 105static em_vendor_info_t em_vendor_info_array[] = 106{ 107 /* Intel(R) PRO/1000 Network Connection */ 108 { 0x8086, E1000_DEV_ID_82540EM, PCI_ANY_ID, PCI_ANY_ID, 0}, 109 { 0x8086, E1000_DEV_ID_82540EM_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 110 { 0x8086, E1000_DEV_ID_82540EP, PCI_ANY_ID, PCI_ANY_ID, 0}, 111 { 0x8086, E1000_DEV_ID_82540EP_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 112 { 0x8086, E1000_DEV_ID_82540EP_LP, PCI_ANY_ID, PCI_ANY_ID, 0}, 113 114 { 0x8086, E1000_DEV_ID_82541EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 115 { 0x8086, E1000_DEV_ID_82541ER, PCI_ANY_ID, PCI_ANY_ID, 0}, 116 { 0x8086, E1000_DEV_ID_82541ER_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 117 { 0x8086, E1000_DEV_ID_82541EI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 118 { 0x8086, E1000_DEV_ID_82541GI, PCI_ANY_ID, PCI_ANY_ID, 0}, 119 { 0x8086, E1000_DEV_ID_82541GI_LF, PCI_ANY_ID, PCI_ANY_ID, 0}, 120 { 0x8086, E1000_DEV_ID_82541GI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 121 122 { 0x8086, E1000_DEV_ID_82542, PCI_ANY_ID, PCI_ANY_ID, 0}, 123 124 { 0x8086, E1000_DEV_ID_82543GC_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 125 { 0x8086, E1000_DEV_ID_82543GC_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 126 127 { 0x8086, E1000_DEV_ID_82544EI_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 128 { 0x8086, E1000_DEV_ID_82544EI_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 129 { 0x8086, E1000_DEV_ID_82544GC_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 130 { 0x8086, E1000_DEV_ID_82544GC_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 131 132 { 0x8086, E1000_DEV_ID_82545EM_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 133 { 0x8086, E1000_DEV_ID_82545EM_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 134 { 0x8086, E1000_DEV_ID_82545GM_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 135 { 0x8086, E1000_DEV_ID_82545GM_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 136 { 0x8086, E1000_DEV_ID_82545GM_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 137 138 { 0x8086, E1000_DEV_ID_82546EB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 139 { 0x8086, E1000_DEV_ID_82546EB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 140 { 0x8086, E1000_DEV_ID_82546EB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 141 { 0x8086, E1000_DEV_ID_82546GB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 142 { 0x8086, E1000_DEV_ID_82546GB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 143 { 0x8086, E1000_DEV_ID_82546GB_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 144 { 0x8086, E1000_DEV_ID_82546GB_PCIE, PCI_ANY_ID, PCI_ANY_ID, 0}, 145 { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 146 { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3, 147 PCI_ANY_ID, PCI_ANY_ID, 0}, 148 149 { 0x8086, E1000_DEV_ID_82547EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 150 { 0x8086, E1000_DEV_ID_82547EI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 151 { 0x8086, E1000_DEV_ID_82547GI, PCI_ANY_ID, PCI_ANY_ID, 0}, 152 153 { 0x8086, E1000_DEV_ID_82571EB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 154 { 0x8086, E1000_DEV_ID_82571EB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 155 { 0x8086, E1000_DEV_ID_82571EB_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 156 { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER, 157 PCI_ANY_ID, PCI_ANY_ID, 0}, 158 { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER_LP, 159 PCI_ANY_ID, PCI_ANY_ID, 0}, 160 { 0x8086, E1000_DEV_ID_82571EB_QUAD_FIBER, 161 PCI_ANY_ID, PCI_ANY_ID, 0}, 162 { 0x8086, E1000_DEV_ID_82571PT_QUAD_COPPER, 163 PCI_ANY_ID, PCI_ANY_ID, 0}, 164 { 0x8086, E1000_DEV_ID_82572EI_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 165 { 0x8086, E1000_DEV_ID_82572EI_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 166 { 0x8086, E1000_DEV_ID_82572EI_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 167 { 0x8086, E1000_DEV_ID_82572EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 168 169 { 0x8086, E1000_DEV_ID_82573E, PCI_ANY_ID, PCI_ANY_ID, 0}, 170 { 0x8086, E1000_DEV_ID_82573E_IAMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 171 { 0x8086, E1000_DEV_ID_82573L, PCI_ANY_ID, PCI_ANY_ID, 0}, 172 { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_SPT, 173 PCI_ANY_ID, PCI_ANY_ID, 0}, 174 { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_SPT, 175 PCI_ANY_ID, PCI_ANY_ID, 0}, 176 { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_DPT, 177 PCI_ANY_ID, PCI_ANY_ID, 0}, 178 { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_DPT, 179 PCI_ANY_ID, PCI_ANY_ID, 0}, 180 { 0x8086, E1000_DEV_ID_ICH8_IGP_M_AMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 181 { 0x8086, E1000_DEV_ID_ICH8_IGP_AMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 182 { 0x8086, E1000_DEV_ID_ICH8_IGP_C, PCI_ANY_ID, PCI_ANY_ID, 0}, 183 { 0x8086, E1000_DEV_ID_ICH8_IFE, PCI_ANY_ID, PCI_ANY_ID, 0}, 184 { 0x8086, E1000_DEV_ID_ICH8_IFE_GT, PCI_ANY_ID, PCI_ANY_ID, 0}, 185 { 0x8086, E1000_DEV_ID_ICH8_IFE_G, PCI_ANY_ID, PCI_ANY_ID, 0}, 186 { 0x8086, E1000_DEV_ID_ICH8_IGP_M, PCI_ANY_ID, PCI_ANY_ID, 0}, 187 188 { 0x8086, E1000_DEV_ID_ICH9_IGP_AMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 189 { 0x8086, E1000_DEV_ID_ICH9_IGP_C, PCI_ANY_ID, PCI_ANY_ID, 0}, 190 { 0x8086, E1000_DEV_ID_ICH9_IFE, PCI_ANY_ID, PCI_ANY_ID, 0}, 191 { 0x8086, E1000_DEV_ID_ICH9_IFE_GT, PCI_ANY_ID, PCI_ANY_ID, 0}, 192 { 0x8086, E1000_DEV_ID_ICH9_IFE_G, PCI_ANY_ID, PCI_ANY_ID, 0}, 193 194 { 0x8086, E1000_DEV_ID_82575EB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 195 { 0x8086, E1000_DEV_ID_82575EB_FIBER_SERDES, 196 PCI_ANY_ID, PCI_ANY_ID, 0}, 197 { 0x8086, E1000_DEV_ID_82575GB_QUAD_COPPER, 198 PCI_ANY_ID, PCI_ANY_ID, 0}, 199 /* required last entry */ 200 { 0, 0, 0, 0, 0} 201}; 202 203/********************************************************************* 204 * Table of branding strings for all supported NICs. 205 *********************************************************************/ 206 207static char *em_strings[] = { 208 "Intel(R) PRO/1000 Network Connection" 209}; 210 211/********************************************************************* 212 * Function prototypes 213 *********************************************************************/ 214static int em_probe(device_t); 215static int em_attach(device_t); 216static int em_detach(device_t); 217static int em_shutdown(device_t); 218static int em_suspend(device_t); 219static int em_resume(device_t); 220static void em_start(struct ifnet *); 221static void em_start_locked(struct ifnet *ifp); 222static int em_ioctl(struct ifnet *, u_long, caddr_t); 223static void em_watchdog(struct adapter *); 224static void em_init(void *); 225static void em_init_locked(struct adapter *); 226static void em_stop(void *); 227static void em_media_status(struct ifnet *, struct ifmediareq *); 228static int em_media_change(struct ifnet *); 229static void em_identify_hardware(struct adapter *); 230static int em_allocate_pci_resources(struct adapter *); 231static int em_allocate_intr(struct adapter *); 232static bool em_setup_msix(struct adapter *); 233static void em_free_intr(struct adapter *); 234static void em_free_pci_resources(struct adapter *); 235static void em_local_timer(void *); 236static int em_hardware_init(struct adapter *); 237static void em_setup_interface(device_t, struct adapter *); 238static void em_setup_transmit_structures(struct adapter *); 239static void em_initialize_transmit_unit(struct adapter *); 240static int em_setup_receive_structures(struct adapter *); 241static void em_initialize_receive_unit(struct adapter *); 242static void em_enable_intr(struct adapter *); 243static void em_disable_intr(struct adapter *); 244static void em_free_transmit_structures(struct adapter *); 245static void em_free_receive_structures(struct adapter *); 246static void em_update_stats_counters(struct adapter *); 247static void em_txeof(struct adapter *); 248static void em_tx_purge(struct adapter *); 249static int em_allocate_receive_structures(struct adapter *); 250static int em_allocate_transmit_structures(struct adapter *); 251static int em_rxeof(struct adapter *, int); 252#ifndef __NO_STRICT_ALIGNMENT 253static int em_fixup_rx(struct adapter *); 254#endif 255static void em_receive_checksum(struct adapter *, struct e1000_rx_desc *, 256 struct mbuf *); 257static void em_transmit_checksum_setup(struct adapter *, struct mbuf *, 258 uint32_t *, uint32_t *); 259static boolean_t em_tx_adv_ctx_setup(struct adapter *, struct mbuf *); 260#if __FreeBSD_version >= 700000 261static boolean_t em_tso_setup(struct adapter *, struct mbuf *, uint32_t *, 262 uint32_t *); 263static boolean_t em_tso_adv_setup(struct adapter *, struct mbuf *, uint32_t *); 264#endif /* FreeBSD_version >= 700000 */ 265static void em_set_promisc(struct adapter *); 266static void em_disable_promisc(struct adapter *); 267static void em_set_multi(struct adapter *); 268static void em_print_hw_stats(struct adapter *); 269static void em_update_link_status(struct adapter *); 270static int em_get_buf(struct adapter *, int); 271static void em_enable_hw_vlans(struct adapter *); 272static int em_encap(struct adapter *, struct mbuf **); 273static int em_adv_encap(struct adapter *, struct mbuf **); 274static void em_smartspeed(struct adapter *); 275static int em_82547_fifo_workaround(struct adapter *, int); 276static void em_82547_update_fifo_head(struct adapter *, int); 277static int em_82547_tx_fifo_reset(struct adapter *); 278static void em_82547_move_tail(void *); 279static int em_dma_malloc(struct adapter *, bus_size_t, 280 struct em_dma_alloc *, int); 281static void em_dma_free(struct adapter *, struct em_dma_alloc *); 282static void em_print_debug_info(struct adapter *); 283static void em_print_nvm_info(struct adapter *); 284static int em_is_valid_ether_addr(uint8_t *); 285static int em_sysctl_stats(SYSCTL_HANDLER_ARGS); 286static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS); 287static uint32_t em_fill_descriptors (bus_addr_t address, uint32_t length, 288 PDESC_ARRAY desc_array); 289static int em_sysctl_int_delay(SYSCTL_HANDLER_ARGS); 290static void em_add_int_delay_sysctl(struct adapter *, const char *, 291 const char *, struct em_int_delay_info *, int, int); 292/* Management and WOL Support */ 293static void em_init_manageability(struct adapter *); 294static void em_release_manageability(struct adapter *); 295static void em_get_hw_control(struct adapter *); 296static void em_release_hw_control(struct adapter *); 297static void em_enable_wakeup(device_t); 298 299#ifndef EM_FAST_IRQ 300static void em_intr(void *); 301#ifdef DEVICE_POLLING 302static poll_handler_t em_poll; 303#endif /* POLLING */ 304#else /* FAST IRQ */ 305#if __FreeBSD_version < 700000 306static void em_intr_fast(void *); 307#else 308static int em_intr_fast(void *); 309#endif 310static void em_add_rx_process_limit(struct adapter *, const char *, 311 const char *, int *, int); 312static void em_handle_rxtx(void *context, int pending); 313static void em_handle_link(void *context, int pending); 314#endif /* EM_FAST_IRQ */ 315 316/********************************************************************* 317 * FreeBSD Device Interface Entry Points 318 *********************************************************************/ 319 320static device_method_t em_methods[] = { 321 /* Device interface */ 322 DEVMETHOD(device_probe, em_probe), 323 DEVMETHOD(device_attach, em_attach), 324 DEVMETHOD(device_detach, em_detach), 325 DEVMETHOD(device_shutdown, em_shutdown), 326 DEVMETHOD(device_suspend, em_suspend), 327 DEVMETHOD(device_resume, em_resume), 328 {0, 0} 329}; 330 331static driver_t em_driver = { 332 "em", em_methods, sizeof(struct adapter), 333}; 334 335static devclass_t em_devclass; 336DRIVER_MODULE(em, pci, em_driver, em_devclass, 0, 0); 337MODULE_DEPEND(em, pci, 1, 1, 1); 338MODULE_DEPEND(em, ether, 1, 1, 1); 339 340/********************************************************************* 341 * Tunable default values. 342 *********************************************************************/ 343 344#define EM_TICKS_TO_USECS(ticks) ((1024 * (ticks) + 500) / 1000) 345#define EM_USECS_TO_TICKS(usecs) ((1000 * (usecs) + 512) / 1024) 346#define M_TSO_LEN 66 347 348/* Allow common code without TSO */ 349#ifndef CSUM_TSO 350#define CSUM_TSO 0 351#endif 352 353static int em_tx_int_delay_dflt = EM_TICKS_TO_USECS(EM_TIDV); 354static int em_rx_int_delay_dflt = EM_TICKS_TO_USECS(EM_RDTR); 355static int em_tx_abs_int_delay_dflt = EM_TICKS_TO_USECS(EM_TADV); 356static int em_rx_abs_int_delay_dflt = EM_TICKS_TO_USECS(EM_RADV); 357static int em_rxd = EM_DEFAULT_RXD; 358static int em_txd = EM_DEFAULT_TXD; 359static int em_smart_pwr_down = FALSE; 360 361TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt); 362TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt); 363TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt); 364TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt); 365TUNABLE_INT("hw.em.rxd", &em_rxd); 366TUNABLE_INT("hw.em.txd", &em_txd); 367TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down); 368#ifdef EM_FAST_IRQ 369/* How many packets rxeof tries to clean at a time */ 370static int em_rx_process_limit = 100; 371TUNABLE_INT("hw.em.rx_process_limit", &em_rx_process_limit); 372#endif 373/* Global used in WOL setup with multiport cards */ 374static int global_quad_port_a = 0; 375 376/********************************************************************* 377 * Device identification routine 378 * 379 * em_probe determines if the driver should be loaded on 380 * adapter based on PCI vendor/device id of the adapter. 381 * 382 * return BUS_PROBE_DEFAULT on success, positive on failure 383 *********************************************************************/ 384 385static int 386em_probe(device_t dev) 387{ 388 char adapter_name[60]; 389 uint16_t pci_vendor_id = 0; 390 uint16_t pci_device_id = 0; 391 uint16_t pci_subvendor_id = 0; 392 uint16_t pci_subdevice_id = 0; 393 em_vendor_info_t *ent; 394 395 INIT_DEBUGOUT("em_probe: begin"); 396 397 pci_vendor_id = pci_get_vendor(dev); 398 if (pci_vendor_id != EM_VENDOR_ID) 399 return (ENXIO); 400 401 pci_device_id = pci_get_device(dev); 402 pci_subvendor_id = pci_get_subvendor(dev); 403 pci_subdevice_id = pci_get_subdevice(dev); 404 405 ent = em_vendor_info_array; 406 while (ent->vendor_id != 0) { 407 if ((pci_vendor_id == ent->vendor_id) && 408 (pci_device_id == ent->device_id) && 409 410 ((pci_subvendor_id == ent->subvendor_id) || 411 (ent->subvendor_id == PCI_ANY_ID)) && 412 413 ((pci_subdevice_id == ent->subdevice_id) || 414 (ent->subdevice_id == PCI_ANY_ID))) { 415 sprintf(adapter_name, "%s %s", 416 em_strings[ent->index], 417 em_driver_version); 418 device_set_desc_copy(dev, adapter_name); 419 return (BUS_PROBE_DEFAULT); 420 } 421 ent++; 422 } 423 424 return (ENXIO); 425} 426 427/********************************************************************* 428 * Device initialization routine 429 * 430 * The attach entry point is called when the driver is being loaded. 431 * This routine identifies the type of hardware, allocates all resources 432 * and initializes the hardware. 433 * 434 * return 0 on success, positive on failure 435 *********************************************************************/ 436 437static int 438em_attach(device_t dev) 439{ 440 struct adapter *adapter; 441 int tsize, rsize; 442 int error = 0; 443 u16 eeprom_data, device_id; 444 445 INIT_DEBUGOUT("em_attach: begin"); 446 447 adapter = device_get_softc(dev); 448 adapter->dev = adapter->osdep.dev = dev; 449 EM_CORE_LOCK_INIT(adapter, device_get_nameunit(dev)); 450 EM_TX_LOCK_INIT(adapter, device_get_nameunit(dev)); 451 452 /* SYSCTL stuff */ 453 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 454 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 455 OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0, 456 em_sysctl_debug_info, "I", "Debug Information"); 457 458 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 459 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 460 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0, 461 em_sysctl_stats, "I", "Statistics"); 462 463 callout_init_mtx(&adapter->timer, &adapter->core_mtx, 0); 464 callout_init_mtx(&adapter->tx_fifo_timer, &adapter->tx_mtx, 0); 465 466 /* Determine hardware and mac info */ 467 em_identify_hardware(adapter); 468 469 /* Setup PCI resources */ 470 if (em_allocate_pci_resources(adapter)) { 471 device_printf(dev, "Allocation of PCI resources failed\n"); 472 error = ENXIO; 473 goto err_pci; 474 } 475 476 /* 477 ** For ICH8 and family we need to 478 ** map the flash memory, and this 479 ** must happen after the MAC is 480 ** identified 481 */ 482 if ((adapter->hw.mac.type == e1000_ich8lan) || 483 (adapter->hw.mac.type == e1000_ich9lan)) { 484 int rid = EM_BAR_TYPE_FLASH; 485 adapter->flash_mem = bus_alloc_resource_any(dev, 486 SYS_RES_MEMORY, &rid, RF_ACTIVE); 487 /* This is used in the shared code */ 488 adapter->hw.flash_address = (u8 *)adapter->flash_mem; 489 adapter->osdep.flash_bus_space_tag = 490 rman_get_bustag(adapter->flash_mem); 491 adapter->osdep.flash_bus_space_handle = 492 rman_get_bushandle(adapter->flash_mem); 493 } 494 495 /* Do Shared Code initialization */ 496 if (e1000_setup_init_funcs(&adapter->hw, TRUE)) { 497 device_printf(dev, "Setup of Shared code failed\n"); 498 error = ENXIO; 499 goto err_pci; 500 } 501 502 e1000_get_bus_info(&adapter->hw); 503 504 /* Set up some sysctls for the tunable interrupt delays */ 505 em_add_int_delay_sysctl(adapter, "rx_int_delay", 506 "receive interrupt delay in usecs", &adapter->rx_int_delay, 507 E1000_REGISTER(&adapter->hw, E1000_RDTR), em_rx_int_delay_dflt); 508 em_add_int_delay_sysctl(adapter, "tx_int_delay", 509 "transmit interrupt delay in usecs", &adapter->tx_int_delay, 510 E1000_REGISTER(&adapter->hw, E1000_TIDV), em_tx_int_delay_dflt); 511 if (adapter->hw.mac.type >= e1000_82540) { 512 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay", 513 "receive interrupt delay limit in usecs", 514 &adapter->rx_abs_int_delay, 515 E1000_REGISTER(&adapter->hw, E1000_RADV), 516 em_rx_abs_int_delay_dflt); 517 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay", 518 "transmit interrupt delay limit in usecs", 519 &adapter->tx_abs_int_delay, 520 E1000_REGISTER(&adapter->hw, E1000_TADV), 521 em_tx_abs_int_delay_dflt); 522 } 523 524#ifdef EM_FAST_IRQ 525 /* Sysctls for limiting the amount of work done in the taskqueue */ 526 em_add_rx_process_limit(adapter, "rx_processing_limit", 527 "max number of rx packets to process", &adapter->rx_process_limit, 528 em_rx_process_limit); 529#endif 530 531 /* 532 * Validate number of transmit and receive descriptors. It 533 * must not exceed hardware maximum, and must be multiple 534 * of E1000_DBA_ALIGN. 535 */ 536 if (((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN) != 0 || 537 (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) || 538 (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) || 539 (em_txd < EM_MIN_TXD)) { 540 device_printf(dev, "Using %d TX descriptors instead of %d!\n", 541 EM_DEFAULT_TXD, em_txd); 542 adapter->num_tx_desc = EM_DEFAULT_TXD; 543 } else 544 adapter->num_tx_desc = em_txd; 545 if (((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN) != 0 || 546 (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) || 547 (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) || 548 (em_rxd < EM_MIN_RXD)) { 549 device_printf(dev, "Using %d RX descriptors instead of %d!\n", 550 EM_DEFAULT_RXD, em_rxd); 551 adapter->num_rx_desc = EM_DEFAULT_RXD; 552 } else 553 adapter->num_rx_desc = em_rxd; 554 555 adapter->hw.mac.autoneg = DO_AUTO_NEG; 556 adapter->hw.phy.autoneg_wait_to_complete = FALSE; 557 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; 558 adapter->rx_buffer_len = 2048; 559 560 e1000_init_script_state_82541(&adapter->hw, TRUE); 561 e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE); 562 563 /* Copper options */ 564 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 565 adapter->hw.phy.mdix = AUTO_ALL_MODES; 566 adapter->hw.phy.disable_polarity_correction = FALSE; 567 adapter->hw.phy.ms_type = EM_MASTER_SLAVE; 568 } 569 570 /* 571 * Set the frame limits assuming 572 * standard ethernet sized frames. 573 */ 574 adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHERNET_FCS_SIZE; 575 adapter->min_frame_size = ETH_ZLEN + ETHERNET_FCS_SIZE; 576 577 /* 578 * This controls when hardware reports transmit completion 579 * status. 580 */ 581 adapter->hw.mac.report_tx_early = 1; 582 583 tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc), 584 EM_DBA_ALIGN); 585 586 /* Allocate Transmit Descriptor ring */ 587 if (em_dma_malloc(adapter, tsize, &adapter->txdma, BUS_DMA_NOWAIT)) { 588 device_printf(dev, "Unable to allocate tx_desc memory\n"); 589 error = ENOMEM; 590 goto err_tx_desc; 591 } 592 adapter->tx_desc_base = 593 (struct e1000_tx_desc *)adapter->txdma.dma_vaddr; 594 595 rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc), 596 EM_DBA_ALIGN); 597 598 /* Allocate Receive Descriptor ring */ 599 if (em_dma_malloc(adapter, rsize, &adapter->rxdma, BUS_DMA_NOWAIT)) { 600 device_printf(dev, "Unable to allocate rx_desc memory\n"); 601 error = ENOMEM; 602 goto err_rx_desc; 603 } 604 adapter->rx_desc_base = 605 (struct e1000_rx_desc *)adapter->rxdma.dma_vaddr; 606 607 /* Make sure we have a good EEPROM before we read from it */ 608 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) { 609 /* 610 ** Some PCI-E parts fail the first check due to 611 ** the link being in sleep state, call it again, 612 ** if it fails a second time its a real issue. 613 */ 614 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) { 615 device_printf(dev, 616 "The EEPROM Checksum Is Not Valid\n"); 617 error = EIO; 618 goto err_hw_init; 619 } 620 } 621 622 /* Initialize the hardware */ 623 if (em_hardware_init(adapter)) { 624 device_printf(dev, "Unable to initialize the hardware\n"); 625 error = EIO; 626 goto err_hw_init; 627 } 628 629 /* Copy the permanent MAC address out of the EEPROM */ 630 if (e1000_read_mac_addr(&adapter->hw) < 0) { 631 device_printf(dev, "EEPROM read error while reading MAC" 632 " address\n"); 633 error = EIO; 634 goto err_hw_init; 635 } 636 637 if (!em_is_valid_ether_addr(adapter->hw.mac.addr)) { 638 device_printf(dev, "Invalid MAC address\n"); 639 error = EIO; 640 goto err_hw_init; 641 } 642 643 /* Allocate transmit descriptors and buffers */ 644 if (em_allocate_transmit_structures(adapter)) { 645 device_printf(dev, "Could not setup transmit structures\n"); 646 error = ENOMEM; 647 goto err_tx_struct; 648 } 649 650 /* Allocate receive descriptors and buffers */ 651 if (em_allocate_receive_structures(adapter)) { 652 device_printf(dev, "Could not setup receive structures\n"); 653 error = ENOMEM; 654 goto err_rx_struct; 655 } 656 657 /* Setup OS specific network interface */ 658 em_setup_interface(dev, adapter); 659 660 em_allocate_intr(adapter); 661 662 /* Initialize statistics */ 663 em_update_stats_counters(adapter); 664 665 adapter->hw.mac.get_link_status = 1; 666 em_update_link_status(adapter); 667 668 /* Indicate SOL/IDER usage */ 669 if (e1000_check_reset_block(&adapter->hw)) 670 device_printf(dev, 671 "PHY reset is blocked due to SOL/IDER session.\n"); 672 673 /* Determine if we have to control management hardware */ 674 adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw); 675 676 /* 677 * Setup Wake-on-Lan 678 */ 679 switch (adapter->hw.mac.type) { 680 681 case e1000_82542: 682 case e1000_82543: 683 break; 684 case e1000_82546: 685 case e1000_82546_rev_3: 686 case e1000_82571: 687 case e1000_80003es2lan: 688 if (adapter->hw.bus.func == 1) 689 e1000_read_nvm(&adapter->hw, 690 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 691 else 692 e1000_read_nvm(&adapter->hw, 693 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 694 eeprom_data &= EM_EEPROM_APME; 695 break; 696 default: 697 /* APME bit in EEPROM is mapped to WUC.APME */ 698 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC) & 699 E1000_WUC_APME; 700 break; 701 } 702 if (eeprom_data) 703 adapter->wol = E1000_WUFC_MAG; 704 /* 705 * We have the eeprom settings, now apply the special cases 706 * where the eeprom may be wrong or the board won't support 707 * wake on lan on a particular port 708 */ 709 device_id = pci_get_device(dev); 710 switch (device_id) { 711 case E1000_DEV_ID_82546GB_PCIE: 712 adapter->wol = 0; 713 break; 714 case E1000_DEV_ID_82546EB_FIBER: 715 case E1000_DEV_ID_82546GB_FIBER: 716 case E1000_DEV_ID_82571EB_FIBER: 717 /* Wake events only supported on port A for dual fiber 718 * regardless of eeprom setting */ 719 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) & 720 E1000_STATUS_FUNC_1) 721 adapter->wol = 0; 722 break; 723 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: 724 case E1000_DEV_ID_82571EB_QUAD_COPPER: 725 case E1000_DEV_ID_82571EB_QUAD_FIBER: 726 case E1000_DEV_ID_82571EB_QUAD_COPPER_LP: 727 /* if quad port adapter, disable WoL on all but port A */ 728 if (global_quad_port_a != 0) 729 adapter->wol = 0; 730 /* Reset for multiple quad port adapters */ 731 if (++global_quad_port_a == 4) 732 global_quad_port_a = 0; 733 break; 734 } 735 736 /* Do we need workaround for 82544 PCI-X adapter? */ 737 if (adapter->hw.bus.type == e1000_bus_type_pcix && 738 adapter->hw.mac.type == e1000_82544) 739 adapter->pcix_82544 = TRUE; 740 else 741 adapter->pcix_82544 = FALSE; 742 743 /* Tell the stack that the interface is not active */ 744 adapter->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 745 746 INIT_DEBUGOUT("em_attach: end"); 747 748 return (0); 749 750err_rx_struct: 751 em_free_transmit_structures(adapter); 752err_tx_struct: 753err_hw_init: 754 em_release_hw_control(adapter); 755 e1000_remove_device(&adapter->hw); 756 em_dma_free(adapter, &adapter->rxdma); 757err_rx_desc: 758 em_dma_free(adapter, &adapter->txdma); 759err_tx_desc: 760err_pci: 761 em_free_intr(adapter); 762 em_free_pci_resources(adapter); 763 EM_TX_LOCK_DESTROY(adapter); 764 EM_CORE_LOCK_DESTROY(adapter); 765 766 return (error); 767} 768 769/********************************************************************* 770 * Device removal routine 771 * 772 * The detach entry point is called when the driver is being removed. 773 * This routine stops the adapter and deallocates all the resources 774 * that were allocated for driver operation. 775 * 776 * return 0 on success, positive on failure 777 *********************************************************************/ 778 779static int 780em_detach(device_t dev) 781{ 782 struct adapter *adapter = device_get_softc(dev); 783 struct ifnet *ifp = adapter->ifp; 784 785 INIT_DEBUGOUT("em_detach: begin"); 786 787 /* Make sure VLANS are not using driver */ 788#if __FreeBSD_version >= 700000 789 if (adapter->ifp->if_vlantrunk != NULL) { 790#else 791 if (adapter->ifp->if_nvlans != 0) { 792#endif 793 device_printf(dev,"Vlan in use, detach first\n"); 794 return (EBUSY); 795 } 796 797#ifdef DEVICE_POLLING 798 if (ifp->if_capenable & IFCAP_POLLING) 799 ether_poll_deregister(ifp); 800#endif 801 802 em_disable_intr(adapter); 803 em_free_intr(adapter); 804 EM_CORE_LOCK(adapter); 805 adapter->in_detach = 1; 806 em_stop(adapter); 807 e1000_phy_hw_reset(&adapter->hw); 808 809 em_release_manageability(adapter); 810 811 if (((adapter->hw.mac.type == e1000_82573) || 812 (adapter->hw.mac.type == e1000_ich8lan) || 813 (adapter->hw.mac.type == e1000_ich9lan)) && 814 e1000_check_mng_mode(&adapter->hw)) 815 em_release_hw_control(adapter); 816 817 if (adapter->wol) { 818 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN); 819 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol); 820 em_enable_wakeup(dev); 821 } 822 823 EM_CORE_UNLOCK(adapter); 824 ether_ifdetach(adapter->ifp); 825 826 callout_drain(&adapter->timer); 827 callout_drain(&adapter->tx_fifo_timer); 828 829 em_free_pci_resources(adapter); 830 bus_generic_detach(dev); 831 if_free(ifp); 832 833 e1000_remove_device(&adapter->hw); 834 em_free_transmit_structures(adapter); 835 em_free_receive_structures(adapter); 836 837 /* Free Transmit Descriptor ring */ 838 if (adapter->tx_desc_base) { 839 em_dma_free(adapter, &adapter->txdma); 840 adapter->tx_desc_base = NULL; 841 } 842 843 /* Free Receive Descriptor ring */ 844 if (adapter->rx_desc_base) { 845 em_dma_free(adapter, &adapter->rxdma); 846 adapter->rx_desc_base = NULL; 847 } 848 849 EM_TX_LOCK_DESTROY(adapter); 850 EM_CORE_LOCK_DESTROY(adapter); 851 852 return (0); 853} 854 855/********************************************************************* 856 * 857 * Shutdown entry point 858 * 859 **********************************************************************/ 860 861static int 862em_shutdown(device_t dev) 863{ 864 return em_suspend(dev); 865} 866 867/* 868 * Suspend/resume device methods. 869 */ 870static int 871em_suspend(device_t dev) 872{ 873 struct adapter *adapter = device_get_softc(dev); 874 875 EM_CORE_LOCK(adapter); 876 em_stop(adapter); 877 878 em_release_manageability(adapter); 879 880 if (((adapter->hw.mac.type == e1000_82573) || 881 (adapter->hw.mac.type == e1000_ich8lan) || 882 (adapter->hw.mac.type == e1000_ich9lan)) && 883 e1000_check_mng_mode(&adapter->hw)) 884 em_release_hw_control(adapter); 885 886 if (adapter->wol) { 887 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN); 888 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol); 889 em_enable_wakeup(dev); 890 } 891 892 EM_CORE_UNLOCK(adapter); 893 894 return bus_generic_suspend(dev); 895} 896 897static int 898em_resume(device_t dev) 899{ 900 struct adapter *adapter = device_get_softc(dev); 901 struct ifnet *ifp = adapter->ifp; 902 903 EM_CORE_LOCK(adapter); 904 em_init_locked(adapter); 905 em_init_manageability(adapter); 906 907 if ((ifp->if_flags & IFF_UP) && 908 (ifp->if_drv_flags & IFF_DRV_RUNNING)) 909 em_start_locked(ifp); 910 911 EM_CORE_UNLOCK(adapter); 912 913 return bus_generic_resume(dev); 914} 915 916 917/********************************************************************* 918 * Transmit entry point 919 * 920 * em_start is called by the stack to initiate a transmit. 921 * The driver will remain in this routine as long as there are 922 * packets to transmit and transmit resources are available. 923 * In case resources are not available stack is notified and 924 * the packet is requeued. 925 **********************************************************************/ 926 927static void 928em_start_locked(struct ifnet *ifp) 929{ 930 struct adapter *adapter = ifp->if_softc; 931 struct mbuf *m_head; 932 933 EM_TX_LOCK_ASSERT(adapter); 934 935 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) != 936 IFF_DRV_RUNNING) 937 return; 938 if (!adapter->link_active) 939 return; 940 941 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) { 942 943 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 944 if (m_head == NULL) 945 break; 946 /* 947 * Encapsulation can modify our pointer, and or make it 948 * NULL on failure. In that event, we can't requeue. 949 * 950 * We now use a pointer to accomodate legacy and 951 * advanced transmit functions. 952 */ 953 if (adapter->em_xmit(adapter, &m_head)) { 954 if (m_head == NULL) 955 break; 956 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 957 IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 958 break; 959 } 960 961 /* Send a copy of the frame to the BPF listener */ 962 ETHER_BPF_MTAP(ifp, m_head); 963 964 /* Set timeout in case hardware has problems transmitting. */ 965 adapter->watchdog_timer = EM_TX_TIMEOUT; 966 } 967} 968 969static void 970em_start(struct ifnet *ifp) 971{ 972 struct adapter *adapter = ifp->if_softc; 973 974 EM_TX_LOCK(adapter); 975 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 976 em_start_locked(ifp); 977 EM_TX_UNLOCK(adapter); 978} 979 980/********************************************************************* 981 * Ioctl entry point 982 * 983 * em_ioctl is called when the user wants to configure the 984 * interface. 985 * 986 * return 0 on success, positive on failure 987 **********************************************************************/ 988 989static int 990em_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 991{ 992 struct adapter *adapter = ifp->if_softc; 993 struct ifreq *ifr = (struct ifreq *)data; 994 struct ifaddr *ifa = (struct ifaddr *)data; 995 int error = 0; 996 997 if (adapter->in_detach) 998 return (error); 999 1000 switch (command) { 1001 case SIOCSIFADDR: 1002 if (ifa->ifa_addr->sa_family == AF_INET) { 1003 /* 1004 * XXX 1005 * Since resetting hardware takes a very long time 1006 * and results in link renegotiation we only 1007 * initialize the hardware only when it is absolutely 1008 * required. 1009 */ 1010 ifp->if_flags |= IFF_UP; 1011 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1012 EM_CORE_LOCK(adapter); 1013 em_init_locked(adapter); 1014 EM_CORE_UNLOCK(adapter); 1015 } 1016 arp_ifinit(ifp, ifa); 1017 } else 1018 error = ether_ioctl(ifp, command, data); 1019 break; 1020 case SIOCSIFMTU: 1021 { 1022 int max_frame_size; 1023 uint16_t eeprom_data = 0; 1024 1025 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)"); 1026 1027 EM_CORE_LOCK(adapter); 1028 switch (adapter->hw.mac.type) { 1029 case e1000_82573: 1030 /* 1031 * 82573 only supports jumbo frames 1032 * if ASPM is disabled. 1033 */ 1034 e1000_read_nvm(&adapter->hw, 1035 NVM_INIT_3GIO_3, 1, &eeprom_data); 1036 if (eeprom_data & NVM_WORD1A_ASPM_MASK) { 1037 max_frame_size = ETHER_MAX_LEN; 1038 break; 1039 } 1040 /* Allow Jumbo frames - fall thru */ 1041 case e1000_82571: 1042 case e1000_82572: 1043 case e1000_ich9lan: 1044 case e1000_82575: 1045 case e1000_80003es2lan: /* Limit Jumbo Frame size */ 1046 max_frame_size = 9234; 1047 break; 1048 /* Adapters that do not support jumbo frames */ 1049 case e1000_82542: 1050 case e1000_ich8lan: 1051 max_frame_size = ETHER_MAX_LEN; 1052 break; 1053 default: 1054 max_frame_size = MAX_JUMBO_FRAME_SIZE; 1055 } 1056 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN - 1057 ETHER_CRC_LEN) { 1058 EM_CORE_UNLOCK(adapter); 1059 error = EINVAL; 1060 break; 1061 } 1062 1063 ifp->if_mtu = ifr->ifr_mtu; 1064 adapter->max_frame_size = 1065 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 1066 em_init_locked(adapter); 1067 EM_CORE_UNLOCK(adapter); 1068 break; 1069 } 1070 case SIOCSIFFLAGS: 1071 IOCTL_DEBUGOUT("ioctl rcv'd:\ 1072 SIOCSIFFLAGS (Set Interface Flags)"); 1073 EM_CORE_LOCK(adapter); 1074 if (ifp->if_flags & IFF_UP) { 1075 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1076 if ((ifp->if_flags ^ adapter->if_flags) & 1077 IFF_PROMISC) { 1078 em_disable_promisc(adapter); 1079 em_set_promisc(adapter); 1080 } 1081 } else 1082 em_init_locked(adapter); 1083 } else 1084 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1085 em_stop(adapter); 1086 adapter->if_flags = ifp->if_flags; 1087 EM_CORE_UNLOCK(adapter); 1088 break; 1089 case SIOCADDMULTI: 1090 case SIOCDELMULTI: 1091 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI"); 1092 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1093 EM_CORE_LOCK(adapter); 1094 em_disable_intr(adapter); 1095 em_set_multi(adapter); 1096 if (adapter->hw.mac.type == e1000_82542 && 1097 adapter->hw.revision_id == E1000_REVISION_2) { 1098 em_initialize_receive_unit(adapter); 1099 } 1100#ifdef DEVICE_POLLING 1101 if (!(ifp->if_capenable & IFCAP_POLLING)) 1102#endif 1103 em_enable_intr(adapter); 1104 EM_CORE_UNLOCK(adapter); 1105 } 1106 break; 1107 case SIOCSIFMEDIA: 1108 /* Check SOL/IDER usage */ 1109 EM_CORE_LOCK(adapter); 1110 if (e1000_check_reset_block(&adapter->hw)) { 1111 EM_CORE_UNLOCK(adapter); 1112 device_printf(adapter->dev, "Media change is" 1113 " blocked due to SOL/IDER session.\n"); 1114 break; 1115 } 1116 EM_CORE_UNLOCK(adapter); 1117 case SIOCGIFMEDIA: 1118 IOCTL_DEBUGOUT("ioctl rcv'd: \ 1119 SIOCxIFMEDIA (Get/Set Interface Media)"); 1120 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 1121 break; 1122 case SIOCSIFCAP: 1123 { 1124 int mask, reinit; 1125 1126 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)"); 1127 reinit = 0; 1128 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1129#ifdef DEVICE_POLLING 1130 if (mask & IFCAP_POLLING) { 1131 if (ifr->ifr_reqcap & IFCAP_POLLING) { 1132 error = ether_poll_register(em_poll, ifp); 1133 if (error) 1134 return (error); 1135 EM_CORE_LOCK(adapter); 1136 em_disable_intr(adapter); 1137 ifp->if_capenable |= IFCAP_POLLING; 1138 EM_CORE_UNLOCK(adapter); 1139 } else { 1140 error = ether_poll_deregister(ifp); 1141 /* Enable interrupt even in error case */ 1142 EM_CORE_LOCK(adapter); 1143 em_enable_intr(adapter); 1144 ifp->if_capenable &= ~IFCAP_POLLING; 1145 EM_CORE_UNLOCK(adapter); 1146 } 1147 } 1148#endif 1149 if (mask & IFCAP_HWCSUM) { 1150 ifp->if_capenable ^= IFCAP_HWCSUM; 1151 reinit = 1; 1152 } 1153#if __FreeBSD_version >= 700000 1154 if (mask & IFCAP_TSO4) { 1155 ifp->if_capenable ^= IFCAP_TSO4; 1156 reinit = 1; 1157 } 1158#endif 1159 if (mask & IFCAP_VLAN_HWTAGGING) { 1160 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 1161 reinit = 1; 1162 } 1163 if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1164 em_init(adapter); 1165#if __FreeBSD_version >= 700000 1166 VLAN_CAPABILITIES(ifp); 1167#endif 1168 break; 1169 } 1170 default: 1171 error = ether_ioctl(ifp, command, data); 1172 break; 1173 } 1174 1175 return (error); 1176} 1177 1178/********************************************************************* 1179 * Watchdog timer: 1180 * 1181 * This routine is called from the local timer every second. 1182 * As long as transmit descriptors are being cleaned the value 1183 * is non-zero and we do nothing. Reaching 0 indicates a tx hang 1184 * and we then reset the device. 1185 * 1186 **********************************************************************/ 1187 1188static void 1189em_watchdog(struct adapter *adapter) 1190{ 1191 1192 EM_CORE_LOCK_ASSERT(adapter); 1193 1194 /* 1195 ** The timer is set to 5 every time start queues a packet. 1196 ** Then txeof keeps resetting it as long as it cleans at 1197 ** least one descriptor. 1198 ** Finally, anytime all descriptors are clean the timer is 1199 ** set to 0. 1200 */ 1201 if ((adapter->watchdog_timer == 0) || (--adapter->watchdog_timer)) 1202 return; 1203 1204 /* If we are in this routine because of pause frames, then 1205 * don't reset the hardware. 1206 */ 1207 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) & 1208 E1000_STATUS_TXOFF) { 1209 adapter->watchdog_timer = EM_TX_TIMEOUT; 1210 return; 1211 } 1212 1213 if (e1000_check_for_link(&adapter->hw) == 0) 1214 device_printf(adapter->dev, "watchdog timeout -- resetting\n"); 1215 adapter->ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1216 adapter->watchdog_events++; 1217 1218 em_init_locked(adapter); 1219} 1220 1221/********************************************************************* 1222 * Init entry point 1223 * 1224 * This routine is used in two ways. It is used by the stack as 1225 * init entry point in network interface structure. It is also used 1226 * by the driver as a hw/sw initialization routine to get to a 1227 * consistent state. 1228 * 1229 * return 0 on success, positive on failure 1230 **********************************************************************/ 1231 1232static void 1233em_init_locked(struct adapter *adapter) 1234{ 1235 struct ifnet *ifp = adapter->ifp; 1236 device_t dev = adapter->dev; 1237 uint32_t pba; 1238 1239 INIT_DEBUGOUT("em_init: begin"); 1240 1241 EM_CORE_LOCK_ASSERT(adapter); 1242 1243 em_stop(adapter); 1244 1245 /* 1246 * Packet Buffer Allocation (PBA) 1247 * Writing PBA sets the receive portion of the buffer 1248 * the remainder is used for the transmit buffer. 1249 * 1250 * Devices before the 82547 had a Packet Buffer of 64K. 1251 * Default allocation: PBA=48K for Rx, leaving 16K for Tx. 1252 * After the 82547 the buffer was reduced to 40K. 1253 * Default allocation: PBA=30K for Rx, leaving 10K for Tx. 1254 * Note: default does not leave enough room for Jumbo Frame >10k. 1255 */ 1256 switch (adapter->hw.mac.type) { 1257 case e1000_82547: 1258 case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */ 1259 if (adapter->max_frame_size > 8192) 1260 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */ 1261 else 1262 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */ 1263 adapter->tx_fifo_head = 0; 1264 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT; 1265 adapter->tx_fifo_size = 1266 (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT; 1267 break; 1268 /* Total Packet Buffer on these is 48K */ 1269 case e1000_82571: 1270 case e1000_82572: 1271 case e1000_82575: 1272 case e1000_80003es2lan: 1273 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */ 1274 break; 1275 case e1000_82573: /* 82573: Total Packet Buffer is 32K */ 1276 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */ 1277 break; 1278 case e1000_ich9lan: 1279#define E1000_PBA_10K 0x000A 1280 pba = E1000_PBA_10K; 1281 break; 1282 case e1000_ich8lan: 1283 pba = E1000_PBA_8K; 1284 break; 1285 default: 1286 /* Devices before 82547 had a Packet Buffer of 64K. */ 1287 if (adapter->max_frame_size > 8192) 1288 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */ 1289 else 1290 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */ 1291 } 1292 1293 INIT_DEBUGOUT1("em_init: pba=%dK",pba); 1294 E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba); 1295 1296 /* Get the latest mac address, User can use a LAA */ 1297 bcopy(IF_LLADDR(adapter->ifp), adapter->hw.mac.addr, 1298 ETHER_ADDR_LEN); 1299 1300 /* Put the address into the Receive Address Array */ 1301 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 1302 1303 /* 1304 * With the 82571 adapter, RAR[0] may be overwritten 1305 * when the other port is reset, we make a duplicate 1306 * in RAR[14] for that eventuality, this assures 1307 * the interface continues to function. 1308 */ 1309 if (adapter->hw.mac.type == e1000_82571) { 1310 e1000_set_laa_state_82571(&adapter->hw, TRUE); 1311 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 1312 E1000_RAR_ENTRIES - 1); 1313 } 1314 1315 /* Initialize the hardware */ 1316 if (em_hardware_init(adapter)) { 1317 device_printf(dev, "Unable to initialize the hardware\n"); 1318 return; 1319 } 1320 em_update_link_status(adapter); 1321 1322 /* Setup VLAN support, basic and offload if available */ 1323 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN); 1324 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) 1325 em_enable_hw_vlans(adapter); 1326 1327 /* Set hardware offload abilities */ 1328 ifp->if_hwassist = 0; 1329 if (adapter->hw.mac.type >= e1000_82543) { 1330 if (ifp->if_capenable & IFCAP_TXCSUM) 1331 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP); 1332#if __FreeBSD_version >= 700000 1333 if (ifp->if_capenable & IFCAP_TSO4) 1334 ifp->if_hwassist |= CSUM_TSO; 1335#endif 1336 } 1337 1338 /* Configure for OS presence */ 1339 em_init_manageability(adapter); 1340 1341 /* Prepare transmit descriptors and buffers */ 1342 em_setup_transmit_structures(adapter); 1343 em_initialize_transmit_unit(adapter); 1344 1345 /* Setup Multicast table */ 1346 em_set_multi(adapter); 1347 1348 /* Prepare receive descriptors and buffers */ 1349 if (em_setup_receive_structures(adapter)) { 1350 device_printf(dev, "Could not setup receive structures\n"); 1351 em_stop(adapter); 1352 return; 1353 } 1354 em_initialize_receive_unit(adapter); 1355 1356 /* Don't lose promiscuous settings */ 1357 em_set_promisc(adapter); 1358 1359 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1360 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1361 1362 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1363 e1000_clear_hw_cntrs_base_generic(&adapter->hw); 1364 1365#ifdef DEVICE_POLLING 1366 /* 1367 * Only enable interrupts if we are not polling, make sure 1368 * they are off otherwise. 1369 */ 1370 if (ifp->if_capenable & IFCAP_POLLING) 1371 em_disable_intr(adapter); 1372 else 1373#endif /* DEVICE_POLLING */ 1374 em_enable_intr(adapter); 1375 1376 /* Don't reset the phy next time init gets called */ 1377 adapter->hw.phy.reset_disable = TRUE; 1378} 1379 1380static void 1381em_init(void *arg) 1382{ 1383 struct adapter *adapter = arg; 1384 1385 EM_CORE_LOCK(adapter); 1386 em_init_locked(adapter); 1387 EM_CORE_UNLOCK(adapter); 1388} 1389 1390 1391#ifdef DEVICE_POLLING 1392/********************************************************************* 1393 * 1394 * Legacy polling routine 1395 * 1396 *********************************************************************/ 1397static void 1398em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1399{ 1400 struct adapter *adapter = ifp->if_softc; 1401 uint32_t reg_icr; 1402 1403 EM_CORE_LOCK(adapter); 1404 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1405 EM_CORE_UNLOCK(adapter); 1406 return; 1407 } 1408 1409 if (cmd == POLL_AND_CHECK_STATUS) { 1410 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); 1411 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1412 callout_stop(&adapter->timer); 1413 adapter->hw.mac.get_link_status = 1; 1414 e1000_check_for_link(&adapter->hw); 1415 em_update_link_status(adapter); 1416 callout_reset(&adapter->timer, hz, 1417 em_local_timer, adapter); 1418 } 1419 } 1420 em_rxeof(adapter, count); 1421 EM_CORE_UNLOCK(adapter); 1422 1423 EM_TX_LOCK(adapter); 1424 em_txeof(adapter); 1425 1426 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1427 em_start_locked(ifp); 1428 EM_TX_UNLOCK(adapter); 1429} 1430#endif /* DEVICE_POLLING */ 1431 1432#ifndef EM_FAST_IRQ 1433/********************************************************************* 1434 * 1435 * Legacy Interrupt Service routine 1436 * 1437 *********************************************************************/ 1438 1439static void 1440em_intr(void *arg) 1441{ 1442 struct adapter *adapter = arg; 1443 struct ifnet *ifp; 1444 uint32_t reg_icr; 1445 1446 EM_CORE_LOCK(adapter); 1447 ifp = adapter->ifp; 1448 1449 if (ifp->if_capenable & IFCAP_POLLING) { 1450 EM_CORE_UNLOCK(adapter); 1451 return; 1452 } 1453 1454 for (;;) { 1455 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); 1456 1457 if (adapter->hw.mac.type >= e1000_82571 && 1458 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) 1459 break; 1460 else if (reg_icr == 0) 1461 break; 1462 1463 /* 1464 * XXX: some laptops trigger several spurious interrupts 1465 * on em(4) when in the resume cycle. The ICR register 1466 * reports all-ones value in this case. Processing such 1467 * interrupts would lead to a freeze. I don't know why. 1468 */ 1469 if (reg_icr == 0xffffffff) 1470 break; 1471 1472 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1473 em_rxeof(adapter, -1); 1474 EM_TX_LOCK(adapter); 1475 em_txeof(adapter); 1476 EM_TX_UNLOCK(adapter); 1477 } 1478 1479 /* Link status change */ 1480 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1481 callout_stop(&adapter->timer); 1482 adapter->hw.mac.get_link_status = 1; 1483 e1000_check_for_link(&adapter->hw); 1484 em_update_link_status(adapter); 1485 /* Deal with TX cruft when link lost */ 1486 em_tx_purge(adapter); 1487 callout_reset(&adapter->timer, hz, 1488 em_local_timer, adapter); 1489 } 1490 1491 if (reg_icr & E1000_ICR_RXO) 1492 adapter->rx_overruns++; 1493 } 1494 EM_CORE_UNLOCK(adapter); 1495 1496 if (ifp->if_drv_flags & IFF_DRV_RUNNING && 1497 !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1498 em_start(ifp); 1499} 1500 1501#else /* EM_FAST_IRQ, then fast interrupt routines only */ 1502 1503static void 1504em_handle_link(void *context, int pending) 1505{ 1506 struct adapter *adapter = context; 1507 struct ifnet *ifp; 1508 1509 ifp = adapter->ifp; 1510 1511 EM_CORE_LOCK(adapter); 1512 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1513 EM_CORE_UNLOCK(adapter); 1514 return; 1515 } 1516 1517 callout_stop(&adapter->timer); 1518 adapter->hw.mac.get_link_status = 1; 1519 e1000_check_for_link(&adapter->hw); 1520 em_update_link_status(adapter); 1521 /* Deal with TX cruft when link lost */ 1522 em_tx_purge(adapter); 1523 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1524 EM_CORE_UNLOCK(adapter); 1525} 1526 1527#if __FreeBSD_version >= 700000 1528#if !defined(NET_LOCK_GIANT) 1529#define NET_LOCK_GIANT() 1530#define NET_UNLOCK_GIANT() 1531#endif 1532#endif 1533 1534static void 1535em_handle_rxtx(void *context, int pending) 1536{ 1537 struct adapter *adapter = context; 1538 struct ifnet *ifp; 1539 1540 NET_LOCK_GIANT(); 1541 ifp = adapter->ifp; 1542 1543 /* 1544 * TODO: 1545 * It should be possible to run the tx clean loop without the lock. 1546 */ 1547 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1548 if (em_rxeof(adapter, adapter->rx_process_limit) != 0) 1549 taskqueue_enqueue(adapter->tq, &adapter->rxtx_task); 1550 EM_TX_LOCK(adapter); 1551 em_txeof(adapter); 1552 1553 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1554 em_start_locked(ifp); 1555 EM_TX_UNLOCK(adapter); 1556 } 1557 1558 em_enable_intr(adapter); 1559 NET_UNLOCK_GIANT(); 1560} 1561 1562/********************************************************************* 1563 * 1564 * Fast Interrupt Service routine 1565 * 1566 *********************************************************************/ 1567#if __FreeBSD_version < 700000 1568#define FILTER_STRAY 1569#define FILTER_HANDLED 1570static void 1571#else 1572static int 1573#endif 1574em_intr_fast(void *arg) 1575{ 1576 struct adapter *adapter = arg; 1577 struct ifnet *ifp; 1578 uint32_t reg_icr; 1579 1580 ifp = adapter->ifp; 1581 1582 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); 1583 1584 /* Hot eject? */ 1585 if (reg_icr == 0xffffffff) 1586 return FILTER_STRAY; 1587 1588 /* Definitely not our interrupt. */ 1589 if (reg_icr == 0x0) 1590 return FILTER_STRAY; 1591 1592 /* 1593 * Starting with the 82571 chip, bit 31 should be used to 1594 * determine whether the interrupt belongs to us. 1595 */ 1596 if (adapter->hw.mac.type >= e1000_82571 && 1597 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) 1598 return FILTER_STRAY; 1599 1600 /* 1601 * Mask interrupts until the taskqueue is finished running. This is 1602 * cheap, just assume that it is needed. This also works around the 1603 * MSI message reordering errata on certain systems. 1604 */ 1605 em_disable_intr(adapter); 1606 taskqueue_enqueue(adapter->tq, &adapter->rxtx_task); 1607 1608 /* Link status change */ 1609 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) 1610 taskqueue_enqueue(taskqueue_fast, &adapter->link_task); 1611 1612 if (reg_icr & E1000_ICR_RXO) 1613 adapter->rx_overruns++; 1614 return FILTER_HANDLED; 1615} 1616#endif /* EM_FAST_IRQ */ 1617 1618/********************************************************************* 1619 * 1620 * Media Ioctl callback 1621 * 1622 * This routine is called whenever the user queries the status of 1623 * the interface using ifconfig. 1624 * 1625 **********************************************************************/ 1626static void 1627em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1628{ 1629 struct adapter *adapter = ifp->if_softc; 1630 u_char fiber_type = IFM_1000_SX; 1631 1632 INIT_DEBUGOUT("em_media_status: begin"); 1633 1634 EM_CORE_LOCK(adapter); 1635 e1000_check_for_link(&adapter->hw); 1636 em_update_link_status(adapter); 1637 1638 ifmr->ifm_status = IFM_AVALID; 1639 ifmr->ifm_active = IFM_ETHER; 1640 1641 if (!adapter->link_active) { 1642 EM_CORE_UNLOCK(adapter); 1643 return; 1644 } 1645 1646 ifmr->ifm_status |= IFM_ACTIVE; 1647 1648 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) || 1649 (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) { 1650 if (adapter->hw.mac.type == e1000_82545) 1651 fiber_type = IFM_1000_LX; 1652 ifmr->ifm_active |= fiber_type | IFM_FDX; 1653 } else { 1654 switch (adapter->link_speed) { 1655 case 10: 1656 ifmr->ifm_active |= IFM_10_T; 1657 break; 1658 case 100: 1659 ifmr->ifm_active |= IFM_100_TX; 1660 break; 1661 case 1000: 1662 ifmr->ifm_active |= IFM_1000_T; 1663 break; 1664 } 1665 if (adapter->link_duplex == FULL_DUPLEX) 1666 ifmr->ifm_active |= IFM_FDX; 1667 else 1668 ifmr->ifm_active |= IFM_HDX; 1669 } 1670 EM_CORE_UNLOCK(adapter); 1671} 1672 1673/********************************************************************* 1674 * 1675 * Media Ioctl callback 1676 * 1677 * This routine is called when the user changes speed/duplex using 1678 * media/mediopt option with ifconfig. 1679 * 1680 **********************************************************************/ 1681static int 1682em_media_change(struct ifnet *ifp) 1683{ 1684 struct adapter *adapter = ifp->if_softc; 1685 struct ifmedia *ifm = &adapter->media; 1686 1687 INIT_DEBUGOUT("em_media_change: begin"); 1688 1689 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1690 return (EINVAL); 1691 1692 EM_CORE_LOCK(adapter); 1693 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1694 case IFM_AUTO: 1695 adapter->hw.mac.autoneg = DO_AUTO_NEG; 1696 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; 1697 break; 1698 case IFM_1000_LX: 1699 case IFM_1000_SX: 1700 case IFM_1000_T: 1701 adapter->hw.mac.autoneg = DO_AUTO_NEG; 1702 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL; 1703 break; 1704 case IFM_100_TX: 1705 adapter->hw.mac.autoneg = FALSE; 1706 adapter->hw.phy.autoneg_advertised = 0; 1707 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1708 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL; 1709 else 1710 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF; 1711 break; 1712 case IFM_10_T: 1713 adapter->hw.mac.autoneg = FALSE; 1714 adapter->hw.phy.autoneg_advertised = 0; 1715 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1716 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL; 1717 else 1718 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF; 1719 break; 1720 default: 1721 device_printf(adapter->dev, "Unsupported media type\n"); 1722 } 1723 1724 /* As the speed/duplex settings my have changed we need to 1725 * reset the PHY. 1726 */ 1727 adapter->hw.phy.reset_disable = FALSE; 1728 1729 em_init_locked(adapter); 1730 EM_CORE_UNLOCK(adapter); 1731 1732 return (0); 1733} 1734 1735/********************************************************************* 1736 * 1737 * This routine maps the mbufs to tx descriptors. 1738 * 1739 * return 0 on success, positive on failure 1740 **********************************************************************/ 1741 1742static int 1743em_encap(struct adapter *adapter, struct mbuf **m_headp) 1744{ 1745 bus_dma_segment_t segs[EM_MAX_SCATTER]; 1746 bus_dmamap_t map; 1747 struct em_buffer *tx_buffer, *tx_buffer_mapped; 1748 struct e1000_tx_desc *ctxd = NULL; 1749 struct mbuf *m_head; 1750 uint32_t txd_upper, txd_lower, txd_used, txd_saved; 1751 int nsegs, i, j, first, last = 0; 1752 int error, do_tso, tso_desc = 0; 1753#if __FreeBSD_version < 700000 1754 struct m_tag *mtag; 1755#endif 1756 m_head = *m_headp; 1757 txd_upper = txd_lower = txd_used = txd_saved = 0; 1758 1759#if __FreeBSD_version >= 700000 1760 do_tso = ((m_head->m_pkthdr.csum_flags & CSUM_TSO) != 0); 1761#else 1762 do_tso = 0; 1763#endif 1764 1765 /* 1766 * Force a cleanup if number of TX descriptors 1767 * available hits the threshold 1768 */ 1769 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) { 1770 em_txeof(adapter); 1771 /* Now do we at least have a minimal? */ 1772 if (adapter->num_tx_desc_avail <= EM_TX_OP_THRESHOLD) { 1773 adapter->no_tx_desc_avail1++; 1774 return (ENOBUFS); 1775 } 1776 } 1777 1778 1779 /* 1780 * TSO workaround: 1781 * If an mbuf is only header we need 1782 * to pull 4 bytes of data into it. 1783 */ 1784 if (do_tso && (m_head->m_len <= M_TSO_LEN)) { 1785 m_head = m_pullup(m_head, M_TSO_LEN + 4); 1786 *m_headp = m_head; 1787 if (m_head == NULL) 1788 return (ENOBUFS); 1789 } 1790 1791 /* 1792 * Map the packet for DMA 1793 * 1794 * Capture the first descriptor index, 1795 * this descriptor will have the index 1796 * of the EOP which is the only one that 1797 * now gets a DONE bit writeback. 1798 */ 1799 first = adapter->next_avail_tx_desc; 1800 tx_buffer = &adapter->tx_buffer_area[first]; 1801 tx_buffer_mapped = tx_buffer; 1802 map = tx_buffer->map; 1803 1804 error = bus_dmamap_load_mbuf_sg(adapter->txtag, map, 1805 *m_headp, segs, &nsegs, BUS_DMA_NOWAIT); 1806 1807 /* 1808 * There are two types of errors we can (try) to handle: 1809 * - EFBIG means the mbuf chain was too long and bus_dma ran 1810 * out of segments. Defragment the mbuf chain and try again. 1811 * - ENOMEM means bus_dma could not obtain enough bounce buffers 1812 * at this point in time. Defer sending and try again later. 1813 * All other errors, in particular EINVAL, are fatal and prevent the 1814 * mbuf chain from ever going through. Drop it and report error. 1815 */ 1816 if (error == EFBIG) { 1817 struct mbuf *m; 1818 1819 m = m_defrag(*m_headp, M_DONTWAIT); 1820 if (m == NULL) { 1821 adapter->mbuf_alloc_failed++; 1822 m_freem(*m_headp); 1823 *m_headp = NULL; 1824 return (ENOBUFS); 1825 } 1826 *m_headp = m; 1827 1828 /* Try it again */ 1829 error = bus_dmamap_load_mbuf_sg(adapter->txtag, map, 1830 *m_headp, segs, &nsegs, BUS_DMA_NOWAIT); 1831 1832 if (error == ENOMEM) { 1833 adapter->no_tx_dma_setup++; 1834 return (error); 1835 } else if (error != 0) { 1836 adapter->no_tx_dma_setup++; 1837 m_freem(*m_headp); 1838 *m_headp = NULL; 1839 return (error); 1840 } 1841 } else if (error == ENOMEM) { 1842 adapter->no_tx_dma_setup++; 1843 return (error); 1844 } else if (error != 0) { 1845 adapter->no_tx_dma_setup++; 1846 m_freem(*m_headp); 1847 *m_headp = NULL; 1848 return (error); 1849 } 1850 1851 /* 1852 * TSO Hardware workaround, if this packet is not 1853 * TSO, and is only a single descriptor long, and 1854 * it follows a TSO burst, then we need to add a 1855 * sentinel descriptor to prevent premature writeback. 1856 */ 1857 if ((do_tso == 0) && (adapter->tx_tso == TRUE)) { 1858 if (nsegs == 1) 1859 tso_desc = TRUE; 1860 adapter->tx_tso = FALSE; 1861 } 1862 1863 if (nsegs > (adapter->num_tx_desc_avail - 2)) { 1864 adapter->no_tx_desc_avail2++; 1865 bus_dmamap_unload(adapter->txtag, map); 1866 return (ENOBUFS); 1867 } 1868 m_head = *m_headp; 1869 1870 /* Do hardware assists */ 1871#if __FreeBSD_version >= 700000 1872 if (m_head->m_pkthdr.csum_flags & CSUM_TSO) { 1873 error = em_tso_setup(adapter, m_head, &txd_upper, &txd_lower); 1874 if (error != TRUE) 1875 return (ENXIO); /* something foobar */ 1876 /* we need to make a final sentinel transmit desc */ 1877 tso_desc = TRUE; 1878 } else 1879#endif 1880 if (m_head->m_pkthdr.csum_flags & CSUM_OFFLOAD) 1881 em_transmit_checksum_setup(adapter, m_head, 1882 &txd_upper, &txd_lower); 1883 1884 i = adapter->next_avail_tx_desc; 1885 if (adapter->pcix_82544) 1886 txd_saved = i; 1887 1888 /* Set up our transmit descriptors */ 1889 for (j = 0; j < nsegs; j++) { 1890 bus_size_t seg_len; 1891 bus_addr_t seg_addr; 1892 /* If adapter is 82544 and on PCIX bus */ 1893 if(adapter->pcix_82544) { 1894 DESC_ARRAY desc_array; 1895 uint32_t array_elements, counter; 1896 /* 1897 * Check the Address and Length combination and 1898 * split the data accordingly 1899 */ 1900 array_elements = em_fill_descriptors(segs[j].ds_addr, 1901 segs[j].ds_len, &desc_array); 1902 for (counter = 0; counter < array_elements; counter++) { 1903 if (txd_used == adapter->num_tx_desc_avail) { 1904 adapter->next_avail_tx_desc = txd_saved; 1905 adapter->no_tx_desc_avail2++; 1906 bus_dmamap_unload(adapter->txtag, map); 1907 return (ENOBUFS); 1908 } 1909 tx_buffer = &adapter->tx_buffer_area[i]; 1910 ctxd = &adapter->tx_desc_base[i]; 1911 ctxd->buffer_addr = htole64( 1912 desc_array.descriptor[counter].address); 1913 ctxd->lower.data = htole32( 1914 (adapter->txd_cmd | txd_lower | (uint16_t) 1915 desc_array.descriptor[counter].length)); 1916 ctxd->upper.data = 1917 htole32((txd_upper)); 1918 last = i; 1919 if (++i == adapter->num_tx_desc) 1920 i = 0; 1921 tx_buffer->m_head = NULL; 1922 tx_buffer->next_eop = -1; 1923 txd_used++; 1924 } 1925 } else { 1926 tx_buffer = &adapter->tx_buffer_area[i]; 1927 ctxd = &adapter->tx_desc_base[i]; 1928 seg_addr = segs[j].ds_addr; 1929 seg_len = segs[j].ds_len; 1930 /* 1931 ** TSO Workaround: 1932 ** If this is the last descriptor, we want to 1933 ** split it so we have a small final sentinel 1934 */ 1935 if (tso_desc && (j == (nsegs -1)) && (seg_len > 8)) { 1936 seg_len -= 4; 1937 ctxd->buffer_addr = htole64(seg_addr); 1938 ctxd->lower.data = htole32( 1939 adapter->txd_cmd | txd_lower | seg_len); 1940 ctxd->upper.data = 1941 htole32(txd_upper); 1942 if (++i == adapter->num_tx_desc) 1943 i = 0; 1944 /* Now make the sentinel */ 1945 ++txd_used; /* using an extra txd */ 1946 ctxd = &adapter->tx_desc_base[i]; 1947 tx_buffer = &adapter->tx_buffer_area[i]; 1948 ctxd->buffer_addr = 1949 htole64(seg_addr + seg_len); 1950 ctxd->lower.data = htole32( 1951 adapter->txd_cmd | txd_lower | 4); 1952 ctxd->upper.data = 1953 htole32(txd_upper); 1954 last = i; 1955 if (++i == adapter->num_tx_desc) 1956 i = 0; 1957 } else { 1958 ctxd->buffer_addr = htole64(seg_addr); 1959 ctxd->lower.data = htole32( 1960 adapter->txd_cmd | txd_lower | seg_len); 1961 ctxd->upper.data = 1962 htole32(txd_upper); 1963 last = i; 1964 if (++i == adapter->num_tx_desc) 1965 i = 0; 1966 } 1967 tx_buffer->m_head = NULL; 1968 tx_buffer->next_eop = -1; 1969 } 1970 } 1971 1972 adapter->next_avail_tx_desc = i; 1973 if (adapter->pcix_82544) 1974 adapter->num_tx_desc_avail -= txd_used; 1975 else { 1976 adapter->num_tx_desc_avail -= nsegs; 1977 if (tso_desc) /* TSO used an extra for sentinel */ 1978 adapter->num_tx_desc_avail -= txd_used; 1979 } 1980 1981 /* 1982 ** Handle VLAN tag, this is the 1983 ** biggest difference between 1984 ** 6.x and 7 1985 */ 1986#if __FreeBSD_version < 700000 1987 /* Find out if we are in vlan mode. */ 1988 mtag = VLAN_OUTPUT_TAG(ifp, m_head); 1989 if (mtag != NULL) { 1990 ctxd->upper.fields.special = 1991 htole16(VLAN_TAG_VALUE(mtag)); 1992#else /* FreeBSD 7 */ 1993 if (m_head->m_flags & M_VLANTAG) { 1994 /* Set the vlan id. */ 1995 ctxd->upper.fields.special = 1996 htole16(m_head->m_pkthdr.ether_vtag); 1997#endif 1998 /* Tell hardware to add tag */ 1999 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE); 2000 } 2001 2002 tx_buffer->m_head = m_head; 2003 tx_buffer_mapped->map = tx_buffer->map; 2004 tx_buffer->map = map; 2005 bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE); 2006 2007 /* 2008 * Last Descriptor of Packet 2009 * needs End Of Packet (EOP) 2010 * and Report Status (RS) 2011 */ 2012 ctxd->lower.data |= 2013 htole32(E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS); 2014 /* 2015 * Keep track in the first buffer which 2016 * descriptor will be written back 2017 */ 2018 tx_buffer = &adapter->tx_buffer_area[first]; 2019 tx_buffer->next_eop = last; 2020 2021 /* 2022 * Advance the Transmit Descriptor Tail (TDT), this tells the E1000 2023 * that this frame is available to transmit. 2024 */ 2025 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2026 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2027 if (adapter->hw.mac.type == e1000_82547 && 2028 adapter->link_duplex == HALF_DUPLEX) 2029 em_82547_move_tail(adapter); 2030 else { 2031 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i); 2032 if (adapter->hw.mac.type == e1000_82547) 2033 em_82547_update_fifo_head(adapter, 2034 m_head->m_pkthdr.len); 2035 } 2036 2037 return (0); 2038} 2039 2040/********************************************************************* 2041 * 2042 * This routine maps the mbufs to Advanced TX descriptors. 2043 * used by the 82575 adapter. It also needs no workarounds. 2044 * 2045 **********************************************************************/ 2046 2047static int 2048em_adv_encap(struct adapter *adapter, struct mbuf **m_headp) 2049{ 2050 bus_dma_segment_t segs[EM_MAX_SCATTER]; 2051 bus_dmamap_t map; 2052 struct em_buffer *tx_buffer, *tx_buffer_mapped; 2053 union e1000_adv_tx_desc *txd = NULL; 2054 struct mbuf *m_head; 2055 u32 olinfo_status = 0, cmd_type_len = 0; 2056 int nsegs, i, j, error, first, last = 0; 2057#if __FreeBSD_version < 700000 2058 struct m_tag *mtag; 2059#else 2060 u32 hdrlen = 0; 2061#endif 2062 2063 m_head = *m_headp; 2064 2065 2066 /* Set basic descriptor constants */ 2067 cmd_type_len |= E1000_ADVTXD_DTYP_DATA; 2068 cmd_type_len |= E1000_ADVTXD_DCMD_IFCS | E1000_ADVTXD_DCMD_DEXT; 2069#if __FreeBSD_version < 700000 2070 mtag = VLAN_OUTPUT_TAG(ifp, m_head); 2071 if (mtag != NULL) 2072#else 2073 if (m_head->m_flags & M_VLANTAG) 2074#endif 2075 cmd_type_len |= E1000_ADVTXD_DCMD_VLE; 2076 2077 /* 2078 * Force a cleanup if number of TX descriptors 2079 * available hits the threshold 2080 */ 2081 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) { 2082 em_txeof(adapter); 2083 /* Now do we at least have a minimal? */ 2084 if (adapter->num_tx_desc_avail <= EM_TX_OP_THRESHOLD) { 2085 adapter->no_tx_desc_avail1++; 2086 return (ENOBUFS); 2087 } 2088 } 2089 2090 /* 2091 * Map the packet for DMA. 2092 * 2093 * Capture the first descriptor index, 2094 * this descriptor will have the index 2095 * of the EOP which is the only one that 2096 * now gets a DONE bit writeback. 2097 */ 2098 first = adapter->next_avail_tx_desc; 2099 tx_buffer = &adapter->tx_buffer_area[first]; 2100 tx_buffer_mapped = tx_buffer; 2101 map = tx_buffer->map; 2102 2103 error = bus_dmamap_load_mbuf_sg(adapter->txtag, map, 2104 *m_headp, segs, &nsegs, BUS_DMA_NOWAIT); 2105 2106 if (error == EFBIG) { 2107 struct mbuf *m; 2108 2109 m = m_defrag(*m_headp, M_DONTWAIT); 2110 if (m == NULL) { 2111 adapter->mbuf_alloc_failed++; 2112 m_freem(*m_headp); 2113 *m_headp = NULL; 2114 return (ENOBUFS); 2115 } 2116 *m_headp = m; 2117 2118 /* Try it again */ 2119 error = bus_dmamap_load_mbuf_sg(adapter->txtag, map, 2120 *m_headp, segs, &nsegs, BUS_DMA_NOWAIT); 2121 2122 if (error == ENOMEM) { 2123 adapter->no_tx_dma_setup++; 2124 return (error); 2125 } else if (error != 0) { 2126 adapter->no_tx_dma_setup++; 2127 m_freem(*m_headp); 2128 *m_headp = NULL; 2129 return (error); 2130 } 2131 } else if (error == ENOMEM) { 2132 adapter->no_tx_dma_setup++; 2133 return (error); 2134 } else if (error != 0) { 2135 adapter->no_tx_dma_setup++; 2136 m_freem(*m_headp); 2137 *m_headp = NULL; 2138 return (error); 2139 } 2140 2141 /* Check again to be sure we have enough descriptors */ 2142 if (nsegs > (adapter->num_tx_desc_avail - 2)) { 2143 adapter->no_tx_desc_avail2++; 2144 bus_dmamap_unload(adapter->txtag, map); 2145 return (ENOBUFS); 2146 } 2147 m_head = *m_headp; 2148 2149 /* 2150 * Set up the context descriptor: 2151 * used when any hardware offload is done. 2152 * This includes CSUM, VLAN, and TSO. It 2153 * will use the first descriptor. 2154 */ 2155#if __FreeBSD_version >= 700000 2156 if (m_head->m_pkthdr.csum_flags & CSUM_TSO) { 2157 if (em_tso_adv_setup(adapter, m_head, &hdrlen)) { 2158 cmd_type_len |= E1000_ADVTXD_DCMD_TSE; 2159 olinfo_status |= E1000_TXD_POPTS_IXSM << 8; 2160 olinfo_status |= E1000_TXD_POPTS_TXSM << 8; 2161 } else 2162 return (ENXIO); 2163 } 2164#endif 2165 /* Do all other context descriptor setup */ 2166 if (em_tx_adv_ctx_setup(adapter, m_head)) 2167 olinfo_status |= E1000_TXD_POPTS_TXSM << 8; 2168 2169 /* Calculate payload length */ 2170 olinfo_status |= ((m_head->m_pkthdr.len - hdrlen) 2171 << E1000_ADVTXD_PAYLEN_SHIFT); 2172 2173 /* Set up our transmit descriptors */ 2174 i = adapter->next_avail_tx_desc; 2175 for (j = 0; j < nsegs; j++) { 2176 bus_size_t seg_len; 2177 bus_addr_t seg_addr; 2178 2179 tx_buffer = &adapter->tx_buffer_area[i]; 2180 txd = (union e1000_adv_tx_desc *)&adapter->tx_desc_base[i]; 2181 seg_addr = segs[j].ds_addr; 2182 seg_len = segs[j].ds_len; 2183 2184 txd->read.buffer_addr = htole64(seg_addr); 2185 txd->read.cmd_type_len = htole32( 2186 adapter->txd_cmd | cmd_type_len | seg_len); 2187 txd->read.olinfo_status = htole32(olinfo_status); 2188 last = i; 2189 if (++i == adapter->num_tx_desc) 2190 i = 0; 2191 tx_buffer->m_head = NULL; 2192 tx_buffer->next_eop = -1; 2193 } 2194 2195 adapter->next_avail_tx_desc = i; 2196 adapter->num_tx_desc_avail -= nsegs; 2197 2198 tx_buffer->m_head = m_head; 2199 tx_buffer_mapped->map = tx_buffer->map; 2200 tx_buffer->map = map; 2201 bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE); 2202 2203 /* 2204 * Last Descriptor of Packet 2205 * needs End Of Packet (EOP) 2206 * and Report Status (RS) 2207 */ 2208 txd->read.cmd_type_len |= 2209 htole32(E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS); 2210 /* 2211 * Keep track in the first buffer which 2212 * descriptor will be written back 2213 */ 2214 tx_buffer = &adapter->tx_buffer_area[first]; 2215 tx_buffer->next_eop = last; 2216 2217 /* 2218 * Advance the Transmit Descriptor Tail (TDT), this tells the E1000 2219 * that this frame is available to transmit. 2220 */ 2221 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2222 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2223 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i); 2224 2225 return (0); 2226 2227} 2228 2229/********************************************************************* 2230 * 2231 * 82547 workaround to avoid controller hang in half-duplex environment. 2232 * The workaround is to avoid queuing a large packet that would span 2233 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers 2234 * in this case. We do that only when FIFO is quiescent. 2235 * 2236 **********************************************************************/ 2237static void 2238em_82547_move_tail(void *arg) 2239{ 2240 struct adapter *adapter = arg; 2241 uint16_t hw_tdt; 2242 uint16_t sw_tdt; 2243 struct e1000_tx_desc *tx_desc; 2244 uint16_t length = 0; 2245 boolean_t eop = 0; 2246 2247 EM_TX_LOCK_ASSERT(adapter); 2248 2249 hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0)); 2250 sw_tdt = adapter->next_avail_tx_desc; 2251 2252 while (hw_tdt != sw_tdt) { 2253 tx_desc = &adapter->tx_desc_base[hw_tdt]; 2254 length += tx_desc->lower.flags.length; 2255 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP; 2256 if (++hw_tdt == adapter->num_tx_desc) 2257 hw_tdt = 0; 2258 2259 if (eop) { 2260 if (em_82547_fifo_workaround(adapter, length)) { 2261 adapter->tx_fifo_wrk_cnt++; 2262 callout_reset(&adapter->tx_fifo_timer, 1, 2263 em_82547_move_tail, adapter); 2264 break; 2265 } 2266 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt); 2267 em_82547_update_fifo_head(adapter, length); 2268 length = 0; 2269 } 2270 } 2271} 2272 2273static int 2274em_82547_fifo_workaround(struct adapter *adapter, int len) 2275{ 2276 int fifo_space, fifo_pkt_len; 2277 2278 fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR); 2279 2280 if (adapter->link_duplex == HALF_DUPLEX) { 2281 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; 2282 2283 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) { 2284 if (em_82547_tx_fifo_reset(adapter)) 2285 return (0); 2286 else 2287 return (1); 2288 } 2289 } 2290 2291 return (0); 2292} 2293 2294static void 2295em_82547_update_fifo_head(struct adapter *adapter, int len) 2296{ 2297 int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR); 2298 2299 /* tx_fifo_head is always 16 byte aligned */ 2300 adapter->tx_fifo_head += fifo_pkt_len; 2301 if (adapter->tx_fifo_head >= adapter->tx_fifo_size) { 2302 adapter->tx_fifo_head -= adapter->tx_fifo_size; 2303 } 2304} 2305 2306 2307static int 2308em_82547_tx_fifo_reset(struct adapter *adapter) 2309{ 2310 uint32_t tctl; 2311 2312 if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) == 2313 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) && 2314 (E1000_READ_REG(&adapter->hw, E1000_TDFT) == 2315 E1000_READ_REG(&adapter->hw, E1000_TDFH)) && 2316 (E1000_READ_REG(&adapter->hw, E1000_TDFTS) == 2317 E1000_READ_REG(&adapter->hw, E1000_TDFHS)) && 2318 (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) { 2319 /* Disable TX unit */ 2320 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL); 2321 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, 2322 tctl & ~E1000_TCTL_EN); 2323 2324 /* Reset FIFO pointers */ 2325 E1000_WRITE_REG(&adapter->hw, E1000_TDFT, 2326 adapter->tx_head_addr); 2327 E1000_WRITE_REG(&adapter->hw, E1000_TDFH, 2328 adapter->tx_head_addr); 2329 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS, 2330 adapter->tx_head_addr); 2331 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS, 2332 adapter->tx_head_addr); 2333 2334 /* Re-enable TX unit */ 2335 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl); 2336 E1000_WRITE_FLUSH(&adapter->hw); 2337 2338 adapter->tx_fifo_head = 0; 2339 adapter->tx_fifo_reset_cnt++; 2340 2341 return (TRUE); 2342 } 2343 else { 2344 return (FALSE); 2345 } 2346} 2347 2348static void 2349em_set_promisc(struct adapter *adapter) 2350{ 2351 struct ifnet *ifp = adapter->ifp; 2352 uint32_t reg_rctl; 2353 2354 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 2355 2356 if (ifp->if_flags & IFF_PROMISC) { 2357 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 2358 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2359 } else if (ifp->if_flags & IFF_ALLMULTI) { 2360 reg_rctl |= E1000_RCTL_MPE; 2361 reg_rctl &= ~E1000_RCTL_UPE; 2362 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2363 } 2364} 2365 2366static void 2367em_disable_promisc(struct adapter *adapter) 2368{ 2369 uint32_t reg_rctl; 2370 2371 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 2372 2373 reg_rctl &= (~E1000_RCTL_UPE); 2374 reg_rctl &= (~E1000_RCTL_MPE); 2375 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2376} 2377 2378 2379/********************************************************************* 2380 * Multicast Update 2381 * 2382 * This routine is called whenever multicast address list is updated. 2383 * 2384 **********************************************************************/ 2385 2386static void 2387em_set_multi(struct adapter *adapter) 2388{ 2389 struct ifnet *ifp = adapter->ifp; 2390 struct ifmultiaddr *ifma; 2391 uint32_t reg_rctl = 0; 2392 uint8_t mta[512]; /* Largest MTS is 4096 bits */ 2393 int mcnt = 0; 2394 2395 IOCTL_DEBUGOUT("em_set_multi: begin"); 2396 2397 if (adapter->hw.mac.type == e1000_82542 && 2398 adapter->hw.revision_id == E1000_REVISION_2) { 2399 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 2400 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 2401 e1000_pci_clear_mwi(&adapter->hw); 2402 reg_rctl |= E1000_RCTL_RST; 2403 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2404 msec_delay(5); 2405 } 2406 2407 IF_ADDR_LOCK(ifp); 2408 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 2409 if (ifma->ifma_addr->sa_family != AF_LINK) 2410 continue; 2411 2412 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 2413 break; 2414 2415 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 2416 &mta[mcnt * ETH_ADDR_LEN], ETH_ADDR_LEN); 2417 mcnt++; 2418 } 2419 IF_ADDR_UNLOCK(ifp); 2420 2421 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) { 2422 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 2423 reg_rctl |= E1000_RCTL_MPE; 2424 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2425 } else 2426 e1000_update_mc_addr_list(&adapter->hw, mta, 2427 mcnt, 1, adapter->hw.mac.rar_entry_count); 2428 2429 if (adapter->hw.mac.type == e1000_82542 && 2430 adapter->hw.revision_id == E1000_REVISION_2) { 2431 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 2432 reg_rctl &= ~E1000_RCTL_RST; 2433 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2434 msec_delay(5); 2435 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 2436 e1000_pci_set_mwi(&adapter->hw); 2437 } 2438} 2439 2440 2441/********************************************************************* 2442 * Timer routine 2443 * 2444 * This routine checks for link status and updates statistics. 2445 * 2446 **********************************************************************/ 2447 2448static void 2449em_local_timer(void *arg) 2450{ 2451 struct adapter *adapter = arg; 2452 struct ifnet *ifp = adapter->ifp; 2453 2454 EM_CORE_LOCK_ASSERT(adapter); 2455 2456 e1000_check_for_link(&adapter->hw); 2457 em_update_link_status(adapter); 2458 em_update_stats_counters(adapter); 2459 2460 /* Reset LAA into RAR[0] on 82571 */ 2461 if (e1000_get_laa_state_82571(&adapter->hw) == TRUE) 2462 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 2463 2464 if (em_display_debug_stats && ifp->if_drv_flags & IFF_DRV_RUNNING) 2465 em_print_hw_stats(adapter); 2466 2467 em_smartspeed(adapter); 2468 2469 /* 2470 * Each second we check the watchdog to 2471 * protect against hardware hangs. 2472 */ 2473 em_watchdog(adapter); 2474 2475 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 2476 2477} 2478 2479static void 2480em_update_link_status(struct adapter *adapter) 2481{ 2482 struct ifnet *ifp = adapter->ifp; 2483 device_t dev = adapter->dev; 2484 2485 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) & 2486 E1000_STATUS_LU) { 2487 if (adapter->link_active == 0) { 2488 e1000_get_speed_and_duplex(&adapter->hw, 2489 &adapter->link_speed, &adapter->link_duplex); 2490 /* Check if we must disable SPEED_MODE bit on PCI-E */ 2491 if ((adapter->link_speed != SPEED_1000) && 2492 ((adapter->hw.mac.type == e1000_82571) || 2493 (adapter->hw.mac.type == e1000_82572))) { 2494 int tarc0; 2495 2496 tarc0 = E1000_READ_REG(&adapter->hw, 2497 E1000_TARC(0)); 2498 tarc0 &= ~SPEED_MODE_BIT; 2499 E1000_WRITE_REG(&adapter->hw, 2500 E1000_TARC(0), tarc0); 2501 } 2502 if (bootverbose) 2503 device_printf(dev, "Link is up %d Mbps %s\n", 2504 adapter->link_speed, 2505 ((adapter->link_duplex == FULL_DUPLEX) ? 2506 "Full Duplex" : "Half Duplex")); 2507 adapter->link_active = 1; 2508 adapter->smartspeed = 0; 2509 ifp->if_baudrate = adapter->link_speed * 1000000; 2510 if_link_state_change(ifp, LINK_STATE_UP); 2511 } 2512 } else { 2513 if (adapter->link_active == 1) { 2514 ifp->if_baudrate = adapter->link_speed = 0; 2515 adapter->link_duplex = 0; 2516 if (bootverbose) 2517 device_printf(dev, "Link is Down\n"); 2518 adapter->link_active = 0; 2519 if_link_state_change(ifp, LINK_STATE_DOWN); 2520 } 2521 } 2522} 2523 2524/********************************************************************* 2525 * 2526 * This routine disables all traffic on the adapter by issuing a 2527 * global reset on the MAC and deallocates TX/RX buffers. 2528 * 2529 **********************************************************************/ 2530 2531static void 2532em_stop(void *arg) 2533{ 2534 struct adapter *adapter = arg; 2535 struct ifnet *ifp = adapter->ifp; 2536 2537 EM_CORE_LOCK_ASSERT(adapter); 2538 2539 INIT_DEBUGOUT("em_stop: begin"); 2540 2541 em_disable_intr(adapter); 2542 callout_stop(&adapter->timer); 2543 callout_stop(&adapter->tx_fifo_timer); 2544 2545 /* Tell the stack that the interface is no longer active */ 2546 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2547 2548 e1000_reset_hw(&adapter->hw); 2549 if (adapter->hw.mac.type >= e1000_82544) 2550 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0); 2551} 2552 2553 2554/********************************************************************* 2555 * 2556 * Determine hardware revision. 2557 * 2558 **********************************************************************/ 2559static void 2560em_identify_hardware(struct adapter *adapter) 2561{ 2562 device_t dev = adapter->dev; 2563 2564 /* Make sure our PCI config space has the necessary stuff set */ 2565 adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2); 2566 if (!((adapter->hw.bus.pci_cmd_word & PCIM_CMD_BUSMASTEREN) && 2567 (adapter->hw.bus.pci_cmd_word & PCIM_CMD_MEMEN))) { 2568 device_printf(dev, "Memory Access and/or Bus Master bits " 2569 "were not set!\n"); 2570 adapter->hw.bus.pci_cmd_word |= 2571 (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN); 2572 pci_write_config(dev, PCIR_COMMAND, 2573 adapter->hw.bus.pci_cmd_word, 2); 2574 } 2575 2576 /* Save off the information about this board */ 2577 adapter->hw.vendor_id = pci_get_vendor(dev); 2578 adapter->hw.device_id = pci_get_device(dev); 2579 adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1); 2580 adapter->hw.subsystem_vendor_id = 2581 pci_read_config(dev, PCIR_SUBVEND_0, 2); 2582 adapter->hw.subsystem_device_id = 2583 pci_read_config(dev, PCIR_SUBDEV_0, 2); 2584 2585 /* Do Shared Code Init and Setup */ 2586 if (e1000_set_mac_type(&adapter->hw)) { 2587 device_printf(dev, "Setup init failure\n"); 2588 return; 2589 } 2590} 2591 2592static int 2593em_allocate_pci_resources(struct adapter *adapter) 2594{ 2595 device_t dev = adapter->dev; 2596 int val, rid; 2597 2598 rid = PCIR_BAR(0); 2599 adapter->res_memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 2600 &rid, RF_ACTIVE); 2601 if (adapter->res_memory == NULL) { 2602 device_printf(dev, "Unable to allocate bus resource: memory\n"); 2603 return (ENXIO); 2604 } 2605 adapter->osdep.mem_bus_space_tag = 2606 rman_get_bustag(adapter->res_memory); 2607 adapter->osdep.mem_bus_space_handle = 2608 rman_get_bushandle(adapter->res_memory); 2609 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle; 2610 2611 /* Only older adapters use IO mapping */ 2612 if ((adapter->hw.mac.type > e1000_82543) && 2613 (adapter->hw.mac.type < e1000_82571)) { 2614 /* Figure our where our IO BAR is ? */ 2615 for (rid = PCIR_BAR(0); rid < PCIR_CIS;) { 2616 val = pci_read_config(dev, rid, 4); 2617 if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) { 2618 adapter->io_rid = rid; 2619 break; 2620 } 2621 rid += 4; 2622 /* check for 64bit BAR */ 2623 if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT) 2624 rid += 4; 2625 } 2626 if (rid >= PCIR_CIS) { 2627 device_printf(dev, "Unable to locate IO BAR\n"); 2628 return (ENXIO); 2629 } 2630 adapter->res_ioport = bus_alloc_resource_any(dev, 2631 SYS_RES_IOPORT, &adapter->io_rid, RF_ACTIVE); 2632 if (adapter->res_ioport == NULL) { 2633 device_printf(dev, "Unable to allocate bus resource: " 2634 "ioport\n"); 2635 return (ENXIO); 2636 } 2637 adapter->hw.io_base = 0; 2638 adapter->osdep.io_bus_space_tag = 2639 rman_get_bustag(adapter->res_ioport); 2640 adapter->osdep.io_bus_space_handle = 2641 rman_get_bushandle(adapter->res_ioport); 2642 } 2643 2644 /* 2645 * Setup MSI/X or MSI if PCI Express 2646 * only the latest can use MSI/X and 2647 * real support for it is forthcoming 2648 */ 2649 adapter->msi = 0; /* Set defaults */ 2650 rid = 0x0; 2651 2652#if __FreeBSD_version > 602111 /* MSI support is present */ 2653 /* This will setup either MSI/X or MSI */ 2654 if (em_setup_msix(adapter)) 2655 rid = 1; 2656#endif /* FreeBSD_version */ 2657 2658 adapter->res_interrupt = bus_alloc_resource_any(dev, 2659 SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); 2660 if (adapter->res_interrupt == NULL) { 2661 device_printf(dev, "Unable to allocate bus resource: " 2662 "interrupt\n"); 2663 return (ENXIO); 2664 } 2665 2666 adapter->hw.back = &adapter->osdep; 2667 2668 return (0); 2669} 2670 2671/********************************************************************* 2672 * 2673 * Setup the appropriate Interrupt handlers. 2674 * 2675 **********************************************************************/ 2676int 2677em_allocate_intr(struct adapter *adapter) 2678{ 2679 device_t dev = adapter->dev; 2680 int error; 2681 2682 /* Manually turn off all interrupts */ 2683 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff); 2684 2685#ifndef EM_FAST_IRQ 2686 /* We do Legacy setup */ 2687 if (adapter->int_handler_tag == NULL && 2688 (error = bus_setup_intr(dev, adapter->res_interrupt, 2689#if __FreeBSD_version > 700000 2690 INTR_TYPE_NET | INTR_MPSAFE, NULL, em_intr, adapter, 2691#else /* 6.X */ 2692 INTR_TYPE_NET | INTR_MPSAFE, em_intr, adapter, 2693#endif 2694 &adapter->int_handler_tag)) != 0) { 2695 device_printf(dev, "Failed to register interrupt handler"); 2696 return (error); 2697 } 2698 2699#else /* FAST_IRQ */ 2700 /* 2701 * Try allocating a fast interrupt and the associated deferred 2702 * processing contexts. 2703 */ 2704 TASK_INIT(&adapter->rxtx_task, 0, em_handle_rxtx, adapter); 2705 TASK_INIT(&adapter->link_task, 0, em_handle_link, adapter); 2706 adapter->tq = taskqueue_create_fast("em_taskq", M_NOWAIT, 2707 taskqueue_thread_enqueue, &adapter->tq); 2708 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s taskq", 2709 device_get_nameunit(adapter->dev)); 2710#if __FreeBSD_version < 700000 2711 if ((error = bus_setup_intr(dev, adapter->res_interrupt, 2712 INTR_TYPE_NET | INTR_FAST, em_intr_fast, adapter, 2713#else 2714 if ((error = bus_setup_intr(dev, adapter->res_interrupt, 2715 INTR_TYPE_NET, em_intr_fast, NULL, adapter, 2716#endif 2717 &adapter->int_handler_tag)) != 0) { 2718 device_printf(dev, "Failed to register fast interrupt " 2719 "handler: %d\n", error); 2720 taskqueue_free(adapter->tq); 2721 adapter->tq = NULL; 2722 return (error); 2723 } 2724#endif /* EM_FAST_IRQ */ 2725 2726 em_enable_intr(adapter); 2727 return (0); 2728} 2729 2730static void 2731em_free_intr(struct adapter *adapter) 2732{ 2733 device_t dev = adapter->dev; 2734 2735 if (adapter->res_interrupt != NULL) { 2736 bus_teardown_intr(dev, adapter->res_interrupt, 2737 adapter->int_handler_tag); 2738 adapter->int_handler_tag = NULL; 2739 } 2740 if (adapter->tq != NULL) { 2741 taskqueue_drain(adapter->tq, &adapter->rxtx_task); 2742 taskqueue_drain(taskqueue_fast, &adapter->link_task); 2743 taskqueue_free(adapter->tq); 2744 adapter->tq = NULL; 2745 } 2746} 2747 2748static void 2749em_free_pci_resources(struct adapter *adapter) 2750{ 2751 device_t dev = adapter->dev; 2752 2753 if (adapter->res_interrupt != NULL) 2754 bus_release_resource(dev, SYS_RES_IRQ, 2755 adapter->msi ? 1 : 0, adapter->res_interrupt); 2756 2757#if __FreeBSD_version > 602111 /* MSI support is present */ 2758 if (adapter->msix_mem != NULL) 2759 bus_release_resource(dev, SYS_RES_MEMORY, 2760 PCIR_BAR(EM_MSIX_BAR), adapter->msix_mem); 2761 2762 if (adapter->msi) 2763 pci_release_msi(dev); 2764#endif /* FreeBSD_version */ 2765 2766 if (adapter->res_memory != NULL) 2767 bus_release_resource(dev, SYS_RES_MEMORY, 2768 PCIR_BAR(0), adapter->res_memory); 2769 2770 if (adapter->flash_mem != NULL) 2771 bus_release_resource(dev, SYS_RES_MEMORY, 2772 EM_FLASH, adapter->flash_mem); 2773 2774 if (adapter->res_ioport != NULL) 2775 bus_release_resource(dev, SYS_RES_IOPORT, 2776 adapter->io_rid, adapter->res_ioport); 2777} 2778 2779#if __FreeBSD_version > 602111 /* MSI support is present */ 2780/* 2781 * Setup MSI/X 2782 */ 2783static bool 2784em_setup_msix(struct adapter *adapter) 2785{ 2786 device_t dev = adapter->dev; 2787 int rid, val; 2788 2789 if (adapter->hw.mac.type < e1000_82571) 2790 return (FALSE); 2791 2792 /* First try MSI/X if possible */ 2793 if (adapter->hw.mac.type >= e1000_82575) { 2794 rid = PCIR_BAR(EM_MSIX_BAR); 2795 adapter->msix_mem = bus_alloc_resource_any(dev, 2796 SYS_RES_MEMORY, &rid, RF_ACTIVE); 2797 if (!adapter->msix_mem) { 2798 /* May not be enabled */ 2799 device_printf(adapter->dev, 2800 "Unable to map MSIX table \n"); 2801 goto msi; 2802 } 2803 val = pci_msix_count(dev); 2804 if ((val) && pci_alloc_msix(dev, &val) == 0) { 2805 adapter->msi = 1; 2806 device_printf(adapter->dev,"Using MSIX interrupts\n"); 2807 return (TRUE); 2808 } 2809 } 2810msi: 2811 val = pci_msi_count(dev); 2812 if (val == 1 && pci_alloc_msi(dev, &val) == 0) { 2813 adapter->msi = 1; 2814 device_printf(adapter->dev,"Using MSI interrupt\n"); 2815 return (TRUE); 2816 } 2817 return (FALSE); 2818} 2819#endif /* FreeBSD_version */ 2820 2821/********************************************************************* 2822 * 2823 * Initialize the hardware to a configuration 2824 * as specified by the adapter structure. 2825 * 2826 **********************************************************************/ 2827static int 2828em_hardware_init(struct adapter *adapter) 2829{ 2830 device_t dev = adapter->dev; 2831 uint16_t rx_buffer_size; 2832 2833 INIT_DEBUGOUT("em_hardware_init: begin"); 2834 2835 /* Issue a global reset */ 2836 e1000_reset_hw(&adapter->hw); 2837 2838 /* Get control from any management/hw control */ 2839 if (((adapter->hw.mac.type == e1000_82573) || 2840 (adapter->hw.mac.type == e1000_ich8lan) || 2841 (adapter->hw.mac.type == e1000_ich9lan)) && 2842 e1000_check_mng_mode(&adapter->hw)) 2843 em_get_hw_control(adapter); 2844 2845 /* When hardware is reset, fifo_head is also reset */ 2846 adapter->tx_fifo_head = 0; 2847 2848 /* Set up smart power down as default off on newer adapters. */ 2849 if (!em_smart_pwr_down && (adapter->hw.mac.type == e1000_82571 || 2850 adapter->hw.mac.type == e1000_82572)) { 2851 uint16_t phy_tmp = 0; 2852 2853 /* Speed up time to link by disabling smart power down. */ 2854 e1000_read_phy_reg(&adapter->hw, 2855 IGP02E1000_PHY_POWER_MGMT, &phy_tmp); 2856 phy_tmp &= ~IGP02E1000_PM_SPD; 2857 e1000_write_phy_reg(&adapter->hw, 2858 IGP02E1000_PHY_POWER_MGMT, phy_tmp); 2859 } 2860 2861 /* 2862 * These parameters control the automatic generation (Tx) and 2863 * response (Rx) to Ethernet PAUSE frames. 2864 * - High water mark should allow for at least two frames to be 2865 * received after sending an XOFF. 2866 * - Low water mark works best when it is very near the high water mark. 2867 * This allows the receiver to restart by sending XON when it has 2868 * drained a bit. Here we use an arbitary value of 1500 which will 2869 * restart after one full frame is pulled from the buffer. There 2870 * could be several smaller frames in the buffer and if so they will 2871 * not trigger the XON until their total number reduces the buffer 2872 * by 1500. 2873 * - The pause time is fairly large at 1000 x 512ns = 512 usec. 2874 */ 2875 rx_buffer_size = ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 2876 0xffff) << 10 ); 2877 2878 adapter->hw.fc.high_water = rx_buffer_size - 2879 roundup2(adapter->max_frame_size, 1024); 2880 adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500; 2881 2882 if (adapter->hw.mac.type == e1000_80003es2lan) 2883 adapter->hw.fc.pause_time = 0xFFFF; 2884 else 2885 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME; 2886 adapter->hw.fc.send_xon = TRUE; 2887 adapter->hw.fc.type = e1000_fc_full; 2888 2889 if (e1000_init_hw(&adapter->hw) < 0) { 2890 device_printf(dev, "Hardware Initialization Failed\n"); 2891 return (EIO); 2892 } 2893 2894 e1000_check_for_link(&adapter->hw); 2895 2896 return (0); 2897} 2898 2899/********************************************************************* 2900 * 2901 * Setup networking device structure and register an interface. 2902 * 2903 **********************************************************************/ 2904static void 2905em_setup_interface(device_t dev, struct adapter *adapter) 2906{ 2907 struct ifnet *ifp; 2908 2909 INIT_DEBUGOUT("em_setup_interface: begin"); 2910 2911 ifp = adapter->ifp = if_alloc(IFT_ETHER); 2912 if (ifp == NULL) 2913 panic("%s: can not if_alloc()", device_get_nameunit(dev)); 2914 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 2915 ifp->if_mtu = ETHERMTU; 2916 ifp->if_init = em_init; 2917 ifp->if_softc = adapter; 2918 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 2919 ifp->if_ioctl = em_ioctl; 2920 ifp->if_start = em_start; 2921 IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 1); 2922 ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 1; 2923 IFQ_SET_READY(&ifp->if_snd); 2924 2925 ether_ifattach(ifp, adapter->hw.mac.addr); 2926 2927 ifp->if_capabilities = ifp->if_capenable = 0; 2928 2929 if (adapter->hw.mac.type >= e1000_82543) { 2930 int version_cap; 2931#if __FreeBSD_version < 700000 2932 version_cap = IFCAP_HWCSUM; 2933#else 2934 version_cap = IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM; 2935#endif 2936 ifp->if_capabilities |= version_cap; 2937 ifp->if_capenable |= version_cap; 2938 } 2939 2940#if __FreeBSD_version >= 700000 2941 /* Identify TSO capable adapters */ 2942 if ((adapter->hw.mac.type > e1000_82544) && 2943 (adapter->hw.mac.type != e1000_82547)) 2944 ifp->if_capabilities |= IFCAP_TSO4; 2945 /* 2946 * By default only enable on PCI-E, this 2947 * can be overriden by ifconfig. 2948 */ 2949 if (adapter->hw.mac.type >= e1000_82571) 2950 ifp->if_capenable |= IFCAP_TSO4; 2951#endif 2952 2953 /* 2954 * Tell the upper layer(s) we support long frames. 2955 */ 2956 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 2957 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 2958 ifp->if_capenable |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 2959 2960#ifdef DEVICE_POLLING 2961 ifp->if_capabilities |= IFCAP_POLLING; 2962#endif 2963 2964 /* 2965 * Specify the media types supported by this adapter and register 2966 * callbacks to update media and link information 2967 */ 2968 ifmedia_init(&adapter->media, IFM_IMASK, 2969 em_media_change, em_media_status); 2970 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) || 2971 (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) { 2972 u_char fiber_type = IFM_1000_SX; /* default type */ 2973 2974 if (adapter->hw.mac.type == e1000_82545) 2975 fiber_type = IFM_1000_LX; 2976 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX, 2977 0, NULL); 2978 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL); 2979 } else { 2980 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL); 2981 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX, 2982 0, NULL); 2983 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 2984 0, NULL); 2985 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 2986 0, NULL); 2987 if (adapter->hw.phy.type != e1000_phy_ife) { 2988 ifmedia_add(&adapter->media, 2989 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); 2990 ifmedia_add(&adapter->media, 2991 IFM_ETHER | IFM_1000_T, 0, NULL); 2992 } 2993 } 2994 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2995 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2996} 2997 2998 2999/********************************************************************* 3000 * 3001 * Workaround for SmartSpeed on 82541 and 82547 controllers 3002 * 3003 **********************************************************************/ 3004static void 3005em_smartspeed(struct adapter *adapter) 3006{ 3007 uint16_t phy_tmp; 3008 3009 if (adapter->link_active || (adapter->hw.phy.type != e1000_phy_igp) || 3010 adapter->hw.mac.autoneg == 0 || 3011 (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0) 3012 return; 3013 3014 if (adapter->smartspeed == 0) { 3015 /* If Master/Slave config fault is asserted twice, 3016 * we assume back-to-back */ 3017 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 3018 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT)) 3019 return; 3020 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 3021 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) { 3022 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp); 3023 if(phy_tmp & CR_1000T_MS_ENABLE) { 3024 phy_tmp &= ~CR_1000T_MS_ENABLE; 3025 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, 3026 phy_tmp); 3027 adapter->smartspeed++; 3028 if(adapter->hw.mac.autoneg && 3029 !e1000_phy_setup_autoneg(&adapter->hw) && 3030 !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, 3031 &phy_tmp)) { 3032 phy_tmp |= (MII_CR_AUTO_NEG_EN | 3033 MII_CR_RESTART_AUTO_NEG); 3034 e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, 3035 phy_tmp); 3036 } 3037 } 3038 } 3039 return; 3040 } else if(adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) { 3041 /* If still no link, perhaps using 2/3 pair cable */ 3042 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp); 3043 phy_tmp |= CR_1000T_MS_ENABLE; 3044 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp); 3045 if(adapter->hw.mac.autoneg && 3046 !e1000_phy_setup_autoneg(&adapter->hw) && 3047 !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) { 3048 phy_tmp |= (MII_CR_AUTO_NEG_EN | 3049 MII_CR_RESTART_AUTO_NEG); 3050 e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp); 3051 } 3052 } 3053 /* Restart process after EM_SMARTSPEED_MAX iterations */ 3054 if(adapter->smartspeed++ == EM_SMARTSPEED_MAX) 3055 adapter->smartspeed = 0; 3056} 3057 3058 3059/* 3060 * Manage DMA'able memory. 3061 */ 3062static void 3063em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 3064{ 3065 if (error) 3066 return; 3067 *(bus_addr_t *) arg = segs[0].ds_addr; 3068} 3069 3070static int 3071em_dma_malloc(struct adapter *adapter, bus_size_t size, 3072 struct em_dma_alloc *dma, int mapflags) 3073{ 3074 int error; 3075 3076#if __FreeBSD_version >= 700000 3077 error = bus_dma_tag_create(bus_get_dma_tag(adapter->dev), /* parent */ 3078#else 3079 error = bus_dma_tag_create(NULL, /* parent */ 3080#endif 3081 EM_DBA_ALIGN, 0, /* alignment, bounds */ 3082 BUS_SPACE_MAXADDR, /* lowaddr */ 3083 BUS_SPACE_MAXADDR, /* highaddr */ 3084 NULL, NULL, /* filter, filterarg */ 3085 size, /* maxsize */ 3086 1, /* nsegments */ 3087 size, /* maxsegsize */ 3088 0, /* flags */ 3089 NULL, /* lockfunc */ 3090 NULL, /* lockarg */ 3091 &dma->dma_tag); 3092 if (error) { 3093 device_printf(adapter->dev, 3094 "%s: bus_dma_tag_create failed: %d\n", 3095 __func__, error); 3096 goto fail_0; 3097 } 3098 3099 error = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr, 3100 BUS_DMA_NOWAIT, &dma->dma_map); 3101 if (error) { 3102 device_printf(adapter->dev, 3103 "%s: bus_dmamem_alloc(%ju) failed: %d\n", 3104 __func__, (uintmax_t)size, error); 3105 goto fail_2; 3106 } 3107 3108 dma->dma_paddr = 0; 3109 error = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr, 3110 size, em_dmamap_cb, &dma->dma_paddr, mapflags | BUS_DMA_NOWAIT); 3111 if (error || dma->dma_paddr == 0) { 3112 device_printf(adapter->dev, 3113 "%s: bus_dmamap_load failed: %d\n", 3114 __func__, error); 3115 goto fail_3; 3116 } 3117 3118 return (0); 3119 3120fail_3: 3121 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 3122fail_2: 3123 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 3124 bus_dma_tag_destroy(dma->dma_tag); 3125fail_0: 3126 dma->dma_map = NULL; 3127 dma->dma_tag = NULL; 3128 3129 return (error); 3130} 3131 3132static void 3133em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma) 3134{ 3135 if (dma->dma_tag == NULL) 3136 return; 3137 if (dma->dma_map != NULL) { 3138 bus_dmamap_sync(dma->dma_tag, dma->dma_map, 3139 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 3140 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 3141 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 3142 dma->dma_map = NULL; 3143 } 3144 bus_dma_tag_destroy(dma->dma_tag); 3145 dma->dma_tag = NULL; 3146} 3147 3148 3149/********************************************************************* 3150 * 3151 * Allocate memory for tx_buffer structures. The tx_buffer stores all 3152 * the information needed to transmit a packet on the wire. 3153 * 3154 **********************************************************************/ 3155static int 3156em_allocate_transmit_structures(struct adapter *adapter) 3157{ 3158 device_t dev = adapter->dev; 3159 struct em_buffer *tx_buffer; 3160 int error; 3161 3162 /* 3163 * Create DMA tags for tx descriptors 3164 */ 3165#if __FreeBSD_version >= 700000 3166 if ((error = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 3167#else 3168 if ((error = bus_dma_tag_create(NULL, /* parent */ 3169#endif 3170 1, 0, /* alignment, bounds */ 3171 BUS_SPACE_MAXADDR, /* lowaddr */ 3172 BUS_SPACE_MAXADDR, /* highaddr */ 3173 NULL, NULL, /* filter, filterarg */ 3174 EM_TSO_SIZE, /* maxsize */ 3175 EM_MAX_SCATTER, /* nsegments */ 3176 EM_TSO_SEG_SIZE, /* maxsegsize */ 3177 0, /* flags */ 3178 NULL, /* lockfunc */ 3179 NULL, /* lockarg */ 3180 &adapter->txtag)) != 0) { 3181 device_printf(dev, "Unable to allocate TX DMA tag\n"); 3182 goto fail; 3183 } 3184 3185 adapter->tx_buffer_area = malloc(sizeof(struct em_buffer) * 3186 adapter->num_tx_desc, M_DEVBUF, M_NOWAIT | M_ZERO); 3187 if (adapter->tx_buffer_area == NULL) { 3188 device_printf(dev, "Unable to allocate tx_buffer memory\n"); 3189 error = ENOMEM; 3190 goto fail; 3191 } 3192 3193 /* Create the descriptor buffer dma maps */ 3194 for (int i = 0; i < adapter->num_tx_desc; i++) { 3195 tx_buffer = &adapter->tx_buffer_area[i]; 3196 error = bus_dmamap_create(adapter->txtag, 0, &tx_buffer->map); 3197 if (error != 0) { 3198 device_printf(dev, "Unable to create TX DMA map\n"); 3199 goto fail; 3200 } 3201 tx_buffer->next_eop = -1; 3202 } 3203 3204 return (0); 3205fail: 3206 em_free_transmit_structures(adapter); 3207 return (error); 3208} 3209 3210/********************************************************************* 3211 * 3212 * (Re)Initialize transmit structures. 3213 * 3214 **********************************************************************/ 3215static void 3216em_setup_transmit_structures(struct adapter *adapter) 3217{ 3218 struct em_buffer *tx_buffer; 3219 3220 /* Clear the old ring contents */ 3221 bzero(adapter->tx_desc_base, 3222 (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc); 3223 3224 /* Free any existing TX buffers */ 3225 for (int i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) { 3226 tx_buffer = &adapter->tx_buffer_area[i]; 3227 bus_dmamap_sync(adapter->txtag, tx_buffer->map, 3228 BUS_DMASYNC_POSTWRITE); 3229 bus_dmamap_unload(adapter->txtag, tx_buffer->map); 3230 m_freem(tx_buffer->m_head); 3231 tx_buffer->m_head = NULL; 3232 tx_buffer->next_eop = -1; 3233 } 3234 3235 /* Reset state */ 3236 adapter->next_avail_tx_desc = 0; 3237 adapter->next_tx_to_clean = 0; 3238 adapter->num_tx_desc_avail = adapter->num_tx_desc; 3239 3240 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 3241 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 3242 3243 return; 3244} 3245 3246/********************************************************************* 3247 * 3248 * Enable transmit unit. 3249 * 3250 **********************************************************************/ 3251static void 3252em_initialize_transmit_unit(struct adapter *adapter) 3253{ 3254 uint32_t tctl, tarc, tipg = 0; 3255 uint64_t bus_addr; 3256 3257 INIT_DEBUGOUT("em_initialize_transmit_unit: begin"); 3258 /* Setup the Base and Length of the Tx Descriptor Ring */ 3259 bus_addr = adapter->txdma.dma_paddr; 3260 E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0), 3261 adapter->num_tx_desc * sizeof(struct e1000_tx_desc)); 3262 E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0), 3263 (uint32_t)(bus_addr >> 32)); 3264 E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0), 3265 (uint32_t)bus_addr); 3266 /* Setup the HW Tx Head and Tail descriptor pointers */ 3267 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0); 3268 E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0); 3269 3270 HW_DEBUGOUT2("Base = %x, Length = %x\n", 3271 E1000_READ_REG(&adapter->hw, E1000_TDBAL(0)), 3272 E1000_READ_REG(&adapter->hw, E1000_TDLEN(0))); 3273 3274 /* Set the default values for the Tx Inter Packet Gap timer */ 3275 switch (adapter->hw.mac.type) { 3276 case e1000_82542: 3277 tipg = DEFAULT_82542_TIPG_IPGT; 3278 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 3279 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 3280 break; 3281 case e1000_80003es2lan: 3282 tipg = DEFAULT_82543_TIPG_IPGR1; 3283 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 << 3284 E1000_TIPG_IPGR2_SHIFT; 3285 break; 3286 default: 3287 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) || 3288 (adapter->hw.phy.media_type == 3289 e1000_media_type_internal_serdes)) 3290 tipg = DEFAULT_82543_TIPG_IPGT_FIBER; 3291 else 3292 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; 3293 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 3294 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 3295 } 3296 3297 E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg); 3298 E1000_WRITE_REG(&adapter->hw, E1000_TIDV, adapter->tx_int_delay.value); 3299 if(adapter->hw.mac.type >= e1000_82540) 3300 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 3301 adapter->tx_abs_int_delay.value); 3302 3303 if ((adapter->hw.mac.type == e1000_82571) || 3304 (adapter->hw.mac.type == e1000_82572)) { 3305 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); 3306 tarc |= SPEED_MODE_BIT; 3307 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); 3308 } else if (adapter->hw.mac.type == e1000_80003es2lan) { 3309 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); 3310 tarc |= 1; 3311 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); 3312 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1)); 3313 tarc |= 1; 3314 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc); 3315 } 3316 3317 /* Program the Transmit Control Register */ 3318 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL); 3319 tctl &= ~E1000_TCTL_CT; 3320 tctl |= (E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN | 3321 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT)); 3322 3323 if (adapter->hw.mac.type >= e1000_82571) 3324 tctl |= E1000_TCTL_MULR; 3325 3326 /* This write will effectively turn on the transmit unit. */ 3327 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl); 3328 3329 /* Setup Transmit Descriptor Base Settings */ 3330 adapter->txd_cmd = E1000_TXD_CMD_IFCS; 3331 3332 if ((adapter->tx_int_delay.value > 0) && 3333 (adapter->hw.mac.type != e1000_82575)) 3334 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 3335 3336 /* Set the function pointer for the transmit routine */ 3337 if (adapter->hw.mac.type >= e1000_82575) 3338 adapter->em_xmit = em_adv_encap; 3339 else 3340 adapter->em_xmit = em_encap; 3341} 3342 3343/********************************************************************* 3344 * 3345 * Free all transmit related data structures. 3346 * 3347 **********************************************************************/ 3348static void 3349em_free_transmit_structures(struct adapter *adapter) 3350{ 3351 struct em_buffer *tx_buffer; 3352 3353 INIT_DEBUGOUT("free_transmit_structures: begin"); 3354 3355 if (adapter->tx_buffer_area != NULL) { 3356 for (int i = 0; i < adapter->num_tx_desc; i++) { 3357 tx_buffer = &adapter->tx_buffer_area[i]; 3358 if (tx_buffer->m_head != NULL) { 3359 bus_dmamap_sync(adapter->txtag, tx_buffer->map, 3360 BUS_DMASYNC_POSTWRITE); 3361 bus_dmamap_unload(adapter->txtag, 3362 tx_buffer->map); 3363 m_freem(tx_buffer->m_head); 3364 tx_buffer->m_head = NULL; 3365 } else if (tx_buffer->map != NULL) 3366 bus_dmamap_unload(adapter->txtag, 3367 tx_buffer->map); 3368 if (tx_buffer->map != NULL) { 3369 bus_dmamap_destroy(adapter->txtag, 3370 tx_buffer->map); 3371 tx_buffer->map = NULL; 3372 } 3373 } 3374 } 3375 if (adapter->tx_buffer_area != NULL) { 3376 free(adapter->tx_buffer_area, M_DEVBUF); 3377 adapter->tx_buffer_area = NULL; 3378 } 3379 if (adapter->txtag != NULL) { 3380 bus_dma_tag_destroy(adapter->txtag); 3381 adapter->txtag = NULL; 3382 } 3383} 3384 3385/********************************************************************* 3386 * 3387 * The offload context needs to be set when we transfer the first 3388 * packet of a particular protocol (TCP/UDP). This routine has been 3389 * enhanced to deal with inserted VLAN headers, and IPV6 (not complete) 3390 * 3391 **********************************************************************/ 3392static void 3393em_transmit_checksum_setup(struct adapter *adapter, struct mbuf *mp, 3394 uint32_t *txd_upper, uint32_t *txd_lower) 3395{ 3396 struct e1000_context_desc *TXD; 3397 struct em_buffer *tx_buffer; 3398 struct ether_vlan_header *eh; 3399 struct ip *ip; 3400 struct ip6_hdr *ip6; 3401 struct tcp_hdr *th; 3402 int curr_txd, ehdrlen, hdr_len, ip_hlen; 3403 uint32_t cmd = 0; 3404 uint16_t etype; 3405 uint8_t ipproto; 3406 3407 /* Setup checksum offload context. */ 3408 curr_txd = adapter->next_avail_tx_desc; 3409 tx_buffer = &adapter->tx_buffer_area[curr_txd]; 3410 TXD = (struct e1000_context_desc *) &adapter->tx_desc_base[curr_txd]; 3411 3412 *txd_lower = E1000_TXD_CMD_DEXT | /* Extended descr type */ 3413 E1000_TXD_DTYP_D; /* Data descr */ 3414 3415 /* 3416 * Determine where frame payload starts. 3417 * Jump over vlan headers if already present, 3418 * helpful for QinQ too. 3419 */ 3420 eh = mtod(mp, struct ether_vlan_header *); 3421 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 3422 etype = ntohs(eh->evl_proto); 3423 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 3424 } else { 3425 etype = ntohs(eh->evl_encap_proto); 3426 ehdrlen = ETHER_HDR_LEN; 3427 } 3428 3429 /* 3430 * We only support TCP/UDP for IPv4 and IPv6 for the moment. 3431 * TODO: Support SCTP too when it hits the tree. 3432 */ 3433 switch (etype) { 3434 case ETHERTYPE_IP: 3435 ip = (struct ip *)(mp->m_data + ehdrlen); 3436 ip_hlen = ip->ip_hl << 2; 3437 3438 /* Setup of IP header checksum. */ 3439 if (mp->m_pkthdr.csum_flags & CSUM_IP) { 3440 /* 3441 * Start offset for header checksum calculation. 3442 * End offset for header checksum calculation. 3443 * Offset of place to put the checksum. 3444 */ 3445 TXD->lower_setup.ip_fields.ipcss = ehdrlen; 3446 TXD->lower_setup.ip_fields.ipcse = 3447 htole16(ehdrlen + ip_hlen); 3448 TXD->lower_setup.ip_fields.ipcso = 3449 ehdrlen + offsetof(struct ip, ip_sum); 3450 cmd |= E1000_TXD_CMD_IP; 3451 *txd_upper |= E1000_TXD_POPTS_IXSM << 8; 3452 } 3453 3454 if (mp->m_len < ehdrlen + ip_hlen) 3455 return; /* failure */ 3456 3457 hdr_len = ehdrlen + ip_hlen; 3458 ipproto = ip->ip_p; 3459 3460 break; 3461 case ETHERTYPE_IPV6: 3462 ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen); 3463 ip_hlen = sizeof(struct ip6_hdr); /* XXX: No header stacking. */ 3464 3465 if (mp->m_len < ehdrlen + ip_hlen) 3466 return; /* failure */ 3467 3468 /* IPv6 doesn't have a header checksum. */ 3469 3470 hdr_len = ehdrlen + ip_hlen; 3471 ipproto = ip6->ip6_nxt; 3472 3473 break; 3474 default: 3475 *txd_upper = 0; 3476 *txd_lower = 0; 3477 return; 3478 } 3479 3480 switch (ipproto) { 3481 case IPPROTO_TCP: 3482 if (mp->m_pkthdr.csum_flags & CSUM_TCP) { 3483 /* 3484 * Start offset for payload checksum calculation. 3485 * End offset for payload checksum calculation. 3486 * Offset of place to put the checksum. 3487 */ 3488 th = (struct tcp_hdr *)(mp->m_data + hdr_len); 3489 TXD->upper_setup.tcp_fields.tucss = hdr_len; 3490 TXD->upper_setup.tcp_fields.tucse = htole16(0); 3491 TXD->upper_setup.tcp_fields.tucso = 3492 hdr_len + offsetof(struct tcphdr, th_sum); 3493 cmd |= E1000_TXD_CMD_TCP; 3494 *txd_upper |= E1000_TXD_POPTS_TXSM << 8; 3495 } 3496 break; 3497 case IPPROTO_UDP: 3498 if (mp->m_pkthdr.csum_flags & CSUM_UDP) { 3499 /* 3500 * Start offset for header checksum calculation. 3501 * End offset for header checksum calculation. 3502 * Offset of place to put the checksum. 3503 */ 3504 TXD->upper_setup.tcp_fields.tucss = hdr_len; 3505 TXD->upper_setup.tcp_fields.tucse = htole16(0); 3506 TXD->upper_setup.tcp_fields.tucso = 3507 hdr_len + offsetof(struct udphdr, uh_sum); 3508 *txd_upper |= E1000_TXD_POPTS_TXSM << 8; 3509 } 3510 break; 3511 default: 3512 break; 3513 } 3514 3515 TXD->tcp_seg_setup.data = htole32(0); 3516 TXD->cmd_and_length = 3517 htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT | cmd); 3518 tx_buffer->m_head = NULL; 3519 tx_buffer->next_eop = -1; 3520 3521 if (++curr_txd == adapter->num_tx_desc) 3522 curr_txd = 0; 3523 3524 adapter->num_tx_desc_avail--; 3525 adapter->next_avail_tx_desc = curr_txd; 3526} 3527 3528 3529#if __FreeBSD_version >= 700000 3530/********************************************************************** 3531 * 3532 * Setup work for hardware segmentation offload (TSO) 3533 * 3534 **********************************************************************/ 3535static bool 3536em_tso_setup(struct adapter *adapter, struct mbuf *mp, uint32_t *txd_upper, 3537 uint32_t *txd_lower) 3538{ 3539 struct e1000_context_desc *TXD; 3540 struct em_buffer *tx_buffer; 3541 struct ether_vlan_header *eh; 3542 struct ip *ip; 3543 struct ip6_hdr *ip6; 3544 struct tcphdr *th; 3545 int curr_txd, ehdrlen, hdr_len, ip_hlen, isip6; 3546 uint16_t etype; 3547 3548 /* 3549 * This function could/should be extended to support IP/IPv6 3550 * fragmentation as well. But as they say, one step at a time. 3551 */ 3552 3553 /* 3554 * Determine where frame payload starts. 3555 * Jump over vlan headers if already present, 3556 * helpful for QinQ too. 3557 */ 3558 eh = mtod(mp, struct ether_vlan_header *); 3559 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 3560 etype = ntohs(eh->evl_proto); 3561 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 3562 } else { 3563 etype = ntohs(eh->evl_encap_proto); 3564 ehdrlen = ETHER_HDR_LEN; 3565 } 3566 3567 /* Ensure we have at least the IP+TCP header in the first mbuf. */ 3568 if (mp->m_len < ehdrlen + sizeof(struct ip) + sizeof(struct tcphdr)) 3569 return FALSE; /* -1 */ 3570 3571 /* 3572 * We only support TCP for IPv4 and IPv6 (notyet) for the moment. 3573 * TODO: Support SCTP too when it hits the tree. 3574 */ 3575 switch (etype) { 3576 case ETHERTYPE_IP: 3577 isip6 = 0; 3578 ip = (struct ip *)(mp->m_data + ehdrlen); 3579 if (ip->ip_p != IPPROTO_TCP) 3580 return FALSE; /* 0 */ 3581 ip->ip_len = 0; 3582 ip->ip_sum = 0; 3583 ip_hlen = ip->ip_hl << 2; 3584 if (mp->m_len < ehdrlen + ip_hlen + sizeof(struct tcphdr)) 3585 return FALSE; /* -1 */ 3586 th = (struct tcphdr *)((caddr_t)ip + ip_hlen); 3587#if 1 3588 th->th_sum = in_pseudo(ip->ip_src.s_addr, 3589 ip->ip_dst.s_addr, htons(IPPROTO_TCP)); 3590#else 3591 th->th_sum = mp->m_pkthdr.csum_data; 3592#endif 3593 break; 3594 case ETHERTYPE_IPV6: 3595 isip6 = 1; 3596 return FALSE; /* Not supported yet. */ 3597 ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen); 3598 if (ip6->ip6_nxt != IPPROTO_TCP) 3599 return FALSE; /* 0 */ 3600 ip6->ip6_plen = 0; 3601 ip_hlen = sizeof(struct ip6_hdr); /* XXX: no header stacking. */ 3602 if (mp->m_len < ehdrlen + ip_hlen + sizeof(struct tcphdr)) 3603 return FALSE; /* -1 */ 3604 th = (struct tcphdr *)((caddr_t)ip6 + ip_hlen); 3605#if 0 3606 th->th_sum = in6_pseudo(ip6->ip6_src, ip->ip6_dst, 3607 htons(IPPROTO_TCP)); /* XXX: function notyet. */ 3608#else 3609 th->th_sum = mp->m_pkthdr.csum_data; 3610#endif 3611 break; 3612 default: 3613 return FALSE; 3614 } 3615 hdr_len = ehdrlen + ip_hlen + (th->th_off << 2); 3616 3617 *txd_lower = (E1000_TXD_CMD_DEXT | /* Extended descr type */ 3618 E1000_TXD_DTYP_D | /* Data descr type */ 3619 E1000_TXD_CMD_TSE); /* Do TSE on this packet */ 3620 3621 /* IP and/or TCP header checksum calculation and insertion. */ 3622 *txd_upper = ((isip6 ? 0 : E1000_TXD_POPTS_IXSM) | 3623 E1000_TXD_POPTS_TXSM) << 8; 3624 3625 curr_txd = adapter->next_avail_tx_desc; 3626 tx_buffer = &adapter->tx_buffer_area[curr_txd]; 3627 TXD = (struct e1000_context_desc *) &adapter->tx_desc_base[curr_txd]; 3628 3629 /* IPv6 doesn't have a header checksum. */ 3630 if (!isip6) { 3631 /* 3632 * Start offset for header checksum calculation. 3633 * End offset for header checksum calculation. 3634 * Offset of place put the checksum. 3635 */ 3636 TXD->lower_setup.ip_fields.ipcss = ehdrlen; 3637 TXD->lower_setup.ip_fields.ipcse = 3638 htole16(ehdrlen + ip_hlen - 1); 3639 TXD->lower_setup.ip_fields.ipcso = 3640 ehdrlen + offsetof(struct ip, ip_sum); 3641 } 3642 /* 3643 * Start offset for payload checksum calculation. 3644 * End offset for payload checksum calculation. 3645 * Offset of place to put the checksum. 3646 */ 3647 TXD->upper_setup.tcp_fields.tucss = 3648 ehdrlen + ip_hlen; 3649 TXD->upper_setup.tcp_fields.tucse = 0; 3650 TXD->upper_setup.tcp_fields.tucso = 3651 ehdrlen + ip_hlen + offsetof(struct tcphdr, th_sum); 3652 /* 3653 * Payload size per packet w/o any headers. 3654 * Length of all headers up to payload. 3655 */ 3656 TXD->tcp_seg_setup.fields.mss = htole16(mp->m_pkthdr.tso_segsz); 3657 TXD->tcp_seg_setup.fields.hdr_len = hdr_len; 3658 3659 TXD->cmd_and_length = htole32(adapter->txd_cmd | 3660 E1000_TXD_CMD_DEXT | /* Extended descr */ 3661 E1000_TXD_CMD_TSE | /* TSE context */ 3662 (isip6 ? 0 : E1000_TXD_CMD_IP) | /* Do IP csum */ 3663 E1000_TXD_CMD_TCP | /* Do TCP checksum */ 3664 (mp->m_pkthdr.len - (hdr_len))); /* Total len */ 3665 3666 tx_buffer->m_head = NULL; 3667 tx_buffer->next_eop = -1; 3668 3669 if (++curr_txd == adapter->num_tx_desc) 3670 curr_txd = 0; 3671 3672 adapter->num_tx_desc_avail--; 3673 adapter->next_avail_tx_desc = curr_txd; 3674 adapter->tx_tso = TRUE; 3675 3676 return TRUE; 3677} 3678 3679 3680/********************************************************************** 3681 * 3682 * Setup work for hardware segmentation offload (TSO) on 3683 * adapters using advanced tx descriptors (82575) 3684 * 3685 **********************************************************************/ 3686static boolean_t 3687em_tso_adv_setup(struct adapter *adapter, struct mbuf *mp, u32 *hdrlen) 3688{ 3689 struct e1000_adv_tx_context_desc *TXD; 3690 struct em_buffer *tx_buffer; 3691 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0; 3692 u32 mss_l4len_idx = 0; 3693 u16 vtag = 0; 3694 int ctxd, ehdrlen, ip_hlen, tcp_hlen; 3695 struct ether_vlan_header *eh; 3696 struct ip *ip; 3697 struct tcphdr *th; 3698 3699 /* 3700 * Determine where frame payload starts. 3701 * Jump over vlan headers if already present 3702 */ 3703 eh = mtod(mp, struct ether_vlan_header *); 3704 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) 3705 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 3706 else 3707 ehdrlen = ETHER_HDR_LEN; 3708 3709 /* Ensure we have at least the IP+TCP header in the first mbuf. */ 3710 if (mp->m_len < ehdrlen + sizeof(struct ip) + sizeof(struct tcphdr)) 3711 return FALSE; 3712 3713 /* Only supports IPV4 for now */ 3714 ctxd = adapter->next_avail_tx_desc; 3715 tx_buffer = &adapter->tx_buffer_area[ctxd]; 3716 TXD = (struct e1000_adv_tx_context_desc *) &adapter->tx_desc_base[ctxd]; 3717 3718 ip = (struct ip *)(mp->m_data + ehdrlen); 3719 if (ip->ip_p != IPPROTO_TCP) 3720 return FALSE; /* 0 */ 3721 ip->ip_len = 0; 3722 ip->ip_sum = 0; 3723 ip_hlen = ip->ip_hl << 2; 3724 th = (struct tcphdr *)((caddr_t)ip + ip_hlen); 3725 th->th_sum = in_pseudo(ip->ip_src.s_addr, 3726 ip->ip_dst.s_addr, htons(IPPROTO_TCP)); 3727 tcp_hlen = th->th_off << 2; 3728 /* 3729 * Calculate header length, this is used 3730 * in the transmit desc in igb_encap 3731 */ 3732 *hdrlen = ehdrlen + ip_hlen + tcp_hlen; 3733 3734 /* VLAN MACLEN IPLEN */ 3735 if (mp->m_flags & M_VLANTAG) { 3736 vtag = htole16(mp->m_pkthdr.ether_vtag); 3737 vlan_macip_lens |= (vtag << E1000_ADVTXD_VLAN_SHIFT); 3738 } 3739 3740 vlan_macip_lens |= (ehdrlen << E1000_ADVTXD_MACLEN_SHIFT); 3741 vlan_macip_lens |= ip_hlen; 3742 TXD->vlan_macip_lens |= htole32(vlan_macip_lens); 3743 3744 /* ADV DTYPE TUCMD */ 3745 type_tucmd_mlhl |= E1000_ADVTXD_DCMD_DEXT | E1000_ADVTXD_DTYP_CTXT; 3746 type_tucmd_mlhl |= E1000_ADVTXD_TUCMD_L4T_TCP; 3747 type_tucmd_mlhl |= E1000_ADVTXD_TUCMD_IPV4; 3748 TXD->type_tucmd_mlhl |= htole32(type_tucmd_mlhl); 3749 3750 /* MSS L4LEN IDX */ 3751 mss_l4len_idx |= (mp->m_pkthdr.tso_segsz << E1000_ADVTXD_MSS_SHIFT); 3752 mss_l4len_idx |= (tcp_hlen << E1000_ADVTXD_L4LEN_SHIFT); 3753 TXD->mss_l4len_idx = htole32(mss_l4len_idx); 3754 3755 TXD->seqnum_seed = htole32(0); 3756 tx_buffer->m_head = NULL; 3757 tx_buffer->next_eop = -1; 3758 3759 if (++ctxd == adapter->num_tx_desc) 3760 ctxd = 0; 3761 3762 adapter->num_tx_desc_avail--; 3763 adapter->next_avail_tx_desc = ctxd; 3764 return TRUE; 3765} 3766 3767#endif /* FreeBSD_version >= 700000 */ 3768 3769/********************************************************************* 3770 * 3771 * Advanced Context Descriptor setup for VLAN or CSUM 3772 * 3773 **********************************************************************/ 3774 3775static boolean_t 3776em_tx_adv_ctx_setup(struct adapter *adapter, struct mbuf *mp) 3777{ 3778 struct e1000_adv_tx_context_desc *TXD; 3779 struct em_buffer *tx_buffer; 3780 uint32_t vlan_macip_lens = 0, type_tucmd_mlhl = 0; 3781 struct ether_vlan_header *eh; 3782 struct ip *ip; 3783 struct ip6_hdr *ip6; 3784 int ehdrlen, ip_hlen = 0; 3785 u16 etype; 3786 u8 ipproto = 0; 3787 bool offload = TRUE; 3788#if __FreeBSD_version < 700000 3789 struct m_tag *mtag; 3790#else 3791 u16 vtag = 0; 3792#endif 3793 3794 int ctxd = adapter->next_avail_tx_desc; 3795 tx_buffer = &adapter->tx_buffer_area[ctxd]; 3796 TXD = (struct e1000_adv_tx_context_desc *) &adapter->tx_desc_base[ctxd]; 3797 3798 if ((mp->m_pkthdr.csum_flags & CSUM_OFFLOAD) == 0) 3799 offload = FALSE; /* Only here to handle VLANs */ 3800 /* 3801 ** In advanced descriptors the vlan tag must 3802 ** be placed into the descriptor itself. 3803 */ 3804#if __FreeBSD_version < 700000 3805 mtag = VLAN_OUTPUT_TAG(ifp, mp); 3806 if (mtag != NULL) { 3807 vlan_macip_lens |= 3808 htole16(VLAN_TAG_VALUE(mtag)) << E1000_ADVTXD_VLAN_SHIFT; 3809 } else if (offload == FALSE) 3810 return FALSE; /* No CTX needed */ 3811#else 3812 if (mp->m_flags & M_VLANTAG) { 3813 vtag = htole16(mp->m_pkthdr.ether_vtag); 3814 vlan_macip_lens |= (vtag << E1000_ADVTXD_VLAN_SHIFT); 3815 } else if (offload == FALSE) 3816 return FALSE; 3817#endif 3818 /* 3819 * Determine where frame payload starts. 3820 * Jump over vlan headers if already present, 3821 * helpful for QinQ too. 3822 */ 3823 eh = mtod(mp, struct ether_vlan_header *); 3824 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 3825 etype = ntohs(eh->evl_proto); 3826 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 3827 } else { 3828 etype = ntohs(eh->evl_encap_proto); 3829 ehdrlen = ETHER_HDR_LEN; 3830 } 3831 3832 /* Set the ether header length */ 3833 vlan_macip_lens |= ehdrlen << E1000_ADVTXD_MACLEN_SHIFT; 3834 3835 switch (etype) { 3836 case ETHERTYPE_IP: 3837 ip = (struct ip *)(mp->m_data + ehdrlen); 3838 ip_hlen = ip->ip_hl << 2; 3839 if (mp->m_len < ehdrlen + ip_hlen) { 3840 offload = FALSE; 3841 break; 3842 } 3843 ipproto = ip->ip_p; 3844 type_tucmd_mlhl |= E1000_ADVTXD_TUCMD_IPV4; 3845 break; 3846 case ETHERTYPE_IPV6: 3847 ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen); 3848 ip_hlen = sizeof(struct ip6_hdr); 3849 if (mp->m_len < ehdrlen + ip_hlen) 3850 return FALSE; /* failure */ 3851 ipproto = ip6->ip6_nxt; 3852 type_tucmd_mlhl |= E1000_ADVTXD_TUCMD_IPV6; 3853 break; 3854 default: 3855 offload = FALSE; 3856 break; 3857 } 3858 3859 vlan_macip_lens |= ip_hlen; 3860 type_tucmd_mlhl |= E1000_ADVTXD_DCMD_DEXT | E1000_ADVTXD_DTYP_CTXT; 3861 3862 switch (ipproto) { 3863 case IPPROTO_TCP: 3864 if (mp->m_pkthdr.csum_flags & CSUM_TCP) 3865 type_tucmd_mlhl |= E1000_ADVTXD_TUCMD_L4T_TCP; 3866 break; 3867 case IPPROTO_UDP: 3868 if (mp->m_pkthdr.csum_flags & CSUM_UDP) 3869 type_tucmd_mlhl |= E1000_ADVTXD_TUCMD_L4T_UDP; 3870 break; 3871 default: 3872 offload = FALSE; 3873 break; 3874 } 3875 3876 /* Now copy bits into descriptor */ 3877 TXD->vlan_macip_lens |= htole32(vlan_macip_lens); 3878 TXD->type_tucmd_mlhl |= htole32(type_tucmd_mlhl); 3879 TXD->seqnum_seed = htole32(0); 3880 TXD->mss_l4len_idx = htole32(0); 3881 3882 tx_buffer->m_head = NULL; 3883 tx_buffer->next_eop = -1; 3884 3885 /* We've consumed the first desc, adjust counters */ 3886 if (++ctxd == adapter->num_tx_desc) 3887 ctxd = 0; 3888 adapter->next_avail_tx_desc = ctxd; 3889 --adapter->num_tx_desc_avail; 3890 3891 return (offload); 3892} 3893 3894 3895/********************************************************************** 3896 * 3897 * Examine each tx_buffer in the used queue. If the hardware is done 3898 * processing the packet then free associated resources. The 3899 * tx_buffer is put back on the free queue. 3900 * 3901 **********************************************************************/ 3902static void 3903em_txeof(struct adapter *adapter) 3904{ 3905 int first, last, done, num_avail; 3906 struct em_buffer *tx_buffer; 3907 struct e1000_tx_desc *tx_desc, *eop_desc; 3908 struct ifnet *ifp = adapter->ifp; 3909 3910 EM_TX_LOCK_ASSERT(adapter); 3911 3912 if (adapter->num_tx_desc_avail == adapter->num_tx_desc) 3913 return; 3914 3915 num_avail = adapter->num_tx_desc_avail; 3916 first = adapter->next_tx_to_clean; 3917 tx_desc = &adapter->tx_desc_base[first]; 3918 tx_buffer = &adapter->tx_buffer_area[first]; 3919 last = tx_buffer->next_eop; 3920 eop_desc = &adapter->tx_desc_base[last]; 3921 3922 /* 3923 * What this does is get the index of the 3924 * first descriptor AFTER the EOP of the 3925 * first packet, that way we can do the 3926 * simple comparison on the inner while loop. 3927 */ 3928 if (++last == adapter->num_tx_desc) 3929 last = 0; 3930 done = last; 3931 3932 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 3933 BUS_DMASYNC_POSTREAD); 3934 3935 while (eop_desc->upper.fields.status & E1000_TXD_STAT_DD) { 3936 /* We clean the range of the packet */ 3937 while (first != done) { 3938 tx_desc->upper.data = 0; 3939 tx_desc->lower.data = 0; 3940 tx_desc->buffer_addr = 0; 3941 num_avail++; 3942 3943 if (tx_buffer->m_head) { 3944 ifp->if_opackets++; 3945 bus_dmamap_sync(adapter->txtag, 3946 tx_buffer->map, 3947 BUS_DMASYNC_POSTWRITE); 3948 bus_dmamap_unload(adapter->txtag, 3949 tx_buffer->map); 3950 3951 m_freem(tx_buffer->m_head); 3952 tx_buffer->m_head = NULL; 3953 } 3954 tx_buffer->next_eop = -1; 3955 3956 if (++first == adapter->num_tx_desc) 3957 first = 0; 3958 3959 tx_buffer = &adapter->tx_buffer_area[first]; 3960 tx_desc = &adapter->tx_desc_base[first]; 3961 } 3962 /* See if we can continue to the next packet */ 3963 last = tx_buffer->next_eop; 3964 if (last != -1) { 3965 eop_desc = &adapter->tx_desc_base[last]; 3966 /* Get new done point */ 3967 if (++last == adapter->num_tx_desc) last = 0; 3968 done = last; 3969 } else 3970 break; 3971 } 3972 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 3973 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 3974 3975 adapter->next_tx_to_clean = first; 3976 3977 /* 3978 * If we have enough room, clear IFF_DRV_OACTIVE to tell the stack 3979 * that it is OK to send packets. 3980 * If there are no pending descriptors, clear the timeout. Otherwise, 3981 * if some descriptors have been freed, restart the timeout. 3982 */ 3983 if (num_avail > EM_TX_CLEANUP_THRESHOLD) { 3984 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 3985 /* All clean, turn off the timer */ 3986 if (num_avail == adapter->num_tx_desc) 3987 adapter->watchdog_timer = 0; 3988 /* Some cleaned, reset the timer */ 3989 else if (num_avail != adapter->num_tx_desc_avail) 3990 adapter->watchdog_timer = EM_TX_TIMEOUT; 3991 } 3992 adapter->num_tx_desc_avail = num_avail; 3993 return; 3994} 3995 3996/********************************************************************* 3997 * 3998 * When Link is lost sometimes there is work still in the TX ring 3999 * which will result in a watchdog, rather than allow that do an 4000 * attempted cleanup and then reinit here. Note that this has been 4001 * seens mostly with fiber adapters. 4002 * 4003 **********************************************************************/ 4004static void 4005em_tx_purge(struct adapter *adapter) 4006{ 4007 if ((!adapter->link_active) && (adapter->watchdog_timer)) { 4008 EM_TX_LOCK(adapter); 4009 em_txeof(adapter); 4010 EM_TX_UNLOCK(adapter); 4011 if (adapter->watchdog_timer) { /* Still not clean? */ 4012 adapter->watchdog_timer = 0; 4013 em_init_locked(adapter); 4014 } 4015 } 4016} 4017 4018/********************************************************************* 4019 * 4020 * Get a buffer from system mbuf buffer pool. 4021 * 4022 **********************************************************************/ 4023static int 4024em_get_buf(struct adapter *adapter, int i) 4025{ 4026 struct mbuf *m; 4027 bus_dma_segment_t segs[1]; 4028 bus_dmamap_t map; 4029 struct em_buffer *rx_buffer; 4030 int error, nsegs; 4031 4032 m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 4033 if (m == NULL) { 4034 adapter->mbuf_cluster_failed++; 4035 return (ENOBUFS); 4036 } 4037 m->m_len = m->m_pkthdr.len = MCLBYTES; 4038 4039 if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN)) 4040 m_adj(m, ETHER_ALIGN); 4041 4042 /* 4043 * Using memory from the mbuf cluster pool, invoke the 4044 * bus_dma machinery to arrange the memory mapping. 4045 */ 4046 error = bus_dmamap_load_mbuf_sg(adapter->rxtag, 4047 adapter->rx_sparemap, m, segs, &nsegs, BUS_DMA_NOWAIT); 4048 if (error != 0) { 4049 m_free(m); 4050 return (error); 4051 } 4052 4053 /* If nsegs is wrong then the stack is corrupt. */ 4054 KASSERT(nsegs == 1, ("Too many segments returned!")); 4055 4056 rx_buffer = &adapter->rx_buffer_area[i]; 4057 if (rx_buffer->m_head != NULL) 4058 bus_dmamap_unload(adapter->rxtag, rx_buffer->map); 4059 4060 map = rx_buffer->map; 4061 rx_buffer->map = adapter->rx_sparemap; 4062 adapter->rx_sparemap = map; 4063 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD); 4064 rx_buffer->m_head = m; 4065 4066 adapter->rx_desc_base[i].buffer_addr = htole64(segs[0].ds_addr); 4067 return (0); 4068} 4069 4070/********************************************************************* 4071 * 4072 * Allocate memory for rx_buffer structures. Since we use one 4073 * rx_buffer per received packet, the maximum number of rx_buffer's 4074 * that we'll need is equal to the number of receive descriptors 4075 * that we've allocated. 4076 * 4077 **********************************************************************/ 4078static int 4079em_allocate_receive_structures(struct adapter *adapter) 4080{ 4081 device_t dev = adapter->dev; 4082 struct em_buffer *rx_buffer; 4083 int i, error; 4084 4085 adapter->rx_buffer_area = malloc(sizeof(struct em_buffer) * 4086 adapter->num_rx_desc, M_DEVBUF, M_NOWAIT | M_ZERO); 4087 if (adapter->rx_buffer_area == NULL) { 4088 device_printf(dev, "Unable to allocate rx_buffer memory\n"); 4089 return (ENOMEM); 4090 } 4091 4092#if __FreeBSD_version >= 700000 4093 error = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 4094#else 4095 error = bus_dma_tag_create(NULL, /* parent */ 4096#endif 4097 1, 0, /* alignment, bounds */ 4098 BUS_SPACE_MAXADDR, /* lowaddr */ 4099 BUS_SPACE_MAXADDR, /* highaddr */ 4100 NULL, NULL, /* filter, filterarg */ 4101 MCLBYTES, /* maxsize */ 4102 1, /* nsegments */ 4103 MCLBYTES, /* maxsegsize */ 4104 0, /* flags */ 4105 NULL, /* lockfunc */ 4106 NULL, /* lockarg */ 4107 &adapter->rxtag); 4108 if (error) { 4109 device_printf(dev, "%s: bus_dma_tag_create failed %d\n", 4110 __func__, error); 4111 goto fail; 4112 } 4113 4114 /* Create the spare map (used by getbuf) */ 4115 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT, 4116 &adapter->rx_sparemap); 4117 if (error) { 4118 device_printf(dev, "%s: bus_dmamap_create failed: %d\n", 4119 __func__, error); 4120 goto fail; 4121 } 4122 4123 rx_buffer = adapter->rx_buffer_area; 4124 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 4125 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT, 4126 &rx_buffer->map); 4127 if (error) { 4128 device_printf(dev, "%s: bus_dmamap_create failed: %d\n", 4129 __func__, error); 4130 goto fail; 4131 } 4132 } 4133 4134 return (0); 4135 4136fail: 4137 em_free_receive_structures(adapter); 4138 return (error); 4139} 4140 4141/********************************************************************* 4142 * 4143 * (Re)initialize receive structures. 4144 * 4145 **********************************************************************/ 4146static int 4147em_setup_receive_structures(struct adapter *adapter) 4148{ 4149 struct em_buffer *rx_buffer; 4150 int i, error; 4151 4152 /* Reset descriptor ring */ 4153 bzero(adapter->rx_desc_base, 4154 (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc); 4155 4156 /* Free current RX buffers. */ 4157 rx_buffer = adapter->rx_buffer_area; 4158 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 4159 if (rx_buffer->m_head != NULL) { 4160 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, 4161 BUS_DMASYNC_POSTREAD); 4162 bus_dmamap_unload(adapter->rxtag, rx_buffer->map); 4163 m_freem(rx_buffer->m_head); 4164 rx_buffer->m_head = NULL; 4165 } 4166 } 4167 4168 /* Allocate new ones. */ 4169 for (i = 0; i < adapter->num_rx_desc; i++) { 4170 error = em_get_buf(adapter, i); 4171 if (error) 4172 return (error); 4173 } 4174 4175 /* Setup our descriptor pointers */ 4176 adapter->next_rx_desc_to_check = 0; 4177 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 4178 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 4179 4180 return (0); 4181} 4182 4183/********************************************************************* 4184 * 4185 * Enable receive unit. 4186 * 4187 **********************************************************************/ 4188static void 4189em_initialize_receive_unit(struct adapter *adapter) 4190{ 4191 struct ifnet *ifp = adapter->ifp; 4192 uint64_t bus_addr; 4193 uint32_t reg_rctl; 4194 uint32_t reg_rxcsum; 4195 4196 INIT_DEBUGOUT("em_initialize_receive_unit: begin"); 4197 4198 /* 4199 * Make sure receives are disabled while setting 4200 * up the descriptor ring 4201 */ 4202 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 4203 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl & ~E1000_RCTL_EN); 4204 4205 if(adapter->hw.mac.type >= e1000_82540) { 4206 E1000_WRITE_REG(&adapter->hw, E1000_RADV, 4207 adapter->rx_abs_int_delay.value); 4208 /* 4209 * Set the interrupt throttling rate. Value is calculated 4210 * as DEFAULT_ITR = 1/(MAX_INTS_PER_SEC * 256ns) 4211 */ 4212#define MAX_INTS_PER_SEC 8000 4213#define DEFAULT_ITR 1000000000/(MAX_INTS_PER_SEC * 256) 4214 E1000_WRITE_REG(&adapter->hw, E1000_ITR, DEFAULT_ITR); 4215 } 4216 4217 /* Setup the Base and Length of the Rx Descriptor Ring */ 4218 bus_addr = adapter->rxdma.dma_paddr; 4219 E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0), 4220 adapter->num_rx_desc * sizeof(struct e1000_rx_desc)); 4221 E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0), 4222 (uint32_t)(bus_addr >> 32)); 4223 E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0), 4224 (uint32_t)bus_addr); 4225 4226 /* Setup the Receive Control Register */ 4227 reg_rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 4228 reg_rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO | 4229 E1000_RCTL_RDMTS_HALF | 4230 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 4231 4232 /* Make sure VLAN Filters are off */ 4233 reg_rctl &= ~E1000_RCTL_VFE; 4234 4235 if (e1000_tbi_sbp_enabled_82543(&adapter->hw)) 4236 reg_rctl |= E1000_RCTL_SBP; 4237 else 4238 reg_rctl &= ~E1000_RCTL_SBP; 4239 4240 switch (adapter->rx_buffer_len) { 4241 default: 4242 case 2048: 4243 reg_rctl |= E1000_RCTL_SZ_2048; 4244 break; 4245 case 4096: 4246 reg_rctl |= E1000_RCTL_SZ_4096 | 4247 E1000_RCTL_BSEX | E1000_RCTL_LPE; 4248 break; 4249 case 8192: 4250 reg_rctl |= E1000_RCTL_SZ_8192 | 4251 E1000_RCTL_BSEX | E1000_RCTL_LPE; 4252 break; 4253 case 16384: 4254 reg_rctl |= E1000_RCTL_SZ_16384 | 4255 E1000_RCTL_BSEX | E1000_RCTL_LPE; 4256 break; 4257 } 4258 4259 if (ifp->if_mtu > ETHERMTU) 4260 reg_rctl |= E1000_RCTL_LPE; 4261 else 4262 reg_rctl &= ~E1000_RCTL_LPE; 4263 4264 /* Enable 82543 Receive Checksum Offload for TCP and UDP */ 4265 if ((adapter->hw.mac.type >= e1000_82543) && 4266 (ifp->if_capenable & IFCAP_RXCSUM)) { 4267 reg_rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM); 4268 reg_rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL); 4269 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, reg_rxcsum); 4270 } 4271 4272 /* 4273 ** XXX TEMPORARY WORKAROUND: on some systems with 82573 4274 ** long latencies are observed, like Lenovo X60. This 4275 ** change eliminates the problem, but since having positive 4276 ** values in RDTR is a known source of problems on other 4277 ** platforms another solution is being sought. 4278 */ 4279 if (adapter->hw.mac.type == e1000_82573) 4280 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, 0x20); 4281 4282 /* Enable Receives */ 4283 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 4284 4285 /* 4286 * Setup the HW Rx Head and 4287 * Tail Descriptor Pointers 4288 */ 4289 E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0); 4290 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1); 4291 4292 return; 4293} 4294 4295/********************************************************************* 4296 * 4297 * Free receive related data structures. 4298 * 4299 **********************************************************************/ 4300static void 4301em_free_receive_structures(struct adapter *adapter) 4302{ 4303 struct em_buffer *rx_buffer; 4304 int i; 4305 4306 INIT_DEBUGOUT("free_receive_structures: begin"); 4307 4308 if (adapter->rx_sparemap) { 4309 bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap); 4310 adapter->rx_sparemap = NULL; 4311 } 4312 4313 /* Cleanup any existing buffers */ 4314 if (adapter->rx_buffer_area != NULL) { 4315 rx_buffer = adapter->rx_buffer_area; 4316 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 4317 if (rx_buffer->m_head != NULL) { 4318 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, 4319 BUS_DMASYNC_POSTREAD); 4320 bus_dmamap_unload(adapter->rxtag, 4321 rx_buffer->map); 4322 m_freem(rx_buffer->m_head); 4323 rx_buffer->m_head = NULL; 4324 } else if (rx_buffer->map != NULL) 4325 bus_dmamap_unload(adapter->rxtag, 4326 rx_buffer->map); 4327 if (rx_buffer->map != NULL) { 4328 bus_dmamap_destroy(adapter->rxtag, 4329 rx_buffer->map); 4330 rx_buffer->map = NULL; 4331 } 4332 } 4333 } 4334 4335 if (adapter->rx_buffer_area != NULL) { 4336 free(adapter->rx_buffer_area, M_DEVBUF); 4337 adapter->rx_buffer_area = NULL; 4338 } 4339 4340 if (adapter->rxtag != NULL) { 4341 bus_dma_tag_destroy(adapter->rxtag); 4342 adapter->rxtag = NULL; 4343 } 4344} 4345 4346/********************************************************************* 4347 * 4348 * This routine executes in interrupt context. It replenishes 4349 * the mbufs in the descriptor and sends data which has been 4350 * dma'ed into host memory to upper layer. 4351 * 4352 * We loop at most count times if count is > 0, or until done if 4353 * count < 0. 4354 * 4355 *********************************************************************/ 4356static int 4357em_rxeof(struct adapter *adapter, int count) 4358{ 4359 struct ifnet *ifp; 4360 struct mbuf *mp; 4361 uint8_t accept_frame = 0; 4362 uint8_t eop = 0; 4363 uint16_t len, desc_len, prev_len_adj; 4364 int i; 4365 4366 /* Pointer to the receive descriptor being examined. */ 4367 struct e1000_rx_desc *current_desc; 4368 uint8_t status; 4369 4370 ifp = adapter->ifp; 4371 i = adapter->next_rx_desc_to_check; 4372 current_desc = &adapter->rx_desc_base[i]; 4373 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 4374 BUS_DMASYNC_POSTREAD); 4375 4376 if (!((current_desc->status) & E1000_RXD_STAT_DD)) 4377 return (0); 4378 4379 while ((current_desc->status & E1000_RXD_STAT_DD) && 4380 (count != 0) && 4381 (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 4382 struct mbuf *m = NULL; 4383 4384 mp = adapter->rx_buffer_area[i].m_head; 4385 /* 4386 * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT 4387 * needs to access the last received byte in the mbuf. 4388 */ 4389 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map, 4390 BUS_DMASYNC_POSTREAD); 4391 4392 accept_frame = 1; 4393 prev_len_adj = 0; 4394 desc_len = le16toh(current_desc->length); 4395 status = current_desc->status; 4396 if (status & E1000_RXD_STAT_EOP) { 4397 count--; 4398 eop = 1; 4399 if (desc_len < ETHER_CRC_LEN) { 4400 len = 0; 4401 prev_len_adj = ETHER_CRC_LEN - desc_len; 4402 } else 4403 len = desc_len - ETHER_CRC_LEN; 4404 } else { 4405 eop = 0; 4406 len = desc_len; 4407 } 4408 4409 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 4410 uint8_t last_byte; 4411 uint32_t pkt_len = desc_len; 4412 4413 if (adapter->fmp != NULL) 4414 pkt_len += adapter->fmp->m_pkthdr.len; 4415 4416 last_byte = *(mtod(mp, caddr_t) + desc_len - 1); 4417 if (TBI_ACCEPT(&adapter->hw, status, 4418 current_desc->errors, pkt_len, last_byte, 4419 adapter->min_frame_size, adapter->max_frame_size)) { 4420 e1000_tbi_adjust_stats_82543(&adapter->hw, 4421 &adapter->stats, pkt_len, 4422 adapter->hw.mac.addr, 4423 adapter->max_frame_size); 4424 if (len > 0) 4425 len--; 4426 } else 4427 accept_frame = 0; 4428 } 4429 4430 if (accept_frame) { 4431 if (em_get_buf(adapter, i) != 0) { 4432 ifp->if_iqdrops++; 4433 goto discard; 4434 } 4435 4436 /* Assign correct length to the current fragment */ 4437 mp->m_len = len; 4438 4439 if (adapter->fmp == NULL) { 4440 mp->m_pkthdr.len = len; 4441 adapter->fmp = mp; /* Store the first mbuf */ 4442 adapter->lmp = mp; 4443 } else { 4444 /* Chain mbuf's together */ 4445 mp->m_flags &= ~M_PKTHDR; 4446 /* 4447 * Adjust length of previous mbuf in chain if 4448 * we received less than 4 bytes in the last 4449 * descriptor. 4450 */ 4451 if (prev_len_adj > 0) { 4452 adapter->lmp->m_len -= prev_len_adj; 4453 adapter->fmp->m_pkthdr.len -= 4454 prev_len_adj; 4455 } 4456 adapter->lmp->m_next = mp; 4457 adapter->lmp = adapter->lmp->m_next; 4458 adapter->fmp->m_pkthdr.len += len; 4459 } 4460 4461 if (eop) { 4462 adapter->fmp->m_pkthdr.rcvif = ifp; 4463 ifp->if_ipackets++; 4464 em_receive_checksum(adapter, current_desc, 4465 adapter->fmp); 4466#ifndef __NO_STRICT_ALIGNMENT 4467 if (adapter->max_frame_size > 4468 (MCLBYTES - ETHER_ALIGN) && 4469 em_fixup_rx(adapter) != 0) 4470 goto skip; 4471#endif 4472 if (status & E1000_RXD_STAT_VP) { 4473#if __FreeBSD_version < 700000 4474 VLAN_INPUT_TAG_NEW(ifp, adapter->fmp, 4475 (le16toh(current_desc->special) & 4476 E1000_RXD_SPC_VLAN_MASK)); 4477#else 4478 adapter->fmp->m_pkthdr.ether_vtag = 4479 (le16toh(current_desc->special) & 4480 E1000_RXD_SPC_VLAN_MASK); 4481 adapter->fmp->m_flags |= M_VLANTAG; 4482#endif 4483 } 4484#ifndef __NO_STRICT_ALIGNMENT 4485skip: 4486#endif 4487 m = adapter->fmp; 4488 adapter->fmp = NULL; 4489 adapter->lmp = NULL; 4490 } 4491 } else { 4492 ifp->if_ierrors++; 4493discard: 4494 /* Reuse loaded DMA map and just update mbuf chain */ 4495 mp = adapter->rx_buffer_area[i].m_head; 4496 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 4497 mp->m_data = mp->m_ext.ext_buf; 4498 mp->m_next = NULL; 4499 if (adapter->max_frame_size <= 4500 (MCLBYTES - ETHER_ALIGN)) 4501 m_adj(mp, ETHER_ALIGN); 4502 if (adapter->fmp != NULL) { 4503 m_freem(adapter->fmp); 4504 adapter->fmp = NULL; 4505 adapter->lmp = NULL; 4506 } 4507 m = NULL; 4508 } 4509 4510 /* Zero out the receive descriptors status. */ 4511 current_desc->status = 0; 4512 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 4513 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 4514 4515 /* Advance our pointers to the next descriptor. */ 4516 if (++i == adapter->num_rx_desc) 4517 i = 0; 4518 if (m != NULL) { 4519 adapter->next_rx_desc_to_check = i; 4520#ifndef EM_FAST_IRQ 4521 EM_CORE_UNLOCK(adapter); 4522 (*ifp->if_input)(ifp, m); 4523 EM_CORE_LOCK(adapter); 4524#else 4525 /* Already running unlocked */ 4526 (*ifp->if_input)(ifp, m); 4527#endif 4528 i = adapter->next_rx_desc_to_check; 4529 } 4530 current_desc = &adapter->rx_desc_base[i]; 4531 } 4532 adapter->next_rx_desc_to_check = i; 4533 4534 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */ 4535 if (--i < 0) 4536 i = adapter->num_rx_desc - 1; 4537 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i); 4538 if (!((current_desc->status) & E1000_RXD_STAT_DD)) 4539 return (0); 4540 4541 return (1); 4542} 4543 4544#ifndef __NO_STRICT_ALIGNMENT 4545/* 4546 * When jumbo frames are enabled we should realign entire payload on 4547 * architecures with strict alignment. This is serious design mistake of 8254x 4548 * as it nullifies DMA operations. 8254x just allows RX buffer size to be 4549 * 2048/4096/8192/16384. What we really want is 2048 - ETHER_ALIGN to align its 4550 * payload. On architecures without strict alignment restrictions 8254x still 4551 * performs unaligned memory access which would reduce the performance too. 4552 * To avoid copying over an entire frame to align, we allocate a new mbuf and 4553 * copy ethernet header to the new mbuf. The new mbuf is prepended into the 4554 * existing mbuf chain. 4555 * 4556 * Be aware, best performance of the 8254x is achived only when jumbo frame is 4557 * not used at all on architectures with strict alignment. 4558 */ 4559static int 4560em_fixup_rx(struct adapter *adapter) 4561{ 4562 struct mbuf *m, *n; 4563 int error; 4564 4565 error = 0; 4566 m = adapter->fmp; 4567 if (m->m_len <= (MCLBYTES - ETHER_HDR_LEN)) { 4568 bcopy(m->m_data, m->m_data + ETHER_HDR_LEN, m->m_len); 4569 m->m_data += ETHER_HDR_LEN; 4570 } else { 4571 MGETHDR(n, M_DONTWAIT, MT_DATA); 4572 if (n != NULL) { 4573 bcopy(m->m_data, n->m_data, ETHER_HDR_LEN); 4574 m->m_data += ETHER_HDR_LEN; 4575 m->m_len -= ETHER_HDR_LEN; 4576 n->m_len = ETHER_HDR_LEN; 4577 M_MOVE_PKTHDR(n, m); 4578 n->m_next = m; 4579 adapter->fmp = n; 4580 } else { 4581 adapter->dropped_pkts++; 4582 m_freem(adapter->fmp); 4583 adapter->fmp = NULL; 4584 error = ENOMEM; 4585 } 4586 } 4587 4588 return (error); 4589} 4590#endif 4591 4592/********************************************************************* 4593 * 4594 * Verify that the hardware indicated that the checksum is valid. 4595 * Inform the stack about the status of checksum so that stack 4596 * doesn't spend time verifying the checksum. 4597 * 4598 *********************************************************************/ 4599static void 4600em_receive_checksum(struct adapter *adapter, 4601 struct e1000_rx_desc *rx_desc, struct mbuf *mp) 4602{ 4603 /* 82543 or newer only */ 4604 if ((adapter->hw.mac.type < e1000_82543) || 4605 /* Ignore Checksum bit is set */ 4606 (rx_desc->status & E1000_RXD_STAT_IXSM)) { 4607 mp->m_pkthdr.csum_flags = 0; 4608 return; 4609 } 4610 4611 if (rx_desc->status & E1000_RXD_STAT_IPCS) { 4612 /* Did it pass? */ 4613 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) { 4614 /* IP Checksum Good */ 4615 mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED; 4616 mp->m_pkthdr.csum_flags |= CSUM_IP_VALID; 4617 4618 } else { 4619 mp->m_pkthdr.csum_flags = 0; 4620 } 4621 } 4622 4623 if (rx_desc->status & E1000_RXD_STAT_TCPCS) { 4624 /* Did it pass? */ 4625 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) { 4626 mp->m_pkthdr.csum_flags |= 4627 (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); 4628 mp->m_pkthdr.csum_data = htons(0xffff); 4629 } 4630 } 4631} 4632 4633/* 4634 * This turns on the hardware offload of the VLAN 4635 * tag insertion and strip 4636 */ 4637static void 4638em_enable_hw_vlans(struct adapter *adapter) 4639{ 4640 uint32_t ctrl; 4641 4642 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL); 4643 ctrl |= E1000_CTRL_VME; 4644 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl); 4645} 4646 4647static void 4648em_enable_intr(struct adapter *adapter) 4649{ 4650 E1000_WRITE_REG(&adapter->hw, E1000_IMS, 4651 (IMS_ENABLE_MASK)); 4652} 4653 4654static void 4655em_disable_intr(struct adapter *adapter) 4656{ 4657 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff); 4658} 4659 4660/* 4661 * Bit of a misnomer, what this really means is 4662 * to enable OS management of the system... aka 4663 * to disable special hardware management features 4664 */ 4665static void 4666em_init_manageability(struct adapter *adapter) 4667{ 4668 /* A shared code workaround */ 4669#define E1000_82542_MANC2H E1000_MANC2H 4670 if (adapter->has_manage) { 4671 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H); 4672 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC); 4673 4674 /* disable hardware interception of ARP */ 4675 manc &= ~(E1000_MANC_ARP_EN); 4676 4677 /* enable receiving management packets to the host */ 4678 if (adapter->hw.mac.type >= e1000_82571) { 4679 manc |= E1000_MANC_EN_MNG2HOST; 4680#define E1000_MNG2HOST_PORT_623 (1 << 5) 4681#define E1000_MNG2HOST_PORT_664 (1 << 6) 4682 manc2h |= E1000_MNG2HOST_PORT_623; 4683 manc2h |= E1000_MNG2HOST_PORT_664; 4684 E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h); 4685 } 4686 4687 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc); 4688 } 4689} 4690 4691/* 4692 * Give control back to hardware management 4693 * controller if there is one. 4694 */ 4695static void 4696em_release_manageability(struct adapter *adapter) 4697{ 4698 if (adapter->has_manage) { 4699 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC); 4700 4701 /* re-enable hardware interception of ARP */ 4702 manc |= E1000_MANC_ARP_EN; 4703 4704 if (adapter->hw.mac.type >= e1000_82571) 4705 manc &= ~E1000_MANC_EN_MNG2HOST; 4706 4707 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc); 4708 } 4709} 4710 4711/* 4712 * em_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. 4713 * For ASF and Pass Through versions of f/w this means that 4714 * the driver is loaded. For AMT version (only with 82573) 4715 * of the f/w this means that the network i/f is open. 4716 * 4717 */ 4718static void 4719em_get_hw_control(struct adapter *adapter) 4720{ 4721 u32 ctrl_ext, swsm; 4722 4723 /* Let firmware know the driver has taken over */ 4724 switch (adapter->hw.mac.type) { 4725 case e1000_82573: 4726 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM); 4727 E1000_WRITE_REG(&adapter->hw, E1000_SWSM, 4728 swsm | E1000_SWSM_DRV_LOAD); 4729 break; 4730 case e1000_82571: 4731 case e1000_82572: 4732 case e1000_80003es2lan: 4733 case e1000_ich8lan: 4734 case e1000_ich9lan: 4735 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); 4736 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, 4737 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 4738 break; 4739 default: 4740 break; 4741 } 4742} 4743 4744/* 4745 * em_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. 4746 * For ASF and Pass Through versions of f/w this means that the 4747 * driver is no longer loaded. For AMT version (only with 82573) i 4748 * of the f/w this means that the network i/f is closed. 4749 * 4750 */ 4751static void 4752em_release_hw_control(struct adapter *adapter) 4753{ 4754 u32 ctrl_ext, swsm; 4755 4756 /* Let firmware taken over control of h/w */ 4757 switch (adapter->hw.mac.type) { 4758 case e1000_82573: 4759 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM); 4760 E1000_WRITE_REG(&adapter->hw, E1000_SWSM, 4761 swsm & ~E1000_SWSM_DRV_LOAD); 4762 break; 4763 case e1000_82571: 4764 case e1000_82572: 4765 case e1000_80003es2lan: 4766 case e1000_ich8lan: 4767 case e1000_ich9lan: 4768 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); 4769 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, 4770 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 4771 break; 4772 default: 4773 break; 4774 4775 } 4776} 4777 4778static int 4779em_is_valid_ether_addr(uint8_t *addr) 4780{ 4781 char zero_addr[6] = { 0, 0, 0, 0, 0, 0 }; 4782 4783 if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) { 4784 return (FALSE); 4785 } 4786 4787 return (TRUE); 4788} 4789 4790/* 4791 * NOTE: the following routines using the e1000 4792 * naming style are provided to the shared 4793 * code which expects that rather than 'em' 4794 */ 4795 4796void 4797e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) 4798{ 4799 pci_write_config(((struct e1000_osdep *)hw->back)->dev, reg, *value, 2); 4800} 4801 4802void 4803e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) 4804{ 4805 *value = pci_read_config(((struct e1000_osdep *)hw->back)->dev, reg, 2); 4806} 4807 4808void 4809e1000_pci_set_mwi(struct e1000_hw *hw) 4810{ 4811 pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND, 4812 (hw->bus.pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2); 4813} 4814 4815void 4816e1000_pci_clear_mwi(struct e1000_hw *hw) 4817{ 4818 pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND, 4819 (hw->bus.pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2); 4820} 4821 4822/* 4823 * Read the PCI Express capabilities 4824 */ 4825int32_t 4826e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) 4827{ 4828 int32_t error = E1000_SUCCESS; 4829 uint16_t cap_off; 4830 4831 switch (hw->mac.type) { 4832 4833 case e1000_82571: 4834 case e1000_82572: 4835 case e1000_82573: 4836 case e1000_80003es2lan: 4837 cap_off = 0xE0; 4838 e1000_read_pci_cfg(hw, cap_off + reg, value); 4839 break; 4840 default: 4841 error = ~E1000_NOT_IMPLEMENTED; 4842 break; 4843 } 4844 4845 return (error); 4846} 4847 4848int32_t 4849e1000_alloc_zeroed_dev_spec_struct(struct e1000_hw *hw, uint32_t size) 4850{ 4851 int32_t error = 0; 4852 4853 hw->dev_spec = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 4854 if (hw->dev_spec == NULL) 4855 error = ENOMEM; 4856 4857 return (error); 4858} 4859 4860void 4861e1000_free_dev_spec_struct(struct e1000_hw *hw) 4862{ 4863 if (hw->dev_spec != NULL) 4864 free(hw->dev_spec, M_DEVBUF); 4865 return; 4866} 4867 4868/* 4869 * Enable PCI Wake On Lan capability 4870 */ 4871void 4872em_enable_wakeup(device_t dev) 4873{ 4874 u16 cap, status; 4875 u8 id; 4876 4877 /* First find the capabilities pointer*/ 4878 cap = pci_read_config(dev, PCIR_CAP_PTR, 2); 4879 /* Read the PM Capabilities */ 4880 id = pci_read_config(dev, cap, 1); 4881 if (id != PCIY_PMG) /* Something wrong */ 4882 return; 4883 /* OK, we have the power capabilities, so 4884 now get the status register */ 4885 cap += PCIR_POWER_STATUS; 4886 status = pci_read_config(dev, cap, 2); 4887 status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE; 4888 pci_write_config(dev, cap, status, 2); 4889 return; 4890} 4891 4892 4893/********************************************************************* 4894* 82544 Coexistence issue workaround. 4895* There are 2 issues. 4896* 1. Transmit Hang issue. 4897* To detect this issue, following equation can be used... 4898* SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 4899* If SUM[3:0] is in between 1 to 4, we will have this issue. 4900* 4901* 2. DAC issue. 4902* To detect this issue, following equation can be used... 4903* SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 4904* If SUM[3:0] is in between 9 to c, we will have this issue. 4905* 4906* 4907* WORKAROUND: 4908* Make sure we do not have ending address 4909* as 1,2,3,4(Hang) or 9,a,b,c (DAC) 4910* 4911*************************************************************************/ 4912static uint32_t 4913em_fill_descriptors (bus_addr_t address, uint32_t length, 4914 PDESC_ARRAY desc_array) 4915{ 4916 /* Since issue is sensitive to length and address.*/ 4917 /* Let us first check the address...*/ 4918 uint32_t safe_terminator; 4919 if (length <= 4) { 4920 desc_array->descriptor[0].address = address; 4921 desc_array->descriptor[0].length = length; 4922 desc_array->elements = 1; 4923 return (desc_array->elements); 4924 } 4925 safe_terminator = (uint32_t)((((uint32_t)address & 0x7) + 4926 (length & 0xF)) & 0xF); 4927 /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */ 4928 if (safe_terminator == 0 || 4929 (safe_terminator > 4 && 4930 safe_terminator < 9) || 4931 (safe_terminator > 0xC && 4932 safe_terminator <= 0xF)) { 4933 desc_array->descriptor[0].address = address; 4934 desc_array->descriptor[0].length = length; 4935 desc_array->elements = 1; 4936 return (desc_array->elements); 4937 } 4938 4939 desc_array->descriptor[0].address = address; 4940 desc_array->descriptor[0].length = length - 4; 4941 desc_array->descriptor[1].address = address + (length - 4); 4942 desc_array->descriptor[1].length = 4; 4943 desc_array->elements = 2; 4944 return (desc_array->elements); 4945} 4946 4947/********************************************************************** 4948 * 4949 * Update the board statistics counters. 4950 * 4951 **********************************************************************/ 4952static void 4953em_update_stats_counters(struct adapter *adapter) 4954{ 4955 struct ifnet *ifp; 4956 4957 if(adapter->hw.phy.media_type == e1000_media_type_copper || 4958 (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) { 4959 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, E1000_SYMERRS); 4960 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC); 4961 } 4962 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS); 4963 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC); 4964 adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC); 4965 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL); 4966 4967 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC); 4968 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL); 4969 adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC); 4970 adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC); 4971 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC); 4972 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC); 4973 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC); 4974 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC); 4975 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC); 4976 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC); 4977 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64); 4978 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127); 4979 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255); 4980 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511); 4981 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023); 4982 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522); 4983 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC); 4984 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC); 4985 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC); 4986 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC); 4987 4988 /* For the 64-bit byte counters the low dword must be read first. */ 4989 /* Both registers clear on the read of the high dword */ 4990 4991 adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH); 4992 adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH); 4993 4994 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC); 4995 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC); 4996 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC); 4997 adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC); 4998 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC); 4999 5000 adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH); 5001 adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH); 5002 5003 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR); 5004 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT); 5005 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64); 5006 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127); 5007 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255); 5008 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511); 5009 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023); 5010 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522); 5011 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC); 5012 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC); 5013 5014 if (adapter->hw.mac.type >= e1000_82543) { 5015 adapter->stats.algnerrc += 5016 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC); 5017 adapter->stats.rxerrc += 5018 E1000_READ_REG(&adapter->hw, E1000_RXERRC); 5019 adapter->stats.tncrs += 5020 E1000_READ_REG(&adapter->hw, E1000_TNCRS); 5021 adapter->stats.cexterr += 5022 E1000_READ_REG(&adapter->hw, E1000_CEXTERR); 5023 adapter->stats.tsctc += 5024 E1000_READ_REG(&adapter->hw, E1000_TSCTC); 5025 adapter->stats.tsctfc += 5026 E1000_READ_REG(&adapter->hw, E1000_TSCTFC); 5027 } 5028 ifp = adapter->ifp; 5029 5030 ifp->if_collisions = adapter->stats.colc; 5031 5032 /* Rx Errors */ 5033 ifp->if_ierrors = adapter->dropped_pkts + adapter->stats.rxerrc + 5034 adapter->stats.crcerrs + adapter->stats.algnerrc + 5035 adapter->stats.ruc + adapter->stats.roc + 5036 adapter->stats.mpc + adapter->stats.cexterr; 5037 5038 /* Tx Errors */ 5039 ifp->if_oerrors = adapter->stats.ecol + 5040 adapter->stats.latecol + adapter->watchdog_events; 5041} 5042 5043 5044/********************************************************************** 5045 * 5046 * This routine is called only when em_display_debug_stats is enabled. 5047 * This routine provides a way to take a look at important statistics 5048 * maintained by the driver and hardware. 5049 * 5050 **********************************************************************/ 5051static void 5052em_print_debug_info(struct adapter *adapter) 5053{ 5054 device_t dev = adapter->dev; 5055 uint8_t *hw_addr = adapter->hw.hw_addr; 5056 5057 device_printf(dev, "Adapter hardware address = %p \n", hw_addr); 5058 device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n", 5059 E1000_READ_REG(&adapter->hw, E1000_CTRL), 5060 E1000_READ_REG(&adapter->hw, E1000_RCTL)); 5061 device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n", 5062 ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\ 5063 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) ); 5064 device_printf(dev, "Flow control watermarks high = %d low = %d\n", 5065 adapter->hw.fc.high_water, 5066 adapter->hw.fc.low_water); 5067 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n", 5068 E1000_READ_REG(&adapter->hw, E1000_TIDV), 5069 E1000_READ_REG(&adapter->hw, E1000_TADV)); 5070 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n", 5071 E1000_READ_REG(&adapter->hw, E1000_RDTR), 5072 E1000_READ_REG(&adapter->hw, E1000_RADV)); 5073 device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n", 5074 (long long)adapter->tx_fifo_wrk_cnt, 5075 (long long)adapter->tx_fifo_reset_cnt); 5076 device_printf(dev, "hw tdh = %d, hw tdt = %d\n", 5077 E1000_READ_REG(&adapter->hw, E1000_TDH(0)), 5078 E1000_READ_REG(&adapter->hw, E1000_TDT(0))); 5079 device_printf(dev, "hw rdh = %d, hw rdt = %d\n", 5080 E1000_READ_REG(&adapter->hw, E1000_RDH(0)), 5081 E1000_READ_REG(&adapter->hw, E1000_RDT(0))); 5082 device_printf(dev, "Num Tx descriptors avail = %d\n", 5083 adapter->num_tx_desc_avail); 5084 device_printf(dev, "Tx Descriptors not avail1 = %ld\n", 5085 adapter->no_tx_desc_avail1); 5086 device_printf(dev, "Tx Descriptors not avail2 = %ld\n", 5087 adapter->no_tx_desc_avail2); 5088 device_printf(dev, "Std mbuf failed = %ld\n", 5089 adapter->mbuf_alloc_failed); 5090 device_printf(dev, "Std mbuf cluster failed = %ld\n", 5091 adapter->mbuf_cluster_failed); 5092 device_printf(dev, "Driver dropped packets = %ld\n", 5093 adapter->dropped_pkts); 5094 device_printf(dev, "Driver tx dma failure in encap = %ld\n", 5095 adapter->no_tx_dma_setup); 5096} 5097 5098static void 5099em_print_hw_stats(struct adapter *adapter) 5100{ 5101 device_t dev = adapter->dev; 5102 5103 device_printf(dev, "Excessive collisions = %lld\n", 5104 (long long)adapter->stats.ecol); 5105#if (DEBUG_HW > 0) /* Dont output these errors normally */ 5106 device_printf(dev, "Symbol errors = %lld\n", 5107 (long long)adapter->stats.symerrs); 5108#endif 5109 device_printf(dev, "Sequence errors = %lld\n", 5110 (long long)adapter->stats.sec); 5111 device_printf(dev, "Defer count = %lld\n", 5112 (long long)adapter->stats.dc); 5113 device_printf(dev, "Missed Packets = %lld\n", 5114 (long long)adapter->stats.mpc); 5115 device_printf(dev, "Receive No Buffers = %lld\n", 5116 (long long)adapter->stats.rnbc); 5117 /* RLEC is inaccurate on some hardware, calculate our own. */ 5118 device_printf(dev, "Receive Length Errors = %lld\n", 5119 ((long long)adapter->stats.roc + (long long)adapter->stats.ruc)); 5120 device_printf(dev, "Receive errors = %lld\n", 5121 (long long)adapter->stats.rxerrc); 5122 device_printf(dev, "Crc errors = %lld\n", 5123 (long long)adapter->stats.crcerrs); 5124 device_printf(dev, "Alignment errors = %lld\n", 5125 (long long)adapter->stats.algnerrc); 5126 /* On 82575 these are collision counts */ 5127 device_printf(dev, "Collision/Carrier extension errors = %lld\n", 5128 (long long)adapter->stats.cexterr); 5129 device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns); 5130 device_printf(dev, "watchdog timeouts = %ld\n", 5131 adapter->watchdog_events); 5132 device_printf(dev, "XON Rcvd = %lld\n", 5133 (long long)adapter->stats.xonrxc); 5134 device_printf(dev, "XON Xmtd = %lld\n", 5135 (long long)adapter->stats.xontxc); 5136 device_printf(dev, "XOFF Rcvd = %lld\n", 5137 (long long)adapter->stats.xoffrxc); 5138 device_printf(dev, "XOFF Xmtd = %lld\n", 5139 (long long)adapter->stats.xofftxc); 5140 device_printf(dev, "Good Packets Rcvd = %lld\n", 5141 (long long)adapter->stats.gprc); 5142 device_printf(dev, "Good Packets Xmtd = %lld\n", 5143 (long long)adapter->stats.gptc); 5144 device_printf(dev, "TSO Contexts Xmtd = %lld\n", 5145 (long long)adapter->stats.tsctc); 5146 device_printf(dev, "TSO Contexts Failed = %lld\n", 5147 (long long)adapter->stats.tsctfc); 5148} 5149 5150/********************************************************************** 5151 * 5152 * This routine provides a way to dump out the adapter eeprom, 5153 * often a useful debug/service tool. This only dumps the first 5154 * 32 words, stuff that matters is in that extent. 5155 * 5156 **********************************************************************/ 5157static void 5158em_print_nvm_info(struct adapter *adapter) 5159{ 5160 u16 eeprom_data; 5161 int i, j, row = 0; 5162 5163 /* Its a bit crude, but it gets the job done */ 5164 printf("\nInterface EEPROM Dump:\n"); 5165 printf("Offset\n0x0000 "); 5166 for (i = 0, j = 0; i < 32; i++, j++) { 5167 if (j == 8) { /* Make the offset block */ 5168 j = 0; ++row; 5169 printf("\n0x00%x0 ",row); 5170 } 5171 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data); 5172 printf("%04x ", eeprom_data); 5173 } 5174 printf("\n"); 5175} 5176 5177static int 5178em_sysctl_debug_info(SYSCTL_HANDLER_ARGS) 5179{ 5180 struct adapter *adapter; 5181 int error; 5182 int result; 5183 5184 result = -1; 5185 error = sysctl_handle_int(oidp, &result, 0, req); 5186 5187 if (error || !req->newptr) 5188 return (error); 5189 5190 if (result == 1) { 5191 adapter = (struct adapter *)arg1; 5192 em_print_debug_info(adapter); 5193 } 5194 /* 5195 * This value will cause a hex dump of the 5196 * first 32 16-bit words of the EEPROM to 5197 * the screen. 5198 */ 5199 if (result == 2) { 5200 adapter = (struct adapter *)arg1; 5201 em_print_nvm_info(adapter); 5202 } 5203 5204 return (error); 5205} 5206 5207 5208static int 5209em_sysctl_stats(SYSCTL_HANDLER_ARGS) 5210{ 5211 struct adapter *adapter; 5212 int error; 5213 int result; 5214 5215 result = -1; 5216 error = sysctl_handle_int(oidp, &result, 0, req); 5217 5218 if (error || !req->newptr) 5219 return (error); 5220 5221 if (result == 1) { 5222 adapter = (struct adapter *)arg1; 5223 em_print_hw_stats(adapter); 5224 } 5225 5226 return (error); 5227} 5228 5229static int 5230em_sysctl_int_delay(SYSCTL_HANDLER_ARGS) 5231{ 5232 struct em_int_delay_info *info; 5233 struct adapter *adapter; 5234 uint32_t regval; 5235 int error; 5236 int usecs; 5237 int ticks; 5238 5239 info = (struct em_int_delay_info *)arg1; 5240 usecs = info->value; 5241 error = sysctl_handle_int(oidp, &usecs, 0, req); 5242 if (error != 0 || req->newptr == NULL) 5243 return (error); 5244 if (usecs < 0 || usecs > EM_TICKS_TO_USECS(65535)) 5245 return (EINVAL); 5246 info->value = usecs; 5247 ticks = EM_USECS_TO_TICKS(usecs); 5248 5249 adapter = info->adapter; 5250 5251 EM_CORE_LOCK(adapter); 5252 regval = E1000_READ_OFFSET(&adapter->hw, info->offset); 5253 regval = (regval & ~0xffff) | (ticks & 0xffff); 5254 /* Handle a few special cases. */ 5255 switch (info->offset) { 5256 case E1000_RDTR: 5257 break; 5258 case E1000_TIDV: 5259 if (ticks == 0) { 5260 adapter->txd_cmd &= ~E1000_TXD_CMD_IDE; 5261 /* Don't write 0 into the TIDV register. */ 5262 regval++; 5263 } else 5264 if (adapter->hw.mac.type != e1000_82575) 5265 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 5266 break; 5267 } 5268 E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval); 5269 EM_CORE_UNLOCK(adapter); 5270 return (0); 5271} 5272 5273static void 5274em_add_int_delay_sysctl(struct adapter *adapter, const char *name, 5275 const char *description, struct em_int_delay_info *info, 5276 int offset, int value) 5277{ 5278 info->adapter = adapter; 5279 info->offset = offset; 5280 info->value = value; 5281 SYSCTL_ADD_PROC(device_get_sysctl_ctx(adapter->dev), 5282 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 5283 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, 5284 info, 0, em_sysctl_int_delay, "I", description); 5285} 5286 5287#ifdef EM_FAST_IRQ 5288static void 5289em_add_rx_process_limit(struct adapter *adapter, const char *name, 5290 const char *description, int *limit, int value) 5291{ 5292 *limit = value; 5293 SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev), 5294 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 5295 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, limit, value, description); 5296} 5297#endif 5298