if_em.c revision 161205
1/************************************************************************** 2 3Copyright (c) 2001-2006, Intel Corporation 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30POSSIBILITY OF SUCH DAMAGE. 31 32***************************************************************************/ 33 34/*$FreeBSD: head/sys/dev/em/if_em.c 161205 2006-08-11 10:58:24Z glebius $*/ 35 36#ifdef HAVE_KERNEL_OPTION_HEADERS 37#include "opt_device_polling.h" 38#endif 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/bus.h> 43#include <sys/endian.h> 44#include <sys/kernel.h> 45#include <sys/kthread.h> 46#include <sys/malloc.h> 47#include <sys/mbuf.h> 48#include <sys/module.h> 49#include <sys/rman.h> 50#include <sys/socket.h> 51#include <sys/sockio.h> 52#include <sys/sysctl.h> 53#include <sys/taskqueue.h> 54 55#include <machine/bus.h> 56#include <machine/resource.h> 57 58#include <net/bpf.h> 59#include <net/ethernet.h> 60#include <net/if.h> 61#include <net/if_arp.h> 62#include <net/if_dl.h> 63#include <net/if_media.h> 64 65#include <net/if_types.h> 66#include <net/if_vlan_var.h> 67 68#include <netinet/in_systm.h> 69#include <netinet/in.h> 70#include <netinet/if_ether.h> 71#include <netinet/ip.h> 72#include <netinet/tcp.h> 73#include <netinet/udp.h> 74 75#include <dev/pci/pcivar.h> 76#include <dev/pci/pcireg.h> 77#include <dev/em/if_em_hw.h> 78#include <dev/em/if_em.h> 79 80/********************************************************************* 81 * Set this to one to display debug statistics 82 *********************************************************************/ 83int em_display_debug_stats = 0; 84 85/********************************************************************* 86 * Driver version 87 *********************************************************************/ 88 89char em_driver_version[] = "Version - 6.1.4"; 90 91 92/********************************************************************* 93 * PCI Device ID Table 94 * 95 * Used by probe to select devices to load on 96 * Last field stores an index into em_strings 97 * Last entry must be all 0s 98 * 99 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 100 *********************************************************************/ 101 102static em_vendor_info_t em_vendor_info_array[] = 103{ 104 /* Intel(R) PRO/1000 Network Connection */ 105 { 0x8086, E1000_DEV_ID_82540EM, PCI_ANY_ID, PCI_ANY_ID, 0}, 106 { 0x8086, E1000_DEV_ID_82540EM_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 107 { 0x8086, E1000_DEV_ID_82540EP, PCI_ANY_ID, PCI_ANY_ID, 0}, 108 { 0x8086, E1000_DEV_ID_82540EP_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 109 { 0x8086, E1000_DEV_ID_82540EP_LP, PCI_ANY_ID, PCI_ANY_ID, 0}, 110 111 { 0x8086, E1000_DEV_ID_82541EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 112 { 0x8086, E1000_DEV_ID_82541ER, PCI_ANY_ID, PCI_ANY_ID, 0}, 113 { 0x8086, E1000_DEV_ID_82541ER_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 114 { 0x8086, E1000_DEV_ID_82541EI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 115 { 0x8086, E1000_DEV_ID_82541GI, PCI_ANY_ID, PCI_ANY_ID, 0}, 116 { 0x8086, E1000_DEV_ID_82541GI_LF, PCI_ANY_ID, PCI_ANY_ID, 0}, 117 { 0x8086, E1000_DEV_ID_82541GI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 118 119 { 0x8086, E1000_DEV_ID_82542, PCI_ANY_ID, PCI_ANY_ID, 0}, 120 121 { 0x8086, E1000_DEV_ID_82543GC_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 122 { 0x8086, E1000_DEV_ID_82543GC_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 123 124 { 0x8086, E1000_DEV_ID_82544EI_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 125 { 0x8086, E1000_DEV_ID_82544EI_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 126 { 0x8086, E1000_DEV_ID_82544GC_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 127 { 0x8086, E1000_DEV_ID_82544GC_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 128 129 { 0x8086, E1000_DEV_ID_82545EM_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 130 { 0x8086, E1000_DEV_ID_82545EM_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 131 { 0x8086, E1000_DEV_ID_82545GM_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 132 { 0x8086, E1000_DEV_ID_82545GM_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 133 { 0x8086, E1000_DEV_ID_82545GM_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 134 135 { 0x8086, E1000_DEV_ID_82546EB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 136 { 0x8086, E1000_DEV_ID_82546EB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 137 { 0x8086, E1000_DEV_ID_82546EB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 138 { 0x8086, E1000_DEV_ID_82546GB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 139 { 0x8086, E1000_DEV_ID_82546GB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 140 { 0x8086, E1000_DEV_ID_82546GB_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 141 { 0x8086, E1000_DEV_ID_82546GB_PCIE, PCI_ANY_ID, PCI_ANY_ID, 0}, 142 { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 143 { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3, 144 PCI_ANY_ID, PCI_ANY_ID, 0}, 145 146 { 0x8086, E1000_DEV_ID_82547EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 147 { 0x8086, E1000_DEV_ID_82547EI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 148 { 0x8086, E1000_DEV_ID_82547GI, PCI_ANY_ID, PCI_ANY_ID, 0}, 149 150 { 0x8086, E1000_DEV_ID_82571EB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 151 { 0x8086, E1000_DEV_ID_82571EB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 152 { 0x8086, E1000_DEV_ID_82571EB_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 153 { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER, 154 PCI_ANY_ID, PCI_ANY_ID, 0}, 155 156 { 0x8086, E1000_DEV_ID_82572EI_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 157 { 0x8086, E1000_DEV_ID_82572EI_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 158 { 0x8086, E1000_DEV_ID_82572EI_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 159 { 0x8086, E1000_DEV_ID_82572EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 160 161 { 0x8086, E1000_DEV_ID_82573E, PCI_ANY_ID, PCI_ANY_ID, 0}, 162 { 0x8086, E1000_DEV_ID_82573E_IAMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 163 { 0x8086, E1000_DEV_ID_82573L, PCI_ANY_ID, PCI_ANY_ID, 0}, 164 { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_SPT, 165 PCI_ANY_ID, PCI_ANY_ID, 0}, 166 { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_SPT, 167 PCI_ANY_ID, PCI_ANY_ID, 0}, 168 { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_DPT, 169 PCI_ANY_ID, PCI_ANY_ID, 0}, 170 { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_DPT, 171 PCI_ANY_ID, PCI_ANY_ID, 0}, 172 { 0x8086, E1000_DEV_ID_ICH8_IGP_AMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 173 { 0x8086, E1000_DEV_ID_ICH8_IGP_C, PCI_ANY_ID, PCI_ANY_ID, 0}, 174 { 0x8086, E1000_DEV_ID_ICH8_IFE, PCI_ANY_ID, PCI_ANY_ID, 0}, 175 176 /* required last entry */ 177 { 0, 0, 0, 0, 0} 178}; 179 180/********************************************************************* 181 * Table of branding strings for all supported NICs. 182 *********************************************************************/ 183 184static char *em_strings[] = { 185 "Intel(R) PRO/1000 Network Connection" 186}; 187 188/********************************************************************* 189 * Function prototypes 190 *********************************************************************/ 191static int em_probe(device_t); 192static int em_attach(device_t); 193static int em_detach(device_t); 194static int em_shutdown(device_t); 195static int em_suspend(device_t); 196static int em_resume(device_t); 197static void em_start(struct ifnet *); 198static void em_start_locked(struct ifnet *ifp); 199static int em_ioctl(struct ifnet *, u_long, caddr_t); 200static void em_watchdog(struct ifnet *); 201static void em_init(void *); 202static void em_init_locked(struct adapter *); 203static void em_stop(void *); 204static void em_media_status(struct ifnet *, struct ifmediareq *); 205static int em_media_change(struct ifnet *); 206static void em_identify_hardware(struct adapter *); 207static int em_allocate_pci_resources(struct adapter *); 208static int em_allocate_intr(struct adapter *); 209static void em_free_intr(struct adapter *); 210static void em_free_pci_resources(struct adapter *); 211static void em_local_timer(void *); 212static int em_hardware_init(struct adapter *); 213static void em_setup_interface(device_t, struct adapter *); 214static int em_setup_transmit_structures(struct adapter *); 215static void em_initialize_transmit_unit(struct adapter *); 216static int em_setup_receive_structures(struct adapter *); 217static void em_initialize_receive_unit(struct adapter *); 218static void em_enable_intr(struct adapter *); 219static void em_disable_intr(struct adapter *); 220static void em_free_transmit_structures(struct adapter *); 221static void em_free_receive_structures(struct adapter *); 222static void em_update_stats_counters(struct adapter *); 223static void em_txeof(struct adapter *); 224static int em_allocate_receive_structures(struct adapter *); 225static int em_allocate_transmit_structures(struct adapter *); 226static int em_rxeof(struct adapter *, int); 227#ifndef __NO_STRICT_ALIGNMENT 228static int em_fixup_rx(struct adapter *); 229#endif 230static void em_receive_checksum(struct adapter *, struct em_rx_desc *, 231 struct mbuf *); 232static void em_transmit_checksum_setup(struct adapter *, struct mbuf *, 233 uint32_t *, uint32_t *); 234static void em_set_promisc(struct adapter *); 235static void em_disable_promisc(struct adapter *); 236static void em_set_multi(struct adapter *); 237static void em_print_hw_stats(struct adapter *); 238static void em_update_link_status(struct adapter *); 239static int em_get_buf(int i, struct adapter *, struct mbuf *); 240static void em_enable_vlans(struct adapter *); 241static void em_disable_vlans(struct adapter *); 242static int em_encap(struct adapter *, struct mbuf **); 243static void em_smartspeed(struct adapter *); 244static int em_82547_fifo_workaround(struct adapter *, int); 245static void em_82547_update_fifo_head(struct adapter *, int); 246static int em_82547_tx_fifo_reset(struct adapter *); 247static void em_82547_move_tail(void *arg); 248static void em_82547_move_tail_locked(struct adapter *); 249static int em_dma_malloc(struct adapter *, bus_size_t, 250 struct em_dma_alloc *, int); 251static void em_dma_free(struct adapter *, struct em_dma_alloc *); 252static void em_print_debug_info(struct adapter *); 253static int em_is_valid_ether_addr(uint8_t *); 254static int em_sysctl_stats(SYSCTL_HANDLER_ARGS); 255static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS); 256static uint32_t em_fill_descriptors (bus_addr_t address, uint32_t length, 257 PDESC_ARRAY desc_array); 258static int em_sysctl_int_delay(SYSCTL_HANDLER_ARGS); 259static void em_add_int_delay_sysctl(struct adapter *, const char *, 260 const char *, struct em_int_delay_info *, int, int); 261 262/* 263 * Fast interrupt handler and legacy ithread/polling modes are 264 * mutually exclusive. 265 */ 266#ifdef DEVICE_POLLING 267static poll_handler_t em_poll; 268static void em_intr(void *); 269#else 270static void em_intr_fast(void *); 271static void em_add_int_process_limit(struct adapter *, const char *, 272 const char *, int *, int); 273static void em_handle_rxtx(void *context, int pending); 274static void em_handle_link(void *context, int pending); 275#endif 276 277/********************************************************************* 278 * FreeBSD Device Interface Entry Points 279 *********************************************************************/ 280 281static device_method_t em_methods[] = { 282 /* Device interface */ 283 DEVMETHOD(device_probe, em_probe), 284 DEVMETHOD(device_attach, em_attach), 285 DEVMETHOD(device_detach, em_detach), 286 DEVMETHOD(device_shutdown, em_shutdown), 287 DEVMETHOD(device_suspend, em_suspend), 288 DEVMETHOD(device_resume, em_resume), 289 {0, 0} 290}; 291 292static driver_t em_driver = { 293 "em", em_methods, sizeof(struct adapter), 294}; 295 296static devclass_t em_devclass; 297DRIVER_MODULE(em, pci, em_driver, em_devclass, 0, 0); 298MODULE_DEPEND(em, pci, 1, 1, 1); 299MODULE_DEPEND(em, ether, 1, 1, 1); 300 301/********************************************************************* 302 * Tunable default values. 303 *********************************************************************/ 304 305#define E1000_TICKS_TO_USECS(ticks) ((1024 * (ticks) + 500) / 1000) 306#define E1000_USECS_TO_TICKS(usecs) ((1000 * (usecs) + 512) / 1024) 307 308static int em_tx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TIDV); 309static int em_rx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RDTR); 310static int em_tx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TADV); 311static int em_rx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RADV); 312static int em_rxd = EM_DEFAULT_RXD; 313static int em_txd = EM_DEFAULT_TXD; 314static int em_smart_pwr_down = FALSE; 315 316TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt); 317TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt); 318TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt); 319TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt); 320TUNABLE_INT("hw.em.rxd", &em_rxd); 321TUNABLE_INT("hw.em.txd", &em_txd); 322TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down); 323#ifndef DEVICE_POLLING 324static int em_rx_process_limit = 100; 325TUNABLE_INT("hw.em.rx_process_limit", &em_rx_process_limit); 326#endif 327 328/********************************************************************* 329 * Device identification routine 330 * 331 * em_probe determines if the driver should be loaded on 332 * adapter based on PCI vendor/device id of the adapter. 333 * 334 * return BUS_PROBE_DEFAULT on success, positive on failure 335 *********************************************************************/ 336 337static int 338em_probe(device_t dev) 339{ 340 char adapter_name[60]; 341 uint16_t pci_vendor_id = 0; 342 uint16_t pci_device_id = 0; 343 uint16_t pci_subvendor_id = 0; 344 uint16_t pci_subdevice_id = 0; 345 em_vendor_info_t *ent; 346 347 INIT_DEBUGOUT("em_probe: begin"); 348 349 pci_vendor_id = pci_get_vendor(dev); 350 if (pci_vendor_id != EM_VENDOR_ID) 351 return (ENXIO); 352 353 pci_device_id = pci_get_device(dev); 354 pci_subvendor_id = pci_get_subvendor(dev); 355 pci_subdevice_id = pci_get_subdevice(dev); 356 357 ent = em_vendor_info_array; 358 while (ent->vendor_id != 0) { 359 if ((pci_vendor_id == ent->vendor_id) && 360 (pci_device_id == ent->device_id) && 361 362 ((pci_subvendor_id == ent->subvendor_id) || 363 (ent->subvendor_id == PCI_ANY_ID)) && 364 365 ((pci_subdevice_id == ent->subdevice_id) || 366 (ent->subdevice_id == PCI_ANY_ID))) { 367 sprintf(adapter_name, "%s %s", 368 em_strings[ent->index], 369 em_driver_version); 370 device_set_desc_copy(dev, adapter_name); 371 return (BUS_PROBE_DEFAULT); 372 } 373 ent++; 374 } 375 376 return (ENXIO); 377} 378 379/********************************************************************* 380 * Device initialization routine 381 * 382 * The attach entry point is called when the driver is being loaded. 383 * This routine identifies the type of hardware, allocates all resources 384 * and initializes the hardware. 385 * 386 * return 0 on success, positive on failure 387 *********************************************************************/ 388 389static int 390em_attach(device_t dev) 391{ 392 struct adapter *adapter; 393 int tsize, rsize; 394 int error = 0; 395 396 INIT_DEBUGOUT("em_attach: begin"); 397 398 adapter = device_get_softc(dev); 399 adapter->dev = adapter->osdep.dev = dev; 400 EM_LOCK_INIT(adapter, device_get_nameunit(dev)); 401 402 /* SYSCTL stuff */ 403 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 404 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 405 OID_AUTO, "debug_info", CTLTYPE_INT|CTLFLAG_RW, adapter, 0, 406 em_sysctl_debug_info, "I", "Debug Information"); 407 408 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 409 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 410 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0, 411 em_sysctl_stats, "I", "Statistics"); 412 413 callout_init(&adapter->timer, CALLOUT_MPSAFE); 414 callout_init(&adapter->tx_fifo_timer, CALLOUT_MPSAFE); 415 416 /* Determine hardware revision */ 417 em_identify_hardware(adapter); 418 419 /* Set up some sysctls for the tunable interrupt delays */ 420 em_add_int_delay_sysctl(adapter, "rx_int_delay", 421 "receive interrupt delay in usecs", &adapter->rx_int_delay, 422 E1000_REG_OFFSET(&adapter->hw, RDTR), em_rx_int_delay_dflt); 423 em_add_int_delay_sysctl(adapter, "tx_int_delay", 424 "transmit interrupt delay in usecs", &adapter->tx_int_delay, 425 E1000_REG_OFFSET(&adapter->hw, TIDV), em_tx_int_delay_dflt); 426 if (adapter->hw.mac_type >= em_82540) { 427 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay", 428 "receive interrupt delay limit in usecs", 429 &adapter->rx_abs_int_delay, 430 E1000_REG_OFFSET(&adapter->hw, RADV), 431 em_rx_abs_int_delay_dflt); 432 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay", 433 "transmit interrupt delay limit in usecs", 434 &adapter->tx_abs_int_delay, 435 E1000_REG_OFFSET(&adapter->hw, TADV), 436 em_tx_abs_int_delay_dflt); 437 } 438 439#ifndef DEVICE_POLLING 440 /* Sysctls for limiting the amount of work done in the taskqueue */ 441 em_add_int_process_limit(adapter, "rx_processing_limit", 442 "max number of rx packets to process", &adapter->rx_process_limit, 443 em_rx_process_limit); 444#endif 445 446 /* 447 * Validate number of transmit and receive descriptors. It 448 * must not exceed hardware maximum, and must be multiple 449 * of EM_DBA_ALIGN. 450 */ 451 if (((em_txd * sizeof(struct em_tx_desc)) % EM_DBA_ALIGN) != 0 || 452 (adapter->hw.mac_type >= em_82544 && em_txd > EM_MAX_TXD) || 453 (adapter->hw.mac_type < em_82544 && em_txd > EM_MAX_TXD_82543) || 454 (em_txd < EM_MIN_TXD)) { 455 device_printf(dev, "Using %d TX descriptors instead of %d!\n", 456 EM_DEFAULT_TXD, em_txd); 457 adapter->num_tx_desc = EM_DEFAULT_TXD; 458 } else 459 adapter->num_tx_desc = em_txd; 460 if (((em_rxd * sizeof(struct em_rx_desc)) % EM_DBA_ALIGN) != 0 || 461 (adapter->hw.mac_type >= em_82544 && em_rxd > EM_MAX_RXD) || 462 (adapter->hw.mac_type < em_82544 && em_rxd > EM_MAX_RXD_82543) || 463 (em_rxd < EM_MIN_RXD)) { 464 device_printf(dev, "Using %d RX descriptors instead of %d!\n", 465 EM_DEFAULT_RXD, em_rxd); 466 adapter->num_rx_desc = EM_DEFAULT_RXD; 467 } else 468 adapter->num_rx_desc = em_rxd; 469 470 adapter->hw.autoneg = DO_AUTO_NEG; 471 adapter->hw.wait_autoneg_complete = WAIT_FOR_AUTO_NEG_DEFAULT; 472 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT; 473 adapter->hw.tbi_compatibility_en = TRUE; 474 adapter->rx_buffer_len = EM_RXBUFFER_2048; 475 476 adapter->hw.phy_init_script = 1; 477 adapter->hw.phy_reset_disable = FALSE; 478 479#ifndef EM_MASTER_SLAVE 480 adapter->hw.master_slave = em_ms_hw_default; 481#else 482 adapter->hw.master_slave = EM_MASTER_SLAVE; 483#endif 484 /* 485 * Set the max frame size assuming standard ethernet 486 * sized frames. 487 */ 488 adapter->hw.max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN; 489 490 adapter->hw.min_frame_size = MINIMUM_ETHERNET_PACKET_SIZE + ETHER_CRC_LEN; 491 492 /* 493 * This controls when hardware reports transmit completion 494 * status. 495 */ 496 adapter->hw.report_tx_early = 1; 497 if (em_allocate_pci_resources(adapter)) { 498 device_printf(dev, "Allocation of PCI resources failed\n"); 499 error = ENXIO; 500 goto err_pci; 501 } 502 503 /* Initialize eeprom parameters */ 504 em_init_eeprom_params(&adapter->hw); 505 506 tsize = roundup2(adapter->num_tx_desc * sizeof(struct em_tx_desc), 507 EM_DBA_ALIGN); 508 509 /* Allocate Transmit Descriptor ring */ 510 if (em_dma_malloc(adapter, tsize, &adapter->txdma, BUS_DMA_NOWAIT)) { 511 device_printf(dev, "Unable to allocate tx_desc memory\n"); 512 error = ENOMEM; 513 goto err_tx_desc; 514 } 515 adapter->tx_desc_base = (struct em_tx_desc *)adapter->txdma.dma_vaddr; 516 517 rsize = roundup2(adapter->num_rx_desc * sizeof(struct em_rx_desc), 518 EM_DBA_ALIGN); 519 520 /* Allocate Receive Descriptor ring */ 521 if (em_dma_malloc(adapter, rsize, &adapter->rxdma, BUS_DMA_NOWAIT)) { 522 device_printf(dev, "Unable to allocate rx_desc memory\n"); 523 error = ENOMEM; 524 goto err_rx_desc; 525 } 526 adapter->rx_desc_base = (struct em_rx_desc *)adapter->rxdma.dma_vaddr; 527 528 /* Initialize the hardware */ 529 if (em_hardware_init(adapter)) { 530 device_printf(dev, "Unable to initialize the hardware\n"); 531 error = EIO; 532 goto err_hw_init; 533 } 534 535 /* Copy the permanent MAC address out of the EEPROM */ 536 if (em_read_mac_addr(&adapter->hw) < 0) { 537 device_printf(dev, "EEPROM read error while reading MAC" 538 " address\n"); 539 error = EIO; 540 goto err_hw_init; 541 } 542 543 if (!em_is_valid_ether_addr(adapter->hw.mac_addr)) { 544 device_printf(dev, "Invalid MAC address\n"); 545 error = EIO; 546 goto err_hw_init; 547 } 548 549 /* Setup OS specific network interface */ 550 em_setup_interface(dev, adapter); 551 552 em_allocate_intr(adapter); 553 554 /* Initialize statistics */ 555 em_clear_hw_cntrs(&adapter->hw); 556 em_update_stats_counters(adapter); 557 adapter->hw.get_link_status = 1; 558 em_update_link_status(adapter); 559 560 /* Indicate SOL/IDER usage */ 561 if (em_check_phy_reset_block(&adapter->hw)) 562 device_printf(dev, 563 "PHY reset is blocked due to SOL/IDER session.\n"); 564 565 /* Identify 82544 on PCIX */ 566 em_get_bus_info(&adapter->hw); 567 if(adapter->hw.bus_type == em_bus_type_pcix && adapter->hw.mac_type == em_82544) 568 adapter->pcix_82544 = TRUE; 569 else 570 adapter->pcix_82544 = FALSE; 571 572 INIT_DEBUGOUT("em_attach: end"); 573 574 return (0); 575 576err_hw_init: 577 em_dma_free(adapter, &adapter->rxdma); 578err_rx_desc: 579 em_dma_free(adapter, &adapter->txdma); 580err_tx_desc: 581err_pci: 582 em_free_intr(adapter); 583 em_free_pci_resources(adapter); 584 EM_LOCK_DESTROY(adapter); 585 586 return (error); 587} 588 589/********************************************************************* 590 * Device removal routine 591 * 592 * The detach entry point is called when the driver is being removed. 593 * This routine stops the adapter and deallocates all the resources 594 * that were allocated for driver operation. 595 * 596 * return 0 on success, positive on failure 597 *********************************************************************/ 598 599static int 600em_detach(device_t dev) 601{ 602 struct adapter *adapter = device_get_softc(dev); 603 struct ifnet *ifp = adapter->ifp; 604 605 INIT_DEBUGOUT("em_detach: begin"); 606 607#ifdef DEVICE_POLLING 608 if (ifp->if_capenable & IFCAP_POLLING) 609 ether_poll_deregister(ifp); 610#endif 611 612 em_free_intr(adapter); 613 EM_LOCK(adapter); 614 adapter->in_detach = 1; 615 em_stop(adapter); 616 em_phy_hw_reset(&adapter->hw); 617 EM_UNLOCK(adapter); 618 ether_ifdetach(adapter->ifp); 619 620 em_free_pci_resources(adapter); 621 bus_generic_detach(dev); 622 if_free(ifp); 623 624 /* Free Transmit Descriptor ring */ 625 if (adapter->tx_desc_base) { 626 em_dma_free(adapter, &adapter->txdma); 627 adapter->tx_desc_base = NULL; 628 } 629 630 /* Free Receive Descriptor ring */ 631 if (adapter->rx_desc_base) { 632 em_dma_free(adapter, &adapter->rxdma); 633 adapter->rx_desc_base = NULL; 634 } 635 636 EM_LOCK_DESTROY(adapter); 637 638 return (0); 639} 640 641/********************************************************************* 642 * 643 * Shutdown entry point 644 * 645 **********************************************************************/ 646 647static int 648em_shutdown(device_t dev) 649{ 650 struct adapter *adapter = device_get_softc(dev); 651 EM_LOCK(adapter); 652 em_stop(adapter); 653 EM_UNLOCK(adapter); 654 return (0); 655} 656 657/* 658 * Suspend/resume device methods. 659 */ 660static int 661em_suspend(device_t dev) 662{ 663 struct adapter *adapter = device_get_softc(dev); 664 665 EM_LOCK(adapter); 666 em_stop(adapter); 667 EM_UNLOCK(adapter); 668 669 return bus_generic_suspend(dev); 670} 671 672static int 673em_resume(device_t dev) 674{ 675 struct adapter *adapter = device_get_softc(dev); 676 struct ifnet *ifp = adapter->ifp; 677 678 EM_LOCK(adapter); 679 em_init_locked(adapter); 680 if ((ifp->if_flags & IFF_UP) && 681 (ifp->if_drv_flags & IFF_DRV_RUNNING)) 682 em_start_locked(ifp); 683 EM_UNLOCK(adapter); 684 685 return bus_generic_resume(dev); 686} 687 688 689/********************************************************************* 690 * Transmit entry point 691 * 692 * em_start is called by the stack to initiate a transmit. 693 * The driver will remain in this routine as long as there are 694 * packets to transmit and transmit resources are available. 695 * In case resources are not available stack is notified and 696 * the packet is requeued. 697 **********************************************************************/ 698 699static void 700em_start_locked(struct ifnet *ifp) 701{ 702 struct adapter *adapter = ifp->if_softc; 703 struct mbuf *m_head; 704 705 EM_LOCK_ASSERT(adapter); 706 707 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) != 708 IFF_DRV_RUNNING) 709 return; 710 if (!adapter->link_active) 711 return; 712 713 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) { 714 715 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 716 if (m_head == NULL) 717 break; 718 /* 719 * em_encap() can modify our pointer, and or make it NULL on 720 * failure. In that event, we can't requeue. 721 */ 722 if (em_encap(adapter, &m_head)) { 723 if (m_head == NULL) 724 break; 725 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 726 IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 727 break; 728 } 729 730 /* Send a copy of the frame to the BPF listener */ 731 BPF_MTAP(ifp, m_head); 732 733 /* Set timeout in case hardware has problems transmitting. */ 734 ifp->if_timer = EM_TX_TIMEOUT; 735 } 736} 737 738static void 739em_start(struct ifnet *ifp) 740{ 741 struct adapter *adapter = ifp->if_softc; 742 743 EM_LOCK(adapter); 744 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 745 em_start_locked(ifp); 746 EM_UNLOCK(adapter); 747} 748 749/********************************************************************* 750 * Ioctl entry point 751 * 752 * em_ioctl is called when the user wants to configure the 753 * interface. 754 * 755 * return 0 on success, positive on failure 756 **********************************************************************/ 757 758static int 759em_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 760{ 761 struct adapter *adapter = ifp->if_softc; 762 struct ifreq *ifr = (struct ifreq *)data; 763 struct ifaddr *ifa = (struct ifaddr *)data; 764 int error = 0; 765 766 if (adapter->in_detach) 767 return (error); 768 769 switch (command) { 770 case SIOCSIFADDR: 771 case SIOCGIFADDR: 772 if (ifa->ifa_addr->sa_family == AF_INET) { 773 /* 774 * XXX 775 * Since resetting hardware takes a very long time 776 * and results in link renegotiation we only 777 * initialize the hardware only when it is absolutely 778 * required. 779 */ 780 ifp->if_flags |= IFF_UP; 781 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 782 EM_LOCK(adapter); 783 em_init_locked(adapter); 784 EM_UNLOCK(adapter); 785 } 786 arp_ifinit(ifp, ifa); 787 } else 788 error = ether_ioctl(ifp, command, data); 789 break; 790 case SIOCSIFMTU: 791 { 792 int max_frame_size; 793 uint16_t eeprom_data = 0; 794 795 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)"); 796 797 EM_LOCK(adapter); 798 switch (adapter->hw.mac_type) { 799 case em_82573: 800 /* 801 * 82573 only supports jumbo frames 802 * if ASPM is disabled. 803 */ 804 em_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, 805 &eeprom_data); 806 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) { 807 max_frame_size = ETHER_MAX_LEN; 808 break; 809 } 810 /* Allow Jumbo frames - fall thru */ 811 case em_82571: 812 case em_82572: 813 case em_80003es2lan: /* Limit Jumbo Frame size */ 814 max_frame_size = 9234; 815 break; 816 case em_ich8lan: 817 /* ICH8 does not support jumbo frames */ 818 max_frame_size = ETHER_MAX_LEN; 819 break; 820 default: 821 max_frame_size = MAX_JUMBO_FRAME_SIZE; 822 } 823 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN - 824 ETHER_CRC_LEN) { 825 EM_UNLOCK(adapter); 826 error = EINVAL; 827 break; 828 } 829 830 ifp->if_mtu = ifr->ifr_mtu; 831 adapter->hw.max_frame_size = 832 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 833 em_init_locked(adapter); 834 EM_UNLOCK(adapter); 835 break; 836 } 837 case SIOCSIFFLAGS: 838 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFFLAGS (Set Interface Flags)"); 839 EM_LOCK(adapter); 840 if (ifp->if_flags & IFF_UP) { 841 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 842 if ((ifp->if_flags ^ adapter->if_flags) & 843 IFF_PROMISC) { 844 em_disable_promisc(adapter); 845 em_set_promisc(adapter); 846 } 847 } else 848 em_init_locked(adapter); 849 } else { 850 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 851 em_stop(adapter); 852 } 853 } 854 adapter->if_flags = ifp->if_flags; 855 EM_UNLOCK(adapter); 856 break; 857 case SIOCADDMULTI: 858 case SIOCDELMULTI: 859 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI"); 860 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 861 EM_LOCK(adapter); 862 em_disable_intr(adapter); 863 em_set_multi(adapter); 864 if (adapter->hw.mac_type == em_82542_rev2_0) { 865 em_initialize_receive_unit(adapter); 866 } 867#ifdef DEVICE_POLLING 868 if (!(ifp->if_capenable & IFCAP_POLLING)) 869#endif 870 em_enable_intr(adapter); 871 EM_UNLOCK(adapter); 872 } 873 break; 874 case SIOCSIFMEDIA: 875 case SIOCGIFMEDIA: 876 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFMEDIA (Get/Set Interface Media)"); 877 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 878 break; 879 case SIOCSIFCAP: 880 { 881 int mask, reinit; 882 883 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)"); 884 reinit = 0; 885 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 886#ifdef DEVICE_POLLING 887 if (mask & IFCAP_POLLING) { 888 if (ifr->ifr_reqcap & IFCAP_POLLING) { 889 error = ether_poll_register(em_poll, ifp); 890 if (error) 891 return (error); 892 EM_LOCK(adapter); 893 em_disable_intr(adapter); 894 ifp->if_capenable |= IFCAP_POLLING; 895 EM_UNLOCK(adapter); 896 } else { 897 error = ether_poll_deregister(ifp); 898 /* Enable interrupt even in error case */ 899 EM_LOCK(adapter); 900 em_enable_intr(adapter); 901 ifp->if_capenable &= ~IFCAP_POLLING; 902 EM_UNLOCK(adapter); 903 } 904 } 905#endif 906 if (mask & IFCAP_HWCSUM) { 907 ifp->if_capenable ^= IFCAP_HWCSUM; 908 reinit = 1; 909 } 910 if (mask & IFCAP_VLAN_HWTAGGING) { 911 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 912 reinit = 1; 913 } 914 if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 915 em_init(adapter); 916 VLAN_CAPABILITIES(ifp); 917 break; 918 } 919 default: 920 error = ether_ioctl(ifp, command, data); 921 break; 922 } 923 924 return (error); 925} 926 927/********************************************************************* 928 * Watchdog entry point 929 * 930 * This routine is called whenever hardware quits transmitting. 931 * 932 **********************************************************************/ 933 934static void 935em_watchdog(struct ifnet *ifp) 936{ 937 struct adapter *adapter = ifp->if_softc; 938 939 EM_LOCK(adapter); 940 /* If we are in this routine because of pause frames, then 941 * don't reset the hardware. 942 */ 943 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_TXOFF) { 944 ifp->if_timer = EM_TX_TIMEOUT; 945 EM_UNLOCK(adapter); 946 return; 947 } 948 949 if (em_check_for_link(&adapter->hw) == 0) 950 device_printf(adapter->dev, "watchdog timeout -- resetting\n"); 951 952 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 953 adapter->watchdog_events++; 954 955 em_init_locked(adapter); 956 EM_UNLOCK(adapter); 957} 958 959/********************************************************************* 960 * Init entry point 961 * 962 * This routine is used in two ways. It is used by the stack as 963 * init entry point in network interface structure. It is also used 964 * by the driver as a hw/sw initialization routine to get to a 965 * consistent state. 966 * 967 * return 0 on success, positive on failure 968 **********************************************************************/ 969 970static void 971em_init_locked(struct adapter *adapter) 972{ 973 struct ifnet *ifp = adapter->ifp; 974 device_t dev = adapter->dev; 975 uint32_t pba; 976 977 INIT_DEBUGOUT("em_init: begin"); 978 979 EM_LOCK_ASSERT(adapter); 980 981 em_stop(adapter); 982 983 /* 984 * Packet Buffer Allocation (PBA) 985 * Writing PBA sets the receive portion of the buffer 986 * the remainder is used for the transmit buffer. 987 * 988 * Devices before the 82547 had a Packet Buffer of 64K. 989 * Default allocation: PBA=48K for Rx, leaving 16K for Tx. 990 * After the 82547 the buffer was reduced to 40K. 991 * Default allocation: PBA=30K for Rx, leaving 10K for Tx. 992 * Note: default does not leave enough room for Jumbo Frame >10k. 993 */ 994 switch (adapter->hw.mac_type) { 995 case em_82547: 996 case em_82547_rev_2: /* 82547: Total Packet Buffer is 40K */ 997 if (adapter->hw.max_frame_size > EM_RXBUFFER_8192) 998 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */ 999 else 1000 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */ 1001 adapter->tx_fifo_head = 0; 1002 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT; 1003 adapter->tx_fifo_size = (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT; 1004 break; 1005 case em_80003es2lan: /* 80003es2lan: Total Packet Buffer is 48K */ 1006 case em_82571: /* 82571: Total Packet Buffer is 48K */ 1007 case em_82572: /* 82572: Total Packet Buffer is 48K */ 1008 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */ 1009 break; 1010 case em_82573: /* 82573: Total Packet Buffer is 32K */ 1011 /* Jumbo frames not supported */ 1012 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */ 1013 break; 1014 case em_ich8lan: 1015 pba = E1000_PBA_8K; 1016 break; 1017 default: 1018 /* Devices before 82547 had a Packet Buffer of 64K. */ 1019 if(adapter->hw.max_frame_size > EM_RXBUFFER_8192) 1020 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */ 1021 else 1022 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */ 1023 } 1024 1025 INIT_DEBUGOUT1("em_init: pba=%dK",pba); 1026 E1000_WRITE_REG(&adapter->hw, PBA, pba); 1027 1028 /* Get the latest mac address, User can use a LAA */ 1029 bcopy(IF_LLADDR(adapter->ifp), adapter->hw.mac_addr, ETHER_ADDR_LEN); 1030 1031 /* Initialize the hardware */ 1032 if (em_hardware_init(adapter)) { 1033 device_printf(dev, "Unable to initialize the hardware\n"); 1034 return; 1035 } 1036 em_update_link_status(adapter); 1037 1038 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) 1039 em_enable_vlans(adapter); 1040 1041 /* Prepare transmit descriptors and buffers */ 1042 if (em_setup_transmit_structures(adapter)) { 1043 device_printf(dev, "Could not setup transmit structures\n"); 1044 em_stop(adapter); 1045 return; 1046 } 1047 em_initialize_transmit_unit(adapter); 1048 1049 /* Setup Multicast table */ 1050 em_set_multi(adapter); 1051 1052 /* Prepare receive descriptors and buffers */ 1053 if (em_setup_receive_structures(adapter)) { 1054 device_printf(dev, "Could not setup receive structures\n"); 1055 em_stop(adapter); 1056 return; 1057 } 1058 em_initialize_receive_unit(adapter); 1059 1060 /* Don't lose promiscuous settings */ 1061 em_set_promisc(adapter); 1062 1063 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1064 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1065 1066 if (adapter->hw.mac_type >= em_82543) { 1067 if (ifp->if_capenable & IFCAP_TXCSUM) 1068 ifp->if_hwassist = EM_CHECKSUM_FEATURES; 1069 else 1070 ifp->if_hwassist = 0; 1071 } 1072 1073 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1074 em_clear_hw_cntrs(&adapter->hw); 1075#ifdef DEVICE_POLLING 1076 /* 1077 * Only enable interrupts if we are not polling, make sure 1078 * they are off otherwise. 1079 */ 1080 if (ifp->if_capenable & IFCAP_POLLING) 1081 em_disable_intr(adapter); 1082 else 1083#endif /* DEVICE_POLLING */ 1084 em_enable_intr(adapter); 1085 1086 /* Don't reset the phy next time init gets called */ 1087 adapter->hw.phy_reset_disable = TRUE; 1088} 1089 1090static void 1091em_init(void *arg) 1092{ 1093 struct adapter *adapter = arg; 1094 1095 EM_LOCK(adapter); 1096 em_init_locked(adapter); 1097 EM_UNLOCK(adapter); 1098} 1099 1100 1101#ifdef DEVICE_POLLING 1102/********************************************************************* 1103 * 1104 * Legacy polling routine 1105 * 1106 *********************************************************************/ 1107static void 1108em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1109{ 1110 struct adapter *adapter = ifp->if_softc; 1111 uint32_t reg_icr; 1112 1113 EM_LOCK(adapter); 1114 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1115 EM_UNLOCK(adapter); 1116 return; 1117 } 1118 1119 if (cmd == POLL_AND_CHECK_STATUS) { 1120 reg_icr = E1000_READ_REG(&adapter->hw, ICR); 1121 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1122 callout_stop(&adapter->timer); 1123 adapter->hw.get_link_status = 1; 1124 em_check_for_link(&adapter->hw); 1125 em_update_link_status(adapter); 1126 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1127 } 1128 } 1129 em_rxeof(adapter, count); 1130 em_txeof(adapter); 1131 1132 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1133 em_start_locked(ifp); 1134 EM_UNLOCK(adapter); 1135} 1136 1137/********************************************************************* 1138 * 1139 * Legacy Interrupt Service routine 1140 * 1141 *********************************************************************/ 1142static void 1143em_intr(void *arg) 1144{ 1145 struct adapter *adapter = arg; 1146 struct ifnet *ifp; 1147 uint32_t reg_icr; 1148 1149 EM_LOCK(adapter); 1150 1151 ifp = adapter->ifp; 1152 1153 if (ifp->if_capenable & IFCAP_POLLING) { 1154 EM_UNLOCK(adapter); 1155 return; 1156 } 1157 1158 for (;;) { 1159 reg_icr = E1000_READ_REG(&adapter->hw, ICR); 1160 if (adapter->hw.mac_type >= em_82571 && 1161 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) 1162 break; 1163 else if (reg_icr == 0) 1164 break; 1165 1166 /* 1167 * XXX: some laptops trigger several spurious interrupts 1168 * on em(4) when in the resume cycle. The ICR register 1169 * reports all-ones value in this case. Processing such 1170 * interrupts would lead to a freeze. I don't know why. 1171 */ 1172 if (reg_icr == 0xffffffff) 1173 break; 1174 1175 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1176 em_rxeof(adapter, -1); 1177 em_txeof(adapter); 1178 } 1179 1180 /* Link status change */ 1181 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1182 callout_stop(&adapter->timer); 1183 adapter->hw.get_link_status = 1; 1184 em_check_for_link(&adapter->hw); 1185 em_update_link_status(adapter); 1186 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1187 } 1188 1189 if (reg_icr & E1000_ICR_RXO) 1190 adapter->rx_overruns++; 1191 } 1192 1193 if (ifp->if_drv_flags & IFF_DRV_RUNNING && 1194 !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1195 em_start_locked(ifp); 1196 1197 EM_UNLOCK(adapter); 1198} 1199 1200#else /* if not DEVICE_POLLING, then fast interrupt routines only */ 1201 1202static void 1203em_handle_link(void *context, int pending) 1204{ 1205 struct adapter *adapter = context; 1206 struct ifnet *ifp; 1207 1208 ifp = adapter->ifp; 1209 1210 EM_LOCK(adapter); 1211 1212 callout_stop(&adapter->timer); 1213 adapter->hw.get_link_status = 1; 1214 em_check_for_link(&adapter->hw); 1215 em_update_link_status(adapter); 1216 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1217 EM_UNLOCK(adapter); 1218} 1219 1220static void 1221em_handle_rxtx(void *context, int pending) 1222{ 1223 struct adapter *adapter = context; 1224 struct ifnet *ifp; 1225 1226 NET_LOCK_GIANT(); 1227 ifp = adapter->ifp; 1228 1229 /* 1230 * TODO: 1231 * It should be possible to run the tx clean loop without the lock. 1232 */ 1233 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1234 if (em_rxeof(adapter, adapter->rx_process_limit) != 0) 1235 taskqueue_enqueue(adapter->tq, &adapter->rxtx_task); 1236 EM_LOCK(adapter); 1237 em_txeof(adapter); 1238 1239 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1240 em_start_locked(ifp); 1241 EM_UNLOCK(adapter); 1242 } 1243 1244 em_enable_intr(adapter); 1245 NET_UNLOCK_GIANT(); 1246} 1247 1248/********************************************************************* 1249 * 1250 * Fast Interrupt Service routine 1251 * 1252 *********************************************************************/ 1253static void 1254em_intr_fast(void *arg) 1255{ 1256 struct adapter *adapter = arg; 1257 struct ifnet *ifp; 1258 uint32_t reg_icr; 1259 1260 ifp = adapter->ifp; 1261 1262 reg_icr = E1000_READ_REG(&adapter->hw, ICR); 1263 1264 /* Hot eject? */ 1265 if (reg_icr == 0xffffffff) 1266 return; 1267 1268 /* Definitely not our interrupt. */ 1269 if (reg_icr == 0x0) 1270 return; 1271 1272 /* 1273 * Starting with the 82571 chip, bit 31 should be used to 1274 * determine whether the interrupt belongs to us. 1275 */ 1276 if (adapter->hw.mac_type >= em_82571 && 1277 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) 1278 return; 1279 1280 /* 1281 * Mask interrupts until the taskqueue is finished running. This is 1282 * cheap, just assume that it is needed. This also works around the 1283 * MSI message reordering errata on certain systems. 1284 */ 1285 em_disable_intr(adapter); 1286 taskqueue_enqueue(adapter->tq, &adapter->rxtx_task); 1287 1288 /* Link status change */ 1289 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) 1290 taskqueue_enqueue(taskqueue_fast, &adapter->link_task); 1291 1292 if (reg_icr & E1000_ICR_RXO) 1293 adapter->rx_overruns++; 1294} 1295#endif /* ! DEVICE_POLLING */ 1296 1297/********************************************************************* 1298 * 1299 * Media Ioctl callback 1300 * 1301 * This routine is called whenever the user queries the status of 1302 * the interface using ifconfig. 1303 * 1304 **********************************************************************/ 1305static void 1306em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1307{ 1308 struct adapter *adapter = ifp->if_softc; 1309 1310 INIT_DEBUGOUT("em_media_status: begin"); 1311 1312 em_check_for_link(&adapter->hw); 1313 em_update_link_status(adapter); 1314 1315 ifmr->ifm_status = IFM_AVALID; 1316 ifmr->ifm_active = IFM_ETHER; 1317 1318 if (!adapter->link_active) 1319 return; 1320 1321 ifmr->ifm_status |= IFM_ACTIVE; 1322 1323 if ((adapter->hw.media_type == em_media_type_fiber) || 1324 (adapter->hw.media_type == em_media_type_internal_serdes)) { 1325 if (adapter->hw.mac_type == em_82545) 1326 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 1327 else 1328 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 1329 } else { 1330 switch (adapter->link_speed) { 1331 case 10: 1332 ifmr->ifm_active |= IFM_10_T; 1333 break; 1334 case 100: 1335 ifmr->ifm_active |= IFM_100_TX; 1336 break; 1337 case 1000: 1338 ifmr->ifm_active |= IFM_1000_T; 1339 break; 1340 } 1341 if (adapter->link_duplex == FULL_DUPLEX) 1342 ifmr->ifm_active |= IFM_FDX; 1343 else 1344 ifmr->ifm_active |= IFM_HDX; 1345 } 1346} 1347 1348/********************************************************************* 1349 * 1350 * Media Ioctl callback 1351 * 1352 * This routine is called when the user changes speed/duplex using 1353 * media/mediopt option with ifconfig. 1354 * 1355 **********************************************************************/ 1356static int 1357em_media_change(struct ifnet *ifp) 1358{ 1359 struct adapter *adapter = ifp->if_softc; 1360 struct ifmedia *ifm = &adapter->media; 1361 1362 INIT_DEBUGOUT("em_media_change: begin"); 1363 1364 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1365 return (EINVAL); 1366 1367 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1368 case IFM_AUTO: 1369 adapter->hw.autoneg = DO_AUTO_NEG; 1370 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT; 1371 break; 1372 case IFM_1000_LX: 1373 case IFM_1000_SX: 1374 case IFM_1000_T: 1375 adapter->hw.autoneg = DO_AUTO_NEG; 1376 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; 1377 break; 1378 case IFM_100_TX: 1379 adapter->hw.autoneg = FALSE; 1380 adapter->hw.autoneg_advertised = 0; 1381 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1382 adapter->hw.forced_speed_duplex = em_100_full; 1383 else 1384 adapter->hw.forced_speed_duplex = em_100_half; 1385 break; 1386 case IFM_10_T: 1387 adapter->hw.autoneg = FALSE; 1388 adapter->hw.autoneg_advertised = 0; 1389 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1390 adapter->hw.forced_speed_duplex = em_10_full; 1391 else 1392 adapter->hw.forced_speed_duplex = em_10_half; 1393 break; 1394 default: 1395 device_printf(adapter->dev, "Unsupported media type\n"); 1396 } 1397 1398 /* As the speed/duplex settings my have changed we need to 1399 * reset the PHY. 1400 */ 1401 adapter->hw.phy_reset_disable = FALSE; 1402 1403 em_init(adapter); 1404 1405 return (0); 1406} 1407 1408/********************************************************************* 1409 * 1410 * This routine maps the mbufs to tx descriptors. 1411 * 1412 * return 0 on success, positive on failure 1413 **********************************************************************/ 1414static int 1415em_encap(struct adapter *adapter, struct mbuf **m_headp) 1416{ 1417 struct ifnet *ifp = adapter->ifp; 1418 bus_dma_segment_t segs[EM_MAX_SCATTER]; 1419 bus_dmamap_t map; 1420 struct em_buffer *tx_buffer, *tx_buffer_last; 1421 struct em_tx_desc *current_tx_desc; 1422 struct mbuf *m_head; 1423 struct m_tag *mtag; 1424 uint32_t txd_upper, txd_lower, txd_used, txd_saved; 1425 int nsegs, i, j; 1426 int error; 1427 1428 m_head = *m_headp; 1429 current_tx_desc = NULL; 1430 txd_used = txd_saved = 0; 1431 1432 /* 1433 * Force a cleanup if number of TX descriptors 1434 * available hits the threshold. 1435 */ 1436 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) { 1437 em_txeof(adapter); 1438 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) { 1439 adapter->no_tx_desc_avail1++; 1440 return (ENOBUFS); 1441 } 1442 } 1443 1444 /* Find out if we are in vlan mode. */ 1445 mtag = VLAN_OUTPUT_TAG(ifp, m_head); 1446 1447 /* 1448 * When operating in promiscuous mode, hardware encapsulation for 1449 * packets is disabled. This means we have to add the vlan 1450 * encapsulation in the driver, since it will have come down from the 1451 * VLAN layer with a tag instead of a VLAN header. 1452 */ 1453 if (mtag != NULL && adapter->em_insert_vlan_header) { 1454 struct ether_vlan_header *evl; 1455 struct ether_header eh; 1456 1457 m_head = m_pullup(m_head, sizeof(eh)); 1458 if (m_head == NULL) { 1459 *m_headp = NULL; 1460 return (ENOBUFS); 1461 } 1462 eh = *mtod(m_head, struct ether_header *); 1463 M_PREPEND(m_head, sizeof(*evl), M_DONTWAIT); 1464 if (m_head == NULL) { 1465 *m_headp = NULL; 1466 return (ENOBUFS); 1467 } 1468 m_head = m_pullup(m_head, sizeof(*evl)); 1469 if (m_head == NULL) { 1470 *m_headp = NULL; 1471 return (ENOBUFS); 1472 } 1473 evl = mtod(m_head, struct ether_vlan_header *); 1474 bcopy(&eh, evl, sizeof(*evl)); 1475 evl->evl_proto = evl->evl_encap_proto; 1476 evl->evl_encap_proto = htons(ETHERTYPE_VLAN); 1477 evl->evl_tag = htons(VLAN_TAG_VALUE(mtag)); 1478 m_tag_delete(m_head, mtag); 1479 mtag = NULL; 1480 *m_headp = m_head; 1481 } 1482 1483 /* 1484 * Map the packet for DMA. 1485 */ 1486 tx_buffer = &adapter->tx_buffer_area[adapter->next_avail_tx_desc]; 1487 tx_buffer_last = tx_buffer; 1488 map = tx_buffer->map; 1489 error = bus_dmamap_load_mbuf_sg(adapter->txtag, map, m_head, segs, &nsegs, 1490 BUS_DMA_NOWAIT); 1491 if (error != 0) { 1492 adapter->no_tx_dma_setup++; 1493 return (error); 1494 } 1495 KASSERT(nsegs != 0, ("em_encap: empty packet")); 1496 1497 if (nsegs > adapter->num_tx_desc_avail) { 1498 adapter->no_tx_desc_avail2++; 1499 error = ENOBUFS; 1500 goto encap_fail; 1501 } 1502 1503 if (ifp->if_hwassist > 0) 1504 em_transmit_checksum_setup(adapter, m_head, &txd_upper, &txd_lower); 1505 else 1506 txd_upper = txd_lower = 0; 1507 1508 i = adapter->next_avail_tx_desc; 1509 if (adapter->pcix_82544) { 1510 txd_saved = i; 1511 txd_used = 0; 1512 } 1513 for (j = 0; j < nsegs; j++) { 1514 /* If adapter is 82544 and on PCIX bus. */ 1515 if(adapter->pcix_82544) { 1516 DESC_ARRAY desc_array; 1517 uint32_t array_elements, counter; 1518 1519 /* 1520 * Check the Address and Length combination and 1521 * split the data accordingly 1522 */ 1523 array_elements = em_fill_descriptors(segs[j].ds_addr, 1524 segs[j].ds_len, &desc_array); 1525 for (counter = 0; counter < array_elements; counter++) { 1526 if (txd_used == adapter->num_tx_desc_avail) { 1527 adapter->next_avail_tx_desc = txd_saved; 1528 adapter->no_tx_desc_avail2++; 1529 error = ENOBUFS; 1530 goto encap_fail; 1531 } 1532 tx_buffer = &adapter->tx_buffer_area[i]; 1533 current_tx_desc = &adapter->tx_desc_base[i]; 1534 current_tx_desc->buffer_addr = htole64( 1535 desc_array.descriptor[counter].address); 1536 current_tx_desc->lower.data = htole32( 1537 (adapter->txd_cmd | txd_lower | 1538 (uint16_t)desc_array.descriptor[counter].length)); 1539 current_tx_desc->upper.data = htole32((txd_upper)); 1540 if (++i == adapter->num_tx_desc) 1541 i = 0; 1542 1543 tx_buffer->m_head = NULL; 1544 txd_used++; 1545 } 1546 } else { 1547 tx_buffer = &adapter->tx_buffer_area[i]; 1548 current_tx_desc = &adapter->tx_desc_base[i]; 1549 1550 current_tx_desc->buffer_addr = htole64(segs[j].ds_addr); 1551 current_tx_desc->lower.data = htole32( 1552 adapter->txd_cmd | txd_lower | segs[j].ds_len); 1553 current_tx_desc->upper.data = htole32(txd_upper); 1554 1555 if (++i == adapter->num_tx_desc) 1556 i = 0; 1557 1558 tx_buffer->m_head = NULL; 1559 } 1560 } 1561 1562 adapter->next_avail_tx_desc = i; 1563 if (adapter->pcix_82544) 1564 adapter->num_tx_desc_avail -= txd_used; 1565 else 1566 adapter->num_tx_desc_avail -= nsegs; 1567 1568 if (mtag != NULL) { 1569 /* Set the vlan id. */ 1570 current_tx_desc->upper.fields.special = 1571 htole16(VLAN_TAG_VALUE(mtag)); 1572 1573 /* Tell hardware to add tag. */ 1574 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_VLE); 1575 } 1576 1577 tx_buffer->m_head = m_head; 1578 tx_buffer_last->map = tx_buffer->map; 1579 tx_buffer->map = map; 1580 bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE); 1581 1582 /* 1583 * Last Descriptor of Packet needs End Of Packet (EOP). 1584 */ 1585 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_EOP); 1586 1587 /* 1588 * Advance the Transmit Descriptor Tail (Tdt), this tells the E1000 1589 * that this frame is available to transmit. 1590 */ 1591 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 1592 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1593 if (adapter->hw.mac_type == em_82547 && adapter->link_duplex == HALF_DUPLEX) 1594 em_82547_move_tail_locked(adapter); 1595 else { 1596 E1000_WRITE_REG(&adapter->hw, TDT, i); 1597 if (adapter->hw.mac_type == em_82547) 1598 em_82547_update_fifo_head(adapter, m_head->m_pkthdr.len); 1599 } 1600 1601 return (0); 1602 1603encap_fail: 1604 bus_dmamap_unload(adapter->txtag, map); 1605 return (error); 1606} 1607 1608/********************************************************************* 1609 * 1610 * 82547 workaround to avoid controller hang in half-duplex environment. 1611 * The workaround is to avoid queuing a large packet that would span 1612 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers 1613 * in this case. We do that only when FIFO is quiescent. 1614 * 1615 **********************************************************************/ 1616static void 1617em_82547_move_tail_locked(struct adapter *adapter) 1618{ 1619 uint16_t hw_tdt; 1620 uint16_t sw_tdt; 1621 struct em_tx_desc *tx_desc; 1622 uint16_t length = 0; 1623 boolean_t eop = 0; 1624 1625 EM_LOCK_ASSERT(adapter); 1626 1627 hw_tdt = E1000_READ_REG(&adapter->hw, TDT); 1628 sw_tdt = adapter->next_avail_tx_desc; 1629 1630 while (hw_tdt != sw_tdt) { 1631 tx_desc = &adapter->tx_desc_base[hw_tdt]; 1632 length += tx_desc->lower.flags.length; 1633 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP; 1634 if(++hw_tdt == adapter->num_tx_desc) 1635 hw_tdt = 0; 1636 1637 if (eop) { 1638 if (em_82547_fifo_workaround(adapter, length)) { 1639 adapter->tx_fifo_wrk_cnt++; 1640 callout_reset(&adapter->tx_fifo_timer, 1, 1641 em_82547_move_tail, adapter); 1642 break; 1643 } 1644 E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt); 1645 em_82547_update_fifo_head(adapter, length); 1646 length = 0; 1647 } 1648 } 1649} 1650 1651static void 1652em_82547_move_tail(void *arg) 1653{ 1654 struct adapter *adapter = arg; 1655 1656 EM_LOCK(adapter); 1657 em_82547_move_tail_locked(adapter); 1658 EM_UNLOCK(adapter); 1659} 1660 1661static int 1662em_82547_fifo_workaround(struct adapter *adapter, int len) 1663{ 1664 int fifo_space, fifo_pkt_len; 1665 1666 fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR); 1667 1668 if (adapter->link_duplex == HALF_DUPLEX) { 1669 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; 1670 1671 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) { 1672 if (em_82547_tx_fifo_reset(adapter)) 1673 return (0); 1674 else 1675 return (1); 1676 } 1677 } 1678 1679 return (0); 1680} 1681 1682static void 1683em_82547_update_fifo_head(struct adapter *adapter, int len) 1684{ 1685 int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR); 1686 1687 /* tx_fifo_head is always 16 byte aligned */ 1688 adapter->tx_fifo_head += fifo_pkt_len; 1689 if (adapter->tx_fifo_head >= adapter->tx_fifo_size) { 1690 adapter->tx_fifo_head -= adapter->tx_fifo_size; 1691 } 1692} 1693 1694 1695static int 1696em_82547_tx_fifo_reset(struct adapter *adapter) 1697{ 1698 uint32_t tctl; 1699 1700 if ((E1000_READ_REG(&adapter->hw, TDT) == E1000_READ_REG(&adapter->hw, TDH)) && 1701 (E1000_READ_REG(&adapter->hw, TDFT) == E1000_READ_REG(&adapter->hw, TDFH)) && 1702 (E1000_READ_REG(&adapter->hw, TDFTS) == E1000_READ_REG(&adapter->hw, TDFHS))&& 1703 (E1000_READ_REG(&adapter->hw, TDFPC) == 0)) { 1704 1705 /* Disable TX unit */ 1706 tctl = E1000_READ_REG(&adapter->hw, TCTL); 1707 E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN); 1708 1709 /* Reset FIFO pointers */ 1710 E1000_WRITE_REG(&adapter->hw, TDFT, adapter->tx_head_addr); 1711 E1000_WRITE_REG(&adapter->hw, TDFH, adapter->tx_head_addr); 1712 E1000_WRITE_REG(&adapter->hw, TDFTS, adapter->tx_head_addr); 1713 E1000_WRITE_REG(&adapter->hw, TDFHS, adapter->tx_head_addr); 1714 1715 /* Re-enable TX unit */ 1716 E1000_WRITE_REG(&adapter->hw, TCTL, tctl); 1717 E1000_WRITE_FLUSH(&adapter->hw); 1718 1719 adapter->tx_fifo_head = 0; 1720 adapter->tx_fifo_reset_cnt++; 1721 1722 return (TRUE); 1723 } 1724 else { 1725 return (FALSE); 1726 } 1727} 1728 1729static void 1730em_set_promisc(struct adapter *adapter) 1731{ 1732 struct ifnet *ifp = adapter->ifp; 1733 uint32_t reg_rctl; 1734 1735 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1736 1737 if (ifp->if_flags & IFF_PROMISC) { 1738 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 1739 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1740 /* Disable VLAN stripping in promiscous mode 1741 * This enables bridging of vlan tagged frames to occur 1742 * and also allows vlan tags to be seen in tcpdump 1743 */ 1744 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) 1745 em_disable_vlans(adapter); 1746 adapter->em_insert_vlan_header = 1; 1747 } else if (ifp->if_flags & IFF_ALLMULTI) { 1748 reg_rctl |= E1000_RCTL_MPE; 1749 reg_rctl &= ~E1000_RCTL_UPE; 1750 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1751 adapter->em_insert_vlan_header = 0; 1752 } else 1753 adapter->em_insert_vlan_header = 0; 1754} 1755 1756static void 1757em_disable_promisc(struct adapter *adapter) 1758{ 1759 struct ifnet *ifp = adapter->ifp; 1760 uint32_t reg_rctl; 1761 1762 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1763 1764 reg_rctl &= (~E1000_RCTL_UPE); 1765 reg_rctl &= (~E1000_RCTL_MPE); 1766 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1767 1768 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) 1769 em_enable_vlans(adapter); 1770 adapter->em_insert_vlan_header = 0; 1771} 1772 1773 1774/********************************************************************* 1775 * Multicast Update 1776 * 1777 * This routine is called whenever multicast address list is updated. 1778 * 1779 **********************************************************************/ 1780 1781static void 1782em_set_multi(struct adapter *adapter) 1783{ 1784 struct ifnet *ifp = adapter->ifp; 1785 struct ifmultiaddr *ifma; 1786 uint32_t reg_rctl = 0; 1787 uint8_t mta[MAX_NUM_MULTICAST_ADDRESSES * ETH_LENGTH_OF_ADDRESS]; 1788 int mcnt = 0; 1789 1790 IOCTL_DEBUGOUT("em_set_multi: begin"); 1791 1792 if (adapter->hw.mac_type == em_82542_rev2_0) { 1793 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1794 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 1795 em_pci_clear_mwi(&adapter->hw); 1796 reg_rctl |= E1000_RCTL_RST; 1797 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1798 msec_delay(5); 1799 } 1800 1801 IF_ADDR_LOCK(ifp); 1802 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1803 if (ifma->ifma_addr->sa_family != AF_LINK) 1804 continue; 1805 1806 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 1807 break; 1808 1809 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1810 &mta[mcnt*ETH_LENGTH_OF_ADDRESS], ETH_LENGTH_OF_ADDRESS); 1811 mcnt++; 1812 } 1813 IF_ADDR_UNLOCK(ifp); 1814 1815 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) { 1816 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1817 reg_rctl |= E1000_RCTL_MPE; 1818 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1819 } else 1820 em_mc_addr_list_update(&adapter->hw, mta, mcnt, 0, 1); 1821 1822 if (adapter->hw.mac_type == em_82542_rev2_0) { 1823 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1824 reg_rctl &= ~E1000_RCTL_RST; 1825 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1826 msec_delay(5); 1827 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 1828 em_pci_set_mwi(&adapter->hw); 1829 } 1830} 1831 1832 1833/********************************************************************* 1834 * Timer routine 1835 * 1836 * This routine checks for link status and updates statistics. 1837 * 1838 **********************************************************************/ 1839 1840static void 1841em_local_timer(void *arg) 1842{ 1843 struct adapter *adapter = arg; 1844 struct ifnet *ifp = adapter->ifp; 1845 1846 EM_LOCK(adapter); 1847 1848 em_check_for_link(&adapter->hw); 1849 em_update_link_status(adapter); 1850 em_update_stats_counters(adapter); 1851 if (em_display_debug_stats && ifp->if_drv_flags & IFF_DRV_RUNNING) 1852 em_print_hw_stats(adapter); 1853 em_smartspeed(adapter); 1854 1855 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1856 1857 EM_UNLOCK(adapter); 1858} 1859 1860static void 1861em_update_link_status(struct adapter *adapter) 1862{ 1863 struct ifnet *ifp = adapter->ifp; 1864 device_t dev = adapter->dev; 1865 1866 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) { 1867 if (adapter->link_active == 0) { 1868 em_get_speed_and_duplex(&adapter->hw, &adapter->link_speed, 1869 &adapter->link_duplex); 1870 /* Check if we may set SPEED_MODE bit on PCI-E */ 1871 if ((adapter->link_speed == SPEED_1000) && 1872 ((adapter->hw.mac_type == em_82571) || 1873 (adapter->hw.mac_type == em_82572))) { 1874 int tarc0; 1875 1876 tarc0 = E1000_READ_REG(&adapter->hw, TARC0); 1877 tarc0 |= SPEED_MODE_BIT; 1878 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0); 1879 } 1880 if (bootverbose) 1881 device_printf(dev, "Link is up %d Mbps %s\n", 1882 adapter->link_speed, 1883 ((adapter->link_duplex == FULL_DUPLEX) ? 1884 "Full Duplex" : "Half Duplex")); 1885 adapter->link_active = 1; 1886 adapter->smartspeed = 0; 1887 ifp->if_baudrate = adapter->link_speed * 1000000; 1888 if_link_state_change(ifp, LINK_STATE_UP); 1889 } 1890 } else { 1891 if (adapter->link_active == 1) { 1892 ifp->if_baudrate = adapter->link_speed = 0; 1893 adapter->link_duplex = 0; 1894 if (bootverbose) 1895 device_printf(dev, "Link is Down\n"); 1896 adapter->link_active = 0; 1897 if_link_state_change(ifp, LINK_STATE_DOWN); 1898 } 1899 } 1900} 1901 1902/********************************************************************* 1903 * 1904 * This routine disables all traffic on the adapter by issuing a 1905 * global reset on the MAC and deallocates TX/RX buffers. 1906 * 1907 **********************************************************************/ 1908 1909static void 1910em_stop(void *arg) 1911{ 1912 struct adapter *adapter = arg; 1913 struct ifnet *ifp = adapter->ifp; 1914 1915 EM_LOCK_ASSERT(adapter); 1916 1917 INIT_DEBUGOUT("em_stop: begin"); 1918 1919 em_disable_intr(adapter); 1920 em_reset_hw(&adapter->hw); 1921 callout_stop(&adapter->timer); 1922 callout_stop(&adapter->tx_fifo_timer); 1923 em_free_transmit_structures(adapter); 1924 em_free_receive_structures(adapter); 1925 1926 /* Tell the stack that the interface is no longer active */ 1927 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1928} 1929 1930 1931/********************************************************************* 1932 * 1933 * Determine hardware revision. 1934 * 1935 **********************************************************************/ 1936static void 1937em_identify_hardware(struct adapter *adapter) 1938{ 1939 device_t dev = adapter->dev; 1940 1941 /* Make sure our PCI config space has the necessary stuff set */ 1942 adapter->hw.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2); 1943 if ((adapter->hw.pci_cmd_word & PCIM_CMD_BUSMASTEREN) == 0 && 1944 (adapter->hw.pci_cmd_word & PCIM_CMD_MEMEN)) { 1945 device_printf(dev, "Memory Access and/or Bus Master bits " 1946 "were not set!\n"); 1947 adapter->hw.pci_cmd_word |= 1948 (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN); 1949 pci_write_config(dev, PCIR_COMMAND, adapter->hw.pci_cmd_word, 2); 1950 } 1951 1952 /* Save off the information about this board */ 1953 adapter->hw.vendor_id = pci_get_vendor(dev); 1954 adapter->hw.device_id = pci_get_device(dev); 1955 adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1); 1956 adapter->hw.subsystem_vendor_id = pci_read_config(dev, PCIR_SUBVEND_0, 2); 1957 adapter->hw.subsystem_id = pci_read_config(dev, PCIR_SUBDEV_0, 2); 1958 1959 /* Identify the MAC */ 1960 if (em_set_mac_type(&adapter->hw)) 1961 device_printf(dev, "Unknown MAC Type\n"); 1962 1963 if(adapter->hw.mac_type == em_82541 || adapter->hw.mac_type == em_82541_rev_2 || 1964 adapter->hw.mac_type == em_82547 || adapter->hw.mac_type == em_82547_rev_2) 1965 adapter->hw.phy_init_script = TRUE; 1966} 1967 1968static int 1969em_allocate_pci_resources(struct adapter *adapter) 1970{ 1971 device_t dev = adapter->dev; 1972 int val, rid; 1973 1974 rid = PCIR_BAR(0); 1975 adapter->res_memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 1976 &rid, RF_ACTIVE); 1977 if (adapter->res_memory == NULL) { 1978 device_printf(dev, "Unable to allocate bus resource: memory\n"); 1979 return (ENXIO); 1980 } 1981 adapter->osdep.mem_bus_space_tag = 1982 rman_get_bustag(adapter->res_memory); 1983 adapter->osdep.mem_bus_space_handle = rman_get_bushandle(adapter->res_memory); 1984 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle; 1985 1986 if (adapter->hw.mac_type > em_82543) { 1987 /* Figure our where our IO BAR is ? */ 1988 for (rid = PCIR_BAR(0); rid < PCIR_CIS;) { 1989 val = pci_read_config(dev, rid, 4); 1990 if (E1000_BAR_TYPE(val) == E1000_BAR_TYPE_IO) { 1991 adapter->io_rid = rid; 1992 break; 1993 } 1994 rid += 4; 1995 /* check for 64bit BAR */ 1996 if (E1000_BAR_MEM_TYPE(val) == E1000_BAR_MEM_TYPE_64BIT) 1997 rid += 4; 1998 } 1999 if (rid >= PCIR_CIS) { 2000 device_printf(dev, "Unable to locate IO BAR\n"); 2001 return (ENXIO); 2002 } 2003 adapter->res_ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT, 2004 &adapter->io_rid, RF_ACTIVE); 2005 if (adapter->res_ioport == NULL) { 2006 device_printf(dev, "Unable to allocate bus resource: " 2007 "ioport\n"); 2008 return (ENXIO); 2009 } 2010 adapter->hw.io_base = 0; 2011 adapter->osdep.io_bus_space_tag = rman_get_bustag(adapter->res_ioport); 2012 adapter->osdep.io_bus_space_handle = 2013 rman_get_bushandle(adapter->res_ioport); 2014 } 2015 2016 /* For ICH8 we need to find the flash memory. */ 2017 if (adapter->hw.mac_type == em_ich8lan) { 2018 rid = EM_FLASH; 2019 2020 adapter->flash_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 2021 &rid, RF_ACTIVE); 2022 adapter->osdep.flash_bus_space_tag = rman_get_bustag(adapter->flash_mem); 2023 adapter->osdep.flash_bus_space_handle = 2024 rman_get_bushandle(adapter->flash_mem); 2025 } 2026 2027 rid = 0x0; 2028 adapter->res_interrupt = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 2029 RF_SHAREABLE | RF_ACTIVE); 2030 if (adapter->res_interrupt == NULL) { 2031 device_printf(dev, "Unable to allocate bus resource: " 2032 "interrupt\n"); 2033 return (ENXIO); 2034 } 2035 2036 adapter->hw.back = &adapter->osdep; 2037 2038 return (0); 2039} 2040 2041int 2042em_allocate_intr(struct adapter *adapter) 2043{ 2044 device_t dev = adapter->dev; 2045 int error; 2046 2047 /* Manually turn off all interrupts */ 2048 E1000_WRITE_REG(&adapter->hw, IMC, 0xffffffff); 2049 2050#ifdef DEVICE_POLLING 2051 if (adapter->int_handler_tag == NULL && (error = bus_setup_intr(dev, 2052 adapter->res_interrupt, INTR_TYPE_NET | INTR_MPSAFE, em_intr, adapter, 2053 &adapter->int_handler_tag)) != 0) { 2054 device_printf(dev, "Failed to register interrupt handler"); 2055 return (error); 2056 } 2057#else 2058 /* 2059 * Try allocating a fast interrupt and the associated deferred 2060 * processing contexts. 2061 */ 2062 TASK_INIT(&adapter->rxtx_task, 0, em_handle_rxtx, adapter); 2063 TASK_INIT(&adapter->link_task, 0, em_handle_link, adapter); 2064 adapter->tq = taskqueue_create_fast("em_taskq", M_NOWAIT, 2065 taskqueue_thread_enqueue, &adapter->tq); 2066 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s taskq", 2067 device_get_nameunit(adapter->dev)); 2068 if ((error = bus_setup_intr(dev, adapter->res_interrupt, 2069 INTR_TYPE_NET | INTR_FAST, em_intr_fast, adapter, 2070 &adapter->int_handler_tag)) != 0) { 2071 device_printf(dev, "Failed to register fast interrupt " 2072 "handler: %d\n", error); 2073 taskqueue_free(adapter->tq); 2074 adapter->tq = NULL; 2075 return (error); 2076 } 2077#endif 2078 2079 em_enable_intr(adapter); 2080 return (0); 2081} 2082 2083static void 2084em_free_intr(struct adapter *adapter) 2085{ 2086 device_t dev = adapter->dev; 2087 2088 if (adapter->res_interrupt != NULL) { 2089 bus_teardown_intr(dev, adapter->res_interrupt, adapter->int_handler_tag); 2090 adapter->int_handler_tag = NULL; 2091 } 2092 if (adapter->tq != NULL) { 2093 taskqueue_drain(adapter->tq, &adapter->rxtx_task); 2094 taskqueue_drain(taskqueue_fast, &adapter->link_task); 2095 taskqueue_free(adapter->tq); 2096 adapter->tq = NULL; 2097 } 2098} 2099 2100static void 2101em_free_pci_resources(struct adapter *adapter) 2102{ 2103 device_t dev = adapter->dev; 2104 2105 if (adapter->res_interrupt != NULL) 2106 bus_release_resource(dev, SYS_RES_IRQ, 0, adapter->res_interrupt); 2107 2108 if (adapter->res_memory != NULL) 2109 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), 2110 adapter->res_memory); 2111 2112 if (adapter->flash_mem != NULL) 2113 bus_release_resource(dev, SYS_RES_MEMORY, EM_FLASH, 2114 adapter->flash_mem); 2115 2116 if (adapter->res_ioport != NULL) 2117 bus_release_resource(dev, SYS_RES_IOPORT, adapter->io_rid, 2118 adapter->res_ioport); 2119} 2120 2121/********************************************************************* 2122 * 2123 * Initialize the hardware to a configuration as specified by the 2124 * adapter structure. The controller is reset, the EEPROM is 2125 * verified, the MAC address is set, then the shared initialization 2126 * routines are called. 2127 * 2128 **********************************************************************/ 2129static int 2130em_hardware_init(struct adapter *adapter) 2131{ 2132 device_t dev = adapter->dev; 2133 uint16_t rx_buffer_size; 2134 2135 INIT_DEBUGOUT("em_hardware_init: begin"); 2136 /* Issue a global reset */ 2137 em_reset_hw(&adapter->hw); 2138 2139 /* When hardware is reset, fifo_head is also reset */ 2140 adapter->tx_fifo_head = 0; 2141 2142 /* Make sure we have a good EEPROM before we read from it */ 2143 if (em_validate_eeprom_checksum(&adapter->hw) < 0) { 2144 device_printf(dev, "The EEPROM Checksum Is Not Valid\n"); 2145 return (EIO); 2146 } 2147 2148 if (em_read_part_num(&adapter->hw, &(adapter->part_num)) < 0) { 2149 device_printf(dev, "EEPROM read error while reading part " 2150 "number\n"); 2151 return (EIO); 2152 } 2153 2154 /* Set up smart power down as default off on newer adapters. */ 2155 if (!em_smart_pwr_down && 2156 (adapter->hw.mac_type == em_82571 || adapter->hw.mac_type == em_82572)) { 2157 uint16_t phy_tmp = 0; 2158 2159 /* Speed up time to link by disabling smart power down. */ 2160 em_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, &phy_tmp); 2161 phy_tmp &= ~IGP02E1000_PM_SPD; 2162 em_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, phy_tmp); 2163 } 2164 2165 /* 2166 * These parameters control the automatic generation (Tx) and 2167 * response (Rx) to Ethernet PAUSE frames. 2168 * - High water mark should allow for at least two frames to be 2169 * received after sending an XOFF. 2170 * - Low water mark works best when it is very near the high water mark. 2171 * This allows the receiver to restart by sending XON when it has 2172 * drained a bit. Here we use an arbitary value of 1500 which will 2173 * restart after one full frame is pulled from the buffer. There 2174 * could be several smaller frames in the buffer and if so they will 2175 * not trigger the XON until their total number reduces the buffer 2176 * by 1500. 2177 * - The pause time is fairly large at 1000 x 512ns = 512 usec. 2178 */ 2179 rx_buffer_size = ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff) << 10 ); 2180 2181 adapter->hw.fc_high_water = rx_buffer_size - 2182 roundup2(adapter->hw.max_frame_size, 1024); 2183 adapter->hw.fc_low_water = adapter->hw.fc_high_water - 1500; 2184 if (adapter->hw.mac_type == em_80003es2lan) 2185 adapter->hw.fc_pause_time = 0xFFFF; 2186 else 2187 adapter->hw.fc_pause_time = 0x1000; 2188 adapter->hw.fc_send_xon = TRUE; 2189 adapter->hw.fc = em_fc_full; 2190 2191 if (em_init_hw(&adapter->hw) < 0) { 2192 device_printf(dev, "Hardware Initialization Failed"); 2193 return (EIO); 2194 } 2195 2196 em_check_for_link(&adapter->hw); 2197 2198 return (0); 2199} 2200 2201/********************************************************************* 2202 * 2203 * Setup networking device structure and register an interface. 2204 * 2205 **********************************************************************/ 2206static void 2207em_setup_interface(device_t dev, struct adapter *adapter) 2208{ 2209 struct ifnet *ifp; 2210 INIT_DEBUGOUT("em_setup_interface: begin"); 2211 2212 ifp = adapter->ifp = if_alloc(IFT_ETHER); 2213 if (ifp == NULL) 2214 panic("%s: can not if_alloc()", device_get_nameunit(dev)); 2215 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 2216 ifp->if_mtu = ETHERMTU; 2217 ifp->if_init = em_init; 2218 ifp->if_softc = adapter; 2219 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 2220 ifp->if_ioctl = em_ioctl; 2221 ifp->if_start = em_start; 2222 ifp->if_watchdog = em_watchdog; 2223 IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 1); 2224 ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 1; 2225 IFQ_SET_READY(&ifp->if_snd); 2226 2227 ether_ifattach(ifp, adapter->hw.mac_addr); 2228 2229 ifp->if_capabilities = ifp->if_capenable = 0; 2230 2231 if (adapter->hw.mac_type >= em_82543) { 2232 ifp->if_capabilities |= IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM; 2233 ifp->if_capenable |= IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM; 2234 } 2235 2236 /* 2237 * Tell the upper layer(s) we support long frames. 2238 */ 2239 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 2240 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 2241 ifp->if_capenable |= IFCAP_VLAN_MTU; 2242 2243#ifdef DEVICE_POLLING 2244 ifp->if_capabilities |= IFCAP_POLLING; 2245#endif 2246 2247 /* 2248 * Specify the media types supported by this adapter and register 2249 * callbacks to update media and link information 2250 */ 2251 ifmedia_init(&adapter->media, IFM_IMASK, em_media_change, 2252 em_media_status); 2253 if ((adapter->hw.media_type == em_media_type_fiber) || 2254 (adapter->hw.media_type == em_media_type_internal_serdes)) { 2255 u_char fiber_type = IFM_1000_SX; // default type; 2256 2257 if (adapter->hw.mac_type == em_82545) 2258 fiber_type = IFM_1000_LX; 2259 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX, 2260 0, NULL); 2261 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL); 2262 } else { 2263 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL); 2264 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX, 2265 0, NULL); 2266 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 2267 0, NULL); 2268 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 2269 0, NULL); 2270 if (adapter->hw.phy_type != em_phy_ife) { 2271 ifmedia_add(&adapter->media, 2272 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); 2273 ifmedia_add(&adapter->media, 2274 IFM_ETHER | IFM_1000_T, 0, NULL); 2275 } 2276 } 2277 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2278 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2279} 2280 2281 2282/********************************************************************* 2283 * 2284 * Workaround for SmartSpeed on 82541 and 82547 controllers 2285 * 2286 **********************************************************************/ 2287static void 2288em_smartspeed(struct adapter *adapter) 2289{ 2290 uint16_t phy_tmp; 2291 2292 if (adapter->link_active || (adapter->hw.phy_type != em_phy_igp) || 2293 adapter->hw.autoneg == 0 || 2294 (adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL) == 0) 2295 return; 2296 2297 if (adapter->smartspeed == 0) { 2298 /* If Master/Slave config fault is asserted twice, 2299 * we assume back-to-back */ 2300 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 2301 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT)) 2302 return; 2303 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 2304 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) { 2305 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp); 2306 if(phy_tmp & CR_1000T_MS_ENABLE) { 2307 phy_tmp &= ~CR_1000T_MS_ENABLE; 2308 em_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, 2309 phy_tmp); 2310 adapter->smartspeed++; 2311 if(adapter->hw.autoneg && 2312 !em_phy_setup_autoneg(&adapter->hw) && 2313 !em_read_phy_reg(&adapter->hw, PHY_CTRL, 2314 &phy_tmp)) { 2315 phy_tmp |= (MII_CR_AUTO_NEG_EN | 2316 MII_CR_RESTART_AUTO_NEG); 2317 em_write_phy_reg(&adapter->hw, PHY_CTRL, 2318 phy_tmp); 2319 } 2320 } 2321 } 2322 return; 2323 } else if(adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) { 2324 /* If still no link, perhaps using 2/3 pair cable */ 2325 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp); 2326 phy_tmp |= CR_1000T_MS_ENABLE; 2327 em_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp); 2328 if(adapter->hw.autoneg && 2329 !em_phy_setup_autoneg(&adapter->hw) && 2330 !em_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_tmp)) { 2331 phy_tmp |= (MII_CR_AUTO_NEG_EN | 2332 MII_CR_RESTART_AUTO_NEG); 2333 em_write_phy_reg(&adapter->hw, PHY_CTRL, phy_tmp); 2334 } 2335 } 2336 /* Restart process after EM_SMARTSPEED_MAX iterations */ 2337 if(adapter->smartspeed++ == EM_SMARTSPEED_MAX) 2338 adapter->smartspeed = 0; 2339} 2340 2341 2342/* 2343 * Manage DMA'able memory. 2344 */ 2345static void 2346em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 2347{ 2348 if (error) 2349 return; 2350 *(bus_addr_t *) arg = segs[0].ds_addr; 2351} 2352 2353static int 2354em_dma_malloc(struct adapter *adapter, bus_size_t size, struct em_dma_alloc *dma, 2355 int mapflags) 2356{ 2357 int error; 2358 2359 error = bus_dma_tag_create(NULL, /* parent */ 2360 EM_DBA_ALIGN, 0, /* alignment, bounds */ 2361 BUS_SPACE_MAXADDR, /* lowaddr */ 2362 BUS_SPACE_MAXADDR, /* highaddr */ 2363 NULL, NULL, /* filter, filterarg */ 2364 size, /* maxsize */ 2365 1, /* nsegments */ 2366 size, /* maxsegsize */ 2367 0, /* flags */ 2368 NULL, /* lockfunc */ 2369 NULL, /* lockarg */ 2370 &dma->dma_tag); 2371 if (error) { 2372 device_printf(adapter->dev, "%s: bus_dma_tag_create failed: %d\n", 2373 __func__, error); 2374 goto fail_0; 2375 } 2376 2377 error = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr, 2378 BUS_DMA_NOWAIT, &dma->dma_map); 2379 if (error) { 2380 device_printf(adapter->dev, "%s: bus_dmamem_alloc(%ju) failed: %d\n", 2381 __func__, (uintmax_t)size, error); 2382 goto fail_2; 2383 } 2384 2385 dma->dma_paddr = 0; 2386 error = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr, 2387 size, em_dmamap_cb, &dma->dma_paddr, mapflags | BUS_DMA_NOWAIT); 2388 if (error || dma->dma_paddr == 0) { 2389 device_printf(adapter->dev, "%s: bus_dmamap_load failed: %d\n", 2390 __func__, error); 2391 goto fail_3; 2392 } 2393 2394 return (0); 2395 2396fail_3: 2397 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 2398fail_2: 2399 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 2400 bus_dma_tag_destroy(dma->dma_tag); 2401fail_0: 2402 dma->dma_map = NULL; 2403 dma->dma_tag = NULL; 2404 2405 return (error); 2406} 2407 2408static void 2409em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma) 2410{ 2411 if (dma->dma_tag == NULL) 2412 return; 2413 if (dma->dma_map != NULL) { 2414 bus_dmamap_sync(dma->dma_tag, dma->dma_map, 2415 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2416 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 2417 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 2418 dma->dma_map = NULL; 2419 } 2420 bus_dma_tag_destroy(dma->dma_tag); 2421 dma->dma_tag = NULL; 2422} 2423 2424 2425/********************************************************************* 2426 * 2427 * Allocate memory for tx_buffer structures. The tx_buffer stores all 2428 * the information needed to transmit a packet on the wire. 2429 * 2430 **********************************************************************/ 2431static int 2432em_allocate_transmit_structures(struct adapter *adapter) 2433{ 2434 adapter->tx_buffer_area = malloc(sizeof(struct em_buffer) * 2435 adapter->num_tx_desc, M_DEVBUF, M_NOWAIT); 2436 if (adapter->tx_buffer_area == NULL) { 2437 device_printf(adapter->dev, "Unable to allocate tx_buffer memory\n"); 2438 return (ENOMEM); 2439 } 2440 2441 bzero(adapter->tx_buffer_area, sizeof(struct em_buffer) * adapter->num_tx_desc); 2442 2443 return (0); 2444} 2445 2446/********************************************************************* 2447 * 2448 * Allocate and initialize transmit structures. 2449 * 2450 **********************************************************************/ 2451static int 2452em_setup_transmit_structures(struct adapter *adapter) 2453{ 2454 device_t dev = adapter->dev; 2455 struct em_buffer *tx_buffer; 2456 bus_size_t size; 2457 int error, i; 2458 2459 /* 2460 * Setup DMA descriptor areas. 2461 */ 2462 size = roundup2(adapter->hw.max_frame_size, MCLBYTES); 2463 if ((error = bus_dma_tag_create(NULL, /* parent */ 2464 1, 0, /* alignment, bounds */ 2465 BUS_SPACE_MAXADDR, /* lowaddr */ 2466 BUS_SPACE_MAXADDR, /* highaddr */ 2467 NULL, NULL, /* filter, filterarg */ 2468 size, /* maxsize */ 2469 EM_MAX_SCATTER, /* nsegments */ 2470 size, /* maxsegsize */ 2471 0, /* flags */ 2472 NULL, /* lockfunc */ 2473 NULL, /* lockarg */ 2474 &adapter->txtag)) != 0) { 2475 device_printf(dev, "Unable to allocate TX DMA tag\n"); 2476 goto fail; 2477 } 2478 2479 if ((error = em_allocate_transmit_structures(adapter)) != 0) 2480 goto fail; 2481 2482 bzero(adapter->tx_desc_base, (sizeof(struct em_tx_desc)) * adapter->num_tx_desc); 2483 tx_buffer = adapter->tx_buffer_area; 2484 for (i = 0; i < adapter->num_tx_desc; i++) { 2485 error = bus_dmamap_create(adapter->txtag, 0, &tx_buffer->map); 2486 if (error != 0) { 2487 device_printf(dev, "Unable to create TX DMA map\n"); 2488 goto fail; 2489 } 2490 tx_buffer++; 2491 } 2492 2493 adapter->next_avail_tx_desc = 0; 2494 adapter->oldest_used_tx_desc = 0; 2495 2496 /* Set number of descriptors available */ 2497 adapter->num_tx_desc_avail = adapter->num_tx_desc; 2498 2499 /* Set checksum context */ 2500 adapter->active_checksum_context = OFFLOAD_NONE; 2501 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2502 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2503 2504 return (0); 2505 2506fail: 2507 em_free_transmit_structures(adapter); 2508 return (error); 2509} 2510 2511/********************************************************************* 2512 * 2513 * Enable transmit unit. 2514 * 2515 **********************************************************************/ 2516static void 2517em_initialize_transmit_unit(struct adapter *adapter) 2518{ 2519 uint32_t reg_tctl, reg_tarc; 2520 uint32_t reg_tipg = 0; 2521 uint64_t bus_addr; 2522 2523 INIT_DEBUGOUT("em_initialize_transmit_unit: begin"); 2524 /* Setup the Base and Length of the Tx Descriptor Ring */ 2525 bus_addr = adapter->txdma.dma_paddr; 2526 E1000_WRITE_REG(&adapter->hw, TDLEN, 2527 adapter->num_tx_desc * sizeof(struct em_tx_desc)); 2528 E1000_WRITE_REG(&adapter->hw, TDBAH, (uint32_t)(bus_addr >> 32)); 2529 E1000_WRITE_REG(&adapter->hw, TDBAL, (uint32_t)bus_addr); 2530 2531 /* Setup the HW Tx Head and Tail descriptor pointers */ 2532 E1000_WRITE_REG(&adapter->hw, TDT, 0); 2533 E1000_WRITE_REG(&adapter->hw, TDH, 0); 2534 2535 2536 HW_DEBUGOUT2("Base = %x, Length = %x\n", E1000_READ_REG(&adapter->hw, TDBAL), 2537 E1000_READ_REG(&adapter->hw, TDLEN)); 2538 2539 /* Set the default values for the Tx Inter Packet Gap timer */ 2540 switch (adapter->hw.mac_type) { 2541 case em_82542_rev2_0: 2542 case em_82542_rev2_1: 2543 reg_tipg = DEFAULT_82542_TIPG_IPGT; 2544 reg_tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 2545 reg_tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 2546 break; 2547 case em_80003es2lan: 2548 reg_tipg = DEFAULT_82543_TIPG_IPGR1; 2549 reg_tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 << 2550 E1000_TIPG_IPGR2_SHIFT; 2551 break; 2552 default: 2553 if ((adapter->hw.media_type == em_media_type_fiber) || 2554 (adapter->hw.media_type == em_media_type_internal_serdes)) 2555 reg_tipg = DEFAULT_82543_TIPG_IPGT_FIBER; 2556 else 2557 reg_tipg = DEFAULT_82543_TIPG_IPGT_COPPER; 2558 reg_tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 2559 reg_tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 2560 } 2561 2562 E1000_WRITE_REG(&adapter->hw, TIPG, reg_tipg); 2563 E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay.value); 2564 if(adapter->hw.mac_type >= em_82540) 2565 E1000_WRITE_REG(&adapter->hw, TADV, adapter->tx_abs_int_delay.value); 2566 2567 /* Do adapter specific tweaks before we enable the transmitter. */ 2568 if (adapter->hw.mac_type == em_82571 || adapter->hw.mac_type == em_82572) { 2569 reg_tarc = E1000_READ_REG(&adapter->hw, TARC0); 2570 reg_tarc |= (1 << 25); 2571 E1000_WRITE_REG(&adapter->hw, TARC0, reg_tarc); 2572 reg_tarc = E1000_READ_REG(&adapter->hw, TARC1); 2573 reg_tarc |= (1 << 25); 2574 reg_tarc &= ~(1 << 28); 2575 E1000_WRITE_REG(&adapter->hw, TARC1, reg_tarc); 2576 } else if (adapter->hw.mac_type == em_80003es2lan) { 2577 reg_tarc = E1000_READ_REG(&adapter->hw, TARC0); 2578 reg_tarc |= 1; 2579 E1000_WRITE_REG(&adapter->hw, TARC0, reg_tarc); 2580 reg_tarc = E1000_READ_REG(&adapter->hw, TARC1); 2581 reg_tarc |= 1; 2582 E1000_WRITE_REG(&adapter->hw, TARC1, reg_tarc); 2583 } 2584 2585 /* Program the Transmit Control Register */ 2586 reg_tctl = E1000_TCTL_PSP | E1000_TCTL_EN | 2587 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 2588 if (adapter->hw.mac_type >= em_82571) 2589 reg_tctl |= E1000_TCTL_MULR; 2590 if (adapter->link_duplex == 1) { 2591 reg_tctl |= E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT; 2592 } else { 2593 reg_tctl |= E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT; 2594 } 2595 /* This write will effectively turn on the transmit unit. */ 2596 E1000_WRITE_REG(&adapter->hw, TCTL, reg_tctl); 2597 2598 /* Setup Transmit Descriptor Settings for this adapter */ 2599 adapter->txd_cmd = E1000_TXD_CMD_IFCS | E1000_TXD_CMD_RS; 2600 2601 if (adapter->tx_int_delay.value > 0) 2602 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2603} 2604 2605/********************************************************************* 2606 * 2607 * Free all transmit related data structures. 2608 * 2609 **********************************************************************/ 2610static void 2611em_free_transmit_structures(struct adapter *adapter) 2612{ 2613 struct em_buffer *tx_buffer; 2614 int i; 2615 2616 INIT_DEBUGOUT("free_transmit_structures: begin"); 2617 2618 if (adapter->tx_buffer_area != NULL) { 2619 tx_buffer = adapter->tx_buffer_area; 2620 for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) { 2621 if (tx_buffer->m_head != NULL) { 2622 bus_dmamap_sync(adapter->txtag, tx_buffer->map, 2623 BUS_DMASYNC_POSTWRITE); 2624 bus_dmamap_unload(adapter->txtag, 2625 tx_buffer->map); 2626 m_freem(tx_buffer->m_head); 2627 tx_buffer->m_head = NULL; 2628 } else if (tx_buffer->map != NULL) 2629 bus_dmamap_unload(adapter->txtag, 2630 tx_buffer->map); 2631 if (tx_buffer->map != NULL) { 2632 bus_dmamap_destroy(adapter->txtag, 2633 tx_buffer->map); 2634 tx_buffer->map = NULL; 2635 } 2636 } 2637 } 2638 if (adapter->tx_buffer_area != NULL) { 2639 free(adapter->tx_buffer_area, M_DEVBUF); 2640 adapter->tx_buffer_area = NULL; 2641 } 2642 if (adapter->txtag != NULL) { 2643 bus_dma_tag_destroy(adapter->txtag); 2644 adapter->txtag = NULL; 2645 } 2646} 2647 2648/********************************************************************* 2649 * 2650 * The offload context needs to be set when we transfer the first 2651 * packet of a particular protocol (TCP/UDP). We change the 2652 * context only if the protocol type changes. 2653 * 2654 **********************************************************************/ 2655static void 2656em_transmit_checksum_setup(struct adapter *adapter, struct mbuf *mp, 2657 uint32_t *txd_upper, uint32_t *txd_lower) 2658{ 2659 struct em_context_desc *TXD; 2660 struct em_buffer *tx_buffer; 2661 int curr_txd; 2662 2663 if (mp->m_pkthdr.csum_flags) { 2664 2665 if (mp->m_pkthdr.csum_flags & CSUM_TCP) { 2666 *txd_upper = E1000_TXD_POPTS_TXSM << 8; 2667 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 2668 if (adapter->active_checksum_context == OFFLOAD_TCP_IP) 2669 return; 2670 else 2671 adapter->active_checksum_context = OFFLOAD_TCP_IP; 2672 2673 } else if (mp->m_pkthdr.csum_flags & CSUM_UDP) { 2674 *txd_upper = E1000_TXD_POPTS_TXSM << 8; 2675 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 2676 if (adapter->active_checksum_context == OFFLOAD_UDP_IP) 2677 return; 2678 else 2679 adapter->active_checksum_context = OFFLOAD_UDP_IP; 2680 } else { 2681 *txd_upper = 0; 2682 *txd_lower = 0; 2683 return; 2684 } 2685 } else { 2686 *txd_upper = 0; 2687 *txd_lower = 0; 2688 return; 2689 } 2690 2691 /* If we reach this point, the checksum offload context 2692 * needs to be reset. 2693 */ 2694 curr_txd = adapter->next_avail_tx_desc; 2695 tx_buffer = &adapter->tx_buffer_area[curr_txd]; 2696 TXD = (struct em_context_desc *) &adapter->tx_desc_base[curr_txd]; 2697 2698 TXD->lower_setup.ip_fields.ipcss = ETHER_HDR_LEN; 2699 TXD->lower_setup.ip_fields.ipcso = 2700 ETHER_HDR_LEN + offsetof(struct ip, ip_sum); 2701 TXD->lower_setup.ip_fields.ipcse = 2702 htole16(ETHER_HDR_LEN + sizeof(struct ip) - 1); 2703 2704 TXD->upper_setup.tcp_fields.tucss = 2705 ETHER_HDR_LEN + sizeof(struct ip); 2706 TXD->upper_setup.tcp_fields.tucse = htole16(0); 2707 2708 if (adapter->active_checksum_context == OFFLOAD_TCP_IP) { 2709 TXD->upper_setup.tcp_fields.tucso = 2710 ETHER_HDR_LEN + sizeof(struct ip) + 2711 offsetof(struct tcphdr, th_sum); 2712 } else if (adapter->active_checksum_context == OFFLOAD_UDP_IP) { 2713 TXD->upper_setup.tcp_fields.tucso = 2714 ETHER_HDR_LEN + sizeof(struct ip) + 2715 offsetof(struct udphdr, uh_sum); 2716 } 2717 2718 TXD->tcp_seg_setup.data = htole32(0); 2719 TXD->cmd_and_length = htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT); 2720 2721 tx_buffer->m_head = NULL; 2722 2723 if (++curr_txd == adapter->num_tx_desc) 2724 curr_txd = 0; 2725 2726 adapter->num_tx_desc_avail--; 2727 adapter->next_avail_tx_desc = curr_txd; 2728} 2729 2730/********************************************************************** 2731 * 2732 * Examine each tx_buffer in the used queue. If the hardware is done 2733 * processing the packet then free associated resources. The 2734 * tx_buffer is put back on the free queue. 2735 * 2736 **********************************************************************/ 2737static void 2738em_txeof(struct adapter *adapter) 2739{ 2740 int i, num_avail; 2741 struct em_buffer *tx_buffer; 2742 struct em_tx_desc *tx_desc; 2743 struct ifnet *ifp = adapter->ifp; 2744 2745 EM_LOCK_ASSERT(adapter); 2746 2747 if (adapter->num_tx_desc_avail == adapter->num_tx_desc) 2748 return; 2749 2750 num_avail = adapter->num_tx_desc_avail; 2751 i = adapter->oldest_used_tx_desc; 2752 2753 tx_buffer = &adapter->tx_buffer_area[i]; 2754 tx_desc = &adapter->tx_desc_base[i]; 2755 2756 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2757 BUS_DMASYNC_POSTREAD); 2758 while (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) { 2759 2760 tx_desc->upper.data = 0; 2761 num_avail++; 2762 2763 if (tx_buffer->m_head) { 2764 ifp->if_opackets++; 2765 bus_dmamap_sync(adapter->txtag, tx_buffer->map, 2766 BUS_DMASYNC_POSTWRITE); 2767 bus_dmamap_unload(adapter->txtag, tx_buffer->map); 2768 2769 m_freem(tx_buffer->m_head); 2770 tx_buffer->m_head = NULL; 2771 } 2772 2773 if (++i == adapter->num_tx_desc) 2774 i = 0; 2775 2776 tx_buffer = &adapter->tx_buffer_area[i]; 2777 tx_desc = &adapter->tx_desc_base[i]; 2778 } 2779 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2780 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2781 2782 adapter->oldest_used_tx_desc = i; 2783 2784 /* 2785 * If we have enough room, clear IFF_DRV_OACTIVE to tell the stack 2786 * that it is OK to send packets. 2787 * If there are no pending descriptors, clear the timeout. Otherwise, 2788 * if some descriptors have been freed, restart the timeout. 2789 */ 2790 if (num_avail > EM_TX_CLEANUP_THRESHOLD) { 2791 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2792 if (num_avail == adapter->num_tx_desc) 2793 ifp->if_timer = 0; 2794 else if (num_avail != adapter->num_tx_desc_avail) 2795 ifp->if_timer = EM_TX_TIMEOUT; 2796 } 2797 adapter->num_tx_desc_avail = num_avail; 2798} 2799 2800/********************************************************************* 2801 * 2802 * Get a buffer from system mbuf buffer pool. 2803 * 2804 **********************************************************************/ 2805static int 2806em_get_buf(int i, struct adapter *adapter, struct mbuf *mp) 2807{ 2808 struct ifnet *ifp = adapter->ifp; 2809 bus_dma_segment_t segs[1]; 2810 struct em_buffer *rx_buffer; 2811 int error, nsegs; 2812 2813 if (mp == NULL) { 2814 mp = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 2815 if (mp == NULL) { 2816 adapter->mbuf_cluster_failed++; 2817 return (ENOBUFS); 2818 } 2819 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 2820 } else { 2821 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 2822 mp->m_data = mp->m_ext.ext_buf; 2823 mp->m_next = NULL; 2824 } 2825 2826 if (ifp->if_mtu <= ETHERMTU) 2827 m_adj(mp, ETHER_ALIGN); 2828 2829 rx_buffer = &adapter->rx_buffer_area[i]; 2830 2831 /* 2832 * Using memory from the mbuf cluster pool, invoke the 2833 * bus_dma machinery to arrange the memory mapping. 2834 */ 2835 error = bus_dmamap_load_mbuf_sg(adapter->rxtag, rx_buffer->map, 2836 mp, segs, &nsegs, 0); 2837 if (error != 0) { 2838 m_free(mp); 2839 return (error); 2840 } 2841 /* If nsegs is wrong then the stack is corrupt. */ 2842 KASSERT(nsegs == 1, ("Too many segments returned!")); 2843 rx_buffer->m_head = mp; 2844 adapter->rx_desc_base[i].buffer_addr = htole64(segs[0].ds_addr); 2845 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD); 2846 2847 return (0); 2848} 2849 2850/********************************************************************* 2851 * 2852 * Allocate memory for rx_buffer structures. Since we use one 2853 * rx_buffer per received packet, the maximum number of rx_buffer's 2854 * that we'll need is equal to the number of receive descriptors 2855 * that we've allocated. 2856 * 2857 **********************************************************************/ 2858static int 2859em_allocate_receive_structures(struct adapter *adapter) 2860{ 2861 device_t dev = adapter->dev; 2862 struct em_buffer *rx_buffer; 2863 int i, error; 2864 2865 adapter->rx_buffer_area = malloc(sizeof(struct em_buffer) * adapter->num_rx_desc, 2866 M_DEVBUF, M_NOWAIT); 2867 if (adapter->rx_buffer_area == NULL) { 2868 device_printf(dev, "Unable to allocate rx_buffer memory\n"); 2869 return (ENOMEM); 2870 } 2871 2872 bzero(adapter->rx_buffer_area, sizeof(struct em_buffer) * adapter->num_rx_desc); 2873 2874 error = bus_dma_tag_create(NULL, /* parent */ 2875 1, 0, /* alignment, bounds */ 2876 BUS_SPACE_MAXADDR, /* lowaddr */ 2877 BUS_SPACE_MAXADDR, /* highaddr */ 2878 NULL, NULL, /* filter, filterarg */ 2879 MCLBYTES, /* maxsize */ 2880 1, /* nsegments */ 2881 MCLBYTES, /* maxsegsize */ 2882 0, /* flags */ 2883 NULL, /* lockfunc */ 2884 NULL, /* lockarg */ 2885 &adapter->rxtag); 2886 if (error) { 2887 device_printf(dev, "%s: bus_dma_tag_create failed %d\n", 2888 __func__, error); 2889 goto fail; 2890 } 2891 2892 rx_buffer = adapter->rx_buffer_area; 2893 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 2894 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT, 2895 &rx_buffer->map); 2896 if (error) { 2897 device_printf(dev, "%s: bus_dmamap_create failed: %d\n", 2898 __func__, error); 2899 goto fail; 2900 } 2901 } 2902 2903 for (i = 0; i < adapter->num_rx_desc; i++) { 2904 error = em_get_buf(i, adapter, NULL); 2905 if (error) 2906 goto fail; 2907 } 2908 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 2909 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2910 2911 return (0); 2912 2913fail: 2914 em_free_receive_structures(adapter); 2915 return (error); 2916} 2917 2918/********************************************************************* 2919 * 2920 * Allocate and initialize receive structures. 2921 * 2922 **********************************************************************/ 2923static int 2924em_setup_receive_structures(struct adapter *adapter) 2925{ 2926 int error; 2927 2928 bzero(adapter->rx_desc_base, (sizeof(struct em_rx_desc)) * adapter->num_rx_desc); 2929 2930 if ((error = em_allocate_receive_structures(adapter)) != 0) 2931 return (error); 2932 2933 /* Setup our descriptor pointers */ 2934 adapter->next_rx_desc_to_check = 0; 2935 2936 return (0); 2937} 2938 2939/********************************************************************* 2940 * 2941 * Enable receive unit. 2942 * 2943 **********************************************************************/ 2944static void 2945em_initialize_receive_unit(struct adapter *adapter) 2946{ 2947 struct ifnet *ifp = adapter->ifp; 2948 uint64_t bus_addr; 2949 uint32_t reg_rctl; 2950 uint32_t reg_rxcsum; 2951 2952 INIT_DEBUGOUT("em_initialize_receive_unit: begin"); 2953 2954 /* 2955 * Make sure receives are disabled while setting 2956 * up the descriptor ring 2957 */ 2958 E1000_WRITE_REG(&adapter->hw, RCTL, 0); 2959 2960 /* Set the Receive Delay Timer Register */ 2961 E1000_WRITE_REG(&adapter->hw, RDTR, adapter->rx_int_delay.value | E1000_RDT_FPDB); 2962 2963 if(adapter->hw.mac_type >= em_82540) { 2964 E1000_WRITE_REG(&adapter->hw, RADV, adapter->rx_abs_int_delay.value); 2965 2966 /* 2967 * Set the interrupt throttling rate. Value is calculated 2968 * as DEFAULT_ITR = 1/(MAX_INTS_PER_SEC * 256ns) 2969 */ 2970#define MAX_INTS_PER_SEC 8000 2971#define DEFAULT_ITR 1000000000/(MAX_INTS_PER_SEC * 256) 2972 E1000_WRITE_REG(&adapter->hw, ITR, DEFAULT_ITR); 2973 } 2974 2975 /* Setup the Base and Length of the Rx Descriptor Ring */ 2976 bus_addr = adapter->rxdma.dma_paddr; 2977 E1000_WRITE_REG(&adapter->hw, RDLEN, adapter->num_rx_desc * 2978 sizeof(struct em_rx_desc)); 2979 E1000_WRITE_REG(&adapter->hw, RDBAH, (uint32_t)(bus_addr >> 32)); 2980 E1000_WRITE_REG(&adapter->hw, RDBAL, (uint32_t)bus_addr); 2981 2982 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 2983 E1000_WRITE_REG(&adapter->hw, RDT, adapter->num_rx_desc - 1); 2984 E1000_WRITE_REG(&adapter->hw, RDH, 0); 2985 2986 /* Setup the Receive Control Register */ 2987 reg_rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO | 2988 E1000_RCTL_RDMTS_HALF | 2989 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); 2990 2991 if (adapter->hw.tbi_compatibility_on == TRUE) 2992 reg_rctl |= E1000_RCTL_SBP; 2993 2994 2995 switch (adapter->rx_buffer_len) { 2996 default: 2997 case EM_RXBUFFER_2048: 2998 reg_rctl |= E1000_RCTL_SZ_2048; 2999 break; 3000 case EM_RXBUFFER_4096: 3001 reg_rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 3002 break; 3003 case EM_RXBUFFER_8192: 3004 reg_rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 3005 break; 3006 case EM_RXBUFFER_16384: 3007 reg_rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 3008 break; 3009 } 3010 3011 if (ifp->if_mtu > ETHERMTU) 3012 reg_rctl |= E1000_RCTL_LPE; 3013 3014 /* Enable 82543 Receive Checksum Offload for TCP and UDP */ 3015 if ((adapter->hw.mac_type >= em_82543) && 3016 (ifp->if_capenable & IFCAP_RXCSUM)) { 3017 reg_rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM); 3018 reg_rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL); 3019 E1000_WRITE_REG(&adapter->hw, RXCSUM, reg_rxcsum); 3020 } 3021 3022 /* Enable Receives */ 3023 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 3024} 3025 3026/********************************************************************* 3027 * 3028 * Free receive related data structures. 3029 * 3030 **********************************************************************/ 3031static void 3032em_free_receive_structures(struct adapter *adapter) 3033{ 3034 struct em_buffer *rx_buffer; 3035 int i; 3036 3037 INIT_DEBUGOUT("free_receive_structures: begin"); 3038 3039 if (adapter->rx_buffer_area != NULL) { 3040 rx_buffer = adapter->rx_buffer_area; 3041 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 3042 if (rx_buffer->m_head != NULL) { 3043 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, 3044 BUS_DMASYNC_POSTREAD); 3045 bus_dmamap_unload(adapter->rxtag, 3046 rx_buffer->map); 3047 m_freem(rx_buffer->m_head); 3048 rx_buffer->m_head = NULL; 3049 } else if (rx_buffer->map != NULL) 3050 bus_dmamap_unload(adapter->rxtag, 3051 rx_buffer->map); 3052 if (rx_buffer->map != NULL) { 3053 bus_dmamap_destroy(adapter->rxtag, 3054 rx_buffer->map); 3055 rx_buffer->map = NULL; 3056 } 3057 } 3058 } 3059 if (adapter->rx_buffer_area != NULL) { 3060 free(adapter->rx_buffer_area, M_DEVBUF); 3061 adapter->rx_buffer_area = NULL; 3062 } 3063 if (adapter->rxtag != NULL) { 3064 bus_dma_tag_destroy(adapter->rxtag); 3065 adapter->rxtag = NULL; 3066 } 3067} 3068 3069/********************************************************************* 3070 * 3071 * This routine executes in interrupt context. It replenishes 3072 * the mbufs in the descriptor and sends data which has been 3073 * dma'ed into host memory to upper layer. 3074 * 3075 * We loop at most count times if count is > 0, or until done if 3076 * count < 0. 3077 * 3078 *********************************************************************/ 3079static int 3080em_rxeof(struct adapter *adapter, int count) 3081{ 3082 struct ifnet *ifp; 3083 struct mbuf *mp; 3084 uint8_t accept_frame = 0; 3085 uint8_t eop = 0; 3086 uint16_t len, desc_len, prev_len_adj; 3087 int i; 3088 3089 /* Pointer to the receive descriptor being examined. */ 3090 struct em_rx_desc *current_desc; 3091 3092 ifp = adapter->ifp; 3093 i = adapter->next_rx_desc_to_check; 3094 current_desc = &adapter->rx_desc_base[i]; 3095 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 3096 BUS_DMASYNC_POSTREAD); 3097 3098 if (!((current_desc->status) & E1000_RXD_STAT_DD)) 3099 return (0); 3100 3101 while ((current_desc->status & E1000_RXD_STAT_DD) && 3102 (count != 0) && 3103 (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 3104 struct mbuf *m = NULL; 3105 3106 mp = adapter->rx_buffer_area[i].m_head; 3107 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map, 3108 BUS_DMASYNC_POSTREAD); 3109 bus_dmamap_unload(adapter->rxtag, 3110 adapter->rx_buffer_area[i].map); 3111 3112 accept_frame = 1; 3113 prev_len_adj = 0; 3114 desc_len = le16toh(current_desc->length); 3115 if (current_desc->status & E1000_RXD_STAT_EOP) { 3116 count--; 3117 eop = 1; 3118 if (desc_len < ETHER_CRC_LEN) { 3119 len = 0; 3120 prev_len_adj = ETHER_CRC_LEN - desc_len; 3121 } else 3122 len = desc_len - ETHER_CRC_LEN; 3123 } else { 3124 eop = 0; 3125 len = desc_len; 3126 } 3127 3128 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 3129 uint8_t last_byte; 3130 uint32_t pkt_len = desc_len; 3131 3132 if (adapter->fmp != NULL) 3133 pkt_len += adapter->fmp->m_pkthdr.len; 3134 3135 last_byte = *(mtod(mp, caddr_t) + desc_len - 1); 3136 if (TBI_ACCEPT(&adapter->hw, current_desc->status, 3137 current_desc->errors, 3138 pkt_len, last_byte)) { 3139 em_tbi_adjust_stats(&adapter->hw, 3140 &adapter->stats, pkt_len, 3141 adapter->hw.mac_addr); 3142 if (len > 0) 3143 len--; 3144 } else 3145 accept_frame = 0; 3146 } 3147 3148 if (accept_frame) { 3149 if (em_get_buf(i, adapter, NULL) == ENOBUFS) { 3150 adapter->dropped_pkts++; 3151 em_get_buf(i, adapter, mp); 3152 if (adapter->fmp != NULL) 3153 m_freem(adapter->fmp); 3154 adapter->fmp = NULL; 3155 adapter->lmp = NULL; 3156 break; 3157 } 3158 3159 /* Assign correct length to the current fragment */ 3160 mp->m_len = len; 3161 3162 if (adapter->fmp == NULL) { 3163 mp->m_pkthdr.len = len; 3164 adapter->fmp = mp; /* Store the first mbuf */ 3165 adapter->lmp = mp; 3166 } else { 3167 /* Chain mbuf's together */ 3168 mp->m_flags &= ~M_PKTHDR; 3169 /* 3170 * Adjust length of previous mbuf in chain if 3171 * we received less than 4 bytes in the last 3172 * descriptor. 3173 */ 3174 if (prev_len_adj > 0) { 3175 adapter->lmp->m_len -= prev_len_adj; 3176 adapter->fmp->m_pkthdr.len -= 3177 prev_len_adj; 3178 } 3179 adapter->lmp->m_next = mp; 3180 adapter->lmp = adapter->lmp->m_next; 3181 adapter->fmp->m_pkthdr.len += len; 3182 } 3183 3184 if (eop) { 3185 adapter->fmp->m_pkthdr.rcvif = ifp; 3186 ifp->if_ipackets++; 3187 em_receive_checksum(adapter, current_desc, 3188 adapter->fmp); 3189#ifndef __NO_STRICT_ALIGNMENT 3190 if (ifp->if_mtu > ETHERMTU && 3191 em_fixup_rx(adapter) != 0) 3192 goto skip; 3193#endif 3194 if (current_desc->status & E1000_RXD_STAT_VP) 3195 VLAN_INPUT_TAG(ifp, adapter->fmp, 3196 (le16toh(current_desc->special) & 3197 E1000_RXD_SPC_VLAN_MASK)); 3198#ifndef __NO_STRICT_ALIGNMENT 3199skip: 3200#endif 3201 m = adapter->fmp; 3202 adapter->fmp = NULL; 3203 adapter->lmp = NULL; 3204 } 3205 } else { 3206 adapter->dropped_pkts++; 3207 em_get_buf(i, adapter, mp); 3208 if (adapter->fmp != NULL) 3209 m_freem(adapter->fmp); 3210 adapter->fmp = NULL; 3211 adapter->lmp = NULL; 3212 } 3213 3214 /* Zero out the receive descriptors status. */ 3215 current_desc->status = 0; 3216 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 3217 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 3218 3219 /* Advance our pointers to the next descriptor. */ 3220 if (++i == adapter->num_rx_desc) 3221 i = 0; 3222 if (m != NULL) { 3223 adapter->next_rx_desc_to_check = i; 3224#ifdef DEVICE_POLLING 3225 EM_UNLOCK(adapter); 3226 (*ifp->if_input)(ifp, m); 3227 EM_LOCK(adapter); 3228#else 3229 (*ifp->if_input)(ifp, m); 3230#endif 3231 i = adapter->next_rx_desc_to_check; 3232 } 3233 current_desc = &adapter->rx_desc_base[i]; 3234 } 3235 adapter->next_rx_desc_to_check = i; 3236 3237 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */ 3238 if (--i < 0) 3239 i = adapter->num_rx_desc - 1; 3240 E1000_WRITE_REG(&adapter->hw, RDT, i); 3241 if (!((current_desc->status) & E1000_RXD_STAT_DD)) 3242 return (0); 3243 3244 return (1); 3245} 3246 3247#ifndef __NO_STRICT_ALIGNMENT 3248/* 3249 * When jumbo frames are enabled we should realign entire payload on 3250 * architecures with strict alignment. This is serious design mistake of 8254x 3251 * as it nullifies DMA operations. 8254x just allows RX buffer size to be 3252 * 2048/4096/8192/16384. What we really want is 2048 - ETHER_ALIGN to align its 3253 * payload. On architecures without strict alignment restrictions 8254x still 3254 * performs unaligned memory access which would reduce the performance too. 3255 * To avoid copying over an entire frame to align, we allocate a new mbuf and 3256 * copy ethernet header to the new mbuf. The new mbuf is prepended into the 3257 * existing mbuf chain. 3258 * 3259 * Be aware, best performance of the 8254x is achived only when jumbo frame is 3260 * not used at all on architectures with strict alignment. 3261 */ 3262static int 3263em_fixup_rx(struct adapter *adapter) 3264{ 3265 struct mbuf *m, *n; 3266 int error; 3267 3268 error = 0; 3269 m = adapter->fmp; 3270 if (m->m_len <= (MCLBYTES - ETHER_HDR_LEN)) { 3271 bcopy(m->m_data, m->m_data + ETHER_HDR_LEN, m->m_len); 3272 m->m_data += ETHER_HDR_LEN; 3273 } else { 3274 MGETHDR(n, M_DONTWAIT, MT_DATA); 3275 if (n != NULL) { 3276 bcopy(m->m_data, n->m_data, ETHER_HDR_LEN); 3277 m->m_data += ETHER_HDR_LEN; 3278 m->m_len -= ETHER_HDR_LEN; 3279 n->m_len = ETHER_HDR_LEN; 3280 M_MOVE_PKTHDR(n, m); 3281 n->m_next = m; 3282 adapter->fmp = n; 3283 } else { 3284 adapter->dropped_pkts++; 3285 m_freem(adapter->fmp); 3286 adapter->fmp = NULL; 3287 error = ENOMEM; 3288 } 3289 } 3290 3291 return (error); 3292} 3293#endif 3294 3295/********************************************************************* 3296 * 3297 * Verify that the hardware indicated that the checksum is valid. 3298 * Inform the stack about the status of checksum so that stack 3299 * doesn't spend time verifying the checksum. 3300 * 3301 *********************************************************************/ 3302static void 3303em_receive_checksum(struct adapter *adapter, struct em_rx_desc *rx_desc, 3304 struct mbuf *mp) 3305{ 3306 /* 82543 or newer only */ 3307 if ((adapter->hw.mac_type < em_82543) || 3308 /* Ignore Checksum bit is set */ 3309 (rx_desc->status & E1000_RXD_STAT_IXSM)) { 3310 mp->m_pkthdr.csum_flags = 0; 3311 return; 3312 } 3313 3314 if (rx_desc->status & E1000_RXD_STAT_IPCS) { 3315 /* Did it pass? */ 3316 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) { 3317 /* IP Checksum Good */ 3318 mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED; 3319 mp->m_pkthdr.csum_flags |= CSUM_IP_VALID; 3320 3321 } else { 3322 mp->m_pkthdr.csum_flags = 0; 3323 } 3324 } 3325 3326 if (rx_desc->status & E1000_RXD_STAT_TCPCS) { 3327 /* Did it pass? */ 3328 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) { 3329 mp->m_pkthdr.csum_flags |= 3330 (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); 3331 mp->m_pkthdr.csum_data = htons(0xffff); 3332 } 3333 } 3334} 3335 3336 3337static void 3338em_enable_vlans(struct adapter *adapter) 3339{ 3340 uint32_t ctrl; 3341 3342 E1000_WRITE_REG(&adapter->hw, VET, ETHERTYPE_VLAN); 3343 3344 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 3345 ctrl |= E1000_CTRL_VME; 3346 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 3347} 3348 3349static void 3350em_disable_vlans(struct adapter *adapter) 3351{ 3352 uint32_t ctrl; 3353 3354 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 3355 ctrl &= ~E1000_CTRL_VME; 3356 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 3357} 3358 3359static void 3360em_enable_intr(struct adapter *adapter) 3361{ 3362 E1000_WRITE_REG(&adapter->hw, IMS, (IMS_ENABLE_MASK)); 3363} 3364 3365static void 3366em_disable_intr(struct adapter *adapter) 3367{ 3368 /* 3369 * The first version of 82542 had an errata where when link was forced 3370 * it would stay up even up even if the cable was disconnected. 3371 * Sequence errors were used to detect the disconnect and then the 3372 * driver would unforce the link. This code in the in the ISR. For this 3373 * to work correctly the Sequence error interrupt had to be enabled 3374 * all the time. 3375 */ 3376 3377 if (adapter->hw.mac_type == em_82542_rev2_0) 3378 E1000_WRITE_REG(&adapter->hw, IMC, 3379 (0xffffffff & ~E1000_IMC_RXSEQ)); 3380 else 3381 E1000_WRITE_REG(&adapter->hw, IMC, 3382 0xffffffff); 3383} 3384 3385static int 3386em_is_valid_ether_addr(uint8_t *addr) 3387{ 3388 char zero_addr[6] = { 0, 0, 0, 0, 0, 0 }; 3389 3390 if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) { 3391 return (FALSE); 3392 } 3393 3394 return (TRUE); 3395} 3396 3397void 3398em_write_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value) 3399{ 3400 pci_write_config(((struct em_osdep *)hw->back)->dev, reg, *value, 2); 3401} 3402 3403void 3404em_read_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value) 3405{ 3406 *value = pci_read_config(((struct em_osdep *)hw->back)->dev, reg, 2); 3407} 3408 3409void 3410em_pci_set_mwi(struct em_hw *hw) 3411{ 3412 pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND, 3413 (hw->pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2); 3414} 3415 3416void 3417em_pci_clear_mwi(struct em_hw *hw) 3418{ 3419 pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND, 3420 (hw->pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2); 3421} 3422 3423/********************************************************************* 3424* 82544 Coexistence issue workaround. 3425* There are 2 issues. 3426* 1. Transmit Hang issue. 3427* To detect this issue, following equation can be used... 3428* SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 3429* If SUM[3:0] is in between 1 to 4, we will have this issue. 3430* 3431* 2. DAC issue. 3432* To detect this issue, following equation can be used... 3433* SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 3434* If SUM[3:0] is in between 9 to c, we will have this issue. 3435* 3436* 3437* WORKAROUND: 3438* Make sure we do not have ending address as 1,2,3,4(Hang) or 9,a,b,c (DAC) 3439* 3440*** *********************************************************************/ 3441static uint32_t 3442em_fill_descriptors (bus_addr_t address, uint32_t length, 3443 PDESC_ARRAY desc_array) 3444{ 3445 /* Since issue is sensitive to length and address.*/ 3446 /* Let us first check the address...*/ 3447 uint32_t safe_terminator; 3448 if (length <= 4) { 3449 desc_array->descriptor[0].address = address; 3450 desc_array->descriptor[0].length = length; 3451 desc_array->elements = 1; 3452 return (desc_array->elements); 3453 } 3454 safe_terminator = (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF); 3455 /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */ 3456 if (safe_terminator == 0 || 3457 (safe_terminator > 4 && 3458 safe_terminator < 9) || 3459 (safe_terminator > 0xC && 3460 safe_terminator <= 0xF)) { 3461 desc_array->descriptor[0].address = address; 3462 desc_array->descriptor[0].length = length; 3463 desc_array->elements = 1; 3464 return (desc_array->elements); 3465 } 3466 3467 desc_array->descriptor[0].address = address; 3468 desc_array->descriptor[0].length = length - 4; 3469 desc_array->descriptor[1].address = address + (length - 4); 3470 desc_array->descriptor[1].length = 4; 3471 desc_array->elements = 2; 3472 return (desc_array->elements); 3473} 3474 3475/********************************************************************** 3476 * 3477 * Update the board statistics counters. 3478 * 3479 **********************************************************************/ 3480static void 3481em_update_stats_counters(struct adapter *adapter) 3482{ 3483 struct ifnet *ifp; 3484 3485 if(adapter->hw.media_type == em_media_type_copper || 3486 (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) { 3487 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, SYMERRS); 3488 adapter->stats.sec += E1000_READ_REG(&adapter->hw, SEC); 3489 } 3490 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, CRCERRS); 3491 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, MPC); 3492 adapter->stats.scc += E1000_READ_REG(&adapter->hw, SCC); 3493 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, ECOL); 3494 3495 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, MCC); 3496 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, LATECOL); 3497 adapter->stats.colc += E1000_READ_REG(&adapter->hw, COLC); 3498 adapter->stats.dc += E1000_READ_REG(&adapter->hw, DC); 3499 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, RLEC); 3500 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, XONRXC); 3501 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, XONTXC); 3502 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, XOFFRXC); 3503 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, XOFFTXC); 3504 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, FCRUC); 3505 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, PRC64); 3506 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, PRC127); 3507 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, PRC255); 3508 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, PRC511); 3509 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, PRC1023); 3510 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, PRC1522); 3511 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, GPRC); 3512 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, BPRC); 3513 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, MPRC); 3514 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, GPTC); 3515 3516 /* For the 64-bit byte counters the low dword must be read first. */ 3517 /* Both registers clear on the read of the high dword */ 3518 3519 adapter->stats.gorcl += E1000_READ_REG(&adapter->hw, GORCL); 3520 adapter->stats.gorch += E1000_READ_REG(&adapter->hw, GORCH); 3521 adapter->stats.gotcl += E1000_READ_REG(&adapter->hw, GOTCL); 3522 adapter->stats.gotch += E1000_READ_REG(&adapter->hw, GOTCH); 3523 3524 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, RNBC); 3525 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, RUC); 3526 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, RFC); 3527 adapter->stats.roc += E1000_READ_REG(&adapter->hw, ROC); 3528 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, RJC); 3529 3530 adapter->stats.torl += E1000_READ_REG(&adapter->hw, TORL); 3531 adapter->stats.torh += E1000_READ_REG(&adapter->hw, TORH); 3532 adapter->stats.totl += E1000_READ_REG(&adapter->hw, TOTL); 3533 adapter->stats.toth += E1000_READ_REG(&adapter->hw, TOTH); 3534 3535 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, TPR); 3536 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, TPT); 3537 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, PTC64); 3538 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, PTC127); 3539 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, PTC255); 3540 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, PTC511); 3541 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, PTC1023); 3542 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, PTC1522); 3543 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, MPTC); 3544 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, BPTC); 3545 3546 if (adapter->hw.mac_type >= em_82543) { 3547 adapter->stats.algnerrc += E1000_READ_REG(&adapter->hw, ALGNERRC); 3548 adapter->stats.rxerrc += E1000_READ_REG(&adapter->hw, RXERRC); 3549 adapter->stats.tncrs += E1000_READ_REG(&adapter->hw, TNCRS); 3550 adapter->stats.cexterr += E1000_READ_REG(&adapter->hw, CEXTERR); 3551 adapter->stats.tsctc += E1000_READ_REG(&adapter->hw, TSCTC); 3552 adapter->stats.tsctfc += E1000_READ_REG(&adapter->hw, TSCTFC); 3553 } 3554 ifp = adapter->ifp; 3555 3556 ifp->if_collisions = adapter->stats.colc; 3557 3558 /* Rx Errors */ 3559 ifp->if_ierrors = adapter->dropped_pkts + adapter->stats.rxerrc + 3560 adapter->stats.crcerrs + adapter->stats.algnerrc + adapter->stats.ruc + 3561 adapter->stats.roc + adapter->stats.mpc + adapter->stats.cexterr; 3562 3563 /* Tx Errors */ 3564 ifp->if_oerrors = adapter->stats.ecol + adapter->stats.latecol + 3565 adapter->watchdog_events; 3566} 3567 3568 3569/********************************************************************** 3570 * 3571 * This routine is called only when em_display_debug_stats is enabled. 3572 * This routine provides a way to take a look at important statistics 3573 * maintained by the driver and hardware. 3574 * 3575 **********************************************************************/ 3576static void 3577em_print_debug_info(struct adapter *adapter) 3578{ 3579 device_t dev = adapter->dev; 3580 uint8_t *hw_addr = adapter->hw.hw_addr; 3581 3582 device_printf(dev, "Adapter hardware address = %p \n", hw_addr); 3583 device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n", 3584 E1000_READ_REG(&adapter->hw, CTRL), 3585 E1000_READ_REG(&adapter->hw, RCTL)); 3586 device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n", 3587 ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff0000) >> 16),\ 3588 (E1000_READ_REG(&adapter->hw, PBA) & 0xffff) ); 3589 device_printf(dev, "Flow control watermarks high = %d low = %d\n", 3590 adapter->hw.fc_high_water, 3591 adapter->hw.fc_low_water); 3592 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n", 3593 E1000_READ_REG(&adapter->hw, TIDV), 3594 E1000_READ_REG(&adapter->hw, TADV)); 3595 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n", 3596 E1000_READ_REG(&adapter->hw, RDTR), 3597 E1000_READ_REG(&adapter->hw, RADV)); 3598 device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n", 3599 (long long)adapter->tx_fifo_wrk_cnt, 3600 (long long)adapter->tx_fifo_reset_cnt); 3601 device_printf(dev, "hw tdh = %d, hw tdt = %d\n", 3602 E1000_READ_REG(&adapter->hw, TDH), 3603 E1000_READ_REG(&adapter->hw, TDT)); 3604 device_printf(dev, "Num Tx descriptors avail = %d\n", 3605 adapter->num_tx_desc_avail); 3606 device_printf(dev, "Tx Descriptors not avail1 = %ld\n", 3607 adapter->no_tx_desc_avail1); 3608 device_printf(dev, "Tx Descriptors not avail2 = %ld\n", 3609 adapter->no_tx_desc_avail2); 3610 device_printf(dev, "Std mbuf failed = %ld\n", 3611 adapter->mbuf_alloc_failed); 3612 device_printf(dev, "Std mbuf cluster failed = %ld\n", 3613 adapter->mbuf_cluster_failed); 3614 device_printf(dev, "Driver dropped packets = %ld\n", 3615 adapter->dropped_pkts); 3616} 3617 3618static void 3619em_print_hw_stats(struct adapter *adapter) 3620{ 3621 device_t dev = adapter->dev; 3622 3623 device_printf(dev, "Excessive collisions = %lld\n", 3624 (long long)adapter->stats.ecol); 3625 device_printf(dev, "Symbol errors = %lld\n", 3626 (long long)adapter->stats.symerrs); 3627 device_printf(dev, "Sequence errors = %lld\n", 3628 (long long)adapter->stats.sec); 3629 device_printf(dev, "Defer count = %lld\n", (long long)adapter->stats.dc); 3630 3631 device_printf(dev, "Missed Packets = %lld\n", (long long)adapter->stats.mpc); 3632 device_printf(dev, "Receive No Buffers = %lld\n", 3633 (long long)adapter->stats.rnbc); 3634 /* RLEC is inaccurate on some hardware, calculate our own. */ 3635 device_printf(dev, "Receive Length Errors = %lld\n", 3636 ((long long)adapter->stats.roc + (long long)adapter->stats.ruc)); 3637 device_printf(dev, "Receive errors = %lld\n", 3638 (long long)adapter->stats.rxerrc); 3639 device_printf(dev, "Crc errors = %lld\n", (long long)adapter->stats.crcerrs); 3640 device_printf(dev, "Alignment errors = %lld\n", 3641 (long long)adapter->stats.algnerrc); 3642 device_printf(dev, "Carrier extension errors = %lld\n", 3643 (long long)adapter->stats.cexterr); 3644 device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns); 3645 device_printf(dev, "watchdog timeouts = %ld\n", adapter->watchdog_events); 3646 3647 device_printf(dev, "XON Rcvd = %lld\n", (long long)adapter->stats.xonrxc); 3648 device_printf(dev, "XON Xmtd = %lld\n", (long long)adapter->stats.xontxc); 3649 device_printf(dev, "XOFF Rcvd = %lld\n", (long long)adapter->stats.xoffrxc); 3650 device_printf(dev, "XOFF Xmtd = %lld\n", (long long)adapter->stats.xofftxc); 3651 3652 device_printf(dev, "Good Packets Rcvd = %lld\n", 3653 (long long)adapter->stats.gprc); 3654 device_printf(dev, "Good Packets Xmtd = %lld\n", 3655 (long long)adapter->stats.gptc); 3656} 3657 3658static int 3659em_sysctl_debug_info(SYSCTL_HANDLER_ARGS) 3660{ 3661 struct adapter *adapter; 3662 int error; 3663 int result; 3664 3665 result = -1; 3666 error = sysctl_handle_int(oidp, &result, 0, req); 3667 3668 if (error || !req->newptr) 3669 return (error); 3670 3671 if (result == 1) { 3672 adapter = (struct adapter *)arg1; 3673 em_print_debug_info(adapter); 3674 } 3675 3676 return (error); 3677} 3678 3679 3680static int 3681em_sysctl_stats(SYSCTL_HANDLER_ARGS) 3682{ 3683 struct adapter *adapter; 3684 int error; 3685 int result; 3686 3687 result = -1; 3688 error = sysctl_handle_int(oidp, &result, 0, req); 3689 3690 if (error || !req->newptr) 3691 return (error); 3692 3693 if (result == 1) { 3694 adapter = (struct adapter *)arg1; 3695 em_print_hw_stats(adapter); 3696 } 3697 3698 return (error); 3699} 3700 3701static int 3702em_sysctl_int_delay(SYSCTL_HANDLER_ARGS) 3703{ 3704 struct em_int_delay_info *info; 3705 struct adapter *adapter; 3706 uint32_t regval; 3707 int error; 3708 int usecs; 3709 int ticks; 3710 3711 info = (struct em_int_delay_info *)arg1; 3712 usecs = info->value; 3713 error = sysctl_handle_int(oidp, &usecs, 0, req); 3714 if (error != 0 || req->newptr == NULL) 3715 return (error); 3716 if (usecs < 0 || usecs > E1000_TICKS_TO_USECS(65535)) 3717 return (EINVAL); 3718 info->value = usecs; 3719 ticks = E1000_USECS_TO_TICKS(usecs); 3720 3721 adapter = info->adapter; 3722 3723 EM_LOCK(adapter); 3724 regval = E1000_READ_OFFSET(&adapter->hw, info->offset); 3725 regval = (regval & ~0xffff) | (ticks & 0xffff); 3726 /* Handle a few special cases. */ 3727 switch (info->offset) { 3728 case E1000_RDTR: 3729 case E1000_82542_RDTR: 3730 regval |= E1000_RDT_FPDB; 3731 break; 3732 case E1000_TIDV: 3733 case E1000_82542_TIDV: 3734 if (ticks == 0) { 3735 adapter->txd_cmd &= ~E1000_TXD_CMD_IDE; 3736 /* Don't write 0 into the TIDV register. */ 3737 regval++; 3738 } else 3739 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 3740 break; 3741 } 3742 E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval); 3743 EM_UNLOCK(adapter); 3744 return (0); 3745} 3746 3747static void 3748em_add_int_delay_sysctl(struct adapter *adapter, const char *name, 3749 const char *description, struct em_int_delay_info *info, 3750 int offset, int value) 3751{ 3752 info->adapter = adapter; 3753 info->offset = offset; 3754 info->value = value; 3755 SYSCTL_ADD_PROC(device_get_sysctl_ctx(adapter->dev), 3756 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 3757 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, 3758 info, 0, em_sysctl_int_delay, "I", description); 3759} 3760 3761#ifndef DEVICE_POLLING 3762static void 3763em_add_int_process_limit(struct adapter *adapter, const char *name, 3764 const char *description, int *limit, int value) 3765{ 3766 *limit = value; 3767 SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev), 3768 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 3769 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, limit, value, description); 3770} 3771#endif 3772