if_em.c revision 154571
1139749Simp/**************************************************************************
2117632Sharti
3117632ShartiCopyright (c) 2001-2005, Intel Corporation
4117632ShartiAll rights reserved.
5117632Sharti
6117632ShartiRedistribution and use in source and binary forms, with or without
7117632Shartimodification, are permitted provided that the following conditions are met:
8117632Sharti
9117632Sharti 1. Redistributions of source code must retain the above copyright notice,
10117632Sharti    this list of conditions and the following disclaimer.
11117632Sharti
12117632Sharti 2. Redistributions in binary form must reproduce the above copyright
13117632Sharti    notice, this list of conditions and the following disclaimer in the
14117632Sharti    documentation and/or other materials provided with the distribution.
15117632Sharti
16117632Sharti 3. Neither the name of the Intel Corporation nor the names of its
17117632Sharti    contributors may be used to endorse or promote products derived from
18117632Sharti    this software without specific prior written permission.
19117632Sharti
20117632ShartiTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21117632ShartiAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22117632ShartiIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23117632ShartiARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24117632ShartiLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25117632ShartiCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26117632ShartiSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27117632ShartiINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28117632ShartiCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29117632ShartiARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30117632ShartiPOSSIBILITY OF SUCH DAMAGE.
31117632Sharti
32117632Sharti***************************************************************************/
33117632Sharti
34117632Sharti/*$FreeBSD: head/sys/dev/em/if_em.c 154571 2006-01-20 11:38:25Z glebius $*/
35117632Sharti
36117632Sharti#ifdef HAVE_KERNEL_OPTION_HEADERS
37117632Sharti#include "opt_device_polling.h"
38117632Sharti#endif
39117632Sharti
40117632Sharti#include <dev/em/if_em.h>
41117632Sharti
42117632Sharti/*********************************************************************
43117632Sharti *  Set this to one to display debug statistics
44117632Sharti *********************************************************************/
45117632Shartiint             em_display_debug_stats = 0;
46117632Sharti
47117632Sharti/*********************************************************************
48117632Sharti *  Driver version
49117632Sharti *********************************************************************/
50117632Sharti
51117632Shartichar em_driver_version[] = "Version - 3.2.18";
52117632Sharti
53117632Sharti
54117632Sharti/*********************************************************************
55117632Sharti *  PCI Device ID Table
56117632Sharti *
57117632Sharti *  Used by probe to select devices to load on
58117632Sharti *  Last field stores an index into em_strings
59117632Sharti *  Last entry must be all 0s
60117632Sharti *
61117632Sharti *  { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
62117632Sharti *********************************************************************/
63117632Sharti
64117632Shartistatic em_vendor_info_t em_vendor_info_array[] =
65117632Sharti{
66117632Sharti        /* Intel(R) PRO/1000 Network Connection */
67117632Sharti        { 0x8086, E1000_DEV_ID_82540EM,             PCI_ANY_ID, PCI_ANY_ID, 0},
68117632Sharti        { 0x8086, E1000_DEV_ID_82540EM_LOM,         PCI_ANY_ID, PCI_ANY_ID, 0},
69117632Sharti        { 0x8086, E1000_DEV_ID_82540EP,             PCI_ANY_ID, PCI_ANY_ID, 0},
70117632Sharti        { 0x8086, E1000_DEV_ID_82540EP_LOM,         PCI_ANY_ID, PCI_ANY_ID, 0},
71117632Sharti        { 0x8086, E1000_DEV_ID_82540EP_LP,          PCI_ANY_ID, PCI_ANY_ID, 0},
72117632Sharti
73117632Sharti        { 0x8086, E1000_DEV_ID_82541EI,             PCI_ANY_ID, PCI_ANY_ID, 0},
74117632Sharti        { 0x8086, E1000_DEV_ID_82541ER,             PCI_ANY_ID, PCI_ANY_ID, 0},
75117632Sharti        { 0x8086, E1000_DEV_ID_82541ER_LOM,             PCI_ANY_ID, PCI_ANY_ID, 0},
76117632Sharti        { 0x8086, E1000_DEV_ID_82541EI_MOBILE,      PCI_ANY_ID, PCI_ANY_ID, 0},
77117632Sharti        { 0x8086, E1000_DEV_ID_82541GI,             PCI_ANY_ID, PCI_ANY_ID, 0},
78117632Sharti        { 0x8086, E1000_DEV_ID_82541GI_LF,          PCI_ANY_ID, PCI_ANY_ID, 0},
79117632Sharti        { 0x8086, E1000_DEV_ID_82541GI_MOBILE,      PCI_ANY_ID, PCI_ANY_ID, 0},
80117632Sharti
81117632Sharti        { 0x8086, E1000_DEV_ID_82542,               PCI_ANY_ID, PCI_ANY_ID, 0},
82117632Sharti
83117632Sharti        { 0x8086, E1000_DEV_ID_82543GC_FIBER,       PCI_ANY_ID, PCI_ANY_ID, 0},
84117632Sharti        { 0x8086, E1000_DEV_ID_82543GC_COPPER,      PCI_ANY_ID, PCI_ANY_ID, 0},
85117632Sharti
86117632Sharti        { 0x8086, E1000_DEV_ID_82544EI_COPPER,      PCI_ANY_ID, PCI_ANY_ID, 0},
87117632Sharti        { 0x8086, E1000_DEV_ID_82544EI_FIBER,       PCI_ANY_ID, PCI_ANY_ID, 0},
88117632Sharti        { 0x8086, E1000_DEV_ID_82544GC_COPPER,      PCI_ANY_ID, PCI_ANY_ID, 0},
89117632Sharti        { 0x8086, E1000_DEV_ID_82544GC_LOM,         PCI_ANY_ID, PCI_ANY_ID, 0},
90117632Sharti
91117632Sharti        { 0x8086, E1000_DEV_ID_82545EM_COPPER,      PCI_ANY_ID, PCI_ANY_ID, 0},
92117632Sharti        { 0x8086, E1000_DEV_ID_82545EM_FIBER,       PCI_ANY_ID, PCI_ANY_ID, 0},
93117632Sharti        { 0x8086, E1000_DEV_ID_82545GM_COPPER,      PCI_ANY_ID, PCI_ANY_ID, 0},
94117632Sharti        { 0x8086, E1000_DEV_ID_82545GM_FIBER,       PCI_ANY_ID, PCI_ANY_ID, 0},
95117632Sharti        { 0x8086, E1000_DEV_ID_82545GM_SERDES,      PCI_ANY_ID, PCI_ANY_ID, 0},
96117632Sharti
97117632Sharti        { 0x8086, E1000_DEV_ID_82546EB_COPPER,      PCI_ANY_ID, PCI_ANY_ID, 0},
98117632Sharti        { 0x8086, E1000_DEV_ID_82546EB_FIBER,       PCI_ANY_ID, PCI_ANY_ID, 0},
99117632Sharti        { 0x8086, E1000_DEV_ID_82546EB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0},
100117632Sharti        { 0x8086, E1000_DEV_ID_82546GB_COPPER,      PCI_ANY_ID, PCI_ANY_ID, 0},
101117632Sharti        { 0x8086, E1000_DEV_ID_82546GB_FIBER,       PCI_ANY_ID, PCI_ANY_ID, 0},
102117632Sharti        { 0x8086, E1000_DEV_ID_82546GB_SERDES,      PCI_ANY_ID, PCI_ANY_ID, 0},
103117632Sharti        { 0x8086, E1000_DEV_ID_82546GB_PCIE,        PCI_ANY_ID, PCI_ANY_ID, 0},
104117632Sharti        { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0},
105117632Sharti
106117632Sharti        { 0x8086, E1000_DEV_ID_82547EI,             PCI_ANY_ID, PCI_ANY_ID, 0},
107117632Sharti        { 0x8086, E1000_DEV_ID_82547EI_MOBILE,      PCI_ANY_ID, PCI_ANY_ID, 0},
108117632Sharti        { 0x8086, E1000_DEV_ID_82547GI,             PCI_ANY_ID, PCI_ANY_ID, 0},
109117632Sharti
110117632Sharti	{ 0x8086, E1000_DEV_ID_82571EB_COPPER,      PCI_ANY_ID, PCI_ANY_ID, 0},
111117632Sharti	{ 0x8086, E1000_DEV_ID_82571EB_FIBER,       PCI_ANY_ID, PCI_ANY_ID, 0},
112117632Sharti	{ 0x8086, E1000_DEV_ID_82571EB_SERDES,      PCI_ANY_ID, PCI_ANY_ID, 0},
113117632Sharti
114117632Sharti	{ 0x8086, E1000_DEV_ID_82572EI_COPPER,      PCI_ANY_ID, PCI_ANY_ID, 0},
115117632Sharti	{ 0x8086, E1000_DEV_ID_82572EI_FIBER,       PCI_ANY_ID, PCI_ANY_ID, 0},
116117632Sharti	{ 0x8086, E1000_DEV_ID_82572EI_SERDES,      PCI_ANY_ID, PCI_ANY_ID, 0},
117117632Sharti
118117632Sharti        { 0x8086, E1000_DEV_ID_82573E,              PCI_ANY_ID, PCI_ANY_ID, 0},
119117632Sharti        { 0x8086, E1000_DEV_ID_82573E_IAMT,         PCI_ANY_ID, PCI_ANY_ID, 0},
120117632Sharti        { 0x8086, E1000_DEV_ID_82573L,              PCI_ANY_ID, PCI_ANY_ID, 0},
121117632Sharti
122117632Sharti        /* required last entry */
123117632Sharti        { 0, 0, 0, 0, 0}
124117632Sharti};
125117632Sharti
126117632Sharti/*********************************************************************
127117632Sharti *  Table of branding strings for all supported NICs.
128117632Sharti *********************************************************************/
129117632Sharti
130117632Shartistatic char *em_strings[] = {
131117632Sharti	"Intel(R) PRO/1000 Network Connection"
132117632Sharti};
133117632Sharti
134117632Sharti/*********************************************************************
135117632Sharti *  Function prototypes
136117632Sharti *********************************************************************/
137117632Shartistatic int  em_probe(device_t);
138117632Shartistatic int  em_attach(device_t);
139117632Shartistatic int  em_detach(device_t);
140117632Shartistatic int  em_shutdown(device_t);
141117632Shartistatic int  em_suspend(device_t);
142117632Shartistatic int  em_resume(device_t);
143117632Shartistatic void em_intr(void *);
144117632Sharti#ifndef NO_EM_FASTINTR
145117632Shartistatic void em_intr_fast(void *);
146117632Sharti#endif
147117632Shartistatic void em_start(struct ifnet *);
148117632Shartistatic void em_start_locked(struct ifnet *ifp);
149117632Shartistatic int  em_ioctl(struct ifnet *, u_long, caddr_t);
150117632Shartistatic void em_watchdog(struct ifnet *);
151117632Shartistatic void em_init(void *);
152147256Sbrooksstatic void em_init_locked(struct adapter *);
153117632Shartistatic void em_stop(void *);
154117632Shartistatic void em_media_status(struct ifnet *, struct ifmediareq *);
155117632Shartistatic int  em_media_change(struct ifnet *);
156117632Shartistatic void em_identify_hardware(struct adapter *);
157117632Shartistatic int  em_allocate_pci_resources(struct adapter *);
158117632Shartistatic int  em_allocate_intr(struct adapter *);
159117632Shartistatic void em_free_intr(struct adapter *);
160117632Shartistatic void em_free_pci_resources(struct adapter *);
161117632Shartistatic void em_local_timer(void *);
162117632Shartistatic int  em_hardware_init(struct adapter *);
163117632Shartistatic void em_setup_interface(device_t, struct adapter *);
164117632Shartistatic int  em_setup_transmit_structures(struct adapter *);
165117632Shartistatic void em_initialize_transmit_unit(struct adapter *);
166117632Shartistatic int  em_setup_receive_structures(struct adapter *);
167117632Shartistatic void em_initialize_receive_unit(struct adapter *);
168117632Shartistatic void em_enable_intr(struct adapter *);
169117632Shartistatic void em_disable_intr(struct adapter *);
170117632Shartistatic void em_free_transmit_structures(struct adapter *);
171117632Shartistatic void em_free_receive_structures(struct adapter *);
172117632Shartistatic void em_update_stats_counters(struct adapter *);
173117632Shartistatic void em_clean_transmit_interrupts(struct adapter *);
174117632Shartistatic int  em_allocate_receive_structures(struct adapter *);
175117632Shartistatic int  em_allocate_transmit_structures(struct adapter *);
176117632Shartistatic int em_process_receive_interrupts(struct adapter *, int);
177117632Sharti#ifndef __NO_STRICT_ALIGNMENT
178117632Shartistatic int  em_fixup_rx(struct adapter *);
179117632Sharti#endif
180117632Shartistatic void em_receive_checksum(struct adapter *,
181117632Sharti				struct em_rx_desc *,
182117632Sharti				struct mbuf *);
183117632Shartistatic void em_transmit_checksum_setup(struct adapter *,
184117632Sharti				       struct mbuf *,
185117632Sharti				       u_int32_t *,
186117632Sharti				       u_int32_t *);
187117632Shartistatic void em_set_promisc(struct adapter *);
188117632Shartistatic void em_disable_promisc(struct adapter *);
189117632Shartistatic void em_set_multi(struct adapter *);
190117632Shartistatic void em_print_hw_stats(struct adapter *);
191117632Shartistatic void em_print_link_status(struct adapter *);
192117632Shartistatic int  em_get_buf(int i, struct adapter *,
193117632Sharti		       struct mbuf *);
194117632Shartistatic void em_enable_vlans(struct adapter *);
195117632Shartistatic void em_disable_vlans(struct adapter *);
196117632Shartistatic int  em_encap(struct adapter *, struct mbuf **);
197117632Shartistatic void em_smartspeed(struct adapter *);
198117632Shartistatic int  em_82547_fifo_workaround(struct adapter *, int);
199118601Shartistatic void em_82547_update_fifo_head(struct adapter *, int);
200117632Shartistatic int  em_82547_tx_fifo_reset(struct adapter *);
201117632Shartistatic void em_82547_move_tail(void *arg);
202117632Shartistatic void em_82547_move_tail_locked(struct adapter *);
203117632Shartistatic int  em_dma_malloc(struct adapter *, bus_size_t,
204117632Sharti			  struct em_dma_alloc *, int);
205117632Shartistatic void em_dma_free(struct adapter *, struct em_dma_alloc *);
206117632Shartistatic void em_print_debug_info(struct adapter *);
207117632Shartistatic int  em_is_valid_ether_addr(u_int8_t *);
208117632Shartistatic int  em_sysctl_stats(SYSCTL_HANDLER_ARGS);
209117632Shartistatic int  em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
210117632Shartistatic u_int32_t em_fill_descriptors (bus_addr_t address,
211117632Sharti				      u_int32_t length,
212117632Sharti				      PDESC_ARRAY desc_array);
213117632Shartistatic int  em_sysctl_int_delay(SYSCTL_HANDLER_ARGS);
214117632Shartistatic void em_add_int_delay_sysctl(struct adapter *, const char *,
215117632Sharti				    const char *, struct em_int_delay_info *,
216117632Sharti				    int, int);
217117632Sharti#ifndef NO_EM_FASTINTR
218117632Shartistatic void em_add_int_process_limit(struct adapter *, const char *,
219117632Sharti				     const char *, int *, int);
220117632Shartistatic void em_handle_rxtx(void *context, int pending);
221147256Sbrooksstatic void em_handle_link(void *context, int pending);
222117632Sharti#endif
223117632Sharti#ifdef DEVICE_POLLING
224117632Shartistatic poll_handler_t em_poll;
225117632Sharti#endif
226117632Sharti
227117632Sharti/*********************************************************************
228117632Sharti *  FreeBSD Device Interface Entry Points
229117632Sharti *********************************************************************/
230117632Sharti
231117632Shartistatic device_method_t em_methods[] = {
232117632Sharti	/* Device interface */
233117632Sharti	DEVMETHOD(device_probe, em_probe),
234117632Sharti	DEVMETHOD(device_attach, em_attach),
235117632Sharti	DEVMETHOD(device_detach, em_detach),
236117632Sharti	DEVMETHOD(device_shutdown, em_shutdown),
237117632Sharti	DEVMETHOD(device_suspend, em_suspend),
238117632Sharti	DEVMETHOD(device_resume, em_resume),
239117632Sharti	{0, 0}
240117632Sharti};
241117632Sharti
242117632Shartistatic driver_t em_driver = {
243117632Sharti	"em", em_methods, sizeof(struct adapter ),
244117632Sharti};
245117632Sharti
246117632Shartistatic devclass_t em_devclass;
247117632ShartiDRIVER_MODULE(em, pci, em_driver, em_devclass, 0, 0);
248117632ShartiMODULE_DEPEND(em, pci, 1, 1, 1);
249117632ShartiMODULE_DEPEND(em, ether, 1, 1, 1);
250117632Sharti
251117632Sharti/*********************************************************************
252117632Sharti *  Tunable default values.
253117632Sharti *********************************************************************/
254117632Sharti
255117632Sharti#define E1000_TICKS_TO_USECS(ticks)	((1024 * (ticks) + 500) / 1000)
256117632Sharti#define E1000_USECS_TO_TICKS(usecs)	((1000 * (usecs) + 512) / 1024)
257117632Sharti
258117632Shartistatic int em_tx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TIDV);
259117632Shartistatic int em_rx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RDTR);
260117632Shartistatic int em_tx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TADV);
261117632Shartistatic int em_rx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RADV);
262117632Shartistatic int em_rxd = EM_DEFAULT_RXD;
263117632Shartistatic int em_txd = EM_DEFAULT_TXD;
264117632Sharti
265117632ShartiTUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt);
266117632ShartiTUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt);
267117632ShartiTUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt);
268117632ShartiTUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt);
269117632ShartiTUNABLE_INT("hw.em.rxd", &em_rxd);
270117632ShartiTUNABLE_INT("hw.em.txd", &em_txd);
271117632Sharti#ifndef NO_EM_FASTINTR
272117632Shartistatic int em_rx_process_limit = 100;
273117632ShartiTUNABLE_INT("hw.em.rx_process_limit", &em_rx_process_limit);
274117632Sharti#endif
275117632Sharti
276117632Sharti/*********************************************************************
277117632Sharti *  Device identification routine
278117632Sharti *
279117632Sharti *  em_probe determines if the driver should be loaded on
280117632Sharti *  adapter based on PCI vendor/device id of the adapter.
281117632Sharti *
282117632Sharti *  return BUS_PROBE_DEFAULT on success, positive on failure
283117632Sharti *********************************************************************/
284117632Sharti
285117632Shartistatic int
286117632Shartiem_probe(device_t dev)
287117632Sharti{
288117632Sharti	em_vendor_info_t *ent;
289117632Sharti
290117632Sharti	u_int16_t       pci_vendor_id = 0;
291117632Sharti	u_int16_t       pci_device_id = 0;
292117632Sharti	u_int16_t       pci_subvendor_id = 0;
293117632Sharti	u_int16_t       pci_subdevice_id = 0;
294117632Sharti	char            adapter_name[60];
295117632Sharti
296117632Sharti	INIT_DEBUGOUT("em_probe: begin");
297117632Sharti
298117632Sharti	pci_vendor_id = pci_get_vendor(dev);
299117632Sharti	if (pci_vendor_id != EM_VENDOR_ID)
300117632Sharti		return(ENXIO);
301117632Sharti
302117632Sharti	pci_device_id = pci_get_device(dev);
303117632Sharti	pci_subvendor_id = pci_get_subvendor(dev);
304117632Sharti	pci_subdevice_id = pci_get_subdevice(dev);
305117632Sharti
306117632Sharti	ent = em_vendor_info_array;
307117632Sharti	while (ent->vendor_id != 0) {
308117632Sharti		if ((pci_vendor_id == ent->vendor_id) &&
309117632Sharti		    (pci_device_id == ent->device_id) &&
310117632Sharti
311117632Sharti		    ((pci_subvendor_id == ent->subvendor_id) ||
312117632Sharti		     (ent->subvendor_id == PCI_ANY_ID)) &&
313117632Sharti
314117632Sharti		    ((pci_subdevice_id == ent->subdevice_id) ||
315117632Sharti		     (ent->subdevice_id == PCI_ANY_ID))) {
316117632Sharti			sprintf(adapter_name, "%s %s",
317117632Sharti				em_strings[ent->index],
318117632Sharti				em_driver_version);
319117632Sharti			device_set_desc_copy(dev, adapter_name);
320117632Sharti			return(BUS_PROBE_DEFAULT);
321117632Sharti		}
322117632Sharti		ent++;
323117632Sharti	}
324117632Sharti
325117632Sharti	return(ENXIO);
326117632Sharti}
327117632Sharti
328147256Sbrooks/*********************************************************************
329117632Sharti *  Device initialization routine
330117632Sharti *
331117632Sharti *  The attach entry point is called when the driver is being loaded.
332117632Sharti *  This routine identifies the type of hardware, allocates all resources
333117632Sharti *  and initializes the hardware.
334117632Sharti *
335117632Sharti *  return 0 on success, positive on failure
336117632Sharti *********************************************************************/
337117632Sharti
338117632Shartistatic int
339117632Shartiem_attach(device_t dev)
340117632Sharti{
341117632Sharti	struct adapter * adapter;
342117632Sharti	int             tsize, rsize;
343117632Sharti	int		error = 0;
344117632Sharti
345117632Sharti	INIT_DEBUGOUT("em_attach: begin");
346117632Sharti
347117632Sharti	/* Allocate, clear, and link in our adapter structure */
348117632Sharti	if (!(adapter = device_get_softc(dev))) {
349117632Sharti		printf("em: adapter structure allocation failed\n");
350117632Sharti		return(ENOMEM);
351147256Sbrooks	}
352117632Sharti	bzero(adapter, sizeof(struct adapter ));
353117632Sharti	adapter->dev = dev;
354117632Sharti	adapter->osdep.dev = dev;
355117632Sharti	adapter->unit = device_get_unit(dev);
356117632Sharti	EM_LOCK_INIT(adapter, device_get_nameunit(dev));
357117632Sharti
358117632Sharti	/* SYSCTL stuff */
359117632Sharti        SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
360117632Sharti                        SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
361117632Sharti                        OID_AUTO, "debug_info", CTLTYPE_INT|CTLFLAG_RW,
362117632Sharti                        (void *)adapter, 0,
363117632Sharti                        em_sysctl_debug_info, "I", "Debug Information");
364117632Sharti
365117632Sharti        SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
366117632Sharti                        SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
367117632Sharti                        OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW,
368117632Sharti                        (void *)adapter, 0,
369117632Sharti                        em_sysctl_stats, "I", "Statistics");
370117632Sharti
371117632Sharti	callout_init(&adapter->timer, CALLOUT_MPSAFE);
372117632Sharti	callout_init(&adapter->tx_fifo_timer, CALLOUT_MPSAFE);
373117632Sharti
374117632Sharti	/* Determine hardware revision */
375117632Sharti	em_identify_hardware(adapter);
376117632Sharti
377117632Sharti	/* Set up some sysctls for the tunable interrupt delays */
378117632Sharti	em_add_int_delay_sysctl(adapter, "rx_int_delay",
379117632Sharti	    "receive interrupt delay in usecs", &adapter->rx_int_delay,
380117632Sharti	    E1000_REG_OFFSET(&adapter->hw, RDTR), em_rx_int_delay_dflt);
381117632Sharti	em_add_int_delay_sysctl(adapter, "tx_int_delay",
382117632Sharti	    "transmit interrupt delay in usecs", &adapter->tx_int_delay,
383117632Sharti	    E1000_REG_OFFSET(&adapter->hw, TIDV), em_tx_int_delay_dflt);
384117632Sharti	if (adapter->hw.mac_type >= em_82540) {
385117632Sharti		em_add_int_delay_sysctl(adapter, "rx_abs_int_delay",
386118601Sharti		    "receive interrupt delay limit in usecs",
387118601Sharti		    &adapter->rx_abs_int_delay,
388118601Sharti		    E1000_REG_OFFSET(&adapter->hw, RADV),
389117632Sharti		    em_rx_abs_int_delay_dflt);
390117632Sharti		em_add_int_delay_sysctl(adapter, "tx_abs_int_delay",
391117632Sharti		    "transmit interrupt delay limit in usecs",
392117632Sharti		    &adapter->tx_abs_int_delay,
393117632Sharti		    E1000_REG_OFFSET(&adapter->hw, TADV),
394117632Sharti		    em_tx_abs_int_delay_dflt);
395117632Sharti	}
396117632Sharti
397117632Sharti	/* Sysctls for limiting the amount of work done in the taskqueue */
398117632Sharti#ifndef NO_EM_FASTINTR
399117632Sharti	em_add_int_process_limit(adapter, "rx_processing_limit",
400117632Sharti	    "max number of rx packets to process", &adapter->rx_process_limit,
401117632Sharti	    em_rx_process_limit);
402117632Sharti#endif
403117632Sharti
404117632Sharti	/*
405117632Sharti	 * Validate number of transmit and receive descriptors. It
406117632Sharti	 * must not exceed hardware maximum, and must be multiple
407117632Sharti	 * of E1000_DBA_ALIGN.
408117632Sharti	 */
409117632Sharti	if (((em_txd * sizeof(struct em_tx_desc)) % E1000_DBA_ALIGN) != 0 ||
410117632Sharti	    (adapter->hw.mac_type >= em_82544 && em_txd > EM_MAX_TXD) ||
411117632Sharti	    (adapter->hw.mac_type < em_82544 && em_txd > EM_MAX_TXD_82543) ||
412117632Sharti	    (em_txd < EM_MIN_TXD)) {
413117632Sharti		printf("em%d: Using %d TX descriptors instead of %d!\n",
414117632Sharti		    adapter->unit, EM_DEFAULT_TXD, em_txd);
415117632Sharti		adapter->num_tx_desc = EM_DEFAULT_TXD;
416117632Sharti	} else
417117632Sharti		adapter->num_tx_desc = em_txd;
418117632Sharti	if (((em_rxd * sizeof(struct em_rx_desc)) % E1000_DBA_ALIGN) != 0 ||
419117632Sharti	    (adapter->hw.mac_type >= em_82544 && em_rxd > EM_MAX_RXD) ||
420117632Sharti	    (adapter->hw.mac_type < em_82544 && em_rxd > EM_MAX_RXD_82543) ||
421117632Sharti	    (em_rxd < EM_MIN_RXD)) {
422117632Sharti		printf("em%d: Using %d RX descriptors instead of %d!\n",
423117632Sharti		    adapter->unit, EM_DEFAULT_RXD, em_rxd);
424117632Sharti		adapter->num_rx_desc = EM_DEFAULT_RXD;
425117632Sharti	} else
426117632Sharti		adapter->num_rx_desc = em_rxd;
427117632Sharti
428117632Sharti        adapter->hw.autoneg = DO_AUTO_NEG;
429117632Sharti        adapter->hw.wait_autoneg_complete = WAIT_FOR_AUTO_NEG_DEFAULT;
430117632Sharti        adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
431117632Sharti        adapter->hw.tbi_compatibility_en = TRUE;
432117632Sharti        adapter->rx_buffer_len = EM_RXBUFFER_2048;
433117632Sharti
434117632Sharti	adapter->hw.phy_init_script = 1;
435117632Sharti	adapter->hw.phy_reset_disable = FALSE;
436117632Sharti
437117632Sharti#ifndef EM_MASTER_SLAVE
438117632Sharti	adapter->hw.master_slave = em_ms_hw_default;
439117632Sharti#else
440117632Sharti	adapter->hw.master_slave = EM_MASTER_SLAVE;
441117632Sharti#endif
442117632Sharti	/*
443117632Sharti	 * Set the max frame size assuming standard ethernet
444117632Sharti	 * sized frames.
445117632Sharti	 */
446117632Sharti	adapter->hw.max_frame_size =
447117632Sharti		ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
448117632Sharti
449117632Sharti	adapter->hw.min_frame_size =
450117632Sharti		MINIMUM_ETHERNET_PACKET_SIZE + ETHER_CRC_LEN;
451117632Sharti
452117632Sharti	/*
453117632Sharti	 * This controls when hardware reports transmit completion
454117632Sharti	 * status.
455117632Sharti	 */
456117632Sharti	adapter->hw.report_tx_early = 1;
457117632Sharti
458117632Sharti	if (em_allocate_pci_resources(adapter)) {
459117632Sharti		printf("em%d: Allocation of PCI resources failed\n",
460117632Sharti		       adapter->unit);
461117632Sharti                error = ENXIO;
462117632Sharti                goto err_pci;
463117632Sharti	}
464117632Sharti
465117632Sharti
466117632Sharti	/* Initialize eeprom parameters */
467117632Sharti        em_init_eeprom_params(&adapter->hw);
468117632Sharti
469117632Sharti	tsize = roundup2(adapter->num_tx_desc * sizeof(struct em_tx_desc),
470117632Sharti	    E1000_DBA_ALIGN);
471117632Sharti
472117632Sharti	/* Allocate Transmit Descriptor ring */
473117632Sharti        if (em_dma_malloc(adapter, tsize, &adapter->txdma, BUS_DMA_NOWAIT)) {
474117632Sharti                printf("em%d: Unable to allocate tx_desc memory\n",
475117632Sharti                       adapter->unit);
476117632Sharti		error = ENOMEM;
477117632Sharti                goto err_tx_desc;
478117632Sharti        }
479117632Sharti        adapter->tx_desc_base = (struct em_tx_desc *) adapter->txdma.dma_vaddr;
480117632Sharti
481117632Sharti	rsize = roundup2(adapter->num_rx_desc * sizeof(struct em_rx_desc),
482117632Sharti	    E1000_DBA_ALIGN);
483117632Sharti
484117632Sharti	/* Allocate Receive Descriptor ring */
485117632Sharti        if (em_dma_malloc(adapter, rsize, &adapter->rxdma, BUS_DMA_NOWAIT)) {
486117632Sharti                printf("em%d: Unable to allocate rx_desc memory\n",
487117632Sharti                        adapter->unit);
488117632Sharti		error = ENOMEM;
489117632Sharti                goto err_rx_desc;
490117632Sharti        }
491117632Sharti        adapter->rx_desc_base = (struct em_rx_desc *) adapter->rxdma.dma_vaddr;
492117632Sharti
493117632Sharti	/* Initialize the hardware */
494117632Sharti	if (em_hardware_init(adapter)) {
495117632Sharti		printf("em%d: Unable to initialize the hardware\n",
496117632Sharti		       adapter->unit);
497117632Sharti		error = EIO;
498117632Sharti                goto err_hw_init;
499117632Sharti	}
500117632Sharti
501117632Sharti	/* Copy the permanent MAC address out of the EEPROM */
502117632Sharti	if (em_read_mac_addr(&adapter->hw) < 0) {
503117632Sharti		printf("em%d: EEPROM read error while reading mac address\n",
504117632Sharti		       adapter->unit);
505117632Sharti		error = EIO;
506117632Sharti                goto err_mac_addr;
507117632Sharti	}
508117632Sharti
509117632Sharti	if (!em_is_valid_ether_addr(adapter->hw.mac_addr)) {
510117632Sharti                printf("em%d: Invalid mac address\n", adapter->unit);
511117632Sharti                error = EIO;
512117632Sharti                goto err_mac_addr;
513147256Sbrooks        }
514117632Sharti
515147256Sbrooks	/* Setup OS specific network interface */
516117632Sharti	em_setup_interface(dev, adapter);
517117632Sharti
518117632Sharti	em_allocate_intr(adapter);
519117632Sharti
520117632Sharti	/* Initialize statistics */
521	em_clear_hw_cntrs(&adapter->hw);
522	em_update_stats_counters(adapter);
523	adapter->hw.get_link_status = 1;
524	em_check_for_link(&adapter->hw);
525
526	if (bootverbose) {
527		/* Print the link status */
528		if (adapter->link_active == 1) {
529			em_get_speed_and_duplex(&adapter->hw,
530			    &adapter->link_speed, &adapter->link_duplex);
531			printf("em%d:  Speed:%d Mbps  Duplex:%s\n",
532			       adapter->unit,
533			       adapter->link_speed,
534			       adapter->link_duplex == FULL_DUPLEX ? "Full" :
535				"Half");
536		} else
537			printf("em%d:  Speed:N/A  Duplex:N/A\n",
538			    adapter->unit);
539	}
540
541	/* Identify 82544 on PCIX */
542        em_get_bus_info(&adapter->hw);
543        if(adapter->hw.bus_type == em_bus_type_pcix &&
544           adapter->hw.mac_type == em_82544) {
545                adapter->pcix_82544 = TRUE;
546        }
547        else {
548                adapter->pcix_82544 = FALSE;
549        }
550	INIT_DEBUGOUT("em_attach: end");
551	return(0);
552
553err_mac_addr:
554err_hw_init:
555        em_dma_free(adapter, &adapter->rxdma);
556err_rx_desc:
557        em_dma_free(adapter, &adapter->txdma);
558err_tx_desc:
559err_pci:
560	em_free_intr(adapter);
561        em_free_pci_resources(adapter);
562	EM_LOCK_DESTROY(adapter);
563        return(error);
564
565}
566
567/*********************************************************************
568 *  Device removal routine
569 *
570 *  The detach entry point is called when the driver is being removed.
571 *  This routine stops the adapter and deallocates all the resources
572 *  that were allocated for driver operation.
573 *
574 *  return 0 on success, positive on failure
575 *********************************************************************/
576
577static int
578em_detach(device_t dev)
579{
580	struct adapter * adapter = device_get_softc(dev);
581	struct ifnet   *ifp = adapter->ifp;
582
583	INIT_DEBUGOUT("em_detach: begin");
584
585#ifdef DEVICE_POLLING
586	if (ifp->if_capenable & IFCAP_POLLING)
587		ether_poll_deregister(ifp);
588#endif
589
590	em_free_intr(adapter);
591	EM_LOCK(adapter);
592	adapter->in_detach = 1;
593	em_stop(adapter);
594	em_phy_hw_reset(&adapter->hw);
595	EM_UNLOCK(adapter);
596        ether_ifdetach(adapter->ifp);
597
598	em_free_pci_resources(adapter);
599	bus_generic_detach(dev);
600	if_free(ifp);
601
602	/* Free Transmit Descriptor ring */
603        if (adapter->tx_desc_base) {
604                em_dma_free(adapter, &adapter->txdma);
605                adapter->tx_desc_base = NULL;
606        }
607
608        /* Free Receive Descriptor ring */
609        if (adapter->rx_desc_base) {
610                em_dma_free(adapter, &adapter->rxdma);
611                adapter->rx_desc_base = NULL;
612        }
613
614	EM_LOCK_DESTROY(adapter);
615
616	return(0);
617}
618
619/*********************************************************************
620 *
621 *  Shutdown entry point
622 *
623 **********************************************************************/
624
625static int
626em_shutdown(device_t dev)
627{
628	struct adapter *adapter = device_get_softc(dev);
629	EM_LOCK(adapter);
630	em_stop(adapter);
631	EM_UNLOCK(adapter);
632	return(0);
633}
634
635/*
636 * Suspend/resume device methods.
637 */
638static int
639em_suspend(device_t dev)
640{
641	struct adapter *adapter = device_get_softc(dev);
642
643	EM_LOCK(adapter);
644	em_stop(adapter);
645	EM_UNLOCK(adapter);
646
647	return bus_generic_suspend(dev);
648}
649
650static int
651em_resume(device_t dev)
652{
653	struct adapter *adapter = device_get_softc(dev);
654	struct ifnet *ifp = adapter->ifp;
655
656	EM_LOCK(adapter);
657	em_init_locked(adapter);
658	if ((ifp->if_flags & IFF_UP) &&
659	    (ifp->if_drv_flags & IFF_DRV_RUNNING))
660		em_start_locked(ifp);
661	EM_UNLOCK(adapter);
662
663	return bus_generic_resume(dev);
664}
665
666
667/*********************************************************************
668 *  Transmit entry point
669 *
670 *  em_start is called by the stack to initiate a transmit.
671 *  The driver will remain in this routine as long as there are
672 *  packets to transmit and transmit resources are available.
673 *  In case resources are not available stack is notified and
674 *  the packet is requeued.
675 **********************************************************************/
676
677static void
678em_start_locked(struct ifnet *ifp)
679{
680	struct adapter	*adapter = ifp->if_softc;
681	struct mbuf	*m_head;
682
683	mtx_assert(&adapter->mtx, MA_OWNED);
684
685	if (!adapter->link_active)
686		return;
687
688	while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
689
690		IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
691		if (m_head == NULL)
692			break;
693		/*
694		 * em_encap() can modify our pointer, and or make it NULL on
695		 * failure.  In that event, we can't requeue.
696		 */
697		if (em_encap(adapter, &m_head)) {
698			if (m_head == NULL)
699				break;
700			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
701			IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
702			break;
703		}
704
705		/* Send a copy of the frame to the BPF listener */
706		BPF_MTAP(ifp, m_head);
707
708		/* Set timeout in case hardware has problems transmitting. */
709		ifp->if_timer = EM_TX_TIMEOUT;
710	}
711}
712
713static void
714em_start(struct ifnet *ifp)
715{
716	struct adapter *adapter = ifp->if_softc;
717
718	EM_LOCK(adapter);
719	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
720		em_start_locked(ifp);
721	EM_UNLOCK(adapter);
722}
723
724/*********************************************************************
725 *  Ioctl entry point
726 *
727 *  em_ioctl is called when the user wants to configure the
728 *  interface.
729 *
730 *  return 0 on success, positive on failure
731 **********************************************************************/
732
733static int
734em_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
735{
736	struct adapter	*adapter = ifp->if_softc;
737	struct ifreq	*ifr = (struct ifreq *)data;
738	int error = 0;
739
740	if (adapter->in_detach)
741		return(error);
742
743	switch (command) {
744	case SIOCSIFADDR:
745	case SIOCGIFADDR:
746		IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFADDR (Get/Set Interface Addr)");
747		ether_ioctl(ifp, command, data);
748		break;
749	case SIOCSIFMTU:
750	    {
751		int max_frame_size;
752
753		IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)");
754
755		switch (adapter->hw.mac_type) {
756		case em_82571:
757		case em_82572:
758			max_frame_size = 10500;
759			break;
760		case em_82573:
761			/* 82573 does not support jumbo frames. */
762			max_frame_size = ETHER_MAX_LEN;
763			break;
764		default:
765			max_frame_size = MAX_JUMBO_FRAME_SIZE;
766		}
767		if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
768		    ETHER_CRC_LEN) {
769			error = EINVAL;
770			break;
771		}
772
773		EM_LOCK(adapter);
774		ifp->if_mtu = ifr->ifr_mtu;
775		adapter->hw.max_frame_size =
776		ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
777		em_init_locked(adapter);
778		EM_UNLOCK(adapter);
779		break;
780	    }
781	case SIOCSIFFLAGS:
782		IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFFLAGS (Set Interface Flags)");
783		EM_LOCK(adapter);
784		if (ifp->if_flags & IFF_UP) {
785			if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
786				em_init_locked(adapter);
787			}
788
789			em_disable_promisc(adapter);
790			em_set_promisc(adapter);
791		} else {
792			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
793				em_stop(adapter);
794			}
795		}
796		EM_UNLOCK(adapter);
797		break;
798	case SIOCADDMULTI:
799	case SIOCDELMULTI:
800		IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI");
801		if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
802			EM_LOCK(adapter);
803			em_disable_intr(adapter);
804			em_set_multi(adapter);
805			if (adapter->hw.mac_type == em_82542_rev2_0) {
806				em_initialize_receive_unit(adapter);
807			}
808#ifdef DEVICE_POLLING
809                        if (!(ifp->if_capenable & IFCAP_POLLING))
810#endif
811				em_enable_intr(adapter);
812			EM_UNLOCK(adapter);
813		}
814		break;
815	case SIOCSIFMEDIA:
816	case SIOCGIFMEDIA:
817		IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFMEDIA (Get/Set Interface Media)");
818		error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
819		break;
820	case SIOCSIFCAP:
821	    {
822		int mask, reinit;
823
824		IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)");
825		reinit = 0;
826		mask = ifr->ifr_reqcap ^ ifp->if_capenable;
827#ifdef DEVICE_POLLING
828		if (mask & IFCAP_POLLING) {
829			if (ifr->ifr_reqcap & IFCAP_POLLING) {
830				error = ether_poll_register(em_poll, ifp);
831				if (error)
832					return(error);
833				EM_LOCK(adapter);
834				em_disable_intr(adapter);
835				ifp->if_capenable |= IFCAP_POLLING;
836				EM_UNLOCK(adapter);
837			} else {
838				error = ether_poll_deregister(ifp);
839				/* Enable interrupt even in error case */
840				EM_LOCK(adapter);
841				em_enable_intr(adapter);
842				ifp->if_capenable &= ~IFCAP_POLLING;
843				EM_UNLOCK(adapter);
844			}
845		}
846#endif
847		if (mask & IFCAP_HWCSUM) {
848			ifp->if_capenable ^= IFCAP_HWCSUM;
849			reinit = 1;
850		}
851		if (mask & IFCAP_VLAN_HWTAGGING) {
852			ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
853			reinit = 1;
854		}
855		if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING))
856			em_init(adapter);
857		break;
858	    }
859	default:
860		IOCTL_DEBUGOUT1("ioctl received: UNKNOWN (0x%x)", (int)command);
861		error = EINVAL;
862	}
863
864	return(error);
865}
866
867/*********************************************************************
868 *  Watchdog entry point
869 *
870 *  This routine is called whenever hardware quits transmitting.
871 *
872 **********************************************************************/
873
874static void
875em_watchdog(struct ifnet *ifp)
876{
877	struct adapter *adapter = ifp->if_softc;
878
879	EM_LOCK(adapter);
880	/* If we are in this routine because of pause frames, then
881	 * don't reset the hardware.
882	 */
883	if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_TXOFF) {
884		ifp->if_timer = EM_TX_TIMEOUT;
885		EM_UNLOCK(adapter);
886		return;
887	}
888
889	if (em_check_for_link(&adapter->hw))
890		printf("em%d: watchdog timeout -- resetting\n", adapter->unit);
891
892	ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
893	adapter->watchdog_events++;
894
895	em_init_locked(adapter);
896	EM_UNLOCK(adapter);
897}
898
899/*********************************************************************
900 *  Init entry point
901 *
902 *  This routine is used in two ways. It is used by the stack as
903 *  init entry point in network interface structure. It is also used
904 *  by the driver as a hw/sw initialization routine to get to a
905 *  consistent state.
906 *
907 *  return 0 on success, positive on failure
908 **********************************************************************/
909
910static void
911em_init_locked(struct adapter * adapter)
912{
913	struct ifnet   *ifp;
914
915	uint32_t	pba;
916	ifp = adapter->ifp;
917
918	INIT_DEBUGOUT("em_init: begin");
919
920	mtx_assert(&adapter->mtx, MA_OWNED);
921
922	em_stop(adapter);
923
924	/*
925	 * Packet Buffer Allocation (PBA)
926	 * Writing PBA sets the receive portion of the buffer
927	 * the remainder is used for the transmit buffer.
928	 */
929	switch (adapter->hw.mac_type) {
930	case em_82547:
931	case em_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
932		if (adapter->hw.max_frame_size > EM_RXBUFFER_8192)
933			pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
934		else
935			pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
936		adapter->tx_fifo_head = 0;
937		adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
938		adapter->tx_fifo_size = (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
939		break;
940	case em_82571: /* 82571: Total Packet Buffer is 48K */
941	case em_82572: /* 82572: Total Packet Buffer is 48K */
942			pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
943		break;
944	case em_82573: /* 82573: Total Packet Buffer is 32K */
945		/* Jumbo frames not supported */
946			pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
947		break;
948	default:
949		/* Devices before 82547 had a Packet Buffer of 64K.   */
950		if(adapter->hw.max_frame_size > EM_RXBUFFER_8192)
951			pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
952		else
953			pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
954	}
955
956	INIT_DEBUGOUT1("em_init: pba=%dK",pba);
957	E1000_WRITE_REG(&adapter->hw, PBA, pba);
958
959	/* Get the latest mac address, User can use a LAA */
960        bcopy(IF_LLADDR(adapter->ifp), adapter->hw.mac_addr,
961              ETHER_ADDR_LEN);
962
963	/* Initialize the hardware */
964	if (em_hardware_init(adapter)) {
965		printf("em%d: Unable to initialize the hardware\n",
966		       adapter->unit);
967		return;
968	}
969
970	if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
971		em_enable_vlans(adapter);
972
973	/* Prepare transmit descriptors and buffers */
974	if (em_setup_transmit_structures(adapter)) {
975		printf("em%d: Could not setup transmit structures\n",
976		       adapter->unit);
977		em_stop(adapter);
978		return;
979	}
980	em_initialize_transmit_unit(adapter);
981
982	/* Setup Multicast table */
983	em_set_multi(adapter);
984
985	/* Prepare receive descriptors and buffers */
986	if (em_setup_receive_structures(adapter)) {
987		printf("em%d: Could not setup receive structures\n",
988		       adapter->unit);
989		em_stop(adapter);
990		return;
991	}
992	em_initialize_receive_unit(adapter);
993
994	/* Don't loose promiscuous settings */
995	em_set_promisc(adapter);
996
997	ifp->if_drv_flags |= IFF_DRV_RUNNING;
998	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
999
1000	if (adapter->hw.mac_type >= em_82543) {
1001		if (ifp->if_capenable & IFCAP_TXCSUM)
1002			ifp->if_hwassist = EM_CHECKSUM_FEATURES;
1003		else
1004			ifp->if_hwassist = 0;
1005	}
1006
1007	callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1008	em_clear_hw_cntrs(&adapter->hw);
1009#ifdef DEVICE_POLLING
1010        /*
1011         * Only enable interrupts if we are not polling, make sure
1012         * they are off otherwise.
1013         */
1014        if (ifp->if_capenable & IFCAP_POLLING)
1015                em_disable_intr(adapter);
1016        else
1017#endif /* DEVICE_POLLING */
1018		em_enable_intr(adapter);
1019
1020	/* Don't reset the phy next time init gets called */
1021	adapter->hw.phy_reset_disable = TRUE;
1022
1023	return;
1024}
1025
1026static void
1027em_init(void *arg)
1028{
1029	struct adapter * adapter = arg;
1030
1031	EM_LOCK(adapter);
1032	em_init_locked(adapter);
1033	EM_UNLOCK(adapter);
1034	return;
1035}
1036
1037
1038#ifdef DEVICE_POLLING
1039static void
1040em_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count)
1041{
1042	struct adapter *adapter = ifp->if_softc;
1043	uint32_t reg_icr;
1044
1045	mtx_assert(&adapter->mtx, MA_OWNED);
1046
1047	if (cmd == POLL_AND_CHECK_STATUS) {
1048		reg_icr = E1000_READ_REG(&adapter->hw, ICR);
1049		if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1050			callout_stop(&adapter->timer);
1051			adapter->hw.get_link_status = 1;
1052			em_check_for_link(&adapter->hw);
1053			em_print_link_status(adapter);
1054			callout_reset(&adapter->timer, hz, em_local_timer,
1055			    adapter);
1056		}
1057        }
1058	em_process_receive_interrupts(adapter, count);
1059	em_clean_transmit_interrupts(adapter);
1060
1061	if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1062		em_start_locked(ifp);
1063}
1064
1065static void
1066em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1067{
1068	struct adapter *adapter = ifp->if_softc;
1069
1070	EM_LOCK(adapter);
1071	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1072		em_poll_locked(ifp, cmd, count);
1073	EM_UNLOCK(adapter);
1074}
1075#endif /* DEVICE_POLLING */
1076
1077#ifndef NO_EM_FASTINTR
1078static void
1079em_handle_link(void *context, int pending)
1080{
1081	struct adapter	*adapter = context;
1082	struct ifnet *ifp;
1083
1084	ifp = adapter->ifp;
1085
1086	EM_LOCK(adapter);
1087
1088	callout_stop(&adapter->timer);
1089	adapter->hw.get_link_status = 1;
1090	em_check_for_link(&adapter->hw);
1091	em_print_link_status(adapter);
1092	callout_reset(&adapter->timer, hz, em_local_timer,
1093	    adapter);
1094	EM_UNLOCK(adapter);
1095}
1096
1097static void
1098em_handle_rxtx(void *context, int pending)
1099{
1100	struct adapter	*adapter = context;
1101	struct ifnet	*ifp;
1102
1103	ifp = adapter->ifp;
1104
1105	/*
1106	 * TODO:
1107	 * It should be possible to run the tx clean loop without the lock.
1108	 */
1109	if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1110		if (em_process_receive_interrupts(adapter,
1111		    adapter->rx_process_limit) != 0)
1112			taskqueue_enqueue(adapter->tq, &adapter->rxtx_task);
1113		EM_LOCK(adapter);
1114		em_clean_transmit_interrupts(adapter);
1115
1116		if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1117			em_start_locked(ifp);
1118		EM_UNLOCK(adapter);
1119	}
1120
1121	em_enable_intr(adapter);
1122	return;
1123}
1124#endif
1125
1126/*********************************************************************
1127 *
1128 *  Interrupt Service routine
1129 *
1130 **********************************************************************/
1131#ifndef NO_EM_FASTINTR
1132static void
1133em_intr_fast(void *arg)
1134{
1135	struct adapter	*adapter = arg;
1136	struct ifnet	*ifp;
1137	uint32_t	reg_icr;
1138
1139	ifp = adapter->ifp;
1140
1141#ifdef DEVICE_POLLING
1142	if (ifp->if_capenable & IFCAP_POLLING) {
1143		return;
1144	}
1145#endif /* DEVICE_POLLING */
1146
1147	reg_icr = E1000_READ_REG(&adapter->hw, ICR);
1148
1149	/* Hot eject?  */
1150	if (reg_icr == 0xffffffff)
1151		return;
1152
1153	/* Definitely not our interrupt.  */
1154	if (reg_icr == 0x0)
1155		return;
1156
1157	/*
1158	 * Starting with the 82571 chip, bit 31 should be used to
1159	 * determine whether the interrupt belongs to us.
1160	 */
1161	if (adapter->hw.mac_type >= em_82571 &&
1162	    (reg_icr & E1000_ICR_INT_ASSERTED) == 0)
1163		return;
1164
1165	/*
1166	 * Mask interrupts until the taskqueue is finished running.  This is
1167	 * cheap, just assume that it is needed.  This also works around the
1168	 * MSI message reordering errata on certain systems.
1169	 */
1170	em_disable_intr(adapter);
1171	taskqueue_enqueue(adapter->tq, &adapter->rxtx_task);
1172
1173	/* Link status change */
1174	if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))
1175		taskqueue_enqueue(taskqueue_fast, &adapter->link_task);
1176
1177	if (reg_icr & E1000_ICR_RXO) {
1178		adapter->rx_overruns++;
1179	}
1180	return;
1181}
1182#endif
1183
1184static void
1185em_intr(void *arg)
1186{
1187	struct adapter	*adapter = arg;
1188	struct ifnet	*ifp;
1189	uint32_t	reg_icr;
1190	int		wantinit = 0;
1191
1192	EM_LOCK(adapter);
1193
1194	ifp = adapter->ifp;
1195
1196#ifdef DEVICE_POLLING
1197	if (ifp->if_capenable & IFCAP_POLLING) {
1198		EM_UNLOCK(adapter);
1199		return;
1200	}
1201#endif
1202
1203	for (;;) {
1204		reg_icr = E1000_READ_REG(&adapter->hw, ICR);
1205		if (adapter->hw.mac_type >= em_82571 &&
1206		    (reg_icr & E1000_ICR_INT_ASSERTED) == 0)
1207			break;
1208		else if (reg_icr == 0)
1209			break;
1210
1211		/*
1212		 * XXX: some laptops trigger several spurious interrupts
1213		 * on em(4) when in the resume cycle. The ICR register
1214		 * reports all-ones value in this case. Processing such
1215		 * interrupts would lead to a freeze. I don't know why.
1216		 */
1217		if (reg_icr == 0xffffffff)
1218			break;
1219
1220		if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1221			em_process_receive_interrupts(adapter, -1);
1222			em_clean_transmit_interrupts(adapter);
1223		}
1224
1225		/* Link status change */
1226		if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1227			callout_stop(&adapter->timer);
1228			adapter->hw.get_link_status = 1;
1229			em_check_for_link(&adapter->hw);
1230			em_print_link_status(adapter);
1231			callout_reset(&adapter->timer, hz, em_local_timer,
1232			    adapter);
1233		}
1234
1235		if (reg_icr & E1000_ICR_RXO) {
1236			adapter->rx_overruns++;
1237			wantinit = 1;
1238		}
1239	}
1240#if 0
1241	if (wantinit)
1242		em_init_locked(adapter);
1243#endif
1244	if (ifp->if_drv_flags & IFF_DRV_RUNNING &&
1245	    !IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1246		em_start_locked(ifp);
1247
1248	EM_UNLOCK(adapter);
1249}
1250
1251/*********************************************************************
1252 *
1253 *  Media Ioctl callback
1254 *
1255 *  This routine is called whenever the user queries the status of
1256 *  the interface using ifconfig.
1257 *
1258 **********************************************************************/
1259static void
1260em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1261{
1262	struct adapter * adapter = ifp->if_softc;
1263
1264	INIT_DEBUGOUT("em_media_status: begin");
1265
1266	em_check_for_link(&adapter->hw);
1267	if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
1268		if (adapter->link_active == 0) {
1269			em_get_speed_and_duplex(&adapter->hw,
1270						&adapter->link_speed,
1271						&adapter->link_duplex);
1272			adapter->link_active = 1;
1273		}
1274	} else {
1275		if (adapter->link_active == 1) {
1276			adapter->link_speed = 0;
1277			adapter->link_duplex = 0;
1278			adapter->link_active = 0;
1279		}
1280	}
1281
1282	ifmr->ifm_status = IFM_AVALID;
1283	ifmr->ifm_active = IFM_ETHER;
1284
1285	if (!adapter->link_active)
1286		return;
1287
1288	ifmr->ifm_status |= IFM_ACTIVE;
1289
1290	if (adapter->hw.media_type == em_media_type_fiber) {
1291		ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
1292	} else {
1293		switch (adapter->link_speed) {
1294		case 10:
1295			ifmr->ifm_active |= IFM_10_T;
1296			break;
1297		case 100:
1298			ifmr->ifm_active |= IFM_100_TX;
1299			break;
1300		case 1000:
1301			ifmr->ifm_active |= IFM_1000_T;
1302			break;
1303		}
1304		if (adapter->link_duplex == FULL_DUPLEX)
1305			ifmr->ifm_active |= IFM_FDX;
1306		else
1307			ifmr->ifm_active |= IFM_HDX;
1308	}
1309	return;
1310}
1311
1312/*********************************************************************
1313 *
1314 *  Media Ioctl callback
1315 *
1316 *  This routine is called when the user changes speed/duplex using
1317 *  media/mediopt option with ifconfig.
1318 *
1319 **********************************************************************/
1320static int
1321em_media_change(struct ifnet *ifp)
1322{
1323	struct adapter * adapter = ifp->if_softc;
1324	struct ifmedia  *ifm = &adapter->media;
1325
1326	INIT_DEBUGOUT("em_media_change: begin");
1327
1328	if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1329		return(EINVAL);
1330
1331	switch (IFM_SUBTYPE(ifm->ifm_media)) {
1332	case IFM_AUTO:
1333		adapter->hw.autoneg = DO_AUTO_NEG;
1334		adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1335		break;
1336	case IFM_1000_SX:
1337	case IFM_1000_T:
1338		adapter->hw.autoneg = DO_AUTO_NEG;
1339		adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
1340		break;
1341	case IFM_100_TX:
1342		adapter->hw.autoneg = FALSE;
1343		adapter->hw.autoneg_advertised = 0;
1344		if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1345			adapter->hw.forced_speed_duplex = em_100_full;
1346		else
1347			adapter->hw.forced_speed_duplex	= em_100_half;
1348		break;
1349	case IFM_10_T:
1350		adapter->hw.autoneg = FALSE;
1351		adapter->hw.autoneg_advertised = 0;
1352		if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1353			adapter->hw.forced_speed_duplex = em_10_full;
1354		else
1355			adapter->hw.forced_speed_duplex	= em_10_half;
1356		break;
1357	default:
1358		printf("em%d: Unsupported media type\n", adapter->unit);
1359	}
1360
1361	/* As the speed/duplex settings my have changed we need to
1362	 * reset the PHY.
1363	 */
1364	adapter->hw.phy_reset_disable = FALSE;
1365
1366	em_init(adapter);
1367
1368	return(0);
1369}
1370
1371/*********************************************************************
1372 *
1373 *  This routine maps the mbufs to tx descriptors.
1374 *
1375 *  return 0 on success, positive on failure
1376 **********************************************************************/
1377static int
1378em_encap(struct adapter *adapter, struct mbuf **m_headp)
1379{
1380        struct ifnet		*ifp = adapter->ifp;
1381	bus_dma_segment_t	segs[EM_MAX_SCATTER];
1382	bus_dmamap_t		map;
1383        struct em_buffer	*tx_buffer;
1384        struct em_tx_desc	*current_tx_desc;
1385	struct mbuf		*m_head;
1386        struct m_tag		*mtag;
1387	uint32_t		txd_upper, txd_lower, txd_used, txd_saved;
1388	int			nsegs, i, j;
1389	int			error = 0;
1390
1391	m_head = *m_headp;
1392	current_tx_desc = NULL;
1393	txd_used = txd_saved = 0;
1394
1395	/*
1396	 * Force a cleanup if number of TX descriptors
1397	 * available hits the threshold.
1398	 */
1399	if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
1400		em_clean_transmit_interrupts(adapter);
1401		if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
1402			adapter->no_tx_desc_avail1++;
1403			return(ENOBUFS);
1404		}
1405	}
1406
1407	/*
1408	 * Map the packet for DMA.
1409	 */
1410	tx_buffer = &adapter->tx_buffer_area[adapter->next_avail_tx_desc];
1411	error = bus_dmamap_load_mbuf_sg(adapter->txtag, tx_buffer->map, m_head,
1412	    segs, &nsegs, BUS_DMA_NOWAIT);
1413	map = tx_buffer->map;
1414	if (error != 0) {
1415		adapter->no_tx_dma_setup++;
1416		return (error);
1417	}
1418	KASSERT(nsegs != 0, ("em_encap: empty packet"));
1419
1420	if (nsegs > adapter->num_tx_desc_avail) {
1421		adapter->no_tx_desc_avail2++;
1422		error = ENOBUFS;
1423		goto encap_fail;
1424	}
1425
1426	if (ifp->if_hwassist > 0) {
1427		em_transmit_checksum_setup(adapter,  m_head, &txd_upper,
1428		    &txd_lower);
1429	} else
1430		txd_upper = txd_lower = 0;
1431
1432	/* Find out if we are in vlan mode. */
1433	mtag = VLAN_OUTPUT_TAG(ifp, m_head);
1434
1435	/*
1436	 * When operating in promiscuous mode, hardware encapsulation for
1437	 * packets is disabled.  This means we have to add the vlan
1438	 * encapsulation in the driver, since it will have come down from the
1439	 * VLAN layer with a tag instead of a VLAN header.
1440	 */
1441	if (mtag != NULL && adapter->em_insert_vlan_header) {
1442		struct ether_vlan_header *evl;
1443		struct ether_header eh;
1444
1445		m_head = m_pullup(m_head, sizeof(eh));
1446		if (m_head == NULL) {
1447			*m_headp = NULL;
1448			error = ENOBUFS;
1449			goto encap_fail;
1450		}
1451		eh = *mtod(m_head, struct ether_header *);
1452		M_PREPEND(m_head, sizeof(*evl), M_DONTWAIT);
1453		if (m_head == NULL) {
1454			*m_headp = NULL;
1455			error = ENOBUFS;
1456			goto encap_fail;
1457		}
1458		m_head = m_pullup(m_head, sizeof(*evl));
1459		if (m_head == NULL) {
1460			*m_headp = NULL;
1461			error = ENOBUFS;
1462			goto encap_fail;
1463		}
1464		evl = mtod(m_head, struct ether_vlan_header *);
1465		bcopy(&eh, evl, sizeof(*evl));
1466		evl->evl_proto = evl->evl_encap_proto;
1467		evl->evl_encap_proto = htons(ETHERTYPE_VLAN);
1468		evl->evl_tag = htons(VLAN_TAG_VALUE(mtag));
1469		m_tag_delete(m_head, mtag);
1470		mtag = NULL;
1471		*m_headp = m_head;
1472	}
1473
1474	i = adapter->next_avail_tx_desc;
1475	if (adapter->pcix_82544) {
1476		txd_saved = i;
1477		txd_used = 0;
1478	}
1479	for (j = 0; j < nsegs; j++) {
1480		/* If adapter is 82544 and on PCIX bus. */
1481		if(adapter->pcix_82544) {
1482			DESC_ARRAY	desc_array;
1483			uint32_t	array_elements, counter;
1484
1485			/*
1486			 * Check the Address and Length combination and
1487			 * split the data accordingly
1488			 */
1489			array_elements = em_fill_descriptors(segs[j].ds_addr,
1490			    segs[j].ds_len, &desc_array);
1491			for (counter = 0; counter < array_elements; counter++) {
1492				if (txd_used == adapter->num_tx_desc_avail) {
1493					adapter->next_avail_tx_desc = txd_saved;
1494					adapter->no_tx_desc_avail2++;
1495					error = ENOBUFS;
1496					goto encap_fail;
1497				}
1498				tx_buffer = &adapter->tx_buffer_area[i];
1499				current_tx_desc = &adapter->tx_desc_base[i];
1500				current_tx_desc->buffer_addr = htole64(
1501					desc_array.descriptor[counter].address);
1502				current_tx_desc->lower.data = htole32(
1503					(adapter->txd_cmd | txd_lower |
1504					(uint16_t)desc_array.descriptor[counter].length));
1505				current_tx_desc->upper.data = htole32((txd_upper));
1506				if (++i == adapter->num_tx_desc)
1507					i = 0;
1508
1509				tx_buffer->m_head = NULL;
1510				txd_used++;
1511			}
1512		} else {
1513			tx_buffer = &adapter->tx_buffer_area[i];
1514			current_tx_desc = &adapter->tx_desc_base[i];
1515
1516			current_tx_desc->buffer_addr = htole64(segs[j].ds_addr);
1517			current_tx_desc->lower.data = htole32(
1518				adapter->txd_cmd | txd_lower | segs[j].ds_len);
1519			current_tx_desc->upper.data = htole32(txd_upper);
1520
1521			if (++i == adapter->num_tx_desc)
1522				i = 0;
1523
1524			tx_buffer->m_head = NULL;
1525		}
1526	}
1527
1528	adapter->next_avail_tx_desc = i;
1529	if (adapter->pcix_82544)
1530		adapter->num_tx_desc_avail -= txd_used;
1531	else
1532		adapter->num_tx_desc_avail -= nsegs;
1533
1534	if (mtag != NULL) {
1535		/* Set the vlan id. */
1536		current_tx_desc->upper.fields.special =
1537		    htole16(VLAN_TAG_VALUE(mtag));
1538
1539		/* Tell hardware to add tag. */
1540		current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_VLE);
1541	}
1542
1543	tx_buffer->m_head = m_head;
1544	bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1545
1546	/*
1547	 * Last Descriptor of Packet needs End Of Packet (EOP).
1548	 */
1549	current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_EOP);
1550
1551	/*
1552	 * Advance the Transmit Descriptor Tail (Tdt), this tells the E1000
1553	 * that this frame is available to transmit.
1554	 */
1555	bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
1556            BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1557	if (adapter->hw.mac_type == em_82547 &&
1558	    adapter->link_duplex == HALF_DUPLEX) {
1559		em_82547_move_tail_locked(adapter);
1560	} else {
1561		E1000_WRITE_REG(&adapter->hw, TDT, i);
1562		if (adapter->hw.mac_type == em_82547) {
1563			em_82547_update_fifo_head(adapter, m_head->m_pkthdr.len);
1564		}
1565	}
1566
1567	return(0);
1568
1569encap_fail:
1570	bus_dmamap_unload(adapter->txtag, tx_buffer->map);
1571	return (error);
1572}
1573
1574/*********************************************************************
1575 *
1576 * 82547 workaround to avoid controller hang in half-duplex environment.
1577 * The workaround is to avoid queuing a large packet that would span
1578 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers
1579 * in this case. We do that only when FIFO is quiescent.
1580 *
1581 **********************************************************************/
1582static void
1583em_82547_move_tail_locked(struct adapter *adapter)
1584{
1585	uint16_t hw_tdt;
1586	uint16_t sw_tdt;
1587	struct em_tx_desc *tx_desc;
1588	uint16_t length = 0;
1589	boolean_t eop = 0;
1590
1591	EM_LOCK_ASSERT(adapter);
1592
1593	hw_tdt = E1000_READ_REG(&adapter->hw, TDT);
1594	sw_tdt = adapter->next_avail_tx_desc;
1595
1596	while (hw_tdt != sw_tdt) {
1597		tx_desc = &adapter->tx_desc_base[hw_tdt];
1598		length += tx_desc->lower.flags.length;
1599		eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1600		if(++hw_tdt == adapter->num_tx_desc)
1601			hw_tdt = 0;
1602
1603		if(eop) {
1604			if (em_82547_fifo_workaround(adapter, length)) {
1605				adapter->tx_fifo_wrk_cnt++;
1606				callout_reset(&adapter->tx_fifo_timer, 1,
1607					em_82547_move_tail, adapter);
1608				break;
1609			}
1610			E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt);
1611			em_82547_update_fifo_head(adapter, length);
1612			length = 0;
1613		}
1614	}
1615	return;
1616}
1617
1618static void
1619em_82547_move_tail(void *arg)
1620{
1621	struct adapter *adapter = arg;
1622
1623	EM_LOCK(adapter);
1624	em_82547_move_tail_locked(adapter);
1625	EM_UNLOCK(adapter);
1626}
1627
1628static int
1629em_82547_fifo_workaround(struct adapter *adapter, int len)
1630{
1631	int fifo_space, fifo_pkt_len;
1632
1633	fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1634
1635	if (adapter->link_duplex == HALF_DUPLEX) {
1636		fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1637
1638		if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1639			if (em_82547_tx_fifo_reset(adapter))
1640				return(0);
1641			else
1642				return(1);
1643		}
1644	}
1645
1646	return(0);
1647}
1648
1649static void
1650em_82547_update_fifo_head(struct adapter *adapter, int len)
1651{
1652	int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1653
1654	/* tx_fifo_head is always 16 byte aligned */
1655	adapter->tx_fifo_head += fifo_pkt_len;
1656	if (adapter->tx_fifo_head >= adapter->tx_fifo_size) {
1657		adapter->tx_fifo_head -= adapter->tx_fifo_size;
1658	}
1659
1660	return;
1661}
1662
1663
1664static int
1665em_82547_tx_fifo_reset(struct adapter *adapter)
1666{
1667	uint32_t tctl;
1668
1669	if ( (E1000_READ_REG(&adapter->hw, TDT) ==
1670	      E1000_READ_REG(&adapter->hw, TDH)) &&
1671	     (E1000_READ_REG(&adapter->hw, TDFT) ==
1672	      E1000_READ_REG(&adapter->hw, TDFH)) &&
1673	     (E1000_READ_REG(&adapter->hw, TDFTS) ==
1674	      E1000_READ_REG(&adapter->hw, TDFHS)) &&
1675	     (E1000_READ_REG(&adapter->hw, TDFPC) == 0)) {
1676
1677		/* Disable TX unit */
1678		tctl = E1000_READ_REG(&adapter->hw, TCTL);
1679		E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN);
1680
1681		/* Reset FIFO pointers */
1682		E1000_WRITE_REG(&adapter->hw, TDFT,  adapter->tx_head_addr);
1683		E1000_WRITE_REG(&adapter->hw, TDFH,  adapter->tx_head_addr);
1684		E1000_WRITE_REG(&adapter->hw, TDFTS, adapter->tx_head_addr);
1685		E1000_WRITE_REG(&adapter->hw, TDFHS, adapter->tx_head_addr);
1686
1687		/* Re-enable TX unit */
1688		E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
1689		E1000_WRITE_FLUSH(&adapter->hw);
1690
1691		adapter->tx_fifo_head = 0;
1692		adapter->tx_fifo_reset_cnt++;
1693
1694		return(TRUE);
1695	}
1696	else {
1697		return(FALSE);
1698	}
1699}
1700
1701static void
1702em_set_promisc(struct adapter * adapter)
1703{
1704	struct ifnet	*ifp = adapter->ifp;
1705	uint32_t	reg_rctl;
1706
1707	reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1708
1709	if (ifp->if_flags & IFF_PROMISC) {
1710		reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1711		E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1712		/* Disable VLAN stripping in promiscous mode
1713		 * This enables bridging of vlan tagged frames to occur
1714		 * and also allows vlan tags to be seen in tcpdump
1715		 */
1716		if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1717			em_disable_vlans(adapter);
1718		adapter->em_insert_vlan_header = 1;
1719	} else if (ifp->if_flags & IFF_ALLMULTI) {
1720		reg_rctl |= E1000_RCTL_MPE;
1721		reg_rctl &= ~E1000_RCTL_UPE;
1722		E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1723		adapter->em_insert_vlan_header = 0;
1724	} else
1725		adapter->em_insert_vlan_header = 0;
1726}
1727
1728static void
1729em_disable_promisc(struct adapter * adapter)
1730{
1731	struct ifnet	*ifp = adapter->ifp;
1732	uint32_t	reg_rctl;
1733
1734	reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1735
1736	reg_rctl &=  (~E1000_RCTL_UPE);
1737	reg_rctl &=  (~E1000_RCTL_MPE);
1738	E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1739
1740	if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1741		em_enable_vlans(adapter);
1742	adapter->em_insert_vlan_header = 0;
1743}
1744
1745
1746/*********************************************************************
1747 *  Multicast Update
1748 *
1749 *  This routine is called whenever multicast address list is updated.
1750 *
1751 **********************************************************************/
1752
1753static void
1754em_set_multi(struct adapter * adapter)
1755{
1756        struct ifnet	*ifp = adapter->ifp;
1757        struct ifmultiaddr *ifma;
1758        uint32_t reg_rctl = 0;
1759        uint8_t  mta[MAX_NUM_MULTICAST_ADDRESSES * ETH_LENGTH_OF_ADDRESS];
1760        int mcnt = 0;
1761
1762	IOCTL_DEBUGOUT("em_set_multi: begin");
1763
1764	if (adapter->hw.mac_type == em_82542_rev2_0) {
1765		reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1766		if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1767                        em_pci_clear_mwi(&adapter->hw);
1768		reg_rctl |= E1000_RCTL_RST;
1769		E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1770		msec_delay(5);
1771	}
1772
1773	IF_ADDR_LOCK(ifp);
1774        TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1775		if (ifma->ifma_addr->sa_family != AF_LINK)
1776			continue;
1777
1778		if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1779			break;
1780
1781		bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1782		    &mta[mcnt*ETH_LENGTH_OF_ADDRESS], ETH_LENGTH_OF_ADDRESS);
1783		mcnt++;
1784	}
1785	IF_ADDR_UNLOCK(ifp);
1786
1787	if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1788		reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1789		reg_rctl |= E1000_RCTL_MPE;
1790		E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1791	} else
1792		em_mc_addr_list_update(&adapter->hw, mta, mcnt, 0, 1);
1793
1794	if (adapter->hw.mac_type == em_82542_rev2_0) {
1795		reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1796		reg_rctl &= ~E1000_RCTL_RST;
1797		E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1798		msec_delay(5);
1799		if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1800			em_pci_set_mwi(&adapter->hw);
1801	}
1802}
1803
1804
1805/*********************************************************************
1806 *  Timer routine
1807 *
1808 *  This routine checks for link status and updates statistics.
1809 *
1810 **********************************************************************/
1811
1812static void
1813em_local_timer(void *arg)
1814{
1815	struct adapter	*adapter = arg;
1816	struct ifnet	*ifp = adapter->ifp;
1817
1818	EM_LOCK(adapter);
1819
1820	em_check_for_link(&adapter->hw);
1821	em_print_link_status(adapter);
1822	em_update_stats_counters(adapter);
1823	if (em_display_debug_stats && ifp->if_drv_flags & IFF_DRV_RUNNING)
1824		em_print_hw_stats(adapter);
1825	em_smartspeed(adapter);
1826
1827	callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1828
1829	EM_UNLOCK(adapter);
1830}
1831
1832static void
1833em_print_link_status(struct adapter * adapter)
1834{
1835	struct ifnet *ifp = adapter->ifp;
1836
1837	if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
1838		if (adapter->link_active == 0) {
1839			em_get_speed_and_duplex(&adapter->hw,
1840			    &adapter->link_speed,
1841			    &adapter->link_duplex);
1842			if (bootverbose)
1843				printf("em%d: Link is up %d Mbps %s\n",
1844				    adapter->unit,
1845				    adapter->link_speed,
1846				    ((adapter->link_duplex == FULL_DUPLEX) ?
1847				    "Full Duplex" : "Half Duplex"));
1848			adapter->link_active = 1;
1849			adapter->smartspeed = 0;
1850			if_link_state_change(ifp, LINK_STATE_UP);
1851		}
1852	} else {
1853		if (adapter->link_active == 1) {
1854			adapter->link_speed = 0;
1855			adapter->link_duplex = 0;
1856			if (bootverbose)
1857				printf("em%d: Link is Down\n", adapter->unit);
1858			adapter->link_active = 0;
1859			if_link_state_change(ifp, LINK_STATE_DOWN);
1860		}
1861	}
1862}
1863
1864/*********************************************************************
1865 *
1866 *  This routine disables all traffic on the adapter by issuing a
1867 *  global reset on the MAC and deallocates TX/RX buffers.
1868 *
1869 **********************************************************************/
1870
1871static void
1872em_stop(void *arg)
1873{
1874	struct adapter	*adapter = arg;
1875	struct ifnet	*ifp = adapter->ifp;
1876
1877	EM_LOCK_ASSERT(adapter);
1878
1879	INIT_DEBUGOUT("em_stop: begin");
1880
1881	em_disable_intr(adapter);
1882	em_reset_hw(&adapter->hw);
1883	callout_stop(&adapter->timer);
1884	callout_stop(&adapter->tx_fifo_timer);
1885	em_free_transmit_structures(adapter);
1886	em_free_receive_structures(adapter);
1887
1888	/* Tell the stack that the interface is no longer active */
1889	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1890}
1891
1892
1893/*********************************************************************
1894 *
1895 *  Determine hardware revision.
1896 *
1897 **********************************************************************/
1898static void
1899em_identify_hardware(struct adapter * adapter)
1900{
1901	device_t dev = adapter->dev;
1902
1903	/* Make sure our PCI config space has the necessary stuff set */
1904	adapter->hw.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
1905	if (!((adapter->hw.pci_cmd_word & PCIM_CMD_BUSMASTEREN) &&
1906	      (adapter->hw.pci_cmd_word & PCIM_CMD_MEMEN))) {
1907		printf("em%d: Memory Access and/or Bus Master bits were not set!\n",
1908		       adapter->unit);
1909		adapter->hw.pci_cmd_word |=
1910		(PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN);
1911		pci_write_config(dev, PCIR_COMMAND, adapter->hw.pci_cmd_word, 2);
1912	}
1913
1914	/* Save off the information about this board */
1915	adapter->hw.vendor_id = pci_get_vendor(dev);
1916	adapter->hw.device_id = pci_get_device(dev);
1917	adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1);
1918	adapter->hw.subsystem_vendor_id = pci_read_config(dev, PCIR_SUBVEND_0, 2);
1919	adapter->hw.subsystem_id = pci_read_config(dev, PCIR_SUBDEV_0, 2);
1920
1921	/* Identify the MAC */
1922        if (em_set_mac_type(&adapter->hw))
1923                printf("em%d: Unknown MAC Type\n", adapter->unit);
1924
1925	if(adapter->hw.mac_type == em_82541 ||
1926	   adapter->hw.mac_type == em_82541_rev_2 ||
1927	   adapter->hw.mac_type == em_82547 ||
1928	   adapter->hw.mac_type == em_82547_rev_2)
1929		adapter->hw.phy_init_script = TRUE;
1930
1931        return;
1932}
1933
1934static int
1935em_allocate_pci_resources(struct adapter * adapter)
1936{
1937	int             val, rid;
1938	device_t        dev = adapter->dev;
1939
1940	rid = PCIR_BAR(0);
1941	adapter->res_memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
1942						     &rid, RF_ACTIVE);
1943	if (!(adapter->res_memory)) {
1944		printf("em%d: Unable to allocate bus resource: memory\n",
1945		       adapter->unit);
1946		return(ENXIO);
1947	}
1948	adapter->osdep.mem_bus_space_tag =
1949	rman_get_bustag(adapter->res_memory);
1950	adapter->osdep.mem_bus_space_handle =
1951	rman_get_bushandle(adapter->res_memory);
1952	adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
1953
1954
1955	if (adapter->hw.mac_type > em_82543) {
1956		/* Figure our where our IO BAR is ? */
1957		for (rid = PCIR_BAR(0); rid < PCIR_CIS;) {
1958			val = pci_read_config(dev, rid, 4);
1959			if (E1000_BAR_TYPE(val) == E1000_BAR_TYPE_IO) {
1960				adapter->io_rid = rid;
1961				break;
1962			}
1963			rid += 4;
1964			/* check for 64bit BAR */
1965			if (E1000_BAR_MEM_TYPE(val) == E1000_BAR_MEM_TYPE_64BIT)
1966				rid += 4;
1967		}
1968		if (rid >= PCIR_CIS) {
1969			printf("em%d: Unable to locate IO BAR\n", adapter->unit);
1970			return (ENXIO);
1971		}
1972		adapter->res_ioport = bus_alloc_resource_any(dev,
1973							     SYS_RES_IOPORT,
1974							     &adapter->io_rid,
1975							     RF_ACTIVE);
1976		if (!(adapter->res_ioport)) {
1977			printf("em%d: Unable to allocate bus resource: ioport\n",
1978			       adapter->unit);
1979			return(ENXIO);
1980		}
1981		adapter->hw.io_base = 0;
1982		adapter->osdep.io_bus_space_tag =
1983		    rman_get_bustag(adapter->res_ioport);
1984		adapter->osdep.io_bus_space_handle =
1985		    rman_get_bushandle(adapter->res_ioport);
1986	}
1987
1988	rid = 0x0;
1989	adapter->res_interrupt = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
1990						        RF_SHAREABLE |
1991							RF_ACTIVE);
1992	if (!(adapter->res_interrupt)) {
1993		printf("em%d: Unable to allocate bus resource: interrupt\n",
1994		       adapter->unit);
1995		return(ENXIO);
1996	}
1997
1998	adapter->hw.back = &adapter->osdep;
1999
2000	return(0);
2001}
2002
2003int
2004em_allocate_intr(struct adapter *adapter)
2005{
2006	device_t        dev = adapter->dev;
2007
2008	/* Manually turn off all interrupts */
2009	E1000_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
2010
2011	/*
2012	 * Try allocating a fast interrupt and the associated deferred
2013	 * processing contexts.  If that doesn't work, try just using an
2014	 * ithread.
2015	 */
2016#ifndef NO_EM_FASTINTR
2017	if (bus_setup_intr(dev, adapter->res_interrupt,
2018			   INTR_TYPE_NET | INTR_FAST, em_intr_fast, adapter,
2019			   &adapter->int_handler_tag) == 0) {
2020
2021		/* Init the deferred processing contexts. */
2022		TASK_INIT(&adapter->rxtx_task, 0, em_handle_rxtx, adapter);
2023		TASK_INIT(&adapter->link_task, 0, em_handle_link, adapter);
2024		adapter->tq = taskqueue_create_fast("em_taskq", M_NOWAIT,
2025			taskqueue_thread_enqueue,
2026			&adapter->tq);
2027		taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s taskq",
2028		    device_get_nameunit(adapter->dev));
2029	}
2030#endif
2031	if (adapter->int_handler_tag == NULL) {
2032		if (bus_setup_intr(dev, adapter->res_interrupt,
2033				   INTR_TYPE_NET | INTR_MPSAFE,
2034				   em_intr, adapter,
2035				   &adapter->int_handler_tag)) {
2036			printf("em%d: Error registering interrupt handler!\n",
2037			       adapter->unit);
2038			return(ENXIO);
2039		}
2040	}
2041
2042	em_enable_intr(adapter);
2043	return (0);
2044}
2045
2046static void
2047em_free_intr(struct adapter *adapter)
2048{
2049	device_t dev = adapter->dev;
2050
2051	if (adapter->res_interrupt != NULL) {
2052		bus_teardown_intr(dev, adapter->res_interrupt,
2053				  adapter->int_handler_tag);
2054		adapter->int_handler_tag = NULL;
2055	}
2056	if (adapter->tq != NULL) {
2057		taskqueue_drain(adapter->tq, &adapter->rxtx_task);
2058		taskqueue_drain(taskqueue_fast, &adapter->link_task);
2059		taskqueue_free(adapter->tq);
2060		adapter->tq = NULL;
2061	}
2062}
2063
2064static void
2065em_free_pci_resources(struct adapter * adapter)
2066{
2067	device_t dev = adapter->dev;
2068
2069	if (adapter->res_interrupt != NULL) {
2070		bus_release_resource(dev, SYS_RES_IRQ, 0,
2071				     adapter->res_interrupt);
2072	}
2073	if (adapter->res_memory != NULL) {
2074		bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0),
2075				     adapter->res_memory);
2076	}
2077
2078	if (adapter->res_ioport != NULL) {
2079		bus_release_resource(dev, SYS_RES_IOPORT, adapter->io_rid,
2080				     adapter->res_ioport);
2081	}
2082	return;
2083}
2084
2085/*********************************************************************
2086 *
2087 *  Initialize the hardware to a configuration as specified by the
2088 *  adapter structure. The controller is reset, the EEPROM is
2089 *  verified, the MAC address is set, then the shared initialization
2090 *  routines are called.
2091 *
2092 **********************************************************************/
2093static int
2094em_hardware_init(struct adapter * adapter)
2095{
2096	uint16_t rx_buffer_size;
2097
2098        INIT_DEBUGOUT("em_hardware_init: begin");
2099	/* Issue a global reset */
2100	em_reset_hw(&adapter->hw);
2101
2102	/* When hardware is reset, fifo_head is also reset */
2103	adapter->tx_fifo_head = 0;
2104
2105	/* Make sure we have a good EEPROM before we read from it */
2106	if (em_validate_eeprom_checksum(&adapter->hw) < 0) {
2107		printf("em%d: The EEPROM Checksum Is Not Valid\n",
2108		       adapter->unit);
2109		return(EIO);
2110	}
2111
2112	if (em_read_part_num(&adapter->hw, &(adapter->part_num)) < 0) {
2113		printf("em%d: EEPROM read error while reading part number\n",
2114		       adapter->unit);
2115		return(EIO);
2116	}
2117
2118	/*
2119	 * These parameters control the automatic generation (Tx) and
2120	 * response (Rx) to Ethernet PAUSE frames.
2121	 * - High water mark should allow for at least two frames to be
2122	 *   received after sending an XOFF.
2123	 * - Low water mark works best when it is very near the high water mark.
2124	 *   This allows the receiver to restart by sending XON when it has drained
2125	 *   a bit.  Here we use an arbitary value of 1500 which will restart after
2126	 *   one full frame is pulled from the buffer.  There could be several smaller
2127	 *   frames in the buffer and if so they will not trigger the XON until their
2128	 *   total number reduces the buffer by 1500.
2129	 * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2130	 */
2131	rx_buffer_size = ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff) << 10 );
2132
2133	adapter->hw.fc_high_water = rx_buffer_size -
2134	    roundup2(adapter->hw.max_frame_size, 1024);
2135	adapter->hw.fc_low_water = adapter->hw.fc_high_water - 1500;
2136	adapter->hw.fc_pause_time = 0x1000;
2137	adapter->hw.fc_send_xon = TRUE;
2138	adapter->hw.fc = em_fc_full;
2139
2140	if (em_init_hw(&adapter->hw) < 0) {
2141		printf("em%d: Hardware Initialization Failed",
2142		       adapter->unit);
2143		return(EIO);
2144	}
2145
2146	em_check_for_link(&adapter->hw);
2147	if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)
2148		adapter->link_active = 1;
2149	else
2150		adapter->link_active = 0;
2151
2152	if (adapter->link_active) {
2153		em_get_speed_and_duplex(&adapter->hw,
2154					&adapter->link_speed,
2155					&adapter->link_duplex);
2156	} else {
2157		adapter->link_speed = 0;
2158		adapter->link_duplex = 0;
2159	}
2160
2161	return(0);
2162}
2163
2164/*********************************************************************
2165 *
2166 *  Setup networking device structure and register an interface.
2167 *
2168 **********************************************************************/
2169static void
2170em_setup_interface(device_t dev, struct adapter * adapter)
2171{
2172	struct ifnet   *ifp;
2173	INIT_DEBUGOUT("em_setup_interface: begin");
2174
2175	ifp = adapter->ifp = if_alloc(IFT_ETHER);
2176	if (ifp == NULL)
2177		panic("%s: can not if_alloc()", device_get_nameunit(dev));
2178	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
2179	ifp->if_mtu = ETHERMTU;
2180	ifp->if_baudrate = 1000000000;
2181	ifp->if_init =  em_init;
2182	ifp->if_softc = adapter;
2183	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2184	ifp->if_ioctl = em_ioctl;
2185	ifp->if_start = em_start;
2186	ifp->if_watchdog = em_watchdog;
2187	IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 1);
2188	ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 1;
2189	IFQ_SET_READY(&ifp->if_snd);
2190
2191        ether_ifattach(ifp, adapter->hw.mac_addr);
2192
2193	ifp->if_capabilities = ifp->if_capenable = 0;
2194
2195	if (adapter->hw.mac_type >= em_82543) {
2196		ifp->if_capabilities |= IFCAP_HWCSUM;
2197		ifp->if_capenable |= IFCAP_HWCSUM;
2198	}
2199
2200	/*
2201	 * Tell the upper layer(s) we support long frames.
2202	 */
2203	ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2204	ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2205	ifp->if_capenable |= IFCAP_VLAN_MTU;
2206
2207#ifdef DEVICE_POLLING
2208	ifp->if_capabilities |= IFCAP_POLLING;
2209#endif
2210
2211	/*
2212	 * Specify the media types supported by this adapter and register
2213	 * callbacks to update media and link information
2214	 */
2215	ifmedia_init(&adapter->media, IFM_IMASK, em_media_change,
2216		     em_media_status);
2217	if (adapter->hw.media_type == em_media_type_fiber) {
2218		ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX | IFM_FDX,
2219			    0, NULL);
2220		ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX,
2221			    0, NULL);
2222	} else {
2223		ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2224		ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2225			    0, NULL);
2226		ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2227			    0, NULL);
2228		ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2229			    0, NULL);
2230		ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T | IFM_FDX,
2231			    0, NULL);
2232		ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL);
2233	}
2234	ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2235	ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2236
2237	return;
2238}
2239
2240
2241/*********************************************************************
2242 *
2243 *  Workaround for SmartSpeed on 82541 and 82547 controllers
2244 *
2245 **********************************************************************/
2246static void
2247em_smartspeed(struct adapter *adapter)
2248{
2249        uint16_t phy_tmp;
2250
2251	if(adapter->link_active || (adapter->hw.phy_type != em_phy_igp) ||
2252	   !adapter->hw.autoneg || !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
2253		return;
2254
2255        if(adapter->smartspeed == 0) {
2256                /* If Master/Slave config fault is asserted twice,
2257                 * we assume back-to-back */
2258                em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2259                if(!(phy_tmp & SR_1000T_MS_CONFIG_FAULT)) return;
2260                em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2261                if(phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2262                        em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL,
2263					&phy_tmp);
2264                        if(phy_tmp & CR_1000T_MS_ENABLE) {
2265                                phy_tmp &= ~CR_1000T_MS_ENABLE;
2266                                em_write_phy_reg(&adapter->hw,
2267                                                    PHY_1000T_CTRL, phy_tmp);
2268                                adapter->smartspeed++;
2269                                if(adapter->hw.autoneg &&
2270                                   !em_phy_setup_autoneg(&adapter->hw) &&
2271				   !em_read_phy_reg(&adapter->hw, PHY_CTRL,
2272                                                       &phy_tmp)) {
2273                                        phy_tmp |= (MII_CR_AUTO_NEG_EN |
2274                                                    MII_CR_RESTART_AUTO_NEG);
2275                                        em_write_phy_reg(&adapter->hw,
2276							 PHY_CTRL, phy_tmp);
2277                                }
2278                        }
2279                }
2280                return;
2281        } else if(adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2282                /* If still no link, perhaps using 2/3 pair cable */
2283                em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2284                phy_tmp |= CR_1000T_MS_ENABLE;
2285                em_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2286                if(adapter->hw.autoneg &&
2287                   !em_phy_setup_autoneg(&adapter->hw) &&
2288                   !em_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_tmp)) {
2289                        phy_tmp |= (MII_CR_AUTO_NEG_EN |
2290                                    MII_CR_RESTART_AUTO_NEG);
2291                        em_write_phy_reg(&adapter->hw, PHY_CTRL, phy_tmp);
2292                }
2293        }
2294        /* Restart process after EM_SMARTSPEED_MAX iterations */
2295        if(adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2296                adapter->smartspeed = 0;
2297
2298	return;
2299}
2300
2301
2302/*
2303 * Manage DMA'able memory.
2304 */
2305static void
2306em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2307{
2308        if (error)
2309                return;
2310        *(bus_addr_t *) arg = segs[0].ds_addr;
2311}
2312
2313static int
2314em_dma_malloc(struct adapter *adapter, bus_size_t size,
2315        struct em_dma_alloc *dma, int mapflags)
2316{
2317        int r;
2318
2319	r = bus_dma_tag_create(NULL,                    /* parent */
2320                               E1000_DBA_ALIGN, 0,      /* alignment, bounds */
2321                               BUS_SPACE_MAXADDR,       /* lowaddr */
2322                               BUS_SPACE_MAXADDR,       /* highaddr */
2323                               NULL, NULL,              /* filter, filterarg */
2324                               size,                    /* maxsize */
2325                               1,                       /* nsegments */
2326                               size,                    /* maxsegsize */
2327                               BUS_DMA_ALLOCNOW,        /* flags */
2328			       NULL,			/* lockfunc */
2329			       NULL,			/* lockarg */
2330                               &dma->dma_tag);
2331        if (r != 0) {
2332                printf("em%d: em_dma_malloc: bus_dma_tag_create failed; "
2333                        "error %u\n", adapter->unit, r);
2334                goto fail_0;
2335        }
2336
2337        r = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr,
2338                             BUS_DMA_NOWAIT, &dma->dma_map);
2339        if (r != 0) {
2340                printf("em%d: em_dma_malloc: bus_dmammem_alloc failed; "
2341                        "size %ju, error %d\n", adapter->unit,
2342			(uintmax_t)size, r);
2343                goto fail_2;
2344        }
2345
2346	dma->dma_paddr = 0;
2347        r = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr,
2348                            size,
2349                            em_dmamap_cb,
2350                            &dma->dma_paddr,
2351                            mapflags | BUS_DMA_NOWAIT);
2352        if (r != 0 || dma->dma_paddr == 0) {
2353                printf("em%d: em_dma_malloc: bus_dmamap_load failed; "
2354                        "error %u\n", adapter->unit, r);
2355                goto fail_3;
2356        }
2357
2358        return (0);
2359
2360fail_3:
2361        bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2362fail_2:
2363        bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2364        bus_dma_tag_destroy(dma->dma_tag);
2365fail_0:
2366        dma->dma_map = NULL;
2367        dma->dma_tag = NULL;
2368        return (r);
2369}
2370
2371static void
2372em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2373{
2374	if (dma->dma_tag == NULL)
2375		return;
2376	if (dma->dma_map != NULL) {
2377		bus_dmamap_sync(dma->dma_tag, dma->dma_map,
2378		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2379		bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2380		bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2381		dma->dma_map = NULL;
2382	}
2383        bus_dma_tag_destroy(dma->dma_tag);
2384	dma->dma_tag = NULL;
2385}
2386
2387
2388/*********************************************************************
2389 *
2390 *  Allocate memory for tx_buffer structures. The tx_buffer stores all
2391 *  the information needed to transmit a packet on the wire.
2392 *
2393 **********************************************************************/
2394static int
2395em_allocate_transmit_structures(struct adapter * adapter)
2396{
2397	if (!(adapter->tx_buffer_area =
2398	      (struct em_buffer *) malloc(sizeof(struct em_buffer) *
2399					     adapter->num_tx_desc, M_DEVBUF,
2400					     M_NOWAIT))) {
2401		printf("em%d: Unable to allocate tx_buffer memory\n",
2402		       adapter->unit);
2403		return ENOMEM;
2404	}
2405
2406	bzero(adapter->tx_buffer_area,
2407	      sizeof(struct em_buffer) * adapter->num_tx_desc);
2408
2409	return 0;
2410}
2411
2412/*********************************************************************
2413 *
2414 *  Allocate and initialize transmit structures.
2415 *
2416 **********************************************************************/
2417static int
2418em_setup_transmit_structures(struct adapter * adapter)
2419{
2420	struct em_buffer *tx_buffer;
2421	bus_size_t size;
2422	int error, i;
2423
2424        /*
2425         * Setup DMA descriptor areas.
2426         */
2427	size = roundup2(adapter->hw.max_frame_size, MCLBYTES);
2428	if ((error = bus_dma_tag_create(NULL,           /* parent */
2429                               1, 0,                    /* alignment, bounds */
2430                               BUS_SPACE_MAXADDR,       /* lowaddr */
2431                               BUS_SPACE_MAXADDR,       /* highaddr */
2432                               NULL, NULL,              /* filter, filterarg */
2433                               size,                    /* maxsize */
2434                               EM_MAX_SCATTER,          /* nsegments */
2435                               size,                    /* maxsegsize */
2436                               0,                       /* flags */
2437			       NULL,			/* lockfunc */
2438			       NULL,			/* lockarg */
2439                               &adapter->txtag)) != 0) {
2440		printf("em%d: Unable to allocate TX DMA tag\n", adapter->unit);
2441		goto fail;
2442        }
2443
2444        if ((error = em_allocate_transmit_structures(adapter)) != 0)
2445		goto fail;
2446
2447        bzero((void *) adapter->tx_desc_base,
2448              (sizeof(struct em_tx_desc)) * adapter->num_tx_desc);
2449	tx_buffer = adapter->tx_buffer_area;
2450	for (i = 0; i < adapter->num_tx_desc; i++) {
2451		error = bus_dmamap_create(adapter->txtag, 0, &tx_buffer->map);
2452		if (error != 0) {
2453			printf("em%d: Unable to create TX DMA map\n",
2454			    adapter->unit);
2455			goto fail;
2456		}
2457		tx_buffer++;
2458	}
2459
2460        adapter->next_avail_tx_desc = 0;
2461        adapter->oldest_used_tx_desc = 0;
2462
2463        /* Set number of descriptors available */
2464        adapter->num_tx_desc_avail = adapter->num_tx_desc;
2465
2466        /* Set checksum context */
2467        adapter->active_checksum_context = OFFLOAD_NONE;
2468	bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2469	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2470
2471        return (0);
2472
2473fail:
2474	em_free_transmit_structures(adapter);
2475	return (error);
2476}
2477
2478/*********************************************************************
2479 *
2480 *  Enable transmit unit.
2481 *
2482 **********************************************************************/
2483static void
2484em_initialize_transmit_unit(struct adapter * adapter)
2485{
2486	u_int32_t       reg_tctl;
2487	u_int32_t       reg_tipg = 0;
2488	u_int64_t	bus_addr;
2489
2490         INIT_DEBUGOUT("em_initialize_transmit_unit: begin");
2491	/* Setup the Base and Length of the Tx Descriptor Ring */
2492	bus_addr = adapter->txdma.dma_paddr;
2493	E1000_WRITE_REG(&adapter->hw, TDBAL, (u_int32_t)bus_addr);
2494	E1000_WRITE_REG(&adapter->hw, TDBAH, (u_int32_t)(bus_addr >> 32));
2495	E1000_WRITE_REG(&adapter->hw, TDLEN,
2496			adapter->num_tx_desc *
2497			sizeof(struct em_tx_desc));
2498
2499	/* Setup the HW Tx Head and Tail descriptor pointers */
2500	E1000_WRITE_REG(&adapter->hw, TDH, 0);
2501	E1000_WRITE_REG(&adapter->hw, TDT, 0);
2502
2503
2504	HW_DEBUGOUT2("Base = %x, Length = %x\n",
2505		     E1000_READ_REG(&adapter->hw, TDBAL),
2506		     E1000_READ_REG(&adapter->hw, TDLEN));
2507
2508	/* Set the default values for the Tx Inter Packet Gap timer */
2509	switch (adapter->hw.mac_type) {
2510	case em_82542_rev2_0:
2511        case em_82542_rev2_1:
2512                reg_tipg = DEFAULT_82542_TIPG_IPGT;
2513                reg_tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2514                reg_tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2515                break;
2516        default:
2517                if (adapter->hw.media_type == em_media_type_fiber)
2518                        reg_tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2519                else
2520                        reg_tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2521                reg_tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2522                reg_tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2523        }
2524
2525	E1000_WRITE_REG(&adapter->hw, TIPG, reg_tipg);
2526	E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay.value);
2527	if(adapter->hw.mac_type >= em_82540)
2528		E1000_WRITE_REG(&adapter->hw, TADV,
2529		    adapter->tx_abs_int_delay.value);
2530
2531	/* Program the Transmit Control Register */
2532	reg_tctl = E1000_TCTL_PSP | E1000_TCTL_EN |
2533		   (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2534	if (adapter->hw.mac_type >= em_82571)
2535		reg_tctl |= E1000_TCTL_MULR;
2536	if (adapter->link_duplex == 1) {
2537		reg_tctl |= E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT;
2538	} else {
2539		reg_tctl |= E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT;
2540	}
2541	E1000_WRITE_REG(&adapter->hw, TCTL, reg_tctl);
2542
2543	/* Setup Transmit Descriptor Settings for this adapter */
2544	adapter->txd_cmd = E1000_TXD_CMD_IFCS | E1000_TXD_CMD_RS;
2545
2546	if (adapter->tx_int_delay.value > 0)
2547		adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2548
2549	return;
2550}
2551
2552/*********************************************************************
2553 *
2554 *  Free all transmit related data structures.
2555 *
2556 **********************************************************************/
2557static void
2558em_free_transmit_structures(struct adapter * adapter)
2559{
2560        struct em_buffer   *tx_buffer;
2561        int             i;
2562
2563        INIT_DEBUGOUT("free_transmit_structures: begin");
2564
2565        if (adapter->tx_buffer_area != NULL) {
2566                tx_buffer = adapter->tx_buffer_area;
2567                for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) {
2568                        if (tx_buffer->m_head != NULL) {
2569				bus_dmamap_sync(adapter->txtag, tx_buffer->map,
2570				    BUS_DMASYNC_POSTWRITE);
2571				bus_dmamap_unload(adapter->txtag,
2572				    tx_buffer->map);
2573                                m_freem(tx_buffer->m_head);
2574				tx_buffer->m_head = NULL;
2575                        } else if (tx_buffer->map != NULL)
2576				bus_dmamap_unload(adapter->txtag,
2577				    tx_buffer->map);
2578			if (tx_buffer->map != NULL) {
2579				bus_dmamap_destroy(adapter->txtag,
2580				    tx_buffer->map);
2581				tx_buffer->map = NULL;
2582			}
2583                }
2584        }
2585        if (adapter->tx_buffer_area != NULL) {
2586                free(adapter->tx_buffer_area, M_DEVBUF);
2587                adapter->tx_buffer_area = NULL;
2588        }
2589        if (adapter->txtag != NULL) {
2590                bus_dma_tag_destroy(adapter->txtag);
2591                adapter->txtag = NULL;
2592        }
2593        return;
2594}
2595
2596/*********************************************************************
2597 *
2598 *  The offload context needs to be set when we transfer the first
2599 *  packet of a particular protocol (TCP/UDP). We change the
2600 *  context only if the protocol type changes.
2601 *
2602 **********************************************************************/
2603static void
2604em_transmit_checksum_setup(struct adapter * adapter,
2605			   struct mbuf *mp,
2606			   u_int32_t *txd_upper,
2607			   u_int32_t *txd_lower)
2608{
2609	struct em_context_desc *TXD;
2610	struct em_buffer *tx_buffer;
2611	int curr_txd;
2612
2613	if (mp->m_pkthdr.csum_flags) {
2614
2615		if (mp->m_pkthdr.csum_flags & CSUM_TCP) {
2616			*txd_upper = E1000_TXD_POPTS_TXSM << 8;
2617			*txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2618			if (adapter->active_checksum_context == OFFLOAD_TCP_IP)
2619				return;
2620			else
2621				adapter->active_checksum_context = OFFLOAD_TCP_IP;
2622
2623		} else if (mp->m_pkthdr.csum_flags & CSUM_UDP) {
2624			*txd_upper = E1000_TXD_POPTS_TXSM << 8;
2625			*txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2626			if (adapter->active_checksum_context == OFFLOAD_UDP_IP)
2627				return;
2628			else
2629				adapter->active_checksum_context = OFFLOAD_UDP_IP;
2630		} else {
2631			*txd_upper = 0;
2632			*txd_lower = 0;
2633			return;
2634		}
2635	} else {
2636		*txd_upper = 0;
2637		*txd_lower = 0;
2638		return;
2639	}
2640
2641	/* If we reach this point, the checksum offload context
2642	 * needs to be reset.
2643	 */
2644	curr_txd = adapter->next_avail_tx_desc;
2645	tx_buffer = &adapter->tx_buffer_area[curr_txd];
2646	TXD = (struct em_context_desc *) &adapter->tx_desc_base[curr_txd];
2647
2648	TXD->lower_setup.ip_fields.ipcss = ETHER_HDR_LEN;
2649	TXD->lower_setup.ip_fields.ipcso =
2650		ETHER_HDR_LEN + offsetof(struct ip, ip_sum);
2651	TXD->lower_setup.ip_fields.ipcse =
2652		htole16(ETHER_HDR_LEN + sizeof(struct ip) - 1);
2653
2654	TXD->upper_setup.tcp_fields.tucss =
2655		ETHER_HDR_LEN + sizeof(struct ip);
2656	TXD->upper_setup.tcp_fields.tucse = htole16(0);
2657
2658	if (adapter->active_checksum_context == OFFLOAD_TCP_IP) {
2659		TXD->upper_setup.tcp_fields.tucso =
2660			ETHER_HDR_LEN + sizeof(struct ip) +
2661			offsetof(struct tcphdr, th_sum);
2662	} else if (adapter->active_checksum_context == OFFLOAD_UDP_IP) {
2663		TXD->upper_setup.tcp_fields.tucso =
2664			ETHER_HDR_LEN + sizeof(struct ip) +
2665			offsetof(struct udphdr, uh_sum);
2666	}
2667
2668	TXD->tcp_seg_setup.data = htole32(0);
2669	TXD->cmd_and_length = htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT);
2670
2671	tx_buffer->m_head = NULL;
2672
2673	if (++curr_txd == adapter->num_tx_desc)
2674		curr_txd = 0;
2675
2676	adapter->num_tx_desc_avail--;
2677	adapter->next_avail_tx_desc = curr_txd;
2678
2679	return;
2680}
2681
2682/**********************************************************************
2683 *
2684 *  Examine each tx_buffer in the used queue. If the hardware is done
2685 *  processing the packet then free associated resources. The
2686 *  tx_buffer is put back on the free queue.
2687 *
2688 **********************************************************************/
2689static void
2690em_clean_transmit_interrupts(struct adapter * adapter)
2691{
2692        int i, num_avail;
2693        struct em_buffer *tx_buffer;
2694        struct em_tx_desc   *tx_desc;
2695	struct ifnet   *ifp = adapter->ifp;
2696
2697	mtx_assert(&adapter->mtx, MA_OWNED);
2698
2699        if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2700                return;
2701
2702        num_avail = adapter->num_tx_desc_avail;
2703        i = adapter->oldest_used_tx_desc;
2704
2705        tx_buffer = &adapter->tx_buffer_area[i];
2706        tx_desc = &adapter->tx_desc_base[i];
2707
2708        bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2709            BUS_DMASYNC_POSTREAD);
2710        while (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2711
2712                tx_desc->upper.data = 0;
2713                num_avail++;
2714
2715                if (tx_buffer->m_head) {
2716			ifp->if_opackets++;
2717			bus_dmamap_sync(adapter->txtag, tx_buffer->map,
2718			    BUS_DMASYNC_POSTWRITE);
2719			bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2720
2721                        m_freem(tx_buffer->m_head);
2722                        tx_buffer->m_head = NULL;
2723                }
2724
2725                if (++i == adapter->num_tx_desc)
2726                        i = 0;
2727
2728                tx_buffer = &adapter->tx_buffer_area[i];
2729                tx_desc = &adapter->tx_desc_base[i];
2730        }
2731        bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2732            BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2733
2734        adapter->oldest_used_tx_desc = i;
2735
2736        /*
2737         * If we have enough room, clear IFF_DRV_OACTIVE to tell the stack
2738         * that it is OK to send packets.
2739         * If there are no pending descriptors, clear the timeout. Otherwise,
2740         * if some descriptors have been freed, restart the timeout.
2741         */
2742        if (num_avail > EM_TX_CLEANUP_THRESHOLD) {
2743                ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2744                if (num_avail == adapter->num_tx_desc)
2745                        ifp->if_timer = 0;
2746                else if (num_avail == adapter->num_tx_desc_avail)
2747                        ifp->if_timer = EM_TX_TIMEOUT;
2748        }
2749        adapter->num_tx_desc_avail = num_avail;
2750        return;
2751}
2752
2753/*********************************************************************
2754 *
2755 *  Get a buffer from system mbuf buffer pool.
2756 *
2757 **********************************************************************/
2758static int
2759em_get_buf(int i, struct adapter *adapter, struct mbuf *mp)
2760{
2761	struct ifnet		*ifp = adapter->ifp;
2762	bus_dma_segment_t	segs[1];
2763	struct em_buffer	*rx_buffer;
2764	int			error, nsegs;
2765
2766	if (mp == NULL) {
2767		mp = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
2768		if (mp == NULL) {
2769			adapter->mbuf_cluster_failed++;
2770			return(ENOBUFS);
2771		}
2772		mp->m_len = mp->m_pkthdr.len = MCLBYTES;
2773	} else {
2774		mp->m_len = mp->m_pkthdr.len = MCLBYTES;
2775		mp->m_data = mp->m_ext.ext_buf;
2776		mp->m_next = NULL;
2777	}
2778
2779	if (ifp->if_mtu <= ETHERMTU)
2780                m_adj(mp, ETHER_ALIGN);
2781
2782	rx_buffer = &adapter->rx_buffer_area[i];
2783
2784	/*
2785	 * Using memory from the mbuf cluster pool, invoke the
2786	 * bus_dma machinery to arrange the memory mapping.
2787	 */
2788	error = bus_dmamap_load_mbuf_sg(adapter->rxtag, rx_buffer->map,
2789	    mp, segs, &nsegs, 0);
2790	if (error != 0) {
2791		m_free(mp);
2792		return (error);
2793	}
2794	/* If nsegs is wrong then the stack is corrupt. */
2795	KASSERT(nsegs == 1, ("Too many segments returned!"));
2796	rx_buffer->m_head = mp;
2797	adapter->rx_desc_base[i].buffer_addr = htole64(segs[0].ds_addr);
2798	bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD);
2799
2800	return(0);
2801}
2802
2803/*********************************************************************
2804 *
2805 *  Allocate memory for rx_buffer structures. Since we use one
2806 *  rx_buffer per received packet, the maximum number of rx_buffer's
2807 *  that we'll need is equal to the number of receive descriptors
2808 *  that we've allocated.
2809 *
2810 **********************************************************************/
2811static int
2812em_allocate_receive_structures(struct adapter * adapter)
2813{
2814        int             i, error;
2815        struct em_buffer *rx_buffer;
2816
2817        if (!(adapter->rx_buffer_area =
2818              (struct em_buffer *) malloc(sizeof(struct em_buffer) *
2819                                          adapter->num_rx_desc, M_DEVBUF,
2820                                          M_NOWAIT))) {
2821                printf("em%d: Unable to allocate rx_buffer memory\n",
2822                       adapter->unit);
2823                return(ENOMEM);
2824        }
2825
2826        bzero(adapter->rx_buffer_area,
2827              sizeof(struct em_buffer) * adapter->num_rx_desc);
2828
2829        error = bus_dma_tag_create(NULL,                /* parent */
2830                               1, 0,                    /* alignment, bounds */
2831                               BUS_SPACE_MAXADDR,       /* lowaddr */
2832                               BUS_SPACE_MAXADDR,       /* highaddr */
2833                               NULL, NULL,              /* filter, filterarg */
2834                               MCLBYTES,                /* maxsize */
2835                               1,                       /* nsegments */
2836                               MCLBYTES,                /* maxsegsize */
2837                               BUS_DMA_ALLOCNOW,        /* flags */
2838			       NULL,			/* lockfunc */
2839			       NULL,			/* lockarg */
2840                               &adapter->rxtag);
2841        if (error != 0) {
2842                printf("em%d: em_allocate_receive_structures: "
2843                        "bus_dma_tag_create failed; error %u\n",
2844                       adapter->unit, error);
2845                goto fail;
2846        }
2847
2848        rx_buffer = adapter->rx_buffer_area;
2849        for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
2850                error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT,
2851                                          &rx_buffer->map);
2852                if (error != 0) {
2853                        printf("em%d: em_allocate_receive_structures: "
2854                                "bus_dmamap_create failed; error %u\n",
2855                                adapter->unit, error);
2856                        goto fail;
2857                }
2858        }
2859
2860        for (i = 0; i < adapter->num_rx_desc; i++) {
2861                error = em_get_buf(i, adapter, NULL);
2862		if (error != 0)
2863			goto fail;
2864        }
2865        bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
2866            BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2867
2868        return(0);
2869
2870fail:
2871	em_free_receive_structures(adapter);
2872        return (error);
2873}
2874
2875/*********************************************************************
2876 *
2877 *  Allocate and initialize receive structures.
2878 *
2879 **********************************************************************/
2880static int
2881em_setup_receive_structures(struct adapter * adapter)
2882{
2883	bzero((void *) adapter->rx_desc_base,
2884              (sizeof(struct em_rx_desc)) * adapter->num_rx_desc);
2885
2886	if (em_allocate_receive_structures(adapter))
2887		return ENOMEM;
2888
2889	/* Setup our descriptor pointers */
2890        adapter->next_rx_desc_to_check = 0;
2891	return(0);
2892}
2893
2894/*********************************************************************
2895 *
2896 *  Enable receive unit.
2897 *
2898 **********************************************************************/
2899static void
2900em_initialize_receive_unit(struct adapter * adapter)
2901{
2902	u_int32_t       reg_rctl;
2903	u_int32_t       reg_rxcsum;
2904	struct ifnet    *ifp;
2905	u_int64_t	bus_addr;
2906
2907        INIT_DEBUGOUT("em_initialize_receive_unit: begin");
2908	ifp = adapter->ifp;
2909
2910	/* Make sure receives are disabled while setting up the descriptor ring */
2911	E1000_WRITE_REG(&adapter->hw, RCTL, 0);
2912
2913	/* Set the Receive Delay Timer Register */
2914	E1000_WRITE_REG(&adapter->hw, RDTR,
2915			adapter->rx_int_delay.value | E1000_RDT_FPDB);
2916
2917	if(adapter->hw.mac_type >= em_82540) {
2918		E1000_WRITE_REG(&adapter->hw, RADV,
2919		    adapter->rx_abs_int_delay.value);
2920
2921                /* Set the interrupt throttling rate.  Value is calculated
2922                 * as DEFAULT_ITR = 1/(MAX_INTS_PER_SEC * 256ns) */
2923#define MAX_INTS_PER_SEC        8000
2924#define DEFAULT_ITR             1000000000/(MAX_INTS_PER_SEC * 256)
2925                E1000_WRITE_REG(&adapter->hw, ITR, DEFAULT_ITR);
2926        }
2927
2928	/* Setup the Base and Length of the Rx Descriptor Ring */
2929	bus_addr = adapter->rxdma.dma_paddr;
2930	E1000_WRITE_REG(&adapter->hw, RDBAL, (u_int32_t)bus_addr);
2931	E1000_WRITE_REG(&adapter->hw, RDBAH, (u_int32_t)(bus_addr >> 32));
2932	E1000_WRITE_REG(&adapter->hw, RDLEN, adapter->num_rx_desc *
2933			sizeof(struct em_rx_desc));
2934
2935	/* Setup the HW Rx Head and Tail Descriptor Pointers */
2936	E1000_WRITE_REG(&adapter->hw, RDH, 0);
2937	E1000_WRITE_REG(&adapter->hw, RDT, adapter->num_rx_desc - 1);
2938
2939	/* Setup the Receive Control Register */
2940	reg_rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
2941		   E1000_RCTL_RDMTS_HALF |
2942		   (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
2943
2944	if (adapter->hw.tbi_compatibility_on == TRUE)
2945		reg_rctl |= E1000_RCTL_SBP;
2946
2947
2948	switch (adapter->rx_buffer_len) {
2949	default:
2950	case EM_RXBUFFER_2048:
2951		reg_rctl |= E1000_RCTL_SZ_2048;
2952		break;
2953	case EM_RXBUFFER_4096:
2954		reg_rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX | E1000_RCTL_LPE;
2955		break;
2956	case EM_RXBUFFER_8192:
2957		reg_rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX | E1000_RCTL_LPE;
2958		break;
2959	case EM_RXBUFFER_16384:
2960		reg_rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX | E1000_RCTL_LPE;
2961		break;
2962	}
2963
2964	if (ifp->if_mtu > ETHERMTU)
2965		reg_rctl |= E1000_RCTL_LPE;
2966
2967	/* Enable 82543 Receive Checksum Offload for TCP and UDP */
2968	if ((adapter->hw.mac_type >= em_82543) &&
2969	    (ifp->if_capenable & IFCAP_RXCSUM)) {
2970		reg_rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM);
2971		reg_rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
2972		E1000_WRITE_REG(&adapter->hw, RXCSUM, reg_rxcsum);
2973	}
2974
2975	/* Enable Receives */
2976	E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
2977
2978	return;
2979}
2980
2981/*********************************************************************
2982 *
2983 *  Free receive related data structures.
2984 *
2985 **********************************************************************/
2986static void
2987em_free_receive_structures(struct adapter *adapter)
2988{
2989        struct em_buffer   *rx_buffer;
2990        int             i;
2991
2992        INIT_DEBUGOUT("free_receive_structures: begin");
2993
2994        if (adapter->rx_buffer_area != NULL) {
2995                rx_buffer = adapter->rx_buffer_area;
2996                for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
2997			if (rx_buffer->m_head != NULL) {
2998				bus_dmamap_sync(adapter->rxtag, rx_buffer->map,
2999				    BUS_DMASYNC_POSTREAD);
3000				bus_dmamap_unload(adapter->rxtag,
3001				    rx_buffer->map);
3002				m_freem(rx_buffer->m_head);
3003				rx_buffer->m_head = NULL;
3004			} else if (rx_buffer->map != NULL)
3005				bus_dmamap_unload(adapter->rxtag,
3006				    rx_buffer->map);
3007                        if (rx_buffer->map != NULL) {
3008				bus_dmamap_destroy(adapter->rxtag,
3009				    rx_buffer->map);
3010				rx_buffer->map = NULL;
3011			}
3012                }
3013        }
3014        if (adapter->rx_buffer_area != NULL) {
3015                free(adapter->rx_buffer_area, M_DEVBUF);
3016                adapter->rx_buffer_area = NULL;
3017        }
3018        if (adapter->rxtag != NULL) {
3019                bus_dma_tag_destroy(adapter->rxtag);
3020                adapter->rxtag = NULL;
3021        }
3022        return;
3023}
3024
3025/*********************************************************************
3026 *
3027 *  This routine executes in interrupt context. It replenishes
3028 *  the mbufs in the descriptor and sends data which has been
3029 *  dma'ed into host memory to upper layer.
3030 *
3031 *  We loop at most count times if count is > 0, or until done if
3032 *  count < 0.
3033 *
3034 *********************************************************************/
3035static int
3036em_process_receive_interrupts(struct adapter * adapter, int count)
3037{
3038	struct ifnet	*ifp;
3039	struct mbuf	*mp;
3040	uint8_t		accept_frame = 0;
3041	uint8_t		eop = 0;
3042	uint16_t 	len, desc_len, prev_len_adj;
3043	int		i;
3044
3045	/* Pointer to the receive descriptor being examined. */
3046	struct em_rx_desc   *current_desc;
3047
3048	ifp = adapter->ifp;
3049	i = adapter->next_rx_desc_to_check;
3050	current_desc = &adapter->rx_desc_base[i];
3051	bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
3052	    BUS_DMASYNC_POSTREAD);
3053
3054	if (!((current_desc->status) & E1000_RXD_STAT_DD))
3055		return (0);
3056
3057	while ((current_desc->status & E1000_RXD_STAT_DD) &&
3058	    (count != 0) &&
3059	    (ifp->if_drv_flags & IFF_DRV_RUNNING)) {
3060		struct mbuf *m = NULL;
3061
3062		mp = adapter->rx_buffer_area[i].m_head;
3063		bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3064		    BUS_DMASYNC_POSTREAD);
3065		bus_dmamap_unload(adapter->rxtag,
3066		    adapter->rx_buffer_area[i].map);
3067
3068		accept_frame = 1;
3069		prev_len_adj = 0;
3070		desc_len = le16toh(current_desc->length);
3071		if (current_desc->status & E1000_RXD_STAT_EOP) {
3072			count--;
3073			eop = 1;
3074			if (desc_len < ETHER_CRC_LEN) {
3075				len = 0;
3076				prev_len_adj = ETHER_CRC_LEN - desc_len;
3077			} else
3078				len = desc_len - ETHER_CRC_LEN;
3079		} else {
3080			eop = 0;
3081			len = desc_len;
3082		}
3083
3084		if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3085			uint8_t		last_byte;
3086			uint32_t	pkt_len = desc_len;
3087
3088			if (adapter->fmp != NULL)
3089				pkt_len += adapter->fmp->m_pkthdr.len;
3090
3091			last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3092			if (TBI_ACCEPT(&adapter->hw, current_desc->status,
3093			    current_desc->errors,
3094			    pkt_len, last_byte)) {
3095				em_tbi_adjust_stats(&adapter->hw,
3096				    &adapter->stats, pkt_len,
3097				    adapter->hw.mac_addr);
3098				if (len > 0)
3099					len--;
3100			} else
3101				accept_frame = 0;
3102		}
3103
3104		if (accept_frame) {
3105			if (em_get_buf(i, adapter, NULL) == ENOBUFS) {
3106				adapter->dropped_pkts++;
3107				em_get_buf(i, adapter, mp);
3108				if (adapter->fmp != NULL)
3109					m_freem(adapter->fmp);
3110				adapter->fmp = NULL;
3111				adapter->lmp = NULL;
3112				break;
3113			}
3114
3115			/* Assign correct length to the current fragment */
3116			mp->m_len = len;
3117
3118			if (adapter->fmp == NULL) {
3119				mp->m_pkthdr.len = len;
3120				adapter->fmp = mp; /* Store the first mbuf */
3121				adapter->lmp = mp;
3122			} else {
3123				/* Chain mbuf's together */
3124				mp->m_flags &= ~M_PKTHDR;
3125				/*
3126				 * Adjust length of previous mbuf in chain if
3127				 * we received less than 4 bytes in the last
3128				 * descriptor.
3129				 */
3130				if (prev_len_adj > 0) {
3131					adapter->lmp->m_len -= prev_len_adj;
3132					adapter->fmp->m_pkthdr.len -=
3133					    prev_len_adj;
3134				}
3135				adapter->lmp->m_next = mp;
3136				adapter->lmp = adapter->lmp->m_next;
3137				adapter->fmp->m_pkthdr.len += len;
3138			}
3139
3140			if (eop) {
3141				adapter->fmp->m_pkthdr.rcvif = ifp;
3142				ifp->if_ipackets++;
3143				em_receive_checksum(adapter, current_desc,
3144				    adapter->fmp);
3145#ifndef __NO_STRICT_ALIGNMENT
3146				if (ifp->if_mtu > ETHERMTU &&
3147				    em_fixup_rx(adapter) != 0)
3148					goto skip;
3149#endif
3150				if (current_desc->status & E1000_RXD_STAT_VP)
3151					VLAN_INPUT_TAG(ifp, adapter->fmp,
3152					    (le16toh(current_desc->special) &
3153					    E1000_RXD_SPC_VLAN_MASK));
3154#ifndef __NO_STRICT_ALIGNMENT
3155skip:
3156#endif
3157				m = adapter->fmp;
3158				adapter->fmp = NULL;
3159				adapter->lmp = NULL;
3160			}
3161		} else {
3162			adapter->dropped_pkts++;
3163			em_get_buf(i, adapter, mp);
3164			if (adapter->fmp != NULL)
3165				m_freem(adapter->fmp);
3166			adapter->fmp = NULL;
3167			adapter->lmp = NULL;
3168		}
3169
3170		/* Zero out the receive descriptors status. */
3171		current_desc->status = 0;
3172		bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
3173		    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
3174
3175		/* Advance our pointers to the next descriptor. */
3176		if (++i == adapter->num_rx_desc)
3177			i = 0;
3178		if (m != NULL) {
3179			adapter->next_rx_desc_to_check = i;
3180			(*ifp->if_input)(ifp, m);
3181			i = adapter->next_rx_desc_to_check;
3182		}
3183		current_desc = &adapter->rx_desc_base[i];
3184	}
3185	adapter->next_rx_desc_to_check = i;
3186
3187	/* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3188	if (--i < 0)
3189		i = adapter->num_rx_desc - 1;
3190	E1000_WRITE_REG(&adapter->hw, RDT, i);
3191	if (!((current_desc->status) & E1000_RXD_STAT_DD))
3192		return (0);
3193
3194	return (1);
3195}
3196
3197#ifndef __NO_STRICT_ALIGNMENT
3198/*
3199 * When jumbo frames are enabled we should realign entire payload on
3200 * architecures with strict alignment. This is serious design mistake of 8254x
3201 * as it nullifies DMA operations. 8254x just allows RX buffer size to be
3202 * 2048/4096/8192/16384. What we really want is 2048 - ETHER_ALIGN to align its
3203 * payload. On architecures without strict alignment restrictions 8254x still
3204 * performs unaligned memory access which would reduce the performance too.
3205 * To avoid copying over an entire frame to align, we allocate a new mbuf and
3206 * copy ethernet header to the new mbuf. The new mbuf is prepended into the
3207 * existing mbuf chain.
3208 *
3209 * Be aware, best performance of the 8254x is achived only when jumbo frame is
3210 * not used at all on architectures with strict alignment.
3211 */
3212static int
3213em_fixup_rx(struct adapter *adapter)
3214{
3215	struct mbuf *m, *n;
3216	int error;
3217
3218	error = 0;
3219	m = adapter->fmp;
3220	if (m->m_len <= (MCLBYTES - ETHER_HDR_LEN)) {
3221		bcopy(m->m_data, m->m_data + ETHER_HDR_LEN, m->m_len);
3222		m->m_data += ETHER_HDR_LEN;
3223	} else {
3224		MGETHDR(n, M_DONTWAIT, MT_DATA);
3225		if (n != NULL) {
3226			bcopy(m->m_data, n->m_data, ETHER_HDR_LEN);
3227			m->m_data += ETHER_HDR_LEN;
3228			m->m_len -= ETHER_HDR_LEN;
3229			n->m_len = ETHER_HDR_LEN;
3230			M_MOVE_PKTHDR(n, m);
3231			n->m_next = m;
3232			adapter->fmp = n;
3233		} else {
3234			adapter->dropped_pkts++;
3235			m_freem(adapter->fmp);
3236			adapter->fmp = NULL;
3237			error = ENOMEM;
3238		}
3239	}
3240
3241	return (error);
3242}
3243#endif
3244
3245/*********************************************************************
3246 *
3247 *  Verify that the hardware indicated that the checksum is valid.
3248 *  Inform the stack about the status of checksum so that stack
3249 *  doesn't spend time verifying the checksum.
3250 *
3251 *********************************************************************/
3252static void
3253em_receive_checksum(struct adapter *adapter,
3254		    struct em_rx_desc *rx_desc,
3255		    struct mbuf *mp)
3256{
3257	/* 82543 or newer only */
3258	if ((adapter->hw.mac_type < em_82543) ||
3259	    /* Ignore Checksum bit is set */
3260	    (rx_desc->status & E1000_RXD_STAT_IXSM)) {
3261		mp->m_pkthdr.csum_flags = 0;
3262		return;
3263	}
3264
3265	if (rx_desc->status & E1000_RXD_STAT_IPCS) {
3266		/* Did it pass? */
3267		if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3268			/* IP Checksum Good */
3269			mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
3270			mp->m_pkthdr.csum_flags |= CSUM_IP_VALID;
3271
3272		} else {
3273			mp->m_pkthdr.csum_flags = 0;
3274		}
3275	}
3276
3277	if (rx_desc->status & E1000_RXD_STAT_TCPCS) {
3278		/* Did it pass? */
3279		if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3280			mp->m_pkthdr.csum_flags |=
3281			(CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
3282			mp->m_pkthdr.csum_data = htons(0xffff);
3283		}
3284	}
3285
3286	return;
3287}
3288
3289
3290static void
3291em_enable_vlans(struct adapter *adapter)
3292{
3293	uint32_t ctrl;
3294
3295	E1000_WRITE_REG(&adapter->hw, VET, ETHERTYPE_VLAN);
3296
3297	ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3298	ctrl |= E1000_CTRL_VME;
3299	E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3300
3301	return;
3302}
3303
3304static void
3305em_disable_vlans(struct adapter *adapter)
3306{
3307	uint32_t ctrl;
3308
3309	ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3310	ctrl &= ~E1000_CTRL_VME;
3311	E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3312
3313	return;
3314}
3315
3316static void
3317em_enable_intr(struct adapter * adapter)
3318{
3319	E1000_WRITE_REG(&adapter->hw, IMS, (IMS_ENABLE_MASK));
3320	return;
3321}
3322
3323static void
3324em_disable_intr(struct adapter *adapter)
3325{
3326	/*
3327	 * The first version of 82542 had an errata where when link was forced
3328	 * it would stay up even up even if the cable was disconnected.
3329	 * Sequence errors were used to detect the disconnect and then the
3330	 * driver would unforce the link. This code in the in the ISR. For this
3331	 * to work correctly the Sequence error interrupt had to be enabled
3332	 * all the time.
3333	 */
3334
3335	if (adapter->hw.mac_type == em_82542_rev2_0)
3336	    E1000_WRITE_REG(&adapter->hw, IMC,
3337	        (0xffffffff & ~E1000_IMC_RXSEQ));
3338	else
3339	    E1000_WRITE_REG(&adapter->hw, IMC,
3340	        0xffffffff);
3341	return;
3342}
3343
3344static int
3345em_is_valid_ether_addr(u_int8_t *addr)
3346{
3347        char zero_addr[6] = { 0, 0, 0, 0, 0, 0 };
3348
3349        if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) {
3350                return (FALSE);
3351        }
3352
3353        return(TRUE);
3354}
3355
3356void
3357em_write_pci_cfg(struct em_hw *hw,
3358		      uint32_t reg,
3359		      uint16_t *value)
3360{
3361	pci_write_config(((struct em_osdep *)hw->back)->dev, reg,
3362			 *value, 2);
3363}
3364
3365void
3366em_read_pci_cfg(struct em_hw *hw, uint32_t reg,
3367		     uint16_t *value)
3368{
3369	*value = pci_read_config(((struct em_osdep *)hw->back)->dev,
3370				 reg, 2);
3371	return;
3372}
3373
3374void
3375em_pci_set_mwi(struct em_hw *hw)
3376{
3377        pci_write_config(((struct em_osdep *)hw->back)->dev,
3378                         PCIR_COMMAND,
3379                         (hw->pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2);
3380        return;
3381}
3382
3383void
3384em_pci_clear_mwi(struct em_hw *hw)
3385{
3386        pci_write_config(((struct em_osdep *)hw->back)->dev,
3387                         PCIR_COMMAND,
3388                         (hw->pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2);
3389        return;
3390}
3391
3392/*********************************************************************
3393* 82544 Coexistence issue workaround.
3394*    There are 2 issues.
3395*       1. Transmit Hang issue.
3396*    To detect this issue, following equation can be used...
3397*          SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3398*          If SUM[3:0] is in between 1 to 4, we will have this issue.
3399*
3400*       2. DAC issue.
3401*    To detect this issue, following equation can be used...
3402*          SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3403*          If SUM[3:0] is in between 9 to c, we will have this issue.
3404*
3405*
3406*    WORKAROUND:
3407*          Make sure we do not have ending address as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3408*
3409*** *********************************************************************/
3410static u_int32_t
3411em_fill_descriptors (bus_addr_t address,
3412                              u_int32_t length,
3413                              PDESC_ARRAY desc_array)
3414{
3415        /* Since issue is sensitive to length and address.*/
3416        /* Let us first check the address...*/
3417        u_int32_t safe_terminator;
3418        if (length <= 4) {
3419                desc_array->descriptor[0].address = address;
3420                desc_array->descriptor[0].length = length;
3421                desc_array->elements = 1;
3422                return desc_array->elements;
3423        }
3424        safe_terminator = (u_int32_t)((((u_int32_t)address & 0x7) + (length & 0xF)) & 0xF);
3425        /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3426        if (safe_terminator == 0   ||
3427        (safe_terminator > 4   &&
3428        safe_terminator < 9)   ||
3429        (safe_terminator > 0xC &&
3430        safe_terminator <= 0xF)) {
3431                desc_array->descriptor[0].address = address;
3432                desc_array->descriptor[0].length = length;
3433                desc_array->elements = 1;
3434                return desc_array->elements;
3435        }
3436
3437        desc_array->descriptor[0].address = address;
3438        desc_array->descriptor[0].length = length - 4;
3439        desc_array->descriptor[1].address = address + (length - 4);
3440        desc_array->descriptor[1].length = 4;
3441        desc_array->elements = 2;
3442        return desc_array->elements;
3443}
3444
3445/**********************************************************************
3446 *
3447 *  Update the board statistics counters.
3448 *
3449 **********************************************************************/
3450static void
3451em_update_stats_counters(struct adapter *adapter)
3452{
3453	struct ifnet   *ifp;
3454
3455	if(adapter->hw.media_type == em_media_type_copper ||
3456	   (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
3457		adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, SYMERRS);
3458		adapter->stats.sec += E1000_READ_REG(&adapter->hw, SEC);
3459	}
3460	adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, CRCERRS);
3461	adapter->stats.mpc += E1000_READ_REG(&adapter->hw, MPC);
3462	adapter->stats.scc += E1000_READ_REG(&adapter->hw, SCC);
3463	adapter->stats.ecol += E1000_READ_REG(&adapter->hw, ECOL);
3464
3465	adapter->stats.mcc += E1000_READ_REG(&adapter->hw, MCC);
3466	adapter->stats.latecol += E1000_READ_REG(&adapter->hw, LATECOL);
3467	adapter->stats.colc += E1000_READ_REG(&adapter->hw, COLC);
3468	adapter->stats.dc += E1000_READ_REG(&adapter->hw, DC);
3469	adapter->stats.rlec += E1000_READ_REG(&adapter->hw, RLEC);
3470	adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, XONRXC);
3471	adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, XONTXC);
3472	adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, XOFFRXC);
3473	adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, XOFFTXC);
3474	adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, FCRUC);
3475	adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, PRC64);
3476	adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, PRC127);
3477	adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, PRC255);
3478	adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, PRC511);
3479	adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, PRC1023);
3480	adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, PRC1522);
3481	adapter->stats.gprc += E1000_READ_REG(&adapter->hw, GPRC);
3482	adapter->stats.bprc += E1000_READ_REG(&adapter->hw, BPRC);
3483	adapter->stats.mprc += E1000_READ_REG(&adapter->hw, MPRC);
3484	adapter->stats.gptc += E1000_READ_REG(&adapter->hw, GPTC);
3485
3486	/* For the 64-bit byte counters the low dword must be read first. */
3487	/* Both registers clear on the read of the high dword */
3488
3489	adapter->stats.gorcl += E1000_READ_REG(&adapter->hw, GORCL);
3490	adapter->stats.gorch += E1000_READ_REG(&adapter->hw, GORCH);
3491	adapter->stats.gotcl += E1000_READ_REG(&adapter->hw, GOTCL);
3492	adapter->stats.gotch += E1000_READ_REG(&adapter->hw, GOTCH);
3493
3494	adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, RNBC);
3495	adapter->stats.ruc += E1000_READ_REG(&adapter->hw, RUC);
3496	adapter->stats.rfc += E1000_READ_REG(&adapter->hw, RFC);
3497	adapter->stats.roc += E1000_READ_REG(&adapter->hw, ROC);
3498	adapter->stats.rjc += E1000_READ_REG(&adapter->hw, RJC);
3499
3500	adapter->stats.torl += E1000_READ_REG(&adapter->hw, TORL);
3501	adapter->stats.torh += E1000_READ_REG(&adapter->hw, TORH);
3502	adapter->stats.totl += E1000_READ_REG(&adapter->hw, TOTL);
3503	adapter->stats.toth += E1000_READ_REG(&adapter->hw, TOTH);
3504
3505	adapter->stats.tpr += E1000_READ_REG(&adapter->hw, TPR);
3506	adapter->stats.tpt += E1000_READ_REG(&adapter->hw, TPT);
3507	adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, PTC64);
3508	adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, PTC127);
3509	adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, PTC255);
3510	adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, PTC511);
3511	adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, PTC1023);
3512	adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, PTC1522);
3513	adapter->stats.mptc += E1000_READ_REG(&adapter->hw, MPTC);
3514	adapter->stats.bptc += E1000_READ_REG(&adapter->hw, BPTC);
3515
3516	if (adapter->hw.mac_type >= em_82543) {
3517		adapter->stats.algnerrc +=
3518		E1000_READ_REG(&adapter->hw, ALGNERRC);
3519		adapter->stats.rxerrc +=
3520		E1000_READ_REG(&adapter->hw, RXERRC);
3521		adapter->stats.tncrs +=
3522		E1000_READ_REG(&adapter->hw, TNCRS);
3523		adapter->stats.cexterr +=
3524		E1000_READ_REG(&adapter->hw, CEXTERR);
3525		adapter->stats.tsctc +=
3526		E1000_READ_REG(&adapter->hw, TSCTC);
3527		adapter->stats.tsctfc +=
3528		E1000_READ_REG(&adapter->hw, TSCTFC);
3529	}
3530	ifp = adapter->ifp;
3531
3532	ifp->if_collisions = adapter->stats.colc;
3533
3534	/* Rx Errors */
3535	ifp->if_ierrors =
3536	adapter->dropped_pkts +
3537	adapter->stats.rxerrc +
3538	adapter->stats.crcerrs +
3539	adapter->stats.algnerrc +
3540	adapter->stats.rlec +
3541	adapter->stats.mpc + adapter->stats.cexterr;
3542
3543	/* Tx Errors */
3544	ifp->if_oerrors = adapter->stats.ecol + adapter->stats.latecol +
3545	    adapter->watchdog_events;
3546
3547}
3548
3549
3550/**********************************************************************
3551 *
3552 *  This routine is called only when em_display_debug_stats is enabled.
3553 *  This routine provides a way to take a look at important statistics
3554 *  maintained by the driver and hardware.
3555 *
3556 **********************************************************************/
3557static void
3558em_print_debug_info(struct adapter *adapter)
3559{
3560	int unit = adapter->unit;
3561	uint8_t *hw_addr = adapter->hw.hw_addr;
3562
3563	printf("em%d: Adapter hardware address = %p \n", unit, hw_addr);
3564	printf("em%d: CTRL = 0x%x RCTL = 0x%x \n", unit,
3565	    E1000_READ_REG(&adapter->hw, CTRL),
3566	    E1000_READ_REG(&adapter->hw, RCTL));
3567	printf("em%d: Packet buffer = Tx=%dk Rx=%dk \n", unit,
3568	    ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff0000) >> 16),\
3569	    (E1000_READ_REG(&adapter->hw, PBA) & 0xffff) );
3570	printf("em%d: Flow control watermarks high = %d low = %d\n", unit,
3571	    adapter->hw.fc_high_water,
3572	    adapter->hw.fc_low_water);
3573	printf("em%d: tx_int_delay = %d, tx_abs_int_delay = %d\n", unit,
3574	    E1000_READ_REG(&adapter->hw, TIDV),
3575	    E1000_READ_REG(&adapter->hw, TADV));
3576	printf("em%d: rx_int_delay = %d, rx_abs_int_delay = %d\n", unit,
3577	    E1000_READ_REG(&adapter->hw, RDTR),
3578	    E1000_READ_REG(&adapter->hw, RADV));
3579	printf("em%d: fifo workaround = %lld, fifo_reset_count = %lld\n",
3580	    unit, (long long)adapter->tx_fifo_wrk_cnt,
3581	    (long long)adapter->tx_fifo_reset_cnt);
3582	printf("em%d: hw tdh = %d, hw tdt = %d\n", unit,
3583	    E1000_READ_REG(&adapter->hw, TDH),
3584	    E1000_READ_REG(&adapter->hw, TDT));
3585	printf("em%d: Num Tx descriptors avail = %d\n", unit,
3586	    adapter->num_tx_desc_avail);
3587	printf("em%d: Tx Descriptors not avail1 = %ld\n", unit,
3588	    adapter->no_tx_desc_avail1);
3589	printf("em%d: Tx Descriptors not avail2 = %ld\n", unit,
3590	    adapter->no_tx_desc_avail2);
3591	printf("em%d: Std mbuf failed = %ld\n", unit,
3592	    adapter->mbuf_alloc_failed);
3593	printf("em%d: Std mbuf cluster failed = %ld\n", unit,
3594	    adapter->mbuf_cluster_failed);
3595	printf("em%d: Driver dropped packets = %ld\n", unit,
3596	    adapter->dropped_pkts);
3597
3598	return;
3599}
3600
3601static void
3602em_print_hw_stats(struct adapter *adapter)
3603{
3604        int unit = adapter->unit;
3605
3606        printf("em%d: Excessive collisions = %lld\n", unit,
3607               (long long)adapter->stats.ecol);
3608        printf("em%d: Symbol errors = %lld\n", unit,
3609               (long long)adapter->stats.symerrs);
3610        printf("em%d: Sequence errors = %lld\n", unit,
3611               (long long)adapter->stats.sec);
3612        printf("em%d: Defer count = %lld\n", unit,
3613               (long long)adapter->stats.dc);
3614
3615        printf("em%d: Missed Packets = %lld\n", unit,
3616               (long long)adapter->stats.mpc);
3617        printf("em%d: Receive No Buffers = %lld\n", unit,
3618               (long long)adapter->stats.rnbc);
3619        printf("em%d: Receive length errors = %lld\n", unit,
3620               (long long)adapter->stats.rlec);
3621        printf("em%d: Receive errors = %lld\n", unit,
3622               (long long)adapter->stats.rxerrc);
3623        printf("em%d: Crc errors = %lld\n", unit,
3624               (long long)adapter->stats.crcerrs);
3625        printf("em%d: Alignment errors = %lld\n", unit,
3626               (long long)adapter->stats.algnerrc);
3627        printf("em%d: Carrier extension errors = %lld\n", unit,
3628               (long long)adapter->stats.cexterr);
3629	printf("em%d: RX overruns = %ld\n", unit, adapter->rx_overruns);
3630	printf("em%d: watchdog timeouts = %ld\n", unit,
3631		adapter->watchdog_events);
3632
3633        printf("em%d: XON Rcvd = %lld\n", unit,
3634               (long long)adapter->stats.xonrxc);
3635        printf("em%d: XON Xmtd = %lld\n", unit,
3636               (long long)adapter->stats.xontxc);
3637        printf("em%d: XOFF Rcvd = %lld\n", unit,
3638               (long long)adapter->stats.xoffrxc);
3639        printf("em%d: XOFF Xmtd = %lld\n", unit,
3640               (long long)adapter->stats.xofftxc);
3641
3642        printf("em%d: Good Packets Rcvd = %lld\n", unit,
3643               (long long)adapter->stats.gprc);
3644        printf("em%d: Good Packets Xmtd = %lld\n", unit,
3645               (long long)adapter->stats.gptc);
3646
3647        return;
3648}
3649
3650static int
3651em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3652{
3653        int error;
3654        int result;
3655        struct adapter *adapter;
3656
3657        result = -1;
3658        error = sysctl_handle_int(oidp, &result, 0, req);
3659
3660        if (error || !req->newptr)
3661                return (error);
3662
3663        if (result == 1) {
3664                adapter = (struct adapter *)arg1;
3665                em_print_debug_info(adapter);
3666        }
3667
3668        return error;
3669}
3670
3671
3672static int
3673em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3674{
3675        int error;
3676        int result;
3677        struct adapter *adapter;
3678
3679        result = -1;
3680        error = sysctl_handle_int(oidp, &result, 0, req);
3681
3682        if (error || !req->newptr)
3683                return (error);
3684
3685        if (result == 1) {
3686                adapter = (struct adapter *)arg1;
3687                em_print_hw_stats(adapter);
3688        }
3689
3690        return error;
3691}
3692
3693static int
3694em_sysctl_int_delay(SYSCTL_HANDLER_ARGS)
3695{
3696	struct em_int_delay_info *info;
3697	struct adapter *adapter;
3698	u_int32_t regval;
3699	int error;
3700	int usecs;
3701	int ticks;
3702
3703	info = (struct em_int_delay_info *)arg1;
3704	usecs = info->value;
3705	error = sysctl_handle_int(oidp, &usecs, 0, req);
3706	if (error != 0 || req->newptr == NULL)
3707		return error;
3708	if (usecs < 0 || usecs > E1000_TICKS_TO_USECS(65535))
3709		return EINVAL;
3710	info->value = usecs;
3711	ticks = E1000_USECS_TO_TICKS(usecs);
3712
3713	adapter = info->adapter;
3714
3715	EM_LOCK(adapter);
3716	regval = E1000_READ_OFFSET(&adapter->hw, info->offset);
3717	regval = (regval & ~0xffff) | (ticks & 0xffff);
3718	/* Handle a few special cases. */
3719	switch (info->offset) {
3720	case E1000_RDTR:
3721	case E1000_82542_RDTR:
3722		regval |= E1000_RDT_FPDB;
3723		break;
3724	case E1000_TIDV:
3725	case E1000_82542_TIDV:
3726		if (ticks == 0) {
3727			adapter->txd_cmd &= ~E1000_TXD_CMD_IDE;
3728			/* Don't write 0 into the TIDV register. */
3729			regval++;
3730		} else
3731			adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3732		break;
3733	}
3734	E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval);
3735	EM_UNLOCK(adapter);
3736	return 0;
3737}
3738
3739static void
3740em_add_int_delay_sysctl(struct adapter *adapter, const char *name,
3741    const char *description, struct em_int_delay_info *info,
3742    int offset, int value)
3743{
3744	info->adapter = adapter;
3745	info->offset = offset;
3746	info->value = value;
3747	SYSCTL_ADD_PROC(device_get_sysctl_ctx(adapter->dev),
3748	    SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)),
3749	    OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW,
3750	    info, 0, em_sysctl_int_delay, "I", description);
3751}
3752
3753#ifndef NO_EM_FASTINTR
3754static void
3755em_add_int_process_limit(struct adapter *adapter, const char *name,
3756    const char *description, int *limit, int value)
3757{
3758	*limit = value;
3759	SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev),
3760	    SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)),
3761	    OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, limit, value, description);
3762}
3763#endif
3764