if_em.c revision 153783
1/************************************************************************** 2 3Copyright (c) 2001-2005, Intel Corporation 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30POSSIBILITY OF SUCH DAMAGE. 31 32***************************************************************************/ 33 34/*$FreeBSD: head/sys/dev/em/if_em.c 153783 2005-12-28 09:37:04Z glebius $*/ 35 36#ifdef HAVE_KERNEL_OPTION_HEADERS 37#include "opt_device_polling.h" 38#endif 39 40#include <dev/em/if_em.h> 41 42/********************************************************************* 43 * Set this to one to display debug statistics 44 *********************************************************************/ 45int em_display_debug_stats = 0; 46 47/********************************************************************* 48 * Driver version 49 *********************************************************************/ 50 51char em_driver_version[] = "Version - 3.2.18"; 52 53 54/********************************************************************* 55 * PCI Device ID Table 56 * 57 * Used by probe to select devices to load on 58 * Last field stores an index into em_strings 59 * Last entry must be all 0s 60 * 61 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 62 *********************************************************************/ 63 64static em_vendor_info_t em_vendor_info_array[] = 65{ 66 /* Intel(R) PRO/1000 Network Connection */ 67 { 0x8086, E1000_DEV_ID_82540EM, PCI_ANY_ID, PCI_ANY_ID, 0}, 68 { 0x8086, E1000_DEV_ID_82540EM_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 69 { 0x8086, E1000_DEV_ID_82540EP, PCI_ANY_ID, PCI_ANY_ID, 0}, 70 { 0x8086, E1000_DEV_ID_82540EP_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 71 { 0x8086, E1000_DEV_ID_82540EP_LP, PCI_ANY_ID, PCI_ANY_ID, 0}, 72 73 { 0x8086, E1000_DEV_ID_82541EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 74 { 0x8086, E1000_DEV_ID_82541ER, PCI_ANY_ID, PCI_ANY_ID, 0}, 75 { 0x8086, E1000_DEV_ID_82541ER_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 76 { 0x8086, E1000_DEV_ID_82541EI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 77 { 0x8086, E1000_DEV_ID_82541GI, PCI_ANY_ID, PCI_ANY_ID, 0}, 78 { 0x8086, E1000_DEV_ID_82541GI_LF, PCI_ANY_ID, PCI_ANY_ID, 0}, 79 { 0x8086, E1000_DEV_ID_82541GI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 80 81 { 0x8086, E1000_DEV_ID_82542, PCI_ANY_ID, PCI_ANY_ID, 0}, 82 83 { 0x8086, E1000_DEV_ID_82543GC_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 84 { 0x8086, E1000_DEV_ID_82543GC_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 85 86 { 0x8086, E1000_DEV_ID_82544EI_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 87 { 0x8086, E1000_DEV_ID_82544EI_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 88 { 0x8086, E1000_DEV_ID_82544GC_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 89 { 0x8086, E1000_DEV_ID_82544GC_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 90 91 { 0x8086, E1000_DEV_ID_82545EM_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 92 { 0x8086, E1000_DEV_ID_82545EM_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 93 { 0x8086, E1000_DEV_ID_82545GM_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 94 { 0x8086, E1000_DEV_ID_82545GM_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 95 { 0x8086, E1000_DEV_ID_82545GM_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 96 97 { 0x8086, E1000_DEV_ID_82546EB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 98 { 0x8086, E1000_DEV_ID_82546EB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 99 { 0x8086, E1000_DEV_ID_82546EB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 100 { 0x8086, E1000_DEV_ID_82546GB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 101 { 0x8086, E1000_DEV_ID_82546GB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 102 { 0x8086, E1000_DEV_ID_82546GB_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 103 { 0x8086, E1000_DEV_ID_82546GB_PCIE, PCI_ANY_ID, PCI_ANY_ID, 0}, 104 { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 105 106 { 0x8086, E1000_DEV_ID_82547EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 107 { 0x8086, E1000_DEV_ID_82547EI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 108 { 0x8086, E1000_DEV_ID_82547GI, PCI_ANY_ID, PCI_ANY_ID, 0}, 109 110 { 0x8086, E1000_DEV_ID_82571EB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 111 { 0x8086, E1000_DEV_ID_82571EB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 112 { 0x8086, E1000_DEV_ID_82571EB_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 113 114 { 0x8086, E1000_DEV_ID_82572EI_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 115 { 0x8086, E1000_DEV_ID_82572EI_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 116 { 0x8086, E1000_DEV_ID_82572EI_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 117 118 { 0x8086, E1000_DEV_ID_82573E, PCI_ANY_ID, PCI_ANY_ID, 0}, 119 { 0x8086, E1000_DEV_ID_82573E_IAMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 120 { 0x8086, E1000_DEV_ID_82573L, PCI_ANY_ID, PCI_ANY_ID, 0}, 121 122 /* required last entry */ 123 { 0, 0, 0, 0, 0} 124}; 125 126/********************************************************************* 127 * Table of branding strings for all supported NICs. 128 *********************************************************************/ 129 130static char *em_strings[] = { 131 "Intel(R) PRO/1000 Network Connection" 132}; 133 134/********************************************************************* 135 * Function prototypes 136 *********************************************************************/ 137static int em_probe(device_t); 138static int em_attach(device_t); 139static int em_detach(device_t); 140static int em_shutdown(device_t); 141static int em_suspend(device_t); 142static int em_resume(device_t); 143static void em_intr(void *); 144static void em_start(struct ifnet *); 145static void em_start_locked(struct ifnet *ifp); 146static int em_ioctl(struct ifnet *, u_long, caddr_t); 147static void em_watchdog(struct ifnet *); 148static void em_init(void *); 149static void em_init_locked(struct adapter *); 150static void em_stop(void *); 151static void em_media_status(struct ifnet *, struct ifmediareq *); 152static int em_media_change(struct ifnet *); 153static void em_identify_hardware(struct adapter *); 154static int em_allocate_pci_resources(struct adapter *); 155static void em_free_pci_resources(struct adapter *); 156static void em_local_timer(void *); 157static int em_hardware_init(struct adapter *); 158static void em_setup_interface(device_t, struct adapter *); 159static int em_setup_transmit_structures(struct adapter *); 160static void em_initialize_transmit_unit(struct adapter *); 161static int em_setup_receive_structures(struct adapter *); 162static void em_initialize_receive_unit(struct adapter *); 163static void em_enable_intr(struct adapter *); 164static void em_disable_intr(struct adapter *); 165static void em_free_transmit_structures(struct adapter *); 166static void em_free_receive_structures(struct adapter *); 167static void em_update_stats_counters(struct adapter *); 168static void em_clean_transmit_interrupts(struct adapter *); 169static int em_allocate_receive_structures(struct adapter *); 170static int em_allocate_transmit_structures(struct adapter *); 171static void em_process_receive_interrupts(struct adapter *, int); 172#ifndef __NO_STRICT_ALIGNMENT 173static int em_fixup_rx(struct adapter *); 174#endif 175static void em_receive_checksum(struct adapter *, 176 struct em_rx_desc *, 177 struct mbuf *); 178static void em_transmit_checksum_setup(struct adapter *, 179 struct mbuf *, 180 u_int32_t *, 181 u_int32_t *); 182static void em_set_promisc(struct adapter *); 183static void em_disable_promisc(struct adapter *); 184static void em_set_multi(struct adapter *); 185static void em_print_hw_stats(struct adapter *); 186static void em_print_link_status(struct adapter *); 187static int em_get_buf(int i, struct adapter *, 188 struct mbuf *); 189static void em_enable_vlans(struct adapter *); 190static void em_disable_vlans(struct adapter *); 191static int em_encap(struct adapter *, struct mbuf **); 192static void em_smartspeed(struct adapter *); 193static int em_82547_fifo_workaround(struct adapter *, int); 194static void em_82547_update_fifo_head(struct adapter *, int); 195static int em_82547_tx_fifo_reset(struct adapter *); 196static void em_82547_move_tail(void *arg); 197static void em_82547_move_tail_locked(struct adapter *); 198static int em_dma_malloc(struct adapter *, bus_size_t, 199 struct em_dma_alloc *, int); 200static void em_dma_free(struct adapter *, struct em_dma_alloc *); 201static void em_print_debug_info(struct adapter *); 202static int em_is_valid_ether_addr(u_int8_t *); 203static int em_sysctl_stats(SYSCTL_HANDLER_ARGS); 204static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS); 205static u_int32_t em_fill_descriptors (bus_addr_t address, 206 u_int32_t length, 207 PDESC_ARRAY desc_array); 208static int em_sysctl_int_delay(SYSCTL_HANDLER_ARGS); 209static void em_add_int_delay_sysctl(struct adapter *, const char *, 210 const char *, struct em_int_delay_info *, 211 int, int); 212#ifdef DEVICE_POLLING 213static poll_handler_t em_poll; 214#endif 215 216/********************************************************************* 217 * FreeBSD Device Interface Entry Points 218 *********************************************************************/ 219 220static device_method_t em_methods[] = { 221 /* Device interface */ 222 DEVMETHOD(device_probe, em_probe), 223 DEVMETHOD(device_attach, em_attach), 224 DEVMETHOD(device_detach, em_detach), 225 DEVMETHOD(device_shutdown, em_shutdown), 226 DEVMETHOD(device_suspend, em_suspend), 227 DEVMETHOD(device_resume, em_resume), 228 {0, 0} 229}; 230 231static driver_t em_driver = { 232 "em", em_methods, sizeof(struct adapter ), 233}; 234 235static devclass_t em_devclass; 236DRIVER_MODULE(em, pci, em_driver, em_devclass, 0, 0); 237MODULE_DEPEND(em, pci, 1, 1, 1); 238MODULE_DEPEND(em, ether, 1, 1, 1); 239 240/********************************************************************* 241 * Tunable default values. 242 *********************************************************************/ 243 244#define E1000_TICKS_TO_USECS(ticks) ((1024 * (ticks) + 500) / 1000) 245#define E1000_USECS_TO_TICKS(usecs) ((1000 * (usecs) + 512) / 1024) 246 247static int em_tx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TIDV); 248static int em_rx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RDTR); 249static int em_tx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TADV); 250static int em_rx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RADV); 251static int em_rxd = EM_DEFAULT_RXD; 252static int em_txd = EM_DEFAULT_TXD; 253 254TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt); 255TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt); 256TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt); 257TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt); 258TUNABLE_INT("hw.em.rxd", &em_rxd); 259TUNABLE_INT("hw.em.txd", &em_txd); 260 261/********************************************************************* 262 * Device identification routine 263 * 264 * em_probe determines if the driver should be loaded on 265 * adapter based on PCI vendor/device id of the adapter. 266 * 267 * return BUS_PROBE_DEFAULT on success, positive on failure 268 *********************************************************************/ 269 270static int 271em_probe(device_t dev) 272{ 273 em_vendor_info_t *ent; 274 275 u_int16_t pci_vendor_id = 0; 276 u_int16_t pci_device_id = 0; 277 u_int16_t pci_subvendor_id = 0; 278 u_int16_t pci_subdevice_id = 0; 279 char adapter_name[60]; 280 281 INIT_DEBUGOUT("em_probe: begin"); 282 283 pci_vendor_id = pci_get_vendor(dev); 284 if (pci_vendor_id != EM_VENDOR_ID) 285 return(ENXIO); 286 287 pci_device_id = pci_get_device(dev); 288 pci_subvendor_id = pci_get_subvendor(dev); 289 pci_subdevice_id = pci_get_subdevice(dev); 290 291 ent = em_vendor_info_array; 292 while (ent->vendor_id != 0) { 293 if ((pci_vendor_id == ent->vendor_id) && 294 (pci_device_id == ent->device_id) && 295 296 ((pci_subvendor_id == ent->subvendor_id) || 297 (ent->subvendor_id == PCI_ANY_ID)) && 298 299 ((pci_subdevice_id == ent->subdevice_id) || 300 (ent->subdevice_id == PCI_ANY_ID))) { 301 sprintf(adapter_name, "%s %s", 302 em_strings[ent->index], 303 em_driver_version); 304 device_set_desc_copy(dev, adapter_name); 305 return(BUS_PROBE_DEFAULT); 306 } 307 ent++; 308 } 309 310 return(ENXIO); 311} 312 313/********************************************************************* 314 * Device initialization routine 315 * 316 * The attach entry point is called when the driver is being loaded. 317 * This routine identifies the type of hardware, allocates all resources 318 * and initializes the hardware. 319 * 320 * return 0 on success, positive on failure 321 *********************************************************************/ 322 323static int 324em_attach(device_t dev) 325{ 326 struct adapter * adapter; 327 int tsize, rsize; 328 int error = 0; 329 330 INIT_DEBUGOUT("em_attach: begin"); 331 332 /* Allocate, clear, and link in our adapter structure */ 333 if (!(adapter = device_get_softc(dev))) { 334 printf("em: adapter structure allocation failed\n"); 335 return(ENOMEM); 336 } 337 bzero(adapter, sizeof(struct adapter )); 338 adapter->dev = dev; 339 adapter->osdep.dev = dev; 340 adapter->unit = device_get_unit(dev); 341 EM_LOCK_INIT(adapter, device_get_nameunit(dev)); 342 343 /* SYSCTL stuff */ 344 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 345 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 346 OID_AUTO, "debug_info", CTLTYPE_INT|CTLFLAG_RW, 347 (void *)adapter, 0, 348 em_sysctl_debug_info, "I", "Debug Information"); 349 350 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 351 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 352 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, 353 (void *)adapter, 0, 354 em_sysctl_stats, "I", "Statistics"); 355 356 callout_init(&adapter->timer, CALLOUT_MPSAFE); 357 callout_init(&adapter->tx_fifo_timer, CALLOUT_MPSAFE); 358 359 /* Determine hardware revision */ 360 em_identify_hardware(adapter); 361 362 /* Set up some sysctls for the tunable interrupt delays */ 363 em_add_int_delay_sysctl(adapter, "rx_int_delay", 364 "receive interrupt delay in usecs", &adapter->rx_int_delay, 365 E1000_REG_OFFSET(&adapter->hw, RDTR), em_rx_int_delay_dflt); 366 em_add_int_delay_sysctl(adapter, "tx_int_delay", 367 "transmit interrupt delay in usecs", &adapter->tx_int_delay, 368 E1000_REG_OFFSET(&adapter->hw, TIDV), em_tx_int_delay_dflt); 369 if (adapter->hw.mac_type >= em_82540) { 370 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay", 371 "receive interrupt delay limit in usecs", 372 &adapter->rx_abs_int_delay, 373 E1000_REG_OFFSET(&adapter->hw, RADV), 374 em_rx_abs_int_delay_dflt); 375 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay", 376 "transmit interrupt delay limit in usecs", 377 &adapter->tx_abs_int_delay, 378 E1000_REG_OFFSET(&adapter->hw, TADV), 379 em_tx_abs_int_delay_dflt); 380 } 381 382 /* 383 * Validate number of transmit and receive descriptors. It 384 * must not exceed hardware maximum, and must be multiple 385 * of E1000_DBA_ALIGN. 386 */ 387 if (((em_txd * sizeof(struct em_tx_desc)) % E1000_DBA_ALIGN) != 0 || 388 (adapter->hw.mac_type >= em_82544 && em_txd > EM_MAX_TXD) || 389 (adapter->hw.mac_type < em_82544 && em_txd > EM_MAX_TXD_82543) || 390 (em_txd < EM_MIN_TXD)) { 391 printf("em%d: Using %d TX descriptors instead of %d!\n", 392 adapter->unit, EM_DEFAULT_TXD, em_txd); 393 adapter->num_tx_desc = EM_DEFAULT_TXD; 394 } else 395 adapter->num_tx_desc = em_txd; 396 if (((em_rxd * sizeof(struct em_rx_desc)) % E1000_DBA_ALIGN) != 0 || 397 (adapter->hw.mac_type >= em_82544 && em_rxd > EM_MAX_RXD) || 398 (adapter->hw.mac_type < em_82544 && em_rxd > EM_MAX_RXD_82543) || 399 (em_rxd < EM_MIN_RXD)) { 400 printf("em%d: Using %d RX descriptors instead of %d!\n", 401 adapter->unit, EM_DEFAULT_RXD, em_rxd); 402 adapter->num_rx_desc = EM_DEFAULT_RXD; 403 } else 404 adapter->num_rx_desc = em_rxd; 405 406 adapter->hw.autoneg = DO_AUTO_NEG; 407 adapter->hw.wait_autoneg_complete = WAIT_FOR_AUTO_NEG_DEFAULT; 408 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT; 409 adapter->hw.tbi_compatibility_en = TRUE; 410 adapter->rx_buffer_len = EM_RXBUFFER_2048; 411 412 adapter->hw.phy_init_script = 1; 413 adapter->hw.phy_reset_disable = FALSE; 414 415#ifndef EM_MASTER_SLAVE 416 adapter->hw.master_slave = em_ms_hw_default; 417#else 418 adapter->hw.master_slave = EM_MASTER_SLAVE; 419#endif 420 /* 421 * Set the max frame size assuming standard ethernet 422 * sized frames 423 */ 424 adapter->hw.max_frame_size = 425 ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN; 426 427 adapter->hw.min_frame_size = 428 MINIMUM_ETHERNET_PACKET_SIZE + ETHER_CRC_LEN; 429 430 /* 431 * This controls when hardware reports transmit completion 432 * status. 433 */ 434 adapter->hw.report_tx_early = 1; 435 436 437 if (em_allocate_pci_resources(adapter)) { 438 printf("em%d: Allocation of PCI resources failed\n", 439 adapter->unit); 440 error = ENXIO; 441 goto err_pci; 442 } 443 444 445 /* Initialize eeprom parameters */ 446 em_init_eeprom_params(&adapter->hw); 447 448 tsize = roundup2(adapter->num_tx_desc * sizeof(struct em_tx_desc), 449 E1000_DBA_ALIGN); 450 451 /* Allocate Transmit Descriptor ring */ 452 if (em_dma_malloc(adapter, tsize, &adapter->txdma, BUS_DMA_NOWAIT)) { 453 printf("em%d: Unable to allocate tx_desc memory\n", 454 adapter->unit); 455 error = ENOMEM; 456 goto err_tx_desc; 457 } 458 adapter->tx_desc_base = (struct em_tx_desc *) adapter->txdma.dma_vaddr; 459 460 rsize = roundup2(adapter->num_rx_desc * sizeof(struct em_rx_desc), 461 E1000_DBA_ALIGN); 462 463 /* Allocate Receive Descriptor ring */ 464 if (em_dma_malloc(adapter, rsize, &adapter->rxdma, BUS_DMA_NOWAIT)) { 465 printf("em%d: Unable to allocate rx_desc memory\n", 466 adapter->unit); 467 error = ENOMEM; 468 goto err_rx_desc; 469 } 470 adapter->rx_desc_base = (struct em_rx_desc *) adapter->rxdma.dma_vaddr; 471 472 /* Initialize the hardware */ 473 if (em_hardware_init(adapter)) { 474 printf("em%d: Unable to initialize the hardware\n", 475 adapter->unit); 476 error = EIO; 477 goto err_hw_init; 478 } 479 480 /* Copy the permanent MAC address out of the EEPROM */ 481 if (em_read_mac_addr(&adapter->hw) < 0) { 482 printf("em%d: EEPROM read error while reading mac address\n", 483 adapter->unit); 484 error = EIO; 485 goto err_mac_addr; 486 } 487 488 if (!em_is_valid_ether_addr(adapter->hw.mac_addr)) { 489 printf("em%d: Invalid mac address\n", adapter->unit); 490 error = EIO; 491 goto err_mac_addr; 492 } 493 494 /* Setup OS specific network interface */ 495 em_setup_interface(dev, adapter); 496 497 /* Initialize statistics */ 498 em_clear_hw_cntrs(&adapter->hw); 499 em_update_stats_counters(adapter); 500 adapter->hw.get_link_status = 1; 501 em_check_for_link(&adapter->hw); 502 503 if (bootverbose) { 504 /* Print the link status */ 505 if (adapter->link_active == 1) { 506 em_get_speed_and_duplex(&adapter->hw, 507 &adapter->link_speed, &adapter->link_duplex); 508 printf("em%d: Speed:%d Mbps Duplex:%s\n", 509 adapter->unit, 510 adapter->link_speed, 511 adapter->link_duplex == FULL_DUPLEX ? "Full" : 512 "Half"); 513 } else 514 printf("em%d: Speed:N/A Duplex:N/A\n", 515 adapter->unit); 516 } 517 518 /* Identify 82544 on PCIX */ 519 em_get_bus_info(&adapter->hw); 520 if(adapter->hw.bus_type == em_bus_type_pcix && 521 adapter->hw.mac_type == em_82544) { 522 adapter->pcix_82544 = TRUE; 523 } 524 else { 525 adapter->pcix_82544 = FALSE; 526 } 527 INIT_DEBUGOUT("em_attach: end"); 528 return(0); 529 530err_mac_addr: 531err_hw_init: 532 em_dma_free(adapter, &adapter->rxdma); 533err_rx_desc: 534 em_dma_free(adapter, &adapter->txdma); 535err_tx_desc: 536err_pci: 537 em_free_pci_resources(adapter); 538 EM_LOCK_DESTROY(adapter); 539 return(error); 540 541} 542 543/********************************************************************* 544 * Device removal routine 545 * 546 * The detach entry point is called when the driver is being removed. 547 * This routine stops the adapter and deallocates all the resources 548 * that were allocated for driver operation. 549 * 550 * return 0 on success, positive on failure 551 *********************************************************************/ 552 553static int 554em_detach(device_t dev) 555{ 556 struct adapter * adapter = device_get_softc(dev); 557 struct ifnet *ifp = adapter->ifp; 558 559 INIT_DEBUGOUT("em_detach: begin"); 560 561#ifdef DEVICE_POLLING 562 if (ifp->if_capenable & IFCAP_POLLING) 563 ether_poll_deregister(ifp); 564#endif 565 566 EM_LOCK(adapter); 567 adapter->in_detach = 1; 568 em_stop(adapter); 569 em_phy_hw_reset(&adapter->hw); 570 EM_UNLOCK(adapter); 571 ether_ifdetach(adapter->ifp); 572 573 em_free_pci_resources(adapter); 574 bus_generic_detach(dev); 575 if_free(ifp); 576 577 /* Free Transmit Descriptor ring */ 578 if (adapter->tx_desc_base) { 579 em_dma_free(adapter, &adapter->txdma); 580 adapter->tx_desc_base = NULL; 581 } 582 583 /* Free Receive Descriptor ring */ 584 if (adapter->rx_desc_base) { 585 em_dma_free(adapter, &adapter->rxdma); 586 adapter->rx_desc_base = NULL; 587 } 588 589 EM_LOCK_DESTROY(adapter); 590 591 return(0); 592} 593 594/********************************************************************* 595 * 596 * Shutdown entry point 597 * 598 **********************************************************************/ 599 600static int 601em_shutdown(device_t dev) 602{ 603 struct adapter *adapter = device_get_softc(dev); 604 EM_LOCK(adapter); 605 em_stop(adapter); 606 EM_UNLOCK(adapter); 607 return(0); 608} 609 610/* 611 * Suspend/resume device methods. 612 */ 613static int 614em_suspend(device_t dev) 615{ 616 struct adapter *adapter = device_get_softc(dev); 617 618 EM_LOCK(adapter); 619 em_stop(adapter); 620 EM_UNLOCK(adapter); 621 622 return bus_generic_suspend(dev); 623} 624 625static int 626em_resume(device_t dev) 627{ 628 struct adapter *adapter = device_get_softc(dev); 629 struct ifnet *ifp = adapter->ifp; 630 631 EM_LOCK(adapter); 632 em_init_locked(adapter); 633 if ((ifp->if_flags & IFF_UP) && 634 (ifp->if_drv_flags & IFF_DRV_RUNNING)) 635 em_start_locked(ifp); 636 EM_UNLOCK(adapter); 637 638 return bus_generic_resume(dev); 639} 640 641 642/********************************************************************* 643 * Transmit entry point 644 * 645 * em_start is called by the stack to initiate a transmit. 646 * The driver will remain in this routine as long as there are 647 * packets to transmit and transmit resources are available. 648 * In case resources are not available stack is notified and 649 * the packet is requeued. 650 **********************************************************************/ 651 652static void 653em_start_locked(struct ifnet *ifp) 654{ 655 struct mbuf *m_head; 656 struct adapter *adapter = ifp->if_softc; 657 658 mtx_assert(&adapter->mtx, MA_OWNED); 659 660 if (!adapter->link_active) 661 return; 662 663 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) { 664 665 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 666 667 if (m_head == NULL) break; 668 669 /* 670 * em_encap() can modify our pointer, and or make it NULL on 671 * failure. In that event, we can't requeue. 672 */ 673 if (em_encap(adapter, &m_head)) { 674 if (m_head == NULL) 675 break; 676 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 677 IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 678 break; 679 } 680 681 /* Send a copy of the frame to the BPF listener */ 682 BPF_MTAP(ifp, m_head); 683 684 /* Set timeout in case hardware has problems transmitting */ 685 ifp->if_timer = EM_TX_TIMEOUT; 686 687 } 688 return; 689} 690 691static void 692em_start(struct ifnet *ifp) 693{ 694 struct adapter *adapter = ifp->if_softc; 695 696 EM_LOCK(adapter); 697 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 698 em_start_locked(ifp); 699 EM_UNLOCK(adapter); 700 return; 701} 702 703/********************************************************************* 704 * Ioctl entry point 705 * 706 * em_ioctl is called when the user wants to configure the 707 * interface. 708 * 709 * return 0 on success, positive on failure 710 **********************************************************************/ 711 712static int 713em_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 714{ 715 struct ifreq *ifr = (struct ifreq *) data; 716 struct adapter * adapter = ifp->if_softc; 717 int error = 0; 718 719 if (adapter->in_detach) return(error); 720 721 switch (command) { 722 case SIOCSIFADDR: 723 case SIOCGIFADDR: 724 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFADDR (Get/Set Interface Addr)"); 725 ether_ioctl(ifp, command, data); 726 break; 727 case SIOCSIFMTU: 728 { 729 int max_frame_size; 730 731 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)"); 732 733 switch (adapter->hw.mac_type) { 734 case em_82571: 735 case em_82572: 736 max_frame_size = 10500; 737 break; 738 case em_82573: 739 /* 82573 does not support jumbo frames. */ 740 max_frame_size = ETHER_MAX_LEN; 741 break; 742 default: 743 max_frame_size = MAX_JUMBO_FRAME_SIZE; 744 } 745 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN - 746 ETHER_CRC_LEN) { 747 error = EINVAL; 748 break; 749 } 750 751 EM_LOCK(adapter); 752 ifp->if_mtu = ifr->ifr_mtu; 753 adapter->hw.max_frame_size = 754 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 755 em_init_locked(adapter); 756 EM_UNLOCK(adapter); 757 break; 758 } 759 case SIOCSIFFLAGS: 760 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFFLAGS (Set Interface Flags)"); 761 EM_LOCK(adapter); 762 if (ifp->if_flags & IFF_UP) { 763 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 764 em_init_locked(adapter); 765 } 766 767 em_disable_promisc(adapter); 768 em_set_promisc(adapter); 769 } else { 770 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 771 em_stop(adapter); 772 } 773 } 774 EM_UNLOCK(adapter); 775 break; 776 case SIOCADDMULTI: 777 case SIOCDELMULTI: 778 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI"); 779 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 780 EM_LOCK(adapter); 781 em_disable_intr(adapter); 782 em_set_multi(adapter); 783 if (adapter->hw.mac_type == em_82542_rev2_0) { 784 em_initialize_receive_unit(adapter); 785 } 786#ifdef DEVICE_POLLING 787 if (!(ifp->if_capenable & IFCAP_POLLING)) 788#endif 789 em_enable_intr(adapter); 790 EM_UNLOCK(adapter); 791 } 792 break; 793 case SIOCSIFMEDIA: 794 case SIOCGIFMEDIA: 795 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFMEDIA (Get/Set Interface Media)"); 796 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 797 break; 798 case SIOCSIFCAP: 799 { 800 int mask, reinit; 801 802 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)"); 803 reinit = 0; 804 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 805#ifdef DEVICE_POLLING 806 if (mask & IFCAP_POLLING) { 807 if (ifr->ifr_reqcap & IFCAP_POLLING) { 808 error = ether_poll_register(em_poll, ifp); 809 if (error) 810 return(error); 811 EM_LOCK(adapter); 812 em_disable_intr(adapter); 813 ifp->if_capenable |= IFCAP_POLLING; 814 EM_UNLOCK(adapter); 815 } else { 816 error = ether_poll_deregister(ifp); 817 /* Enable interrupt even in error case */ 818 EM_LOCK(adapter); 819 em_enable_intr(adapter); 820 ifp->if_capenable &= ~IFCAP_POLLING; 821 EM_UNLOCK(adapter); 822 } 823 } 824#endif 825 if (mask & IFCAP_HWCSUM) { 826 ifp->if_capenable ^= IFCAP_HWCSUM; 827 reinit = 1; 828 } 829 if (mask & IFCAP_VLAN_HWTAGGING) { 830 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 831 reinit = 1; 832 } 833 if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 834 em_init(adapter); 835 break; 836 } 837 default: 838 IOCTL_DEBUGOUT1("ioctl received: UNKNOWN (0x%x)", (int)command); 839 error = EINVAL; 840 } 841 842 return(error); 843} 844 845/********************************************************************* 846 * Watchdog entry point 847 * 848 * This routine is called whenever hardware quits transmitting. 849 * 850 **********************************************************************/ 851 852static void 853em_watchdog(struct ifnet *ifp) 854{ 855 struct adapter * adapter; 856 adapter = ifp->if_softc; 857 858 EM_LOCK(adapter); 859 /* If we are in this routine because of pause frames, then 860 * don't reset the hardware. 861 */ 862 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_TXOFF) { 863 ifp->if_timer = EM_TX_TIMEOUT; 864 EM_UNLOCK(adapter); 865 return; 866 } 867 868 if (em_check_for_link(&adapter->hw)) 869 printf("em%d: watchdog timeout -- resetting\n", adapter->unit); 870 871 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 872 adapter->watchdog_events++; 873 874 em_init_locked(adapter); 875 EM_UNLOCK(adapter); 876} 877 878/********************************************************************* 879 * Init entry point 880 * 881 * This routine is used in two ways. It is used by the stack as 882 * init entry point in network interface structure. It is also used 883 * by the driver as a hw/sw initialization routine to get to a 884 * consistent state. 885 * 886 * return 0 on success, positive on failure 887 **********************************************************************/ 888 889static void 890em_init_locked(struct adapter * adapter) 891{ 892 struct ifnet *ifp; 893 894 uint32_t pba; 895 ifp = adapter->ifp; 896 897 INIT_DEBUGOUT("em_init: begin"); 898 899 mtx_assert(&adapter->mtx, MA_OWNED); 900 901 em_stop(adapter); 902 903 /* 904 * Packet Buffer Allocation (PBA) 905 * Writing PBA sets the receive portion of the buffer 906 * the remainder is used for the transmit buffer. 907 */ 908 switch (adapter->hw.mac_type) { 909 case em_82547: 910 case em_82547_rev_2: /* 82547: Total Packet Buffer is 40K */ 911 if (adapter->hw.max_frame_size > EM_RXBUFFER_8192) 912 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */ 913 else 914 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */ 915 adapter->tx_fifo_head = 0; 916 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT; 917 adapter->tx_fifo_size = (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT; 918 break; 919 case em_82571: /* 82571: Total Packet Buffer is 48K */ 920 case em_82572: /* 82572: Total Packet Buffer is 48K */ 921 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */ 922 break; 923 case em_82573: /* 82573: Total Packet Buffer is 32K */ 924 /* Jumbo frames not supported */ 925 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */ 926 break; 927 default: 928 /* Devices before 82547 had a Packet Buffer of 64K. */ 929 if(adapter->hw.max_frame_size > EM_RXBUFFER_8192) 930 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */ 931 else 932 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */ 933 } 934 935 INIT_DEBUGOUT1("em_init: pba=%dK",pba); 936 E1000_WRITE_REG(&adapter->hw, PBA, pba); 937 938 /* Get the latest mac address, User can use a LAA */ 939 bcopy(IF_LLADDR(adapter->ifp), adapter->hw.mac_addr, 940 ETHER_ADDR_LEN); 941 942 /* Initialize the hardware */ 943 if (em_hardware_init(adapter)) { 944 printf("em%d: Unable to initialize the hardware\n", 945 adapter->unit); 946 return; 947 } 948 949 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) 950 em_enable_vlans(adapter); 951 952 /* Prepare transmit descriptors and buffers */ 953 if (em_setup_transmit_structures(adapter)) { 954 printf("em%d: Could not setup transmit structures\n", 955 adapter->unit); 956 em_stop(adapter); 957 return; 958 } 959 em_initialize_transmit_unit(adapter); 960 961 /* Setup Multicast table */ 962 em_set_multi(adapter); 963 964 /* Prepare receive descriptors and buffers */ 965 if (em_setup_receive_structures(adapter)) { 966 printf("em%d: Could not setup receive structures\n", 967 adapter->unit); 968 em_stop(adapter); 969 return; 970 } 971 em_initialize_receive_unit(adapter); 972 973 /* Don't loose promiscuous settings */ 974 em_set_promisc(adapter); 975 976 ifp->if_drv_flags |= IFF_DRV_RUNNING; 977 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 978 979 if (adapter->hw.mac_type >= em_82543) { 980 if (ifp->if_capenable & IFCAP_TXCSUM) 981 ifp->if_hwassist = EM_CHECKSUM_FEATURES; 982 else 983 ifp->if_hwassist = 0; 984 } 985 986 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 987 em_clear_hw_cntrs(&adapter->hw); 988#ifdef DEVICE_POLLING 989 /* 990 * Only enable interrupts if we are not polling, make sure 991 * they are off otherwise. 992 */ 993 if (ifp->if_capenable & IFCAP_POLLING) 994 em_disable_intr(adapter); 995 else 996#endif /* DEVICE_POLLING */ 997 em_enable_intr(adapter); 998 999 /* Don't reset the phy next time init gets called */ 1000 adapter->hw.phy_reset_disable = TRUE; 1001 1002 return; 1003} 1004 1005static void 1006em_init(void *arg) 1007{ 1008 struct adapter * adapter = arg; 1009 1010 EM_LOCK(adapter); 1011 em_init_locked(adapter); 1012 EM_UNLOCK(adapter); 1013 return; 1014} 1015 1016 1017#ifdef DEVICE_POLLING 1018static void 1019em_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count) 1020{ 1021 struct adapter *adapter = ifp->if_softc; 1022 u_int32_t reg_icr; 1023 1024 mtx_assert(&adapter->mtx, MA_OWNED); 1025 1026 if (cmd == POLL_AND_CHECK_STATUS) { 1027 reg_icr = E1000_READ_REG(&adapter->hw, ICR); 1028 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1029 callout_stop(&adapter->timer); 1030 adapter->hw.get_link_status = 1; 1031 em_check_for_link(&adapter->hw); 1032 em_print_link_status(adapter); 1033 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1034 } 1035 } 1036 em_process_receive_interrupts(adapter, count); 1037 em_clean_transmit_interrupts(adapter); 1038 1039 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1040 em_start_locked(ifp); 1041} 1042 1043static void 1044em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1045{ 1046 struct adapter *adapter = ifp->if_softc; 1047 1048 EM_LOCK(adapter); 1049 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1050 em_poll_locked(ifp, cmd, count); 1051 EM_UNLOCK(adapter); 1052} 1053#endif /* DEVICE_POLLING */ 1054 1055/********************************************************************* 1056 * 1057 * Interrupt Service routine 1058 * 1059 **********************************************************************/ 1060static void 1061em_intr(void *arg) 1062{ 1063 struct adapter *adapter = arg; 1064 struct ifnet *ifp; 1065 uint32_t reg_icr; 1066 int wantinit = 0; 1067 1068 EM_LOCK(adapter); 1069 1070 ifp = adapter->ifp; 1071 1072#ifdef DEVICE_POLLING 1073 if (ifp->if_capenable & IFCAP_POLLING) { 1074 EM_UNLOCK(adapter); 1075 return; 1076 } 1077#endif /* DEVICE_POLLING */ 1078 1079 for (;;) { 1080 reg_icr = E1000_READ_REG(&adapter->hw, ICR); 1081 if (adapter->hw.mac_type >= em_82571 && 1082 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) 1083 break; 1084 else if (reg_icr == 0) 1085 break; 1086 1087 /* 1088 * XXX: some laptops trigger several spurious interrupts 1089 * on em(4) when in the resume cycle. The ICR register 1090 * reports all-ones value in this case. Processing such 1091 * interrupts would lead to a freeze. I don't know why. 1092 */ 1093 if (reg_icr == 0xffffffff) 1094 break; 1095 1096 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1097 em_process_receive_interrupts(adapter, -1); 1098 em_clean_transmit_interrupts(adapter); 1099 } 1100 1101 /* Link status change */ 1102 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1103 callout_stop(&adapter->timer); 1104 adapter->hw.get_link_status = 1; 1105 em_check_for_link(&adapter->hw); 1106 em_print_link_status(adapter); 1107 callout_reset(&adapter->timer, hz, em_local_timer, 1108 adapter); 1109 } 1110 1111 if (reg_icr & E1000_ICR_RXO) { 1112 adapter->rx_overruns++; 1113 wantinit = 1; 1114 } 1115 } 1116#if 0 1117 if (wantinit) 1118 em_init_locked(adapter); 1119#endif 1120 if (ifp->if_drv_flags & IFF_DRV_RUNNING && 1121 !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1122 em_start_locked(ifp); 1123 1124 EM_UNLOCK(adapter); 1125 return; 1126} 1127 1128 1129 1130/********************************************************************* 1131 * 1132 * Media Ioctl callback 1133 * 1134 * This routine is called whenever the user queries the status of 1135 * the interface using ifconfig. 1136 * 1137 **********************************************************************/ 1138static void 1139em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1140{ 1141 struct adapter * adapter = ifp->if_softc; 1142 1143 INIT_DEBUGOUT("em_media_status: begin"); 1144 1145 em_check_for_link(&adapter->hw); 1146 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) { 1147 if (adapter->link_active == 0) { 1148 em_get_speed_and_duplex(&adapter->hw, 1149 &adapter->link_speed, 1150 &adapter->link_duplex); 1151 adapter->link_active = 1; 1152 } 1153 } else { 1154 if (adapter->link_active == 1) { 1155 adapter->link_speed = 0; 1156 adapter->link_duplex = 0; 1157 adapter->link_active = 0; 1158 } 1159 } 1160 1161 ifmr->ifm_status = IFM_AVALID; 1162 ifmr->ifm_active = IFM_ETHER; 1163 1164 if (!adapter->link_active) 1165 return; 1166 1167 ifmr->ifm_status |= IFM_ACTIVE; 1168 1169 if (adapter->hw.media_type == em_media_type_fiber) { 1170 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 1171 } else { 1172 switch (adapter->link_speed) { 1173 case 10: 1174 ifmr->ifm_active |= IFM_10_T; 1175 break; 1176 case 100: 1177 ifmr->ifm_active |= IFM_100_TX; 1178 break; 1179 case 1000: 1180 ifmr->ifm_active |= IFM_1000_T; 1181 break; 1182 } 1183 if (adapter->link_duplex == FULL_DUPLEX) 1184 ifmr->ifm_active |= IFM_FDX; 1185 else 1186 ifmr->ifm_active |= IFM_HDX; 1187 } 1188 return; 1189} 1190 1191/********************************************************************* 1192 * 1193 * Media Ioctl callback 1194 * 1195 * This routine is called when the user changes speed/duplex using 1196 * media/mediopt option with ifconfig. 1197 * 1198 **********************************************************************/ 1199static int 1200em_media_change(struct ifnet *ifp) 1201{ 1202 struct adapter * adapter = ifp->if_softc; 1203 struct ifmedia *ifm = &adapter->media; 1204 1205 INIT_DEBUGOUT("em_media_change: begin"); 1206 1207 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1208 return(EINVAL); 1209 1210 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1211 case IFM_AUTO: 1212 adapter->hw.autoneg = DO_AUTO_NEG; 1213 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT; 1214 break; 1215 case IFM_1000_SX: 1216 case IFM_1000_T: 1217 adapter->hw.autoneg = DO_AUTO_NEG; 1218 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; 1219 break; 1220 case IFM_100_TX: 1221 adapter->hw.autoneg = FALSE; 1222 adapter->hw.autoneg_advertised = 0; 1223 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1224 adapter->hw.forced_speed_duplex = em_100_full; 1225 else 1226 adapter->hw.forced_speed_duplex = em_100_half; 1227 break; 1228 case IFM_10_T: 1229 adapter->hw.autoneg = FALSE; 1230 adapter->hw.autoneg_advertised = 0; 1231 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1232 adapter->hw.forced_speed_duplex = em_10_full; 1233 else 1234 adapter->hw.forced_speed_duplex = em_10_half; 1235 break; 1236 default: 1237 printf("em%d: Unsupported media type\n", adapter->unit); 1238 } 1239 1240 /* As the speed/duplex settings my have changed we need to 1241 * reset the PHY. 1242 */ 1243 adapter->hw.phy_reset_disable = FALSE; 1244 1245 em_init(adapter); 1246 1247 return(0); 1248} 1249 1250/********************************************************************* 1251 * 1252 * This routine maps the mbufs to tx descriptors. 1253 * 1254 * return 0 on success, positive on failure 1255 **********************************************************************/ 1256static int 1257em_encap(struct adapter *adapter, struct mbuf **m_headp) 1258{ 1259 u_int32_t txd_upper; 1260 u_int32_t txd_lower, txd_used = 0, txd_saved = 0; 1261 int i, j, error = 0; 1262 bus_dmamap_t map; 1263 1264 struct mbuf *m_head; 1265 1266 /* For 82544 Workaround */ 1267 DESC_ARRAY desc_array; 1268 u_int32_t array_elements; 1269 u_int32_t counter; 1270 struct m_tag *mtag; 1271 bus_dma_segment_t segs[EM_MAX_SCATTER]; 1272 int nsegs; 1273 struct em_buffer *tx_buffer; 1274 struct em_tx_desc *current_tx_desc = NULL; 1275 struct ifnet *ifp = adapter->ifp; 1276 1277 m_head = *m_headp; 1278 1279 /* 1280 * Force a cleanup if number of TX descriptors 1281 * available hits the threshold 1282 */ 1283 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) { 1284 em_clean_transmit_interrupts(adapter); 1285 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) { 1286 adapter->no_tx_desc_avail1++; 1287 return(ENOBUFS); 1288 } 1289 } 1290 1291 /* 1292 * Map the packet for DMA. 1293 */ 1294 tx_buffer = &adapter->tx_buffer_area[adapter->next_avail_tx_desc]; 1295 error = bus_dmamap_load_mbuf_sg(adapter->txtag, tx_buffer->map, m_head, 1296 segs, &nsegs, BUS_DMA_NOWAIT); 1297 map = tx_buffer->map; 1298 if (error != 0) { 1299 adapter->no_tx_dma_setup++; 1300 return (error); 1301 } 1302 KASSERT(nsegs != 0, ("em_encap: empty packet")); 1303 1304 if (nsegs > adapter->num_tx_desc_avail) { 1305 adapter->no_tx_desc_avail2++; 1306 error = ENOBUFS; 1307 goto encap_fail; 1308 } 1309 1310 1311 if (ifp->if_hwassist > 0) { 1312 em_transmit_checksum_setup(adapter, m_head, 1313 &txd_upper, &txd_lower); 1314 } else 1315 txd_upper = txd_lower = 0; 1316 1317 1318 /* Find out if we are in vlan mode */ 1319 mtag = VLAN_OUTPUT_TAG(ifp, m_head); 1320 1321 /* 1322 * When operating in promiscuous mode, hardware encapsulation for 1323 * packets is disabled. This means we have to add the vlan 1324 * encapsulation in the driver, since it will have come down from the 1325 * VLAN layer with a tag instead of a VLAN header. 1326 */ 1327 if (mtag != NULL && adapter->em_insert_vlan_header) { 1328 struct ether_vlan_header *evl; 1329 struct ether_header eh; 1330 1331 m_head = m_pullup(m_head, sizeof(eh)); 1332 if (m_head == NULL) { 1333 *m_headp = NULL; 1334 error = ENOBUFS; 1335 goto encap_fail; 1336 } 1337 eh = *mtod(m_head, struct ether_header *); 1338 M_PREPEND(m_head, sizeof(*evl), M_DONTWAIT); 1339 if (m_head == NULL) { 1340 *m_headp = NULL; 1341 error = ENOBUFS; 1342 goto encap_fail; 1343 } 1344 m_head = m_pullup(m_head, sizeof(*evl)); 1345 if (m_head == NULL) { 1346 *m_headp = NULL; 1347 error = ENOBUFS; 1348 goto encap_fail; 1349 } 1350 evl = mtod(m_head, struct ether_vlan_header *); 1351 bcopy(&eh, evl, sizeof(*evl)); 1352 evl->evl_proto = evl->evl_encap_proto; 1353 evl->evl_encap_proto = htons(ETHERTYPE_VLAN); 1354 evl->evl_tag = htons(VLAN_TAG_VALUE(mtag)); 1355 m_tag_delete(m_head, mtag); 1356 mtag = NULL; 1357 *m_headp = m_head; 1358 } 1359 1360 i = adapter->next_avail_tx_desc; 1361 if (adapter->pcix_82544) { 1362 txd_saved = i; 1363 txd_used = 0; 1364 } 1365 for (j = 0; j < nsegs; j++) { 1366 /* If adapter is 82544 and on PCIX bus */ 1367 if(adapter->pcix_82544) { 1368 /* 1369 * Check the Address and Length combination and 1370 * split the data accordingly 1371 */ 1372 array_elements = em_fill_descriptors(segs[j].ds_addr, 1373 segs[j].ds_len, &desc_array); 1374 for (counter = 0; counter < array_elements; counter++) { 1375 if (txd_used == adapter->num_tx_desc_avail) { 1376 adapter->next_avail_tx_desc = txd_saved; 1377 adapter->no_tx_desc_avail2++; 1378 error = ENOBUFS; 1379 goto encap_fail; 1380 } 1381 tx_buffer = &adapter->tx_buffer_area[i]; 1382 current_tx_desc = &adapter->tx_desc_base[i]; 1383 current_tx_desc->buffer_addr = htole64( 1384 desc_array.descriptor[counter].address); 1385 current_tx_desc->lower.data = htole32( 1386 (adapter->txd_cmd | txd_lower | 1387 (u_int16_t)desc_array.descriptor[counter].length)); 1388 current_tx_desc->upper.data = htole32((txd_upper)); 1389 if (++i == adapter->num_tx_desc) 1390 i = 0; 1391 1392 tx_buffer->m_head = NULL; 1393 txd_used++; 1394 } 1395 } else { 1396 tx_buffer = &adapter->tx_buffer_area[i]; 1397 current_tx_desc = &adapter->tx_desc_base[i]; 1398 1399 current_tx_desc->buffer_addr = htole64(segs[j].ds_addr); 1400 current_tx_desc->lower.data = htole32( 1401 adapter->txd_cmd | txd_lower | segs[j].ds_len); 1402 current_tx_desc->upper.data = htole32(txd_upper); 1403 1404 if (++i == adapter->num_tx_desc) 1405 i = 0; 1406 1407 tx_buffer->m_head = NULL; 1408 } 1409 } 1410 1411 adapter->next_avail_tx_desc = i; 1412 if (adapter->pcix_82544) { 1413 adapter->num_tx_desc_avail -= txd_used; 1414 } 1415 else { 1416 adapter->num_tx_desc_avail -= nsegs; 1417 } 1418 1419 if (mtag != NULL) { 1420 /* Set the vlan id */ 1421 current_tx_desc->upper.fields.special = htole16(VLAN_TAG_VALUE(mtag)); 1422 1423 /* Tell hardware to add tag */ 1424 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_VLE); 1425 } 1426 1427 tx_buffer->m_head = m_head; 1428 bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE); 1429 1430 /* 1431 * Last Descriptor of Packet needs End Of Packet (EOP) 1432 */ 1433 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_EOP); 1434 1435 /* 1436 * Advance the Transmit Descriptor Tail (Tdt), this tells the E1000 1437 * that this frame is available to transmit. 1438 */ 1439 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 1440 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1441 if (adapter->hw.mac_type == em_82547 && 1442 adapter->link_duplex == HALF_DUPLEX) { 1443 em_82547_move_tail_locked(adapter); 1444 } else { 1445 E1000_WRITE_REG(&adapter->hw, TDT, i); 1446 if (adapter->hw.mac_type == em_82547) { 1447 em_82547_update_fifo_head(adapter, m_head->m_pkthdr.len); 1448 } 1449 } 1450 1451 return(0); 1452 1453encap_fail: 1454 bus_dmamap_unload(adapter->txtag, tx_buffer->map); 1455 return (error); 1456} 1457 1458/********************************************************************* 1459 * 1460 * 82547 workaround to avoid controller hang in half-duplex environment. 1461 * The workaround is to avoid queuing a large packet that would span 1462 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers 1463 * in this case. We do that only when FIFO is quiescent. 1464 * 1465 **********************************************************************/ 1466static void 1467em_82547_move_tail_locked(struct adapter *adapter) 1468{ 1469 uint16_t hw_tdt; 1470 uint16_t sw_tdt; 1471 struct em_tx_desc *tx_desc; 1472 uint16_t length = 0; 1473 boolean_t eop = 0; 1474 1475 EM_LOCK_ASSERT(adapter); 1476 1477 hw_tdt = E1000_READ_REG(&adapter->hw, TDT); 1478 sw_tdt = adapter->next_avail_tx_desc; 1479 1480 while (hw_tdt != sw_tdt) { 1481 tx_desc = &adapter->tx_desc_base[hw_tdt]; 1482 length += tx_desc->lower.flags.length; 1483 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP; 1484 if(++hw_tdt == adapter->num_tx_desc) 1485 hw_tdt = 0; 1486 1487 if(eop) { 1488 if (em_82547_fifo_workaround(adapter, length)) { 1489 adapter->tx_fifo_wrk_cnt++; 1490 callout_reset(&adapter->tx_fifo_timer, 1, 1491 em_82547_move_tail, adapter); 1492 break; 1493 } 1494 E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt); 1495 em_82547_update_fifo_head(adapter, length); 1496 length = 0; 1497 } 1498 } 1499 return; 1500} 1501 1502static void 1503em_82547_move_tail(void *arg) 1504{ 1505 struct adapter *adapter = arg; 1506 1507 EM_LOCK(adapter); 1508 em_82547_move_tail_locked(adapter); 1509 EM_UNLOCK(adapter); 1510} 1511 1512static int 1513em_82547_fifo_workaround(struct adapter *adapter, int len) 1514{ 1515 int fifo_space, fifo_pkt_len; 1516 1517 fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR); 1518 1519 if (adapter->link_duplex == HALF_DUPLEX) { 1520 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; 1521 1522 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) { 1523 if (em_82547_tx_fifo_reset(adapter)) { 1524 return(0); 1525 } 1526 else { 1527 return(1); 1528 } 1529 } 1530 } 1531 1532 return(0); 1533} 1534 1535static void 1536em_82547_update_fifo_head(struct adapter *adapter, int len) 1537{ 1538 int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR); 1539 1540 /* tx_fifo_head is always 16 byte aligned */ 1541 adapter->tx_fifo_head += fifo_pkt_len; 1542 if (adapter->tx_fifo_head >= adapter->tx_fifo_size) { 1543 adapter->tx_fifo_head -= adapter->tx_fifo_size; 1544 } 1545 1546 return; 1547} 1548 1549 1550static int 1551em_82547_tx_fifo_reset(struct adapter *adapter) 1552{ 1553 uint32_t tctl; 1554 1555 if ( (E1000_READ_REG(&adapter->hw, TDT) == 1556 E1000_READ_REG(&adapter->hw, TDH)) && 1557 (E1000_READ_REG(&adapter->hw, TDFT) == 1558 E1000_READ_REG(&adapter->hw, TDFH)) && 1559 (E1000_READ_REG(&adapter->hw, TDFTS) == 1560 E1000_READ_REG(&adapter->hw, TDFHS)) && 1561 (E1000_READ_REG(&adapter->hw, TDFPC) == 0)) { 1562 1563 /* Disable TX unit */ 1564 tctl = E1000_READ_REG(&adapter->hw, TCTL); 1565 E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN); 1566 1567 /* Reset FIFO pointers */ 1568 E1000_WRITE_REG(&adapter->hw, TDFT, adapter->tx_head_addr); 1569 E1000_WRITE_REG(&adapter->hw, TDFH, adapter->tx_head_addr); 1570 E1000_WRITE_REG(&adapter->hw, TDFTS, adapter->tx_head_addr); 1571 E1000_WRITE_REG(&adapter->hw, TDFHS, adapter->tx_head_addr); 1572 1573 /* Re-enable TX unit */ 1574 E1000_WRITE_REG(&adapter->hw, TCTL, tctl); 1575 E1000_WRITE_FLUSH(&adapter->hw); 1576 1577 adapter->tx_fifo_head = 0; 1578 adapter->tx_fifo_reset_cnt++; 1579 1580 return(TRUE); 1581 } 1582 else { 1583 return(FALSE); 1584 } 1585} 1586 1587static void 1588em_set_promisc(struct adapter * adapter) 1589{ 1590 1591 u_int32_t reg_rctl; 1592 struct ifnet *ifp = adapter->ifp; 1593 1594 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1595 1596 if (ifp->if_flags & IFF_PROMISC) { 1597 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 1598 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1599 /* Disable VLAN stripping in promiscous mode 1600 * This enables bridging of vlan tagged frames to occur 1601 * and also allows vlan tags to be seen in tcpdump 1602 */ 1603 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) 1604 em_disable_vlans(adapter); 1605 adapter->em_insert_vlan_header = 1; 1606 } else if (ifp->if_flags & IFF_ALLMULTI) { 1607 reg_rctl |= E1000_RCTL_MPE; 1608 reg_rctl &= ~E1000_RCTL_UPE; 1609 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1610 adapter->em_insert_vlan_header = 0; 1611 } else 1612 adapter->em_insert_vlan_header = 0; 1613 1614 return; 1615} 1616 1617static void 1618em_disable_promisc(struct adapter * adapter) 1619{ 1620 u_int32_t reg_rctl; 1621 struct ifnet *ifp = adapter->ifp; 1622 1623 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1624 1625 reg_rctl &= (~E1000_RCTL_UPE); 1626 reg_rctl &= (~E1000_RCTL_MPE); 1627 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1628 1629 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) 1630 em_enable_vlans(adapter); 1631 adapter->em_insert_vlan_header = 0; 1632 1633 return; 1634} 1635 1636 1637/********************************************************************* 1638 * Multicast Update 1639 * 1640 * This routine is called whenever multicast address list is updated. 1641 * 1642 **********************************************************************/ 1643 1644static void 1645em_set_multi(struct adapter * adapter) 1646{ 1647 u_int32_t reg_rctl = 0; 1648 u_int8_t mta[MAX_NUM_MULTICAST_ADDRESSES * ETH_LENGTH_OF_ADDRESS]; 1649 struct ifmultiaddr *ifma; 1650 int mcnt = 0; 1651 struct ifnet *ifp = adapter->ifp; 1652 1653 IOCTL_DEBUGOUT("em_set_multi: begin"); 1654 1655 if (adapter->hw.mac_type == em_82542_rev2_0) { 1656 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1657 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) { 1658 em_pci_clear_mwi(&adapter->hw); 1659 } 1660 reg_rctl |= E1000_RCTL_RST; 1661 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1662 msec_delay(5); 1663 } 1664 1665 IF_ADDR_LOCK(ifp); 1666 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1667 if (ifma->ifma_addr->sa_family != AF_LINK) 1668 continue; 1669 1670 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) break; 1671 1672 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1673 &mta[mcnt*ETH_LENGTH_OF_ADDRESS], ETH_LENGTH_OF_ADDRESS); 1674 mcnt++; 1675 } 1676 IF_ADDR_UNLOCK(ifp); 1677 1678 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) { 1679 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1680 reg_rctl |= E1000_RCTL_MPE; 1681 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1682 } else 1683 em_mc_addr_list_update(&adapter->hw, mta, mcnt, 0, 1); 1684 1685 if (adapter->hw.mac_type == em_82542_rev2_0) { 1686 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1687 reg_rctl &= ~E1000_RCTL_RST; 1688 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1689 msec_delay(5); 1690 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) { 1691 em_pci_set_mwi(&adapter->hw); 1692 } 1693 } 1694 1695 return; 1696} 1697 1698 1699/********************************************************************* 1700 * Timer routine 1701 * 1702 * This routine checks for link status and updates statistics. 1703 * 1704 **********************************************************************/ 1705 1706static void 1707em_local_timer(void *arg) 1708{ 1709 struct ifnet *ifp; 1710 struct adapter * adapter = arg; 1711 ifp = adapter->ifp; 1712 1713 EM_LOCK(adapter); 1714 1715 em_check_for_link(&adapter->hw); 1716 em_print_link_status(adapter); 1717 em_update_stats_counters(adapter); 1718 if (em_display_debug_stats && ifp->if_drv_flags & IFF_DRV_RUNNING) { 1719 em_print_hw_stats(adapter); 1720 } 1721 em_smartspeed(adapter); 1722 1723 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1724 1725 EM_UNLOCK(adapter); 1726 return; 1727} 1728 1729static void 1730em_print_link_status(struct adapter * adapter) 1731{ 1732 struct ifnet *ifp = adapter->ifp; 1733 1734 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) { 1735 if (adapter->link_active == 0) { 1736 em_get_speed_and_duplex(&adapter->hw, 1737 &adapter->link_speed, 1738 &adapter->link_duplex); 1739 if (bootverbose) 1740 printf("em%d: Link is up %d Mbps %s\n", 1741 adapter->unit, 1742 adapter->link_speed, 1743 ((adapter->link_duplex == FULL_DUPLEX) ? 1744 "Full Duplex" : "Half Duplex")); 1745 adapter->link_active = 1; 1746 adapter->smartspeed = 0; 1747 if_link_state_change(ifp, LINK_STATE_UP); 1748 } 1749 } else { 1750 if (adapter->link_active == 1) { 1751 adapter->link_speed = 0; 1752 adapter->link_duplex = 0; 1753 if (bootverbose) 1754 printf("em%d: Link is Down\n", adapter->unit); 1755 adapter->link_active = 0; 1756 if_link_state_change(ifp, LINK_STATE_DOWN); 1757 } 1758 } 1759 1760 return; 1761} 1762 1763/********************************************************************* 1764 * 1765 * This routine disables all traffic on the adapter by issuing a 1766 * global reset on the MAC and deallocates TX/RX buffers. 1767 * 1768 **********************************************************************/ 1769 1770static void 1771em_stop(void *arg) 1772{ 1773 struct ifnet *ifp; 1774 struct adapter * adapter = arg; 1775 ifp = adapter->ifp; 1776 1777 mtx_assert(&adapter->mtx, MA_OWNED); 1778 1779 INIT_DEBUGOUT("em_stop: begin"); 1780 1781 em_disable_intr(adapter); 1782 em_reset_hw(&adapter->hw); 1783 callout_stop(&adapter->timer); 1784 callout_stop(&adapter->tx_fifo_timer); 1785 em_free_transmit_structures(adapter); 1786 em_free_receive_structures(adapter); 1787 1788 1789 /* Tell the stack that the interface is no longer active */ 1790 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1791 1792 return; 1793} 1794 1795 1796/********************************************************************* 1797 * 1798 * Determine hardware revision. 1799 * 1800 **********************************************************************/ 1801static void 1802em_identify_hardware(struct adapter * adapter) 1803{ 1804 device_t dev = adapter->dev; 1805 1806 /* Make sure our PCI config space has the necessary stuff set */ 1807 adapter->hw.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2); 1808 if (!((adapter->hw.pci_cmd_word & PCIM_CMD_BUSMASTEREN) && 1809 (adapter->hw.pci_cmd_word & PCIM_CMD_MEMEN))) { 1810 printf("em%d: Memory Access and/or Bus Master bits were not set!\n", 1811 adapter->unit); 1812 adapter->hw.pci_cmd_word |= 1813 (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN); 1814 pci_write_config(dev, PCIR_COMMAND, adapter->hw.pci_cmd_word, 2); 1815 } 1816 1817 /* Save off the information about this board */ 1818 adapter->hw.vendor_id = pci_get_vendor(dev); 1819 adapter->hw.device_id = pci_get_device(dev); 1820 adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1); 1821 adapter->hw.subsystem_vendor_id = pci_read_config(dev, PCIR_SUBVEND_0, 2); 1822 adapter->hw.subsystem_id = pci_read_config(dev, PCIR_SUBDEV_0, 2); 1823 1824 /* Identify the MAC */ 1825 if (em_set_mac_type(&adapter->hw)) 1826 printf("em%d: Unknown MAC Type\n", adapter->unit); 1827 1828 if(adapter->hw.mac_type == em_82541 || 1829 adapter->hw.mac_type == em_82541_rev_2 || 1830 adapter->hw.mac_type == em_82547 || 1831 adapter->hw.mac_type == em_82547_rev_2) 1832 adapter->hw.phy_init_script = TRUE; 1833 1834 return; 1835} 1836 1837static int 1838em_allocate_pci_resources(struct adapter * adapter) 1839{ 1840 int val, rid; 1841 device_t dev = adapter->dev; 1842 1843 rid = PCIR_BAR(0); 1844 adapter->res_memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 1845 &rid, RF_ACTIVE); 1846 if (!(adapter->res_memory)) { 1847 printf("em%d: Unable to allocate bus resource: memory\n", 1848 adapter->unit); 1849 return(ENXIO); 1850 } 1851 adapter->osdep.mem_bus_space_tag = 1852 rman_get_bustag(adapter->res_memory); 1853 adapter->osdep.mem_bus_space_handle = 1854 rman_get_bushandle(adapter->res_memory); 1855 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle; 1856 1857 1858 if (adapter->hw.mac_type > em_82543) { 1859 /* Figure our where our IO BAR is ? */ 1860 for (rid = PCIR_BAR(0); rid < PCIR_CIS;) { 1861 val = pci_read_config(dev, rid, 4); 1862 if (E1000_BAR_TYPE(val) == E1000_BAR_TYPE_IO) { 1863 adapter->io_rid = rid; 1864 break; 1865 } 1866 rid += 4; 1867 /* check for 64bit BAR */ 1868 if (E1000_BAR_MEM_TYPE(val) == E1000_BAR_MEM_TYPE_64BIT) 1869 rid += 4; 1870 } 1871 if (rid >= PCIR_CIS) { 1872 printf("em%d: Unable to locate IO BAR\n", adapter->unit); 1873 return (ENXIO); 1874 } 1875 adapter->res_ioport = bus_alloc_resource_any(dev, 1876 SYS_RES_IOPORT, 1877 &adapter->io_rid, 1878 RF_ACTIVE); 1879 if (!(adapter->res_ioport)) { 1880 printf("em%d: Unable to allocate bus resource: ioport\n", 1881 adapter->unit); 1882 return(ENXIO); 1883 } 1884 adapter->hw.io_base = 0; 1885 adapter->osdep.io_bus_space_tag = 1886 rman_get_bustag(adapter->res_ioport); 1887 adapter->osdep.io_bus_space_handle = 1888 rman_get_bushandle(adapter->res_ioport); 1889 } 1890 1891 rid = 0x0; 1892 adapter->res_interrupt = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 1893 RF_SHAREABLE | 1894 RF_ACTIVE); 1895 if (!(adapter->res_interrupt)) { 1896 printf("em%d: Unable to allocate bus resource: interrupt\n", 1897 adapter->unit); 1898 return(ENXIO); 1899 } 1900 if (bus_setup_intr(dev, adapter->res_interrupt, 1901 INTR_TYPE_NET | INTR_MPSAFE, 1902 (void (*)(void *)) em_intr, adapter, 1903 &adapter->int_handler_tag)) { 1904 printf("em%d: Error registering interrupt handler!\n", 1905 adapter->unit); 1906 return(ENXIO); 1907 } 1908 1909 adapter->hw.back = &adapter->osdep; 1910 1911 return(0); 1912} 1913 1914static void 1915em_free_pci_resources(struct adapter * adapter) 1916{ 1917 device_t dev = adapter->dev; 1918 1919 if (adapter->res_interrupt != NULL) { 1920 bus_teardown_intr(dev, adapter->res_interrupt, 1921 adapter->int_handler_tag); 1922 bus_release_resource(dev, SYS_RES_IRQ, 0, 1923 adapter->res_interrupt); 1924 } 1925 if (adapter->res_memory != NULL) { 1926 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), 1927 adapter->res_memory); 1928 } 1929 1930 if (adapter->res_ioport != NULL) { 1931 bus_release_resource(dev, SYS_RES_IOPORT, adapter->io_rid, 1932 adapter->res_ioport); 1933 } 1934 return; 1935} 1936 1937/********************************************************************* 1938 * 1939 * Initialize the hardware to a configuration as specified by the 1940 * adapter structure. The controller is reset, the EEPROM is 1941 * verified, the MAC address is set, then the shared initialization 1942 * routines are called. 1943 * 1944 **********************************************************************/ 1945static int 1946em_hardware_init(struct adapter * adapter) 1947{ 1948 uint16_t rx_buffer_size; 1949 1950 INIT_DEBUGOUT("em_hardware_init: begin"); 1951 /* Issue a global reset */ 1952 em_reset_hw(&adapter->hw); 1953 1954 /* When hardware is reset, fifo_head is also reset */ 1955 adapter->tx_fifo_head = 0; 1956 1957 /* Make sure we have a good EEPROM before we read from it */ 1958 if (em_validate_eeprom_checksum(&adapter->hw) < 0) { 1959 printf("em%d: The EEPROM Checksum Is Not Valid\n", 1960 adapter->unit); 1961 return(EIO); 1962 } 1963 1964 if (em_read_part_num(&adapter->hw, &(adapter->part_num)) < 0) { 1965 printf("em%d: EEPROM read error while reading part number\n", 1966 adapter->unit); 1967 return(EIO); 1968 } 1969 1970 /* 1971 * These parameters control the automatic generation (Tx) and 1972 * response (Rx) to Ethernet PAUSE frames. 1973 * - High water mark should allow for at least two frames to be 1974 * received after sending an XOFF. 1975 * - Low water mark works best when it is very near the high water mark. 1976 * This allows the receiver to restart by sending XON when it has drained 1977 * a bit. Here we use an arbitary value of 1500 which will restart after 1978 * one full frame is pulled from the buffer. There could be several smaller 1979 * frames in the buffer and if so they will not trigger the XON until their 1980 * total number reduces the buffer by 1500. 1981 * - The pause time is fairly large at 1000 x 512ns = 512 usec. 1982 */ 1983 rx_buffer_size = ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff) << 10 ); 1984 1985 adapter->hw.fc_high_water = rx_buffer_size - 1986 roundup2(adapter->hw.max_frame_size, 1024); 1987 adapter->hw.fc_low_water = adapter->hw.fc_high_water - 1500; 1988 adapter->hw.fc_pause_time = 0x1000; 1989 adapter->hw.fc_send_xon = TRUE; 1990 adapter->hw.fc = em_fc_full; 1991 1992 if (em_init_hw(&adapter->hw) < 0) { 1993 printf("em%d: Hardware Initialization Failed", 1994 adapter->unit); 1995 return(EIO); 1996 } 1997 1998 em_check_for_link(&adapter->hw); 1999 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) 2000 adapter->link_active = 1; 2001 else 2002 adapter->link_active = 0; 2003 2004 if (adapter->link_active) { 2005 em_get_speed_and_duplex(&adapter->hw, 2006 &adapter->link_speed, 2007 &adapter->link_duplex); 2008 } else { 2009 adapter->link_speed = 0; 2010 adapter->link_duplex = 0; 2011 } 2012 2013 return(0); 2014} 2015 2016/********************************************************************* 2017 * 2018 * Setup networking device structure and register an interface. 2019 * 2020 **********************************************************************/ 2021static void 2022em_setup_interface(device_t dev, struct adapter * adapter) 2023{ 2024 struct ifnet *ifp; 2025 INIT_DEBUGOUT("em_setup_interface: begin"); 2026 2027 ifp = adapter->ifp = if_alloc(IFT_ETHER); 2028 if (ifp == NULL) 2029 panic("%s: can not if_alloc()", device_get_nameunit(dev)); 2030 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 2031 ifp->if_mtu = ETHERMTU; 2032 ifp->if_baudrate = 1000000000; 2033 ifp->if_init = em_init; 2034 ifp->if_softc = adapter; 2035 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 2036 ifp->if_ioctl = em_ioctl; 2037 ifp->if_start = em_start; 2038 ifp->if_watchdog = em_watchdog; 2039 IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 1); 2040 ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 1; 2041 IFQ_SET_READY(&ifp->if_snd); 2042 2043 ether_ifattach(ifp, adapter->hw.mac_addr); 2044 2045 ifp->if_capabilities = ifp->if_capenable = 0; 2046 2047 if (adapter->hw.mac_type >= em_82543) { 2048 ifp->if_capabilities |= IFCAP_HWCSUM; 2049 ifp->if_capenable |= IFCAP_HWCSUM; 2050 } 2051 2052 /* 2053 * Tell the upper layer(s) we support long frames. 2054 */ 2055 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 2056 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 2057 ifp->if_capenable |= IFCAP_VLAN_MTU; 2058 2059#ifdef DEVICE_POLLING 2060 ifp->if_capabilities |= IFCAP_POLLING; 2061#endif 2062 2063 /* 2064 * Specify the media types supported by this adapter and register 2065 * callbacks to update media and link information 2066 */ 2067 ifmedia_init(&adapter->media, IFM_IMASK, em_media_change, 2068 em_media_status); 2069 if (adapter->hw.media_type == em_media_type_fiber) { 2070 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX | IFM_FDX, 2071 0, NULL); 2072 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 2073 0, NULL); 2074 } else { 2075 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL); 2076 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX, 2077 0, NULL); 2078 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 2079 0, NULL); 2080 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 2081 0, NULL); 2082 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 2083 0, NULL); 2084 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL); 2085 } 2086 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2087 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2088 2089 return; 2090} 2091 2092 2093/********************************************************************* 2094 * 2095 * Workaround for SmartSpeed on 82541 and 82547 controllers 2096 * 2097 **********************************************************************/ 2098static void 2099em_smartspeed(struct adapter *adapter) 2100{ 2101 uint16_t phy_tmp; 2102 2103 if(adapter->link_active || (adapter->hw.phy_type != em_phy_igp) || 2104 !adapter->hw.autoneg || !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) 2105 return; 2106 2107 if(adapter->smartspeed == 0) { 2108 /* If Master/Slave config fault is asserted twice, 2109 * we assume back-to-back */ 2110 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 2111 if(!(phy_tmp & SR_1000T_MS_CONFIG_FAULT)) return; 2112 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 2113 if(phy_tmp & SR_1000T_MS_CONFIG_FAULT) { 2114 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, 2115 &phy_tmp); 2116 if(phy_tmp & CR_1000T_MS_ENABLE) { 2117 phy_tmp &= ~CR_1000T_MS_ENABLE; 2118 em_write_phy_reg(&adapter->hw, 2119 PHY_1000T_CTRL, phy_tmp); 2120 adapter->smartspeed++; 2121 if(adapter->hw.autoneg && 2122 !em_phy_setup_autoneg(&adapter->hw) && 2123 !em_read_phy_reg(&adapter->hw, PHY_CTRL, 2124 &phy_tmp)) { 2125 phy_tmp |= (MII_CR_AUTO_NEG_EN | 2126 MII_CR_RESTART_AUTO_NEG); 2127 em_write_phy_reg(&adapter->hw, 2128 PHY_CTRL, phy_tmp); 2129 } 2130 } 2131 } 2132 return; 2133 } else if(adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) { 2134 /* If still no link, perhaps using 2/3 pair cable */ 2135 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp); 2136 phy_tmp |= CR_1000T_MS_ENABLE; 2137 em_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp); 2138 if(adapter->hw.autoneg && 2139 !em_phy_setup_autoneg(&adapter->hw) && 2140 !em_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_tmp)) { 2141 phy_tmp |= (MII_CR_AUTO_NEG_EN | 2142 MII_CR_RESTART_AUTO_NEG); 2143 em_write_phy_reg(&adapter->hw, PHY_CTRL, phy_tmp); 2144 } 2145 } 2146 /* Restart process after EM_SMARTSPEED_MAX iterations */ 2147 if(adapter->smartspeed++ == EM_SMARTSPEED_MAX) 2148 adapter->smartspeed = 0; 2149 2150 return; 2151} 2152 2153 2154/* 2155 * Manage DMA'able memory. 2156 */ 2157static void 2158em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 2159{ 2160 if (error) 2161 return; 2162 *(bus_addr_t *) arg = segs[0].ds_addr; 2163} 2164 2165static int 2166em_dma_malloc(struct adapter *adapter, bus_size_t size, 2167 struct em_dma_alloc *dma, int mapflags) 2168{ 2169 int r; 2170 2171 r = bus_dma_tag_create(NULL, /* parent */ 2172 E1000_DBA_ALIGN, 0, /* alignment, bounds */ 2173 BUS_SPACE_MAXADDR, /* lowaddr */ 2174 BUS_SPACE_MAXADDR, /* highaddr */ 2175 NULL, NULL, /* filter, filterarg */ 2176 size, /* maxsize */ 2177 1, /* nsegments */ 2178 size, /* maxsegsize */ 2179 BUS_DMA_ALLOCNOW, /* flags */ 2180 NULL, /* lockfunc */ 2181 NULL, /* lockarg */ 2182 &dma->dma_tag); 2183 if (r != 0) { 2184 printf("em%d: em_dma_malloc: bus_dma_tag_create failed; " 2185 "error %u\n", adapter->unit, r); 2186 goto fail_0; 2187 } 2188 2189 r = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr, 2190 BUS_DMA_NOWAIT, &dma->dma_map); 2191 if (r != 0) { 2192 printf("em%d: em_dma_malloc: bus_dmammem_alloc failed; " 2193 "size %ju, error %d\n", adapter->unit, 2194 (uintmax_t)size, r); 2195 goto fail_2; 2196 } 2197 2198 dma->dma_paddr = 0; 2199 r = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr, 2200 size, 2201 em_dmamap_cb, 2202 &dma->dma_paddr, 2203 mapflags | BUS_DMA_NOWAIT); 2204 if (r != 0 || dma->dma_paddr == 0) { 2205 printf("em%d: em_dma_malloc: bus_dmamap_load failed; " 2206 "error %u\n", adapter->unit, r); 2207 goto fail_3; 2208 } 2209 2210 return (0); 2211 2212fail_3: 2213 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 2214fail_2: 2215 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 2216 bus_dma_tag_destroy(dma->dma_tag); 2217fail_0: 2218 dma->dma_map = NULL; 2219 dma->dma_tag = NULL; 2220 return (r); 2221} 2222 2223static void 2224em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma) 2225{ 2226 if (dma->dma_tag == NULL) 2227 return; 2228 if (dma->dma_map != NULL) { 2229 bus_dmamap_sync(dma->dma_tag, dma->dma_map, 2230 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2231 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 2232 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 2233 dma->dma_map = NULL; 2234 } 2235 bus_dma_tag_destroy(dma->dma_tag); 2236 dma->dma_tag = NULL; 2237} 2238 2239 2240/********************************************************************* 2241 * 2242 * Allocate memory for tx_buffer structures. The tx_buffer stores all 2243 * the information needed to transmit a packet on the wire. 2244 * 2245 **********************************************************************/ 2246static int 2247em_allocate_transmit_structures(struct adapter * adapter) 2248{ 2249 if (!(adapter->tx_buffer_area = 2250 (struct em_buffer *) malloc(sizeof(struct em_buffer) * 2251 adapter->num_tx_desc, M_DEVBUF, 2252 M_NOWAIT))) { 2253 printf("em%d: Unable to allocate tx_buffer memory\n", 2254 adapter->unit); 2255 return ENOMEM; 2256 } 2257 2258 bzero(adapter->tx_buffer_area, 2259 sizeof(struct em_buffer) * adapter->num_tx_desc); 2260 2261 return 0; 2262} 2263 2264/********************************************************************* 2265 * 2266 * Allocate and initialize transmit structures. 2267 * 2268 **********************************************************************/ 2269static int 2270em_setup_transmit_structures(struct adapter * adapter) 2271{ 2272 struct em_buffer *tx_buffer; 2273 bus_size_t size; 2274 int error, i; 2275 2276 /* 2277 * Setup DMA descriptor areas. 2278 */ 2279 size = roundup2(adapter->hw.max_frame_size, MCLBYTES); 2280 if ((error = bus_dma_tag_create(NULL, /* parent */ 2281 1, 0, /* alignment, bounds */ 2282 BUS_SPACE_MAXADDR, /* lowaddr */ 2283 BUS_SPACE_MAXADDR, /* highaddr */ 2284 NULL, NULL, /* filter, filterarg */ 2285 size, /* maxsize */ 2286 EM_MAX_SCATTER, /* nsegments */ 2287 size, /* maxsegsize */ 2288 0, /* flags */ 2289 NULL, /* lockfunc */ 2290 NULL, /* lockarg */ 2291 &adapter->txtag)) != 0) { 2292 printf("em%d: Unable to allocate TX DMA tag\n", adapter->unit); 2293 goto fail; 2294 } 2295 2296 if ((error = em_allocate_transmit_structures(adapter)) != 0) 2297 goto fail; 2298 2299 bzero((void *) adapter->tx_desc_base, 2300 (sizeof(struct em_tx_desc)) * adapter->num_tx_desc); 2301 tx_buffer = adapter->tx_buffer_area; 2302 for (i = 0; i < adapter->num_tx_desc; i++) { 2303 error = bus_dmamap_create(adapter->txtag, 0, &tx_buffer->map); 2304 if (error != 0) { 2305 printf("em%d: Unable to create TX DMA map\n", 2306 adapter->unit); 2307 goto fail; 2308 } 2309 tx_buffer++; 2310 } 2311 2312 adapter->next_avail_tx_desc = 0; 2313 adapter->oldest_used_tx_desc = 0; 2314 2315 /* Set number of descriptors available */ 2316 adapter->num_tx_desc_avail = adapter->num_tx_desc; 2317 2318 /* Set checksum context */ 2319 adapter->active_checksum_context = OFFLOAD_NONE; 2320 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2321 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2322 2323 return (0); 2324 2325fail: 2326 em_free_transmit_structures(adapter); 2327 return (error); 2328} 2329 2330/********************************************************************* 2331 * 2332 * Enable transmit unit. 2333 * 2334 **********************************************************************/ 2335static void 2336em_initialize_transmit_unit(struct adapter * adapter) 2337{ 2338 u_int32_t reg_tctl; 2339 u_int32_t reg_tipg = 0; 2340 u_int64_t bus_addr; 2341 2342 INIT_DEBUGOUT("em_initialize_transmit_unit: begin"); 2343 /* Setup the Base and Length of the Tx Descriptor Ring */ 2344 bus_addr = adapter->txdma.dma_paddr; 2345 E1000_WRITE_REG(&adapter->hw, TDBAL, (u_int32_t)bus_addr); 2346 E1000_WRITE_REG(&adapter->hw, TDBAH, (u_int32_t)(bus_addr >> 32)); 2347 E1000_WRITE_REG(&adapter->hw, TDLEN, 2348 adapter->num_tx_desc * 2349 sizeof(struct em_tx_desc)); 2350 2351 /* Setup the HW Tx Head and Tail descriptor pointers */ 2352 E1000_WRITE_REG(&adapter->hw, TDH, 0); 2353 E1000_WRITE_REG(&adapter->hw, TDT, 0); 2354 2355 2356 HW_DEBUGOUT2("Base = %x, Length = %x\n", 2357 E1000_READ_REG(&adapter->hw, TDBAL), 2358 E1000_READ_REG(&adapter->hw, TDLEN)); 2359 2360 /* Set the default values for the Tx Inter Packet Gap timer */ 2361 switch (adapter->hw.mac_type) { 2362 case em_82542_rev2_0: 2363 case em_82542_rev2_1: 2364 reg_tipg = DEFAULT_82542_TIPG_IPGT; 2365 reg_tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 2366 reg_tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 2367 break; 2368 default: 2369 if (adapter->hw.media_type == em_media_type_fiber) 2370 reg_tipg = DEFAULT_82543_TIPG_IPGT_FIBER; 2371 else 2372 reg_tipg = DEFAULT_82543_TIPG_IPGT_COPPER; 2373 reg_tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 2374 reg_tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 2375 } 2376 2377 E1000_WRITE_REG(&adapter->hw, TIPG, reg_tipg); 2378 E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay.value); 2379 if(adapter->hw.mac_type >= em_82540) 2380 E1000_WRITE_REG(&adapter->hw, TADV, 2381 adapter->tx_abs_int_delay.value); 2382 2383 /* Program the Transmit Control Register */ 2384 reg_tctl = E1000_TCTL_PSP | E1000_TCTL_EN | 2385 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 2386 if (adapter->hw.mac_type >= em_82571) 2387 reg_tctl |= E1000_TCTL_MULR; 2388 if (adapter->link_duplex == 1) { 2389 reg_tctl |= E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT; 2390 } else { 2391 reg_tctl |= E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT; 2392 } 2393 E1000_WRITE_REG(&adapter->hw, TCTL, reg_tctl); 2394 2395 /* Setup Transmit Descriptor Settings for this adapter */ 2396 adapter->txd_cmd = E1000_TXD_CMD_IFCS | E1000_TXD_CMD_RS; 2397 2398 if (adapter->tx_int_delay.value > 0) 2399 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2400 2401 return; 2402} 2403 2404/********************************************************************* 2405 * 2406 * Free all transmit related data structures. 2407 * 2408 **********************************************************************/ 2409static void 2410em_free_transmit_structures(struct adapter * adapter) 2411{ 2412 struct em_buffer *tx_buffer; 2413 int i; 2414 2415 INIT_DEBUGOUT("free_transmit_structures: begin"); 2416 2417 if (adapter->tx_buffer_area != NULL) { 2418 tx_buffer = adapter->tx_buffer_area; 2419 for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) { 2420 if (tx_buffer->m_head != NULL) { 2421 bus_dmamap_sync(adapter->txtag, tx_buffer->map, 2422 BUS_DMASYNC_POSTWRITE); 2423 bus_dmamap_unload(adapter->txtag, 2424 tx_buffer->map); 2425 m_freem(tx_buffer->m_head); 2426 tx_buffer->m_head = NULL; 2427 } else if (tx_buffer->map != NULL) 2428 bus_dmamap_unload(adapter->txtag, 2429 tx_buffer->map); 2430 if (tx_buffer->map != NULL) { 2431 bus_dmamap_destroy(adapter->txtag, 2432 tx_buffer->map); 2433 tx_buffer->map = NULL; 2434 } 2435 } 2436 } 2437 if (adapter->tx_buffer_area != NULL) { 2438 free(adapter->tx_buffer_area, M_DEVBUF); 2439 adapter->tx_buffer_area = NULL; 2440 } 2441 if (adapter->txtag != NULL) { 2442 bus_dma_tag_destroy(adapter->txtag); 2443 adapter->txtag = NULL; 2444 } 2445 return; 2446} 2447 2448/********************************************************************* 2449 * 2450 * The offload context needs to be set when we transfer the first 2451 * packet of a particular protocol (TCP/UDP). We change the 2452 * context only if the protocol type changes. 2453 * 2454 **********************************************************************/ 2455static void 2456em_transmit_checksum_setup(struct adapter * adapter, 2457 struct mbuf *mp, 2458 u_int32_t *txd_upper, 2459 u_int32_t *txd_lower) 2460{ 2461 struct em_context_desc *TXD; 2462 struct em_buffer *tx_buffer; 2463 int curr_txd; 2464 2465 if (mp->m_pkthdr.csum_flags) { 2466 2467 if (mp->m_pkthdr.csum_flags & CSUM_TCP) { 2468 *txd_upper = E1000_TXD_POPTS_TXSM << 8; 2469 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 2470 if (adapter->active_checksum_context == OFFLOAD_TCP_IP) 2471 return; 2472 else 2473 adapter->active_checksum_context = OFFLOAD_TCP_IP; 2474 2475 } else if (mp->m_pkthdr.csum_flags & CSUM_UDP) { 2476 *txd_upper = E1000_TXD_POPTS_TXSM << 8; 2477 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 2478 if (adapter->active_checksum_context == OFFLOAD_UDP_IP) 2479 return; 2480 else 2481 adapter->active_checksum_context = OFFLOAD_UDP_IP; 2482 } else { 2483 *txd_upper = 0; 2484 *txd_lower = 0; 2485 return; 2486 } 2487 } else { 2488 *txd_upper = 0; 2489 *txd_lower = 0; 2490 return; 2491 } 2492 2493 /* If we reach this point, the checksum offload context 2494 * needs to be reset. 2495 */ 2496 curr_txd = adapter->next_avail_tx_desc; 2497 tx_buffer = &adapter->tx_buffer_area[curr_txd]; 2498 TXD = (struct em_context_desc *) &adapter->tx_desc_base[curr_txd]; 2499 2500 TXD->lower_setup.ip_fields.ipcss = ETHER_HDR_LEN; 2501 TXD->lower_setup.ip_fields.ipcso = 2502 ETHER_HDR_LEN + offsetof(struct ip, ip_sum); 2503 TXD->lower_setup.ip_fields.ipcse = 2504 htole16(ETHER_HDR_LEN + sizeof(struct ip) - 1); 2505 2506 TXD->upper_setup.tcp_fields.tucss = 2507 ETHER_HDR_LEN + sizeof(struct ip); 2508 TXD->upper_setup.tcp_fields.tucse = htole16(0); 2509 2510 if (adapter->active_checksum_context == OFFLOAD_TCP_IP) { 2511 TXD->upper_setup.tcp_fields.tucso = 2512 ETHER_HDR_LEN + sizeof(struct ip) + 2513 offsetof(struct tcphdr, th_sum); 2514 } else if (adapter->active_checksum_context == OFFLOAD_UDP_IP) { 2515 TXD->upper_setup.tcp_fields.tucso = 2516 ETHER_HDR_LEN + sizeof(struct ip) + 2517 offsetof(struct udphdr, uh_sum); 2518 } 2519 2520 TXD->tcp_seg_setup.data = htole32(0); 2521 TXD->cmd_and_length = htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT); 2522 2523 tx_buffer->m_head = NULL; 2524 2525 if (++curr_txd == adapter->num_tx_desc) 2526 curr_txd = 0; 2527 2528 adapter->num_tx_desc_avail--; 2529 adapter->next_avail_tx_desc = curr_txd; 2530 2531 return; 2532} 2533 2534/********************************************************************** 2535 * 2536 * Examine each tx_buffer in the used queue. If the hardware is done 2537 * processing the packet then free associated resources. The 2538 * tx_buffer is put back on the free queue. 2539 * 2540 **********************************************************************/ 2541static void 2542em_clean_transmit_interrupts(struct adapter * adapter) 2543{ 2544 int i, num_avail; 2545 struct em_buffer *tx_buffer; 2546 struct em_tx_desc *tx_desc; 2547 struct ifnet *ifp = adapter->ifp; 2548 2549 mtx_assert(&adapter->mtx, MA_OWNED); 2550 2551 if (adapter->num_tx_desc_avail == adapter->num_tx_desc) 2552 return; 2553 2554 num_avail = adapter->num_tx_desc_avail; 2555 i = adapter->oldest_used_tx_desc; 2556 2557 tx_buffer = &adapter->tx_buffer_area[i]; 2558 tx_desc = &adapter->tx_desc_base[i]; 2559 2560 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2561 BUS_DMASYNC_POSTREAD); 2562 while (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) { 2563 2564 tx_desc->upper.data = 0; 2565 num_avail++; 2566 2567 if (tx_buffer->m_head) { 2568 ifp->if_opackets++; 2569 bus_dmamap_sync(adapter->txtag, tx_buffer->map, 2570 BUS_DMASYNC_POSTWRITE); 2571 bus_dmamap_unload(adapter->txtag, tx_buffer->map); 2572 2573 m_freem(tx_buffer->m_head); 2574 tx_buffer->m_head = NULL; 2575 } 2576 2577 if (++i == adapter->num_tx_desc) 2578 i = 0; 2579 2580 tx_buffer = &adapter->tx_buffer_area[i]; 2581 tx_desc = &adapter->tx_desc_base[i]; 2582 } 2583 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2584 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2585 2586 adapter->oldest_used_tx_desc = i; 2587 2588 /* 2589 * If we have enough room, clear IFF_DRV_OACTIVE to tell the stack 2590 * that it is OK to send packets. 2591 * If there are no pending descriptors, clear the timeout. Otherwise, 2592 * if some descriptors have been freed, restart the timeout. 2593 */ 2594 if (num_avail > EM_TX_CLEANUP_THRESHOLD) { 2595 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2596 if (num_avail == adapter->num_tx_desc) 2597 ifp->if_timer = 0; 2598 else if (num_avail == adapter->num_tx_desc_avail) 2599 ifp->if_timer = EM_TX_TIMEOUT; 2600 } 2601 adapter->num_tx_desc_avail = num_avail; 2602 return; 2603} 2604 2605/********************************************************************* 2606 * 2607 * Get a buffer from system mbuf buffer pool. 2608 * 2609 **********************************************************************/ 2610static int 2611em_get_buf(int i, struct adapter *adapter, 2612 struct mbuf *nmp) 2613{ 2614 struct mbuf *mp = nmp; 2615 struct em_buffer *rx_buffer; 2616 struct ifnet *ifp; 2617 bus_dma_segment_t segs[1]; 2618 int error, nsegs; 2619 2620 ifp = adapter->ifp; 2621 2622 if (mp == NULL) { 2623 mp = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 2624 if (mp == NULL) { 2625 adapter->mbuf_cluster_failed++; 2626 return(ENOBUFS); 2627 } 2628 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 2629 } else { 2630 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 2631 mp->m_data = mp->m_ext.ext_buf; 2632 mp->m_next = NULL; 2633 } 2634 2635 if (ifp->if_mtu <= ETHERMTU) { 2636 m_adj(mp, ETHER_ALIGN); 2637 } 2638 2639 rx_buffer = &adapter->rx_buffer_area[i]; 2640 2641 /* 2642 * Using memory from the mbuf cluster pool, invoke the 2643 * bus_dma machinery to arrange the memory mapping. 2644 */ 2645 error = bus_dmamap_load_mbuf_sg(adapter->rxtag, rx_buffer->map, 2646 mp, segs, &nsegs, 0); 2647 if (error != 0) { 2648 m_free(mp); 2649 return(error); 2650 } 2651 /* If nsegs is wrong then the stack is corrupt */ 2652 KASSERT(nsegs == 1, ("Too many segments returned!")); 2653 rx_buffer->m_head = mp; 2654 adapter->rx_desc_base[i].buffer_addr = htole64(segs[0].ds_addr); 2655 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD); 2656 2657 return(0); 2658} 2659 2660/********************************************************************* 2661 * 2662 * Allocate memory for rx_buffer structures. Since we use one 2663 * rx_buffer per received packet, the maximum number of rx_buffer's 2664 * that we'll need is equal to the number of receive descriptors 2665 * that we've allocated. 2666 * 2667 **********************************************************************/ 2668static int 2669em_allocate_receive_structures(struct adapter * adapter) 2670{ 2671 int i, error; 2672 struct em_buffer *rx_buffer; 2673 2674 if (!(adapter->rx_buffer_area = 2675 (struct em_buffer *) malloc(sizeof(struct em_buffer) * 2676 adapter->num_rx_desc, M_DEVBUF, 2677 M_NOWAIT))) { 2678 printf("em%d: Unable to allocate rx_buffer memory\n", 2679 adapter->unit); 2680 return(ENOMEM); 2681 } 2682 2683 bzero(adapter->rx_buffer_area, 2684 sizeof(struct em_buffer) * adapter->num_rx_desc); 2685 2686 error = bus_dma_tag_create(NULL, /* parent */ 2687 1, 0, /* alignment, bounds */ 2688 BUS_SPACE_MAXADDR, /* lowaddr */ 2689 BUS_SPACE_MAXADDR, /* highaddr */ 2690 NULL, NULL, /* filter, filterarg */ 2691 MCLBYTES, /* maxsize */ 2692 1, /* nsegments */ 2693 MCLBYTES, /* maxsegsize */ 2694 BUS_DMA_ALLOCNOW, /* flags */ 2695 NULL, /* lockfunc */ 2696 NULL, /* lockarg */ 2697 &adapter->rxtag); 2698 if (error != 0) { 2699 printf("em%d: em_allocate_receive_structures: " 2700 "bus_dma_tag_create failed; error %u\n", 2701 adapter->unit, error); 2702 goto fail; 2703 } 2704 2705 rx_buffer = adapter->rx_buffer_area; 2706 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 2707 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT, 2708 &rx_buffer->map); 2709 if (error != 0) { 2710 printf("em%d: em_allocate_receive_structures: " 2711 "bus_dmamap_create failed; error %u\n", 2712 adapter->unit, error); 2713 goto fail; 2714 } 2715 } 2716 2717 for (i = 0; i < adapter->num_rx_desc; i++) { 2718 error = em_get_buf(i, adapter, NULL); 2719 if (error != 0) 2720 goto fail; 2721 } 2722 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 2723 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2724 2725 return(0); 2726 2727fail: 2728 em_free_receive_structures(adapter); 2729 return (error); 2730} 2731 2732/********************************************************************* 2733 * 2734 * Allocate and initialize receive structures. 2735 * 2736 **********************************************************************/ 2737static int 2738em_setup_receive_structures(struct adapter * adapter) 2739{ 2740 bzero((void *) adapter->rx_desc_base, 2741 (sizeof(struct em_rx_desc)) * adapter->num_rx_desc); 2742 2743 if (em_allocate_receive_structures(adapter)) 2744 return ENOMEM; 2745 2746 /* Setup our descriptor pointers */ 2747 adapter->next_rx_desc_to_check = 0; 2748 return(0); 2749} 2750 2751/********************************************************************* 2752 * 2753 * Enable receive unit. 2754 * 2755 **********************************************************************/ 2756static void 2757em_initialize_receive_unit(struct adapter * adapter) 2758{ 2759 u_int32_t reg_rctl; 2760 u_int32_t reg_rxcsum; 2761 struct ifnet *ifp; 2762 u_int64_t bus_addr; 2763 2764 INIT_DEBUGOUT("em_initialize_receive_unit: begin"); 2765 ifp = adapter->ifp; 2766 2767 /* Make sure receives are disabled while setting up the descriptor ring */ 2768 E1000_WRITE_REG(&adapter->hw, RCTL, 0); 2769 2770 /* Set the Receive Delay Timer Register */ 2771 E1000_WRITE_REG(&adapter->hw, RDTR, 2772 adapter->rx_int_delay.value | E1000_RDT_FPDB); 2773 2774 if(adapter->hw.mac_type >= em_82540) { 2775 E1000_WRITE_REG(&adapter->hw, RADV, 2776 adapter->rx_abs_int_delay.value); 2777 2778 /* Set the interrupt throttling rate. Value is calculated 2779 * as DEFAULT_ITR = 1/(MAX_INTS_PER_SEC * 256ns) */ 2780#define MAX_INTS_PER_SEC 8000 2781#define DEFAULT_ITR 1000000000/(MAX_INTS_PER_SEC * 256) 2782 E1000_WRITE_REG(&adapter->hw, ITR, DEFAULT_ITR); 2783 } 2784 2785 /* Setup the Base and Length of the Rx Descriptor Ring */ 2786 bus_addr = adapter->rxdma.dma_paddr; 2787 E1000_WRITE_REG(&adapter->hw, RDBAL, (u_int32_t)bus_addr); 2788 E1000_WRITE_REG(&adapter->hw, RDBAH, (u_int32_t)(bus_addr >> 32)); 2789 E1000_WRITE_REG(&adapter->hw, RDLEN, adapter->num_rx_desc * 2790 sizeof(struct em_rx_desc)); 2791 2792 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 2793 E1000_WRITE_REG(&adapter->hw, RDH, 0); 2794 E1000_WRITE_REG(&adapter->hw, RDT, adapter->num_rx_desc - 1); 2795 2796 /* Setup the Receive Control Register */ 2797 reg_rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO | 2798 E1000_RCTL_RDMTS_HALF | 2799 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); 2800 2801 if (adapter->hw.tbi_compatibility_on == TRUE) 2802 reg_rctl |= E1000_RCTL_SBP; 2803 2804 2805 switch (adapter->rx_buffer_len) { 2806 default: 2807 case EM_RXBUFFER_2048: 2808 reg_rctl |= E1000_RCTL_SZ_2048; 2809 break; 2810 case EM_RXBUFFER_4096: 2811 reg_rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 2812 break; 2813 case EM_RXBUFFER_8192: 2814 reg_rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 2815 break; 2816 case EM_RXBUFFER_16384: 2817 reg_rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 2818 break; 2819 } 2820 2821 if (ifp->if_mtu > ETHERMTU) 2822 reg_rctl |= E1000_RCTL_LPE; 2823 2824 /* Enable 82543 Receive Checksum Offload for TCP and UDP */ 2825 if ((adapter->hw.mac_type >= em_82543) && 2826 (ifp->if_capenable & IFCAP_RXCSUM)) { 2827 reg_rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM); 2828 reg_rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL); 2829 E1000_WRITE_REG(&adapter->hw, RXCSUM, reg_rxcsum); 2830 } 2831 2832 /* Enable Receives */ 2833 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 2834 2835 return; 2836} 2837 2838/********************************************************************* 2839 * 2840 * Free receive related data structures. 2841 * 2842 **********************************************************************/ 2843static void 2844em_free_receive_structures(struct adapter *adapter) 2845{ 2846 struct em_buffer *rx_buffer; 2847 int i; 2848 2849 INIT_DEBUGOUT("free_receive_structures: begin"); 2850 2851 if (adapter->rx_buffer_area != NULL) { 2852 rx_buffer = adapter->rx_buffer_area; 2853 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 2854 if (rx_buffer->m_head != NULL) { 2855 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, 2856 BUS_DMASYNC_POSTREAD); 2857 bus_dmamap_unload(adapter->rxtag, 2858 rx_buffer->map); 2859 m_freem(rx_buffer->m_head); 2860 rx_buffer->m_head = NULL; 2861 } else if (rx_buffer->map != NULL) 2862 bus_dmamap_unload(adapter->rxtag, 2863 rx_buffer->map); 2864 if (rx_buffer->map != NULL) { 2865 bus_dmamap_destroy(adapter->rxtag, 2866 rx_buffer->map); 2867 rx_buffer->map = NULL; 2868 } 2869 } 2870 } 2871 if (adapter->rx_buffer_area != NULL) { 2872 free(adapter->rx_buffer_area, M_DEVBUF); 2873 adapter->rx_buffer_area = NULL; 2874 } 2875 if (adapter->rxtag != NULL) { 2876 bus_dma_tag_destroy(adapter->rxtag); 2877 adapter->rxtag = NULL; 2878 } 2879 return; 2880} 2881 2882/********************************************************************* 2883 * 2884 * This routine executes in interrupt context. It replenishes 2885 * the mbufs in the descriptor and sends data which has been 2886 * dma'ed into host memory to upper layer. 2887 * 2888 * We loop at most count times if count is > 0, or until done if 2889 * count < 0. 2890 * 2891 *********************************************************************/ 2892static void 2893em_process_receive_interrupts(struct adapter * adapter, int count) 2894{ 2895 struct ifnet *ifp; 2896 struct mbuf *mp; 2897 u_int8_t accept_frame = 0; 2898 u_int8_t eop = 0; 2899 u_int16_t len, desc_len, prev_len_adj; 2900 int i; 2901 2902 /* Pointer to the receive descriptor being examined. */ 2903 struct em_rx_desc *current_desc; 2904 2905 mtx_assert(&adapter->mtx, MA_OWNED); 2906 2907 ifp = adapter->ifp; 2908 i = adapter->next_rx_desc_to_check; 2909 current_desc = &adapter->rx_desc_base[i]; 2910 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 2911 BUS_DMASYNC_POSTREAD); 2912 2913 if (!((current_desc->status) & E1000_RXD_STAT_DD)) { 2914 return; 2915 } 2916 2917 while ((current_desc->status & E1000_RXD_STAT_DD) && 2918 (count != 0) && 2919 (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2920 struct mbuf *m = NULL; 2921 2922 mp = adapter->rx_buffer_area[i].m_head; 2923 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map, 2924 BUS_DMASYNC_POSTREAD); 2925 bus_dmamap_unload(adapter->rxtag, 2926 adapter->rx_buffer_area[i].map); 2927 2928 accept_frame = 1; 2929 prev_len_adj = 0; 2930 desc_len = le16toh(current_desc->length); 2931 if (current_desc->status & E1000_RXD_STAT_EOP) { 2932 count--; 2933 eop = 1; 2934 if (desc_len < ETHER_CRC_LEN) { 2935 len = 0; 2936 prev_len_adj = ETHER_CRC_LEN - desc_len; 2937 } 2938 else { 2939 len = desc_len - ETHER_CRC_LEN; 2940 } 2941 } else { 2942 eop = 0; 2943 len = desc_len; 2944 } 2945 2946 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 2947 u_int8_t last_byte; 2948 u_int32_t pkt_len = desc_len; 2949 2950 if (adapter->fmp != NULL) 2951 pkt_len += adapter->fmp->m_pkthdr.len; 2952 2953 last_byte = *(mtod(mp, caddr_t) + desc_len - 1); 2954 2955 if (TBI_ACCEPT(&adapter->hw, current_desc->status, 2956 current_desc->errors, 2957 pkt_len, last_byte)) { 2958 em_tbi_adjust_stats(&adapter->hw, 2959 &adapter->stats, 2960 pkt_len, 2961 adapter->hw.mac_addr); 2962 if (len > 0) len--; 2963 } 2964 else { 2965 accept_frame = 0; 2966 } 2967 } 2968 2969 if (accept_frame) { 2970 2971 if (em_get_buf(i, adapter, NULL) == ENOBUFS) { 2972 adapter->dropped_pkts++; 2973 em_get_buf(i, adapter, mp); 2974 if (adapter->fmp != NULL) 2975 m_freem(adapter->fmp); 2976 adapter->fmp = NULL; 2977 adapter->lmp = NULL; 2978 break; 2979 } 2980 2981 /* Assign correct length to the current fragment */ 2982 mp->m_len = len; 2983 2984 if (adapter->fmp == NULL) { 2985 mp->m_pkthdr.len = len; 2986 adapter->fmp = mp; /* Store the first mbuf */ 2987 adapter->lmp = mp; 2988 } else { 2989 /* Chain mbuf's together */ 2990 mp->m_flags &= ~M_PKTHDR; 2991 /* 2992 * Adjust length of previous mbuf in chain if we 2993 * received less than 4 bytes in the last descriptor. 2994 */ 2995 if (prev_len_adj > 0) { 2996 adapter->lmp->m_len -= prev_len_adj; 2997 adapter->fmp->m_pkthdr.len -= prev_len_adj; 2998 } 2999 adapter->lmp->m_next = mp; 3000 adapter->lmp = adapter->lmp->m_next; 3001 adapter->fmp->m_pkthdr.len += len; 3002 } 3003 3004 if (eop) { 3005 adapter->fmp->m_pkthdr.rcvif = ifp; 3006 ifp->if_ipackets++; 3007 em_receive_checksum(adapter, current_desc, 3008 adapter->fmp); 3009#ifndef __NO_STRICT_ALIGNMENT 3010 if (ifp->if_mtu > ETHERMTU && 3011 em_fixup_rx(adapter) != 0) 3012 goto skip; 3013 3014#endif 3015 if (current_desc->status & E1000_RXD_STAT_VP) 3016 VLAN_INPUT_TAG(ifp, adapter->fmp, 3017 (le16toh(current_desc->special) & 3018 E1000_RXD_SPC_VLAN_MASK)); 3019#ifndef __NO_STRICT_ALIGNMENT 3020skip: 3021#endif 3022 m = adapter->fmp; 3023 adapter->fmp = NULL; 3024 adapter->lmp = NULL; 3025 } 3026 } else { 3027 adapter->dropped_pkts++; 3028 em_get_buf(i, adapter, mp); 3029 if (adapter->fmp != NULL) 3030 m_freem(adapter->fmp); 3031 adapter->fmp = NULL; 3032 adapter->lmp = NULL; 3033 } 3034 3035 /* Zero out the receive descriptors status */ 3036 current_desc->status = 0; 3037 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 3038 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 3039 3040 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */ 3041 E1000_WRITE_REG(&adapter->hw, RDT, i); 3042 3043 /* Advance our pointers to the next descriptor */ 3044 if (++i == adapter->num_rx_desc) 3045 i = 0; 3046 if (m != NULL) { 3047 adapter->next_rx_desc_to_check = i; 3048 EM_UNLOCK(adapter); 3049 (*ifp->if_input)(ifp, m); 3050 EM_LOCK(adapter); 3051 i = adapter->next_rx_desc_to_check; 3052 } 3053 current_desc = &adapter->rx_desc_base[i]; 3054 } 3055 adapter->next_rx_desc_to_check = i; 3056 return; 3057} 3058 3059#ifndef __NO_STRICT_ALIGNMENT 3060/* 3061 * When jumbo frames are enabled we should realign entire payload on 3062 * architecures with strict alignment. This is serious design mistake of 8254x 3063 * as it nullifies DMA operations. 8254x just allows RX buffer size to be 3064 * 2048/4096/8192/16384. What we really want is 2048 - ETHER_ALIGN to align its 3065 * payload. On architecures without strict alignment restrictions 8254x still 3066 * performs unaligned memory access which would reduce the performance too. 3067 * To avoid copying over an entire frame to align, we allocate a new mbuf and 3068 * copy ethernet header to the new mbuf. The new mbuf is prepended into the 3069 * existing mbuf chain. 3070 * 3071 * Be aware, best performance of the 8254x is achived only when jumbo frame is 3072 * not used at all on architectures with strict alignment. 3073 */ 3074static int 3075em_fixup_rx(struct adapter *adapter) 3076{ 3077 struct mbuf *m, *n; 3078 int error; 3079 3080 error = 0; 3081 m = adapter->fmp; 3082 if (m->m_len <= (MCLBYTES - ETHER_HDR_LEN)) { 3083 bcopy(m->m_data, m->m_data + ETHER_HDR_LEN, m->m_len); 3084 m->m_data += ETHER_HDR_LEN; 3085 } else { 3086 MGETHDR(n, M_DONTWAIT, MT_DATA); 3087 if (n != NULL) { 3088 bcopy(m->m_data, n->m_data, ETHER_HDR_LEN); 3089 m->m_data += ETHER_HDR_LEN; 3090 m->m_len -= ETHER_HDR_LEN; 3091 n->m_len = ETHER_HDR_LEN; 3092 M_MOVE_PKTHDR(n, m); 3093 n->m_next = m; 3094 adapter->fmp = n; 3095 } else { 3096 adapter->dropped_pkts++; 3097 m_freem(adapter->fmp); 3098 adapter->fmp = NULL; 3099 error = ENOMEM; 3100 } 3101 } 3102 3103 return (error); 3104} 3105#endif 3106 3107/********************************************************************* 3108 * 3109 * Verify that the hardware indicated that the checksum is valid. 3110 * Inform the stack about the status of checksum so that stack 3111 * doesn't spend time verifying the checksum. 3112 * 3113 *********************************************************************/ 3114static void 3115em_receive_checksum(struct adapter *adapter, 3116 struct em_rx_desc *rx_desc, 3117 struct mbuf *mp) 3118{ 3119 /* 82543 or newer only */ 3120 if ((adapter->hw.mac_type < em_82543) || 3121 /* Ignore Checksum bit is set */ 3122 (rx_desc->status & E1000_RXD_STAT_IXSM)) { 3123 mp->m_pkthdr.csum_flags = 0; 3124 return; 3125 } 3126 3127 if (rx_desc->status & E1000_RXD_STAT_IPCS) { 3128 /* Did it pass? */ 3129 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) { 3130 /* IP Checksum Good */ 3131 mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED; 3132 mp->m_pkthdr.csum_flags |= CSUM_IP_VALID; 3133 3134 } else { 3135 mp->m_pkthdr.csum_flags = 0; 3136 } 3137 } 3138 3139 if (rx_desc->status & E1000_RXD_STAT_TCPCS) { 3140 /* Did it pass? */ 3141 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) { 3142 mp->m_pkthdr.csum_flags |= 3143 (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); 3144 mp->m_pkthdr.csum_data = htons(0xffff); 3145 } 3146 } 3147 3148 return; 3149} 3150 3151 3152static void 3153em_enable_vlans(struct adapter *adapter) 3154{ 3155 uint32_t ctrl; 3156 3157 E1000_WRITE_REG(&adapter->hw, VET, ETHERTYPE_VLAN); 3158 3159 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 3160 ctrl |= E1000_CTRL_VME; 3161 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 3162 3163 return; 3164} 3165 3166static void 3167em_disable_vlans(struct adapter *adapter) 3168{ 3169 uint32_t ctrl; 3170 3171 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 3172 ctrl &= ~E1000_CTRL_VME; 3173 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 3174 3175 return; 3176} 3177 3178static void 3179em_enable_intr(struct adapter * adapter) 3180{ 3181 E1000_WRITE_REG(&adapter->hw, IMS, (IMS_ENABLE_MASK)); 3182 return; 3183} 3184 3185static void 3186em_disable_intr(struct adapter *adapter) 3187{ 3188 /* 3189 * The first version of 82542 had an errata where when link was forced it 3190 * would stay up even up even if the cable was disconnected. Sequence errors 3191 * were used to detect the disconnect and then the driver would unforce the link. 3192 * This code in the in the ISR. For this to work correctly the Sequence error 3193 * interrupt had to be enabled all the time. 3194 */ 3195 3196 if (adapter->hw.mac_type == em_82542_rev2_0) 3197 E1000_WRITE_REG(&adapter->hw, IMC, 3198 (0xffffffff & ~E1000_IMC_RXSEQ)); 3199 else 3200 E1000_WRITE_REG(&adapter->hw, IMC, 3201 0xffffffff); 3202 return; 3203} 3204 3205static int 3206em_is_valid_ether_addr(u_int8_t *addr) 3207{ 3208 char zero_addr[6] = { 0, 0, 0, 0, 0, 0 }; 3209 3210 if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) { 3211 return (FALSE); 3212 } 3213 3214 return(TRUE); 3215} 3216 3217void 3218em_write_pci_cfg(struct em_hw *hw, 3219 uint32_t reg, 3220 uint16_t *value) 3221{ 3222 pci_write_config(((struct em_osdep *)hw->back)->dev, reg, 3223 *value, 2); 3224} 3225 3226void 3227em_read_pci_cfg(struct em_hw *hw, uint32_t reg, 3228 uint16_t *value) 3229{ 3230 *value = pci_read_config(((struct em_osdep *)hw->back)->dev, 3231 reg, 2); 3232 return; 3233} 3234 3235void 3236em_pci_set_mwi(struct em_hw *hw) 3237{ 3238 pci_write_config(((struct em_osdep *)hw->back)->dev, 3239 PCIR_COMMAND, 3240 (hw->pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2); 3241 return; 3242} 3243 3244void 3245em_pci_clear_mwi(struct em_hw *hw) 3246{ 3247 pci_write_config(((struct em_osdep *)hw->back)->dev, 3248 PCIR_COMMAND, 3249 (hw->pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2); 3250 return; 3251} 3252 3253/********************************************************************* 3254* 82544 Coexistence issue workaround. 3255* There are 2 issues. 3256* 1. Transmit Hang issue. 3257* To detect this issue, following equation can be used... 3258* SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 3259* If SUM[3:0] is in between 1 to 4, we will have this issue. 3260* 3261* 2. DAC issue. 3262* To detect this issue, following equation can be used... 3263* SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 3264* If SUM[3:0] is in between 9 to c, we will have this issue. 3265* 3266* 3267* WORKAROUND: 3268* Make sure we do not have ending address as 1,2,3,4(Hang) or 9,a,b,c (DAC) 3269* 3270*** *********************************************************************/ 3271static u_int32_t 3272em_fill_descriptors (bus_addr_t address, 3273 u_int32_t length, 3274 PDESC_ARRAY desc_array) 3275{ 3276 /* Since issue is sensitive to length and address.*/ 3277 /* Let us first check the address...*/ 3278 u_int32_t safe_terminator; 3279 if (length <= 4) { 3280 desc_array->descriptor[0].address = address; 3281 desc_array->descriptor[0].length = length; 3282 desc_array->elements = 1; 3283 return desc_array->elements; 3284 } 3285 safe_terminator = (u_int32_t)((((u_int32_t)address & 0x7) + (length & 0xF)) & 0xF); 3286 /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */ 3287 if (safe_terminator == 0 || 3288 (safe_terminator > 4 && 3289 safe_terminator < 9) || 3290 (safe_terminator > 0xC && 3291 safe_terminator <= 0xF)) { 3292 desc_array->descriptor[0].address = address; 3293 desc_array->descriptor[0].length = length; 3294 desc_array->elements = 1; 3295 return desc_array->elements; 3296 } 3297 3298 desc_array->descriptor[0].address = address; 3299 desc_array->descriptor[0].length = length - 4; 3300 desc_array->descriptor[1].address = address + (length - 4); 3301 desc_array->descriptor[1].length = 4; 3302 desc_array->elements = 2; 3303 return desc_array->elements; 3304} 3305 3306/********************************************************************** 3307 * 3308 * Update the board statistics counters. 3309 * 3310 **********************************************************************/ 3311static void 3312em_update_stats_counters(struct adapter *adapter) 3313{ 3314 struct ifnet *ifp; 3315 3316 if(adapter->hw.media_type == em_media_type_copper || 3317 (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) { 3318 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, SYMERRS); 3319 adapter->stats.sec += E1000_READ_REG(&adapter->hw, SEC); 3320 } 3321 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, CRCERRS); 3322 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, MPC); 3323 adapter->stats.scc += E1000_READ_REG(&adapter->hw, SCC); 3324 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, ECOL); 3325 3326 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, MCC); 3327 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, LATECOL); 3328 adapter->stats.colc += E1000_READ_REG(&adapter->hw, COLC); 3329 adapter->stats.dc += E1000_READ_REG(&adapter->hw, DC); 3330 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, RLEC); 3331 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, XONRXC); 3332 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, XONTXC); 3333 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, XOFFRXC); 3334 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, XOFFTXC); 3335 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, FCRUC); 3336 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, PRC64); 3337 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, PRC127); 3338 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, PRC255); 3339 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, PRC511); 3340 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, PRC1023); 3341 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, PRC1522); 3342 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, GPRC); 3343 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, BPRC); 3344 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, MPRC); 3345 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, GPTC); 3346 3347 /* For the 64-bit byte counters the low dword must be read first. */ 3348 /* Both registers clear on the read of the high dword */ 3349 3350 adapter->stats.gorcl += E1000_READ_REG(&adapter->hw, GORCL); 3351 adapter->stats.gorch += E1000_READ_REG(&adapter->hw, GORCH); 3352 adapter->stats.gotcl += E1000_READ_REG(&adapter->hw, GOTCL); 3353 adapter->stats.gotch += E1000_READ_REG(&adapter->hw, GOTCH); 3354 3355 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, RNBC); 3356 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, RUC); 3357 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, RFC); 3358 adapter->stats.roc += E1000_READ_REG(&adapter->hw, ROC); 3359 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, RJC); 3360 3361 adapter->stats.torl += E1000_READ_REG(&adapter->hw, TORL); 3362 adapter->stats.torh += E1000_READ_REG(&adapter->hw, TORH); 3363 adapter->stats.totl += E1000_READ_REG(&adapter->hw, TOTL); 3364 adapter->stats.toth += E1000_READ_REG(&adapter->hw, TOTH); 3365 3366 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, TPR); 3367 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, TPT); 3368 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, PTC64); 3369 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, PTC127); 3370 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, PTC255); 3371 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, PTC511); 3372 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, PTC1023); 3373 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, PTC1522); 3374 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, MPTC); 3375 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, BPTC); 3376 3377 if (adapter->hw.mac_type >= em_82543) { 3378 adapter->stats.algnerrc += 3379 E1000_READ_REG(&adapter->hw, ALGNERRC); 3380 adapter->stats.rxerrc += 3381 E1000_READ_REG(&adapter->hw, RXERRC); 3382 adapter->stats.tncrs += 3383 E1000_READ_REG(&adapter->hw, TNCRS); 3384 adapter->stats.cexterr += 3385 E1000_READ_REG(&adapter->hw, CEXTERR); 3386 adapter->stats.tsctc += 3387 E1000_READ_REG(&adapter->hw, TSCTC); 3388 adapter->stats.tsctfc += 3389 E1000_READ_REG(&adapter->hw, TSCTFC); 3390 } 3391 ifp = adapter->ifp; 3392 3393 ifp->if_collisions = adapter->stats.colc; 3394 3395 /* Rx Errors */ 3396 ifp->if_ierrors = 3397 adapter->dropped_pkts + 3398 adapter->stats.rxerrc + 3399 adapter->stats.crcerrs + 3400 adapter->stats.algnerrc + 3401 adapter->stats.rlec + 3402 adapter->stats.mpc + adapter->stats.cexterr; 3403 3404 /* Tx Errors */ 3405 ifp->if_oerrors = adapter->stats.ecol + adapter->stats.latecol + 3406 adapter->watchdog_events; 3407 3408} 3409 3410 3411/********************************************************************** 3412 * 3413 * This routine is called only when em_display_debug_stats is enabled. 3414 * This routine provides a way to take a look at important statistics 3415 * maintained by the driver and hardware. 3416 * 3417 **********************************************************************/ 3418static void 3419em_print_debug_info(struct adapter *adapter) 3420{ 3421 int unit = adapter->unit; 3422 uint8_t *hw_addr = adapter->hw.hw_addr; 3423 3424 printf("em%d: Adapter hardware address = %p \n", unit, hw_addr); 3425 printf("em%d: CTRL = 0x%x RCTL = 0x%x \n", unit, 3426 E1000_READ_REG(&adapter->hw, CTRL), 3427 E1000_READ_REG(&adapter->hw, RCTL)); 3428 printf("em%d: Packet buffer = Tx=%dk Rx=%dk \n", unit, 3429 ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff0000) >> 16),\ 3430 (E1000_READ_REG(&adapter->hw, PBA) & 0xffff) ); 3431 printf("em%d: Flow control watermarks high = %d low = %d\n", unit, 3432 adapter->hw.fc_high_water, 3433 adapter->hw.fc_low_water); 3434 printf("em%d: tx_int_delay = %d, tx_abs_int_delay = %d\n", unit, 3435 E1000_READ_REG(&adapter->hw, TIDV), 3436 E1000_READ_REG(&adapter->hw, TADV)); 3437 printf("em%d: rx_int_delay = %d, rx_abs_int_delay = %d\n", unit, 3438 E1000_READ_REG(&adapter->hw, RDTR), 3439 E1000_READ_REG(&adapter->hw, RADV)); 3440 printf("em%d: fifo workaround = %lld, fifo_reset_count = %lld\n", 3441 unit, (long long)adapter->tx_fifo_wrk_cnt, 3442 (long long)adapter->tx_fifo_reset_cnt); 3443 printf("em%d: hw tdh = %d, hw tdt = %d\n", unit, 3444 E1000_READ_REG(&adapter->hw, TDH), 3445 E1000_READ_REG(&adapter->hw, TDT)); 3446 printf("em%d: Num Tx descriptors avail = %d\n", unit, 3447 adapter->num_tx_desc_avail); 3448 printf("em%d: Tx Descriptors not avail1 = %ld\n", unit, 3449 adapter->no_tx_desc_avail1); 3450 printf("em%d: Tx Descriptors not avail2 = %ld\n", unit, 3451 adapter->no_tx_desc_avail2); 3452 printf("em%d: Std mbuf failed = %ld\n", unit, 3453 adapter->mbuf_alloc_failed); 3454 printf("em%d: Std mbuf cluster failed = %ld\n", unit, 3455 adapter->mbuf_cluster_failed); 3456 printf("em%d: Driver dropped packets = %ld\n", unit, 3457 adapter->dropped_pkts); 3458 3459 return; 3460} 3461 3462static void 3463em_print_hw_stats(struct adapter *adapter) 3464{ 3465 int unit = adapter->unit; 3466 3467 printf("em%d: Excessive collisions = %lld\n", unit, 3468 (long long)adapter->stats.ecol); 3469 printf("em%d: Symbol errors = %lld\n", unit, 3470 (long long)adapter->stats.symerrs); 3471 printf("em%d: Sequence errors = %lld\n", unit, 3472 (long long)adapter->stats.sec); 3473 printf("em%d: Defer count = %lld\n", unit, 3474 (long long)adapter->stats.dc); 3475 3476 printf("em%d: Missed Packets = %lld\n", unit, 3477 (long long)adapter->stats.mpc); 3478 printf("em%d: Receive No Buffers = %lld\n", unit, 3479 (long long)adapter->stats.rnbc); 3480 printf("em%d: Receive length errors = %lld\n", unit, 3481 (long long)adapter->stats.rlec); 3482 printf("em%d: Receive errors = %lld\n", unit, 3483 (long long)adapter->stats.rxerrc); 3484 printf("em%d: Crc errors = %lld\n", unit, 3485 (long long)adapter->stats.crcerrs); 3486 printf("em%d: Alignment errors = %lld\n", unit, 3487 (long long)adapter->stats.algnerrc); 3488 printf("em%d: Carrier extension errors = %lld\n", unit, 3489 (long long)adapter->stats.cexterr); 3490 printf("em%d: RX overruns = %ld\n", unit, adapter->rx_overruns); 3491 printf("em%d: watchdog timeouts = %ld\n", unit, 3492 adapter->watchdog_events); 3493 3494 printf("em%d: XON Rcvd = %lld\n", unit, 3495 (long long)adapter->stats.xonrxc); 3496 printf("em%d: XON Xmtd = %lld\n", unit, 3497 (long long)adapter->stats.xontxc); 3498 printf("em%d: XOFF Rcvd = %lld\n", unit, 3499 (long long)adapter->stats.xoffrxc); 3500 printf("em%d: XOFF Xmtd = %lld\n", unit, 3501 (long long)adapter->stats.xofftxc); 3502 3503 printf("em%d: Good Packets Rcvd = %lld\n", unit, 3504 (long long)adapter->stats.gprc); 3505 printf("em%d: Good Packets Xmtd = %lld\n", unit, 3506 (long long)adapter->stats.gptc); 3507 3508 return; 3509} 3510 3511static int 3512em_sysctl_debug_info(SYSCTL_HANDLER_ARGS) 3513{ 3514 int error; 3515 int result; 3516 struct adapter *adapter; 3517 3518 result = -1; 3519 error = sysctl_handle_int(oidp, &result, 0, req); 3520 3521 if (error || !req->newptr) 3522 return (error); 3523 3524 if (result == 1) { 3525 adapter = (struct adapter *)arg1; 3526 em_print_debug_info(adapter); 3527 } 3528 3529 return error; 3530} 3531 3532 3533static int 3534em_sysctl_stats(SYSCTL_HANDLER_ARGS) 3535{ 3536 int error; 3537 int result; 3538 struct adapter *adapter; 3539 3540 result = -1; 3541 error = sysctl_handle_int(oidp, &result, 0, req); 3542 3543 if (error || !req->newptr) 3544 return (error); 3545 3546 if (result == 1) { 3547 adapter = (struct adapter *)arg1; 3548 em_print_hw_stats(adapter); 3549 } 3550 3551 return error; 3552} 3553 3554static int 3555em_sysctl_int_delay(SYSCTL_HANDLER_ARGS) 3556{ 3557 struct em_int_delay_info *info; 3558 struct adapter *adapter; 3559 u_int32_t regval; 3560 int error; 3561 int usecs; 3562 int ticks; 3563 3564 info = (struct em_int_delay_info *)arg1; 3565 usecs = info->value; 3566 error = sysctl_handle_int(oidp, &usecs, 0, req); 3567 if (error != 0 || req->newptr == NULL) 3568 return error; 3569 if (usecs < 0 || usecs > E1000_TICKS_TO_USECS(65535)) 3570 return EINVAL; 3571 info->value = usecs; 3572 ticks = E1000_USECS_TO_TICKS(usecs); 3573 3574 adapter = info->adapter; 3575 3576 EM_LOCK(adapter); 3577 regval = E1000_READ_OFFSET(&adapter->hw, info->offset); 3578 regval = (regval & ~0xffff) | (ticks & 0xffff); 3579 /* Handle a few special cases. */ 3580 switch (info->offset) { 3581 case E1000_RDTR: 3582 case E1000_82542_RDTR: 3583 regval |= E1000_RDT_FPDB; 3584 break; 3585 case E1000_TIDV: 3586 case E1000_82542_TIDV: 3587 if (ticks == 0) { 3588 adapter->txd_cmd &= ~E1000_TXD_CMD_IDE; 3589 /* Don't write 0 into the TIDV register. */ 3590 regval++; 3591 } else 3592 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 3593 break; 3594 } 3595 E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval); 3596 EM_UNLOCK(adapter); 3597 return 0; 3598} 3599 3600static void 3601em_add_int_delay_sysctl(struct adapter *adapter, const char *name, 3602 const char *description, struct em_int_delay_info *info, 3603 int offset, int value) 3604{ 3605 info->adapter = adapter; 3606 info->offset = offset; 3607 info->value = value; 3608 SYSCTL_ADD_PROC(device_get_sysctl_ctx(adapter->dev), 3609 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 3610 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, 3611 info, 0, em_sysctl_int_delay, "I", description); 3612} 3613