1238148Sjfv/******************************************************************************
2238148Sjfv
3248292Sjfv  Copyright (c) 2001-2013, Intel Corporation
4238148Sjfv  All rights reserved.
5238148Sjfv
6238148Sjfv  Redistribution and use in source and binary forms, with or without
7238148Sjfv  modification, are permitted provided that the following conditions are met:
8238148Sjfv
9238148Sjfv   1. Redistributions of source code must retain the above copyright notice,
10238148Sjfv      this list of conditions and the following disclaimer.
11238148Sjfv
12238148Sjfv   2. Redistributions in binary form must reproduce the above copyright
13238148Sjfv      notice, this list of conditions and the following disclaimer in the
14238148Sjfv      documentation and/or other materials provided with the distribution.
15238148Sjfv
16238148Sjfv   3. Neither the name of the Intel Corporation nor the names of its
17238148Sjfv      contributors may be used to endorse or promote products derived from
18238148Sjfv      this software without specific prior written permission.
19238148Sjfv
20238148Sjfv  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21238148Sjfv  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22238148Sjfv  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23238148Sjfv  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24238148Sjfv  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25238148Sjfv  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26238148Sjfv  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27238148Sjfv  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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29238148Sjfv  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30238148Sjfv  POSSIBILITY OF SUCH DAMAGE.
31238148Sjfv
32238148Sjfv******************************************************************************/
33238148Sjfv/*$FreeBSD$*/
34238148Sjfv
35238148Sjfv#ifndef _E1000_I210_H_
36238148Sjfv#define _E1000_I210_H_
37238148Sjfv
38238148Sjfvs32 e1000_update_flash_i210(struct e1000_hw *hw);
39238148Sjfvs32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw);
40238148Sjfvs32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw);
41238148Sjfvs32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,
42238148Sjfv			      u16 words, u16 *data);
43238148Sjfvs32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,
44238148Sjfv			     u16 words, u16 *data);
45238148Sjfvs32 e1000_read_invm_i211(struct e1000_hw *hw, u8 address, u16 *data);
46238148Sjfvs32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
47238148Sjfvvoid e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
48238148Sjfv
49238148Sjfv#define E1000_STM_OPCODE		0xDB00
50238148Sjfv#define E1000_EEPROM_FLASH_SIZE_WORD	0x11
51238148Sjfv
52238148Sjfv#define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \
53238148Sjfv	(u8)((invm_dword) & 0x7)
54238148Sjfv#define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \
55238148Sjfv	(u8)(((invm_dword) & 0x0000FE00) >> 9)
56238148Sjfv#define INVM_DWORD_TO_WORD_DATA(invm_dword) \
57238148Sjfv	(u16)(((invm_dword) & 0xFFFF0000) >> 16)
58238148Sjfv
59238148Sjfvenum E1000_INVM_STRUCTURE_TYPE {
60238148Sjfv	E1000_INVM_UNINITIALIZED_STRUCTURE		= 0x00,
61238148Sjfv	E1000_INVM_WORD_AUTOLOAD_STRUCTURE		= 0x01,
62238148Sjfv	E1000_INVM_CSR_AUTOLOAD_STRUCTURE		= 0x02,
63238148Sjfv	E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE	= 0x03,
64238148Sjfv	E1000_INVM_RSA_KEY_SHA256_STRUCTURE		= 0x04,
65238148Sjfv	E1000_INVM_INVALIDATED_STRUCTURE		= 0x0F,
66238148Sjfv};
67238148Sjfv
68238148Sjfv#define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS	8
69238148Sjfv#define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS	1
70248292Sjfv#define E1000_INVM_ULT_BYTES_SIZE	8
71248292Sjfv#define E1000_INVM_RECORD_SIZE_IN_BYTES	4
72248292Sjfv#define E1000_INVM_VER_FIELD_ONE	0x1FF8
73248292Sjfv#define E1000_INVM_VER_FIELD_TWO	0x7FE000
74248292Sjfv#define E1000_INVM_IMGTYPE_FIELD	0x1F800000
75238148Sjfv
76248292Sjfv#define E1000_INVM_MAJOR_MASK	0x3F0
77248292Sjfv#define E1000_INVM_MINOR_MASK	0xF
78248292Sjfv#define E1000_INVM_MAJOR_SHIFT	4
79248292Sjfv
80238148Sjfv#define ID_LED_DEFAULT_I210		((ID_LED_OFF1_ON2  << 8) | \
81238148Sjfv					 (ID_LED_DEF1_DEF2 <<  4) | \
82238148Sjfv					 (ID_LED_OFF1_OFF2))
83238148Sjfv#define ID_LED_DEFAULT_I210_SERDES	((ID_LED_DEF1_DEF2 << 8) | \
84238148Sjfv					 (ID_LED_DEF1_DEF2 <<  4) | \
85238148Sjfv					 (ID_LED_DEF1_DEF2))
86238148Sjfv
87248292Sjfv/* NVM offset defaults for I211 devices */
88248292Sjfv#define NVM_INIT_CTRL_2_DEFAULT_I211	0X7243
89248292Sjfv#define NVM_INIT_CTRL_4_DEFAULT_I211	0x00C1
90248292Sjfv#define NVM_LED_1_CFG_DEFAULT_I211	0x0184
91248292Sjfv#define NVM_LED_0_2_CFG_DEFAULT_I211	0x200C
92238148Sjfv#endif
93