1/** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8/* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32#include <sys/cdefs.h> 33__FBSDID("$FreeBSD$"); 34 35#include <dev/drm2/drmP.h> 36#include <dev/drm2/radeon/radeon_drm.h> 37#include "radeon_drv.h" 38#include "radeon_gem.h" 39#include "radeon_kms.h" 40#include "radeon_irq_kms.h" 41 42#include <dev/drm2/drm_pciids.h> 43 44#include "fb_if.h" 45 46/* 47 * KMS wrapper. 48 * - 2.0.0 - initial interface 49 * - 2.1.0 - add square tiling interface 50 * - 2.2.0 - add r6xx/r7xx const buffer support 51 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 52 * - 2.4.0 - add crtc id query 53 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 54 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 55 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 56 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 57 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 58 * 2.10.0 - fusion 2D tiling 59 * 2.11.0 - backend map, initial compute support for the CS checker 60 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 61 * 2.13.0 - virtual memory support, streamout 62 * 2.14.0 - add evergreen tiling informations 63 * 2.15.0 - add max_pipes query 64 * 2.16.0 - fix evergreen 2D tiled surface calculation 65 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 66 * 2.18.0 - r600-eg: allow "invalid" DB formats 67 * 2.19.0 - r600-eg: MSAA textures 68 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 69 * 2.21.0 - r600-r700: FMASK and CMASK 70 * 2.22.0 - r600 only: RESOLVE_BOX allowed 71 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 72 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 73 * 2.25.0 - eg+: new info request for num SE and num SH 74 * 2.26.0 - r600-eg: fix htile size computation 75 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 76 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 77 * 2.29.0 - R500 FP16 color clear registers 78 */ 79#define KMS_DRIVER_MAJOR 2 80#define KMS_DRIVER_MINOR 29 81#define KMS_DRIVER_PATCHLEVEL 0 82int radeon_suspend_kms(struct drm_device *dev); 83int radeon_resume_kms(struct drm_device *dev); 84extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, 85 int *vpos, int *hpos); 86extern struct drm_ioctl_desc radeon_ioctls_kms[]; 87extern int radeon_max_kms_ioctl; 88#ifdef COMPAT_FREEBSD32 89extern struct drm_ioctl_desc radeon_compat_ioctls[]; 90extern int radeon_num_compat_ioctls; 91#endif 92#ifdef DUMBBELL_WIP 93int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 94#endif /* DUMBBELL_WIP */ 95int radeon_mode_dumb_mmap(struct drm_file *filp, 96 struct drm_device *dev, 97 uint32_t handle, uint64_t *offset_p); 98int radeon_mode_dumb_create(struct drm_file *file_priv, 99 struct drm_device *dev, 100 struct drm_mode_create_dumb *args); 101int radeon_mode_dumb_destroy(struct drm_file *file_priv, 102 struct drm_device *dev, 103 uint32_t handle); 104struct dma_buf *radeon_gem_prime_export(struct drm_device *dev, 105 struct drm_gem_object *obj, 106 int flags); 107struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev, 108 struct dma_buf *dma_buf); 109 110#if defined(CONFIG_DEBUG_FS) 111int radeon_debugfs_init(struct drm_minor *minor); 112void radeon_debugfs_cleanup(struct drm_minor *minor); 113#endif 114 115 116int radeon_no_wb; 117int radeon_modeset = 1; 118int radeon_dynclks = -1; 119int radeon_r4xx_atom = 0; 120int radeon_agpmode = 0; 121int radeon_vram_limit = 0; 122int radeon_gart_size = 512; /* default gart size */ 123int radeon_benchmarking = 0; 124int radeon_testing = 0; 125int radeon_connector_table = 0; 126int radeon_tv = 1; 127int radeon_audio = 0; 128int radeon_disp_priority = 0; 129int radeon_hw_i2c = 0; 130int radeon_pcie_gen2 = -1; 131int radeon_msi = -1; 132int radeon_lockup_timeout = 10000; 133 134#ifdef DUMBBELL_WIP 135MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 136module_param_named(no_wb, radeon_no_wb, int, 0444); 137 138MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 139module_param_named(modeset, radeon_modeset, int, 0400); 140 141MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 142module_param_named(dynclks, radeon_dynclks, int, 0444); 143 144MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 145module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 146 147MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing"); 148module_param_named(vramlimit, radeon_vram_limit, int, 0600); 149 150MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 151module_param_named(agpmode, radeon_agpmode, int, 0444); 152 153MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)"); 154module_param_named(gartsize, radeon_gart_size, int, 0600); 155 156MODULE_PARM_DESC(benchmark, "Run benchmark"); 157module_param_named(benchmark, radeon_benchmarking, int, 0444); 158 159MODULE_PARM_DESC(test, "Run tests"); 160module_param_named(test, radeon_testing, int, 0444); 161 162MODULE_PARM_DESC(connector_table, "Force connector table"); 163module_param_named(connector_table, radeon_connector_table, int, 0444); 164 165MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 166module_param_named(tv, radeon_tv, int, 0444); 167 168MODULE_PARM_DESC(audio, "Audio enable (1 = enable)"); 169module_param_named(audio, radeon_audio, int, 0444); 170 171MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 172module_param_named(disp_priority, radeon_disp_priority, int, 0444); 173 174MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 175module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 176 177MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 178module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 179 180MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 181module_param_named(msi, radeon_msi, int, 0444); 182 183MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)"); 184module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 185 186static int radeon_suspend(struct drm_device *dev, pm_message_t state) 187{ 188 drm_radeon_private_t *dev_priv = dev->dev_private; 189 190 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 191 return 0; 192 193 /* Disable *all* interrupts */ 194 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 195 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 196 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 197 return 0; 198} 199 200static int radeon_resume(struct drm_device *dev) 201{ 202 drm_radeon_private_t *dev_priv = dev->dev_private; 203 204 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 205 return 0; 206 207 /* Restore interrupt registers */ 208 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 209 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 210 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 211 return 0; 212} 213#endif /* DUMBBELL_WIP */ 214 215static drm_pci_id_list_t pciidlist[] = { 216 radeon_PCI_IDS 217}; 218 219#ifdef DUMBBELL_WIP 220static const struct file_operations radeon_driver_old_fops = { 221 .owner = THIS_MODULE, 222 .open = drm_open, 223 .release = drm_release, 224 .unlocked_ioctl = drm_ioctl, 225 .mmap = drm_mmap, 226 .poll = drm_poll, 227 .fasync = drm_fasync, 228 .read = drm_read, 229#ifdef CONFIG_COMPAT 230 .compat_ioctl = radeon_compat_ioctl, 231#endif 232 .llseek = noop_llseek, 233}; 234 235static struct drm_driver driver_old = { 236 .driver_features = 237 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | 238 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, 239 .dev_priv_size = sizeof(drm_radeon_buf_priv_t), 240 .load = radeon_driver_load, 241 .firstopen = radeon_driver_firstopen, 242 .open = radeon_driver_open, 243 .preclose = radeon_driver_preclose, 244 .postclose = radeon_driver_postclose, 245 .lastclose = radeon_driver_lastclose, 246 .unload = radeon_driver_unload, 247#ifdef DUMBBELL_WIP 248 .suspend = radeon_suspend, 249 .resume = radeon_resume, 250#endif /* DUMBBELL_WIP */ 251 .get_vblank_counter = radeon_get_vblank_counter, 252 .enable_vblank = radeon_enable_vblank, 253 .disable_vblank = radeon_disable_vblank, 254 .master_create = radeon_master_create, 255 .master_destroy = radeon_master_destroy, 256 .irq_preinstall = radeon_driver_irq_preinstall, 257 .irq_postinstall = radeon_driver_irq_postinstall, 258 .irq_uninstall = radeon_driver_irq_uninstall, 259 .irq_handler = radeon_driver_irq_handler, 260 .ioctls = radeon_ioctls, 261 .dma_ioctl = radeon_cp_buffers, 262 .fops = &radeon_driver_old_fops, 263 .name = DRIVER_NAME, 264 .desc = DRIVER_DESC, 265 .date = DRIVER_DATE, 266 .major = DRIVER_MAJOR, 267 .minor = DRIVER_MINOR, 268 .patchlevel = DRIVER_PATCHLEVEL, 269}; 270#endif /* DUMBBELL_WIP */ 271 272static struct drm_driver_info kms_driver; 273 274#ifdef DUMBBELL_WIP 275static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 276{ 277 struct apertures_struct *ap; 278 bool primary = false; 279 280 ap = alloc_apertures(1); 281 if (!ap) 282 return -ENOMEM; 283 284 ap->ranges[0].base = pci_resource_start(pdev, 0); 285 ap->ranges[0].size = pci_resource_len(pdev, 0); 286 287#ifdef CONFIG_X86 288 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 289#endif 290 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 291 kfree(ap); 292 293 return 0; 294} 295 296static int radeon_pci_probe(struct pci_dev *pdev, 297 const struct pci_device_id *ent) 298{ 299 int ret; 300 301 /* Get rid of things like offb */ 302 ret = radeon_kick_out_firmware_fb(pdev); 303 if (ret) 304 return ret; 305 306 return drm_get_pci_dev(pdev, ent, &kms_driver); 307} 308 309static void 310radeon_pci_remove(struct pci_dev *pdev) 311{ 312 struct drm_device *dev = pci_get_drvdata(pdev); 313 314 drm_put_dev(dev); 315} 316 317static int 318radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state) 319{ 320 struct drm_device *dev = pci_get_drvdata(pdev); 321 return radeon_suspend_kms(dev, state); 322} 323 324static int 325radeon_pci_resume(struct pci_dev *pdev) 326{ 327 struct drm_device *dev = pci_get_drvdata(pdev); 328 return radeon_resume_kms(dev); 329} 330 331static const struct file_operations radeon_driver_kms_fops = { 332 .owner = THIS_MODULE, 333 .open = drm_open, 334 .release = drm_release, 335 .unlocked_ioctl = drm_ioctl, 336 .mmap = radeon_mmap, 337 .poll = drm_poll, 338 .fasync = drm_fasync, 339 .read = drm_read, 340#ifdef CONFIG_COMPAT 341 .compat_ioctl = radeon_kms_compat_ioctl, 342#endif 343}; 344#endif /* DUMBBELL_WIP */ 345 346static int radeon_sysctl_init(struct drm_device *dev, struct sysctl_ctx_list *ctx, 347 struct sysctl_oid *top) 348{ 349 return drm_add_busid_modesetting(dev, ctx, top); 350} 351 352static struct drm_driver_info kms_driver = { 353 .driver_features = 354 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | 355 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM | 356 DRIVER_PRIME /* | DRIVE_MODESET */, 357#ifdef DUMBBELL_WIP 358 .dev_priv_size = 0, 359#endif /* DUMBBELL_WIP */ 360 .load = radeon_driver_load_kms, 361 .use_msi = radeon_msi_ok, 362 .firstopen = radeon_driver_firstopen_kms, 363 .open = radeon_driver_open_kms, 364 .preclose = radeon_driver_preclose_kms, 365 .postclose = radeon_driver_postclose_kms, 366 .lastclose = radeon_driver_lastclose_kms, 367 .unload = radeon_driver_unload_kms, 368#ifdef DUMBBELL_WIP 369 .suspend = radeon_suspend_kms, 370 .resume = radeon_resume_kms, 371#endif /* DUMBBELL_WIP */ 372 .get_vblank_counter = radeon_get_vblank_counter_kms, 373 .enable_vblank = radeon_enable_vblank_kms, 374 .disable_vblank = radeon_disable_vblank_kms, 375 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 376 .get_scanout_position = radeon_get_crtc_scanoutpos, 377 .irq_preinstall = radeon_driver_irq_preinstall_kms, 378 .irq_postinstall = radeon_driver_irq_postinstall_kms, 379 .irq_uninstall = radeon_driver_irq_uninstall_kms, 380 .irq_handler = radeon_driver_irq_handler_kms, 381 .sysctl_init = radeon_sysctl_init, 382 .ioctls = radeon_ioctls_kms, 383 .gem_init_object = radeon_gem_object_init, 384 .gem_free_object = radeon_gem_object_free, 385 .gem_open_object = radeon_gem_object_open, 386 .gem_close_object = radeon_gem_object_close, 387 .dma_ioctl = radeon_dma_ioctl_kms, 388 .dumb_create = radeon_mode_dumb_create, 389 .dumb_map_offset = radeon_mode_dumb_mmap, 390 .dumb_destroy = radeon_mode_dumb_destroy, 391#ifdef DUMBBELL_WIP 392 .fops = &radeon_driver_kms_fops, 393#endif /* DUMBBELL_WIP */ 394 395#ifdef DUMBBELL_WIP 396 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 397 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 398 .gem_prime_export = radeon_gem_prime_export, 399 .gem_prime_import = radeon_gem_prime_import, 400#endif /* DUMBBELL_WIP */ 401 402 .name = DRIVER_NAME, 403 .desc = DRIVER_DESC, 404 .date = DRIVER_DATE, 405 .major = KMS_DRIVER_MAJOR, 406 .minor = KMS_DRIVER_MINOR, 407 .patchlevel = KMS_DRIVER_PATCHLEVEL, 408}; 409 410#ifdef DUMBBELL_WIP 411static int __init radeon_init(void) 412{ 413 driver = &driver_old; 414 pdriver = &radeon_pci_driver; 415 driver->num_ioctls = radeon_max_ioctl; 416#ifdef CONFIG_VGA_CONSOLE 417 if (vgacon_text_force() && radeon_modeset == -1) { 418 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 419 driver = &driver_old; 420 pdriver = &radeon_pci_driver; 421 driver->driver_features &= ~DRIVER_MODESET; 422 radeon_modeset = 0; 423 } 424#endif 425 /* if enabled by default */ 426 if (radeon_modeset == -1) { 427#ifdef CONFIG_DRM_RADEON_KMS 428 DRM_INFO("radeon defaulting to kernel modesetting.\n"); 429 radeon_modeset = 1; 430#else 431 DRM_INFO("radeon defaulting to userspace modesetting.\n"); 432 radeon_modeset = 0; 433#endif 434 } 435 if (radeon_modeset == 1) { 436 DRM_INFO("radeon kernel modesetting enabled.\n"); 437 driver = &kms_driver; 438 pdriver = &radeon_kms_pci_driver; 439 driver->driver_features |= DRIVER_MODESET; 440 driver->num_ioctls = radeon_max_kms_ioctl; 441 radeon_register_atpx_handler(); 442 } 443 /* if the vga console setting is enabled still 444 * let modprobe override it */ 445 return drm_pci_init(driver, pdriver); 446} 447 448static void __exit radeon_exit(void) 449{ 450 drm_pci_exit(driver, pdriver); 451 radeon_unregister_atpx_handler(); 452} 453#endif /* DUMBBELL_WIP */ 454 455/* =================================================================== */ 456 457static int 458radeon_probe(device_t kdev) 459{ 460 461 return drm_probe(kdev, pciidlist); 462} 463 464static int 465radeon_attach(device_t kdev) 466{ 467 struct drm_device *dev; 468 469 dev = device_get_softc(kdev); 470 if (radeon_modeset == 1) { 471 kms_driver.driver_features |= DRIVER_MODESET; 472 kms_driver.max_ioctl = radeon_max_kms_ioctl; 473#ifdef COMPAT_FREEBSD32 474 kms_driver.compat_ioctls = radeon_compat_ioctls; 475 kms_driver.compat_ioctls_nr = &radeon_num_compat_ioctls; 476#endif 477 radeon_register_atpx_handler(); 478 } 479 dev->driver = &kms_driver; 480 return (drm_attach(kdev, pciidlist)); 481} 482 483static int 484radeon_suspend(device_t kdev) 485{ 486 struct drm_device *dev; 487 int ret; 488 489 dev = device_get_softc(kdev); 490 ret = radeon_suspend_kms(dev); 491 492 return (-ret); 493} 494 495static int 496radeon_resume(device_t kdev) 497{ 498 struct drm_device *dev; 499 int ret; 500 501 dev = device_get_softc(kdev); 502 ret = radeon_resume_kms(dev); 503 504 return (-ret); 505} 506 507extern struct fb_info * radeon_fb_helper_getinfo(device_t kdev); 508 509static device_method_t radeon_methods[] = { 510 /* Device interface */ 511 DEVMETHOD(device_probe, radeon_probe), 512 DEVMETHOD(device_attach, radeon_attach), 513 DEVMETHOD(device_suspend, radeon_suspend), 514 DEVMETHOD(device_resume, radeon_resume), 515 DEVMETHOD(device_detach, drm_detach), 516 517 /* Framebuffer service methods */ 518 DEVMETHOD(fb_getinfo, radeon_fb_helper_getinfo), 519 520 DEVMETHOD_END 521}; 522 523static driver_t radeon_driver = { 524 "drmn", 525 radeon_methods, 526 sizeof(struct drm_device) 527}; 528 529extern devclass_t drm_devclass; 530DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass, 531 NULL, NULL, SI_ORDER_ANY); 532MODULE_DEPEND(radeonkms, drmn, 1, 1, 1); 533MODULE_DEPEND(radeonkms, agp, 1, 1, 1); 534MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1); 535MODULE_DEPEND(radeonkms, iic, 1, 1, 1); 536MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1); 537MODULE_DEPEND(radeonkms, firmware, 1, 1, 1); 538